linux/drivers/net/wireless/intel/iwlwifi/dvm/commands.h
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   1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
   2/*
   3 * Copyright (C) 2005-2014 Intel Corporation
   4 */
   5/*
   6 * Please use this file (commands.h) only for uCode API definitions.
   7 * Please use iwl-xxxx-hw.h for hardware-related definitions.
   8 * Please use dev.h for driver implementation definitions.
   9 */
  10
  11#ifndef __iwl_commands_h__
  12#define __iwl_commands_h__
  13
  14#include <linux/ieee80211.h>
  15#include <linux/types.h>
  16
  17
  18enum {
  19        REPLY_ALIVE = 0x1,
  20        REPLY_ERROR = 0x2,
  21        REPLY_ECHO = 0x3,               /* test command */
  22
  23        /* RXON and QOS commands */
  24        REPLY_RXON = 0x10,
  25        REPLY_RXON_ASSOC = 0x11,
  26        REPLY_QOS_PARAM = 0x13,
  27        REPLY_RXON_TIMING = 0x14,
  28
  29        /* Multi-Station support */
  30        REPLY_ADD_STA = 0x18,
  31        REPLY_REMOVE_STA = 0x19,
  32        REPLY_REMOVE_ALL_STA = 0x1a,    /* not used */
  33        REPLY_TXFIFO_FLUSH = 0x1e,
  34
  35        /* Security */
  36        REPLY_WEPKEY = 0x20,
  37
  38        /* RX, TX, LEDs */
  39        REPLY_TX = 0x1c,
  40        REPLY_LEDS_CMD = 0x48,
  41        REPLY_TX_LINK_QUALITY_CMD = 0x4e,
  42
  43        /* WiMAX coexistence */
  44        COEX_PRIORITY_TABLE_CMD = 0x5a,
  45        COEX_MEDIUM_NOTIFICATION = 0x5b,
  46        COEX_EVENT_CMD = 0x5c,
  47
  48        /* Calibration */
  49        TEMPERATURE_NOTIFICATION = 0x62,
  50        CALIBRATION_CFG_CMD = 0x65,
  51        CALIBRATION_RES_NOTIFICATION = 0x66,
  52        CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
  53
  54        /* 802.11h related */
  55        REPLY_QUIET_CMD = 0x71,         /* not used */
  56        REPLY_CHANNEL_SWITCH = 0x72,
  57        CHANNEL_SWITCH_NOTIFICATION = 0x73,
  58        REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
  59        SPECTRUM_MEASURE_NOTIFICATION = 0x75,
  60
  61        /* Power Management */
  62        POWER_TABLE_CMD = 0x77,
  63        PM_SLEEP_NOTIFICATION = 0x7A,
  64        PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
  65
  66        /* Scan commands and notifications */
  67        REPLY_SCAN_CMD = 0x80,
  68        REPLY_SCAN_ABORT_CMD = 0x81,
  69        SCAN_START_NOTIFICATION = 0x82,
  70        SCAN_RESULTS_NOTIFICATION = 0x83,
  71        SCAN_COMPLETE_NOTIFICATION = 0x84,
  72
  73        /* IBSS/AP commands */
  74        BEACON_NOTIFICATION = 0x90,
  75        REPLY_TX_BEACON = 0x91,
  76        WHO_IS_AWAKE_NOTIFICATION = 0x94,       /* not used */
  77
  78        /* Miscellaneous commands */
  79        REPLY_TX_POWER_DBM_CMD = 0x95,
  80        QUIET_NOTIFICATION = 0x96,              /* not used */
  81        REPLY_TX_PWR_TABLE_CMD = 0x97,
  82        REPLY_TX_POWER_DBM_CMD_V1 = 0x98,       /* old version of API */
  83        TX_ANT_CONFIGURATION_CMD = 0x98,
  84        MEASURE_ABORT_NOTIFICATION = 0x99,      /* not used */
  85
  86        /* Bluetooth device coexistence config command */
  87        REPLY_BT_CONFIG = 0x9b,
  88
  89        /* Statistics */
  90        REPLY_STATISTICS_CMD = 0x9c,
  91        STATISTICS_NOTIFICATION = 0x9d,
  92
  93        /* RF-KILL commands and notifications */
  94        REPLY_CARD_STATE_CMD = 0xa0,
  95        CARD_STATE_NOTIFICATION = 0xa1,
  96
  97        /* Missed beacons notification */
  98        MISSED_BEACONS_NOTIFICATION = 0xa2,
  99
 100        REPLY_CT_KILL_CONFIG_CMD = 0xa4,
 101        SENSITIVITY_CMD = 0xa8,
 102        REPLY_PHY_CALIBRATION_CMD = 0xb0,
 103        REPLY_RX_PHY_CMD = 0xc0,
 104        REPLY_RX_MPDU_CMD = 0xc1,
 105        REPLY_RX = 0xc3,
 106        REPLY_COMPRESSED_BA = 0xc5,
 107
 108        /* BT Coex */
 109        REPLY_BT_COEX_PRIO_TABLE = 0xcc,
 110        REPLY_BT_COEX_PROT_ENV = 0xcd,
 111        REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
 112
 113        /* PAN commands */
 114        REPLY_WIPAN_PARAMS = 0xb2,
 115        REPLY_WIPAN_RXON = 0xb3,        /* use REPLY_RXON structure */
 116        REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
 117        REPLY_WIPAN_RXON_ASSOC = 0xb6,  /* use REPLY_RXON_ASSOC structure */
 118        REPLY_WIPAN_QOS_PARAM = 0xb7,   /* use REPLY_QOS_PARAM structure */
 119        REPLY_WIPAN_WEPKEY = 0xb8,      /* use REPLY_WEPKEY structure */
 120        REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
 121        REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
 122        REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
 123
 124        REPLY_WOWLAN_PATTERNS = 0xe0,
 125        REPLY_WOWLAN_WAKEUP_FILTER = 0xe1,
 126        REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2,
 127        REPLY_WOWLAN_TKIP_PARAMS = 0xe3,
 128        REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4,
 129        REPLY_WOWLAN_GET_STATUS = 0xe5,
 130        REPLY_D3_CONFIG = 0xd3,
 131
 132        REPLY_MAX = 0xff
 133};
 134
 135/*
 136 * Minimum number of queues. MAX_NUM is defined in hw specific files.
 137 * Set the minimum to accommodate
 138 *  - 4 standard TX queues
 139 *  - the command queue
 140 *  - 4 PAN TX queues
 141 *  - the PAN multicast queue, and
 142 *  - the AUX (TX during scan dwell) queue.
 143 */
 144#define IWL_MIN_NUM_QUEUES      11
 145
 146/*
 147 * Command queue depends on iPAN support.
 148 */
 149#define IWL_DEFAULT_CMD_QUEUE_NUM       4
 150#define IWL_IPAN_CMD_QUEUE_NUM          9
 151
 152#define IWL_TX_FIFO_BK          0       /* shared */
 153#define IWL_TX_FIFO_BE          1
 154#define IWL_TX_FIFO_VI          2       /* shared */
 155#define IWL_TX_FIFO_VO          3
 156#define IWL_TX_FIFO_BK_IPAN     IWL_TX_FIFO_BK
 157#define IWL_TX_FIFO_BE_IPAN     4
 158#define IWL_TX_FIFO_VI_IPAN     IWL_TX_FIFO_VI
 159#define IWL_TX_FIFO_VO_IPAN     5
 160/* re-uses the VO FIFO, uCode will properly flush/schedule */
 161#define IWL_TX_FIFO_AUX         5
 162#define IWL_TX_FIFO_UNUSED      255
 163
 164#define IWLAGN_CMD_FIFO_NUM     7
 165
 166/*
 167 * This queue number is required for proper operation
 168 * because the ucode will stop/start the scheduler as
 169 * required.
 170 */
 171#define IWL_IPAN_MCAST_QUEUE    8
 172
 173/******************************************************************************
 174 * (0)
 175 * Commonly used structures and definitions:
 176 * Command header, rate_n_flags, txpower
 177 *
 178 *****************************************************************************/
 179
 180/**
 181 * iwlagn rate_n_flags bit fields
 182 *
 183 * rate_n_flags format is used in following iwlagn commands:
 184 *  REPLY_RX (response only)
 185 *  REPLY_RX_MPDU (response only)
 186 *  REPLY_TX (both command and response)
 187 *  REPLY_TX_LINK_QUALITY_CMD
 188 *
 189 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
 190 *  2-0:  0)   6 Mbps
 191 *        1)  12 Mbps
 192 *        2)  18 Mbps
 193 *        3)  24 Mbps
 194 *        4)  36 Mbps
 195 *        5)  48 Mbps
 196 *        6)  54 Mbps
 197 *        7)  60 Mbps
 198 *
 199 *  4-3:  0)  Single stream (SISO)
 200 *        1)  Dual stream (MIMO)
 201 *        2)  Triple stream (MIMO)
 202 *
 203 *    5:  Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
 204 *
 205 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
 206 *  3-0:  0xD)   6 Mbps
 207 *        0xF)   9 Mbps
 208 *        0x5)  12 Mbps
 209 *        0x7)  18 Mbps
 210 *        0x9)  24 Mbps
 211 *        0xB)  36 Mbps
 212 *        0x1)  48 Mbps
 213 *        0x3)  54 Mbps
 214 *
 215 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
 216 *  6-0:   10)  1 Mbps
 217 *         20)  2 Mbps
 218 *         55)  5.5 Mbps
 219 *        110)  11 Mbps
 220 */
 221#define RATE_MCS_CODE_MSK 0x7
 222#define RATE_MCS_SPATIAL_POS 3
 223#define RATE_MCS_SPATIAL_MSK 0x18
 224#define RATE_MCS_HT_DUP_POS 5
 225#define RATE_MCS_HT_DUP_MSK 0x20
 226/* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
 227#define RATE_MCS_RATE_MSK 0xff
 228
 229/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
 230#define RATE_MCS_FLAGS_POS 8
 231#define RATE_MCS_HT_POS 8
 232#define RATE_MCS_HT_MSK 0x100
 233
 234/* Bit 9: (1) CCK, (0) OFDM.  HT (bit 8) must be "0" for this bit to be valid */
 235#define RATE_MCS_CCK_POS 9
 236#define RATE_MCS_CCK_MSK 0x200
 237
 238/* Bit 10: (1) Use Green Field preamble */
 239#define RATE_MCS_GF_POS 10
 240#define RATE_MCS_GF_MSK 0x400
 241
 242/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
 243#define RATE_MCS_HT40_POS 11
 244#define RATE_MCS_HT40_MSK 0x800
 245
 246/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
 247#define RATE_MCS_DUP_POS 12
 248#define RATE_MCS_DUP_MSK 0x1000
 249
 250/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
 251#define RATE_MCS_SGI_POS 13
 252#define RATE_MCS_SGI_MSK 0x2000
 253
 254/**
 255 * rate_n_flags Tx antenna masks
 256 * bit14:16
 257 */
 258#define RATE_MCS_ANT_POS        14
 259#define RATE_MCS_ANT_A_MSK      0x04000
 260#define RATE_MCS_ANT_B_MSK      0x08000
 261#define RATE_MCS_ANT_C_MSK      0x10000
 262#define RATE_MCS_ANT_AB_MSK     (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
 263#define RATE_MCS_ANT_ABC_MSK    (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
 264#define RATE_ANT_NUM 3
 265
 266#define POWER_TABLE_NUM_ENTRIES                 33
 267#define POWER_TABLE_NUM_HT_OFDM_ENTRIES         32
 268#define POWER_TABLE_CCK_ENTRY                   32
 269
 270#define IWL_PWR_NUM_HT_OFDM_ENTRIES             24
 271#define IWL_PWR_CCK_ENTRIES                     2
 272
 273/**
 274 * struct tx_power_dual_stream
 275 *
 276 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
 277 *
 278 * Same format as iwl_tx_power_dual_stream, but __le32
 279 */
 280struct tx_power_dual_stream {
 281        __le32 dw;
 282} __packed;
 283
 284/**
 285 * Command REPLY_TX_POWER_DBM_CMD = 0x98
 286 * struct iwlagn_tx_power_dbm_cmd
 287 */
 288#define IWLAGN_TX_POWER_AUTO 0x7f
 289#define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
 290
 291struct iwlagn_tx_power_dbm_cmd {
 292        s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
 293        u8 flags;
 294        s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
 295        u8 reserved;
 296} __packed;
 297
 298/**
 299 * Command TX_ANT_CONFIGURATION_CMD = 0x98
 300 * This command is used to configure valid Tx antenna.
 301 * By default uCode concludes the valid antenna according to the radio flavor.
 302 * This command enables the driver to override/modify this conclusion.
 303 */
 304struct iwl_tx_ant_config_cmd {
 305        __le32 valid;
 306} __packed;
 307
 308/******************************************************************************
 309 * (0a)
 310 * Alive and Error Commands & Responses:
 311 *
 312 *****************************************************************************/
 313
 314#define UCODE_VALID_OK  cpu_to_le32(0x1)
 315
 316/**
 317 * REPLY_ALIVE = 0x1 (response only, not a command)
 318 *
 319 * uCode issues this "alive" notification once the runtime image is ready
 320 * to receive commands from the driver.  This is the *second* "alive"
 321 * notification that the driver will receive after rebooting uCode;
 322 * this "alive" is indicated by subtype field != 9.
 323 *
 324 * See comments documenting "BSM" (bootstrap state machine).
 325 *
 326 * This response includes two pointers to structures within the device's
 327 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
 328 *
 329 * 1)  log_event_table_ptr indicates base of the event log.  This traces
 330 *     a 256-entry history of uCode execution within a circular buffer.
 331 *     Its header format is:
 332 *
 333 *      __le32 log_size;     log capacity (in number of entries)
 334 *      __le32 type;         (1) timestamp with each entry, (0) no timestamp
 335 *      __le32 wraps;        # times uCode has wrapped to top of circular buffer
 336 *      __le32 write_index;  next circular buffer entry that uCode would fill
 337 *
 338 *     The header is followed by the circular buffer of log entries.  Entries
 339 *     with timestamps have the following format:
 340 *
 341 *      __le32 event_id;     range 0 - 1500
 342 *      __le32 timestamp;    low 32 bits of TSF (of network, if associated)
 343 *      __le32 data;         event_id-specific data value
 344 *
 345 *     Entries without timestamps contain only event_id and data.
 346 *
 347 *
 348 * 2)  error_event_table_ptr indicates base of the error log.  This contains
 349 *     information about any uCode error that occurs.  For agn, the format
 350 *     of the error log is defined by struct iwl_error_event_table.
 351 *
 352 * The Linux driver can print both logs to the system log when a uCode error
 353 * occurs.
 354 */
 355
 356/*
 357 * Note: This structure is read from the device with IO accesses,
 358 * and the reading already does the endian conversion. As it is
 359 * read with u32-sized accesses, any members with a different size
 360 * need to be ordered correctly though!
 361 */
 362struct iwl_error_event_table {
 363        u32 valid;              /* (nonzero) valid, (0) log is empty */
 364        u32 error_id;           /* type of error */
 365        u32 pc;                 /* program counter */
 366        u32 blink1;             /* branch link */
 367        u32 blink2;             /* branch link */
 368        u32 ilink1;             /* interrupt link */
 369        u32 ilink2;             /* interrupt link */
 370        u32 data1;              /* error-specific data */
 371        u32 data2;              /* error-specific data */
 372        u32 line;               /* source code line of error */
 373        u32 bcon_time;          /* beacon timer */
 374        u32 tsf_low;            /* network timestamp function timer */
 375        u32 tsf_hi;             /* network timestamp function timer */
 376        u32 gp1;                /* GP1 timer register */
 377        u32 gp2;                /* GP2 timer register */
 378        u32 gp3;                /* GP3 timer register */
 379        u32 ucode_ver;          /* uCode version */
 380        u32 hw_ver;             /* HW Silicon version */
 381        u32 brd_ver;            /* HW board version */
 382        u32 log_pc;             /* log program counter */
 383        u32 frame_ptr;          /* frame pointer */
 384        u32 stack_ptr;          /* stack pointer */
 385        u32 hcmd;               /* last host command header */
 386        u32 isr0;               /* isr status register LMPM_NIC_ISR0:
 387                                 * rxtx_flag */
 388        u32 isr1;               /* isr status register LMPM_NIC_ISR1:
 389                                 * host_flag */
 390        u32 isr2;               /* isr status register LMPM_NIC_ISR2:
 391                                 * enc_flag */
 392        u32 isr3;               /* isr status register LMPM_NIC_ISR3:
 393                                 * time_flag */
 394        u32 isr4;               /* isr status register LMPM_NIC_ISR4:
 395                                 * wico interrupt */
 396        u32 isr_pref;           /* isr status register LMPM_NIC_PREF_STAT */
 397        u32 wait_event;         /* wait event() caller address */
 398        u32 l2p_control;        /* L2pControlField */
 399        u32 l2p_duration;       /* L2pDurationField */
 400        u32 l2p_mhvalid;        /* L2pMhValidBits */
 401        u32 l2p_addr_match;     /* L2pAddrMatchStat */
 402        u32 lmpm_pmg_sel;       /* indicate which clocks are turned on
 403                                 * (LMPM_PMG_SEL) */
 404        u32 u_timestamp;        /* indicate when the date and time of the
 405                                 * compilation */
 406        u32 flow_handler;       /* FH read/write pointers, RX credit */
 407} __packed;
 408
 409struct iwl_alive_resp {
 410        u8 ucode_minor;
 411        u8 ucode_major;
 412        __le16 reserved1;
 413        u8 sw_rev[8];
 414        u8 ver_type;
 415        u8 ver_subtype;                 /* not "9" for runtime alive */
 416        __le16 reserved2;
 417        __le32 log_event_table_ptr;     /* SRAM address for event log */
 418        __le32 error_event_table_ptr;   /* SRAM address for error log */
 419        __le32 timestamp;
 420        __le32 is_valid;
 421} __packed;
 422
 423/*
 424 * REPLY_ERROR = 0x2 (response only, not a command)
 425 */
 426struct iwl_error_resp {
 427        __le32 error_type;
 428        u8 cmd_id;
 429        u8 reserved1;
 430        __le16 bad_cmd_seq_num;
 431        __le32 error_info;
 432        __le64 timestamp;
 433} __packed;
 434
 435/******************************************************************************
 436 * (1)
 437 * RXON Commands & Responses:
 438 *
 439 *****************************************************************************/
 440
 441/*
 442 * Rx config defines & structure
 443 */
 444/* rx_config device types  */
 445enum {
 446        RXON_DEV_TYPE_AP = 1,
 447        RXON_DEV_TYPE_ESS = 3,
 448        RXON_DEV_TYPE_IBSS = 4,
 449        RXON_DEV_TYPE_SNIFFER = 6,
 450        RXON_DEV_TYPE_CP = 7,
 451        RXON_DEV_TYPE_2STA = 8,
 452        RXON_DEV_TYPE_P2P = 9,
 453};
 454
 455
 456#define RXON_RX_CHAIN_DRIVER_FORCE_MSK          cpu_to_le16(0x1 << 0)
 457#define RXON_RX_CHAIN_DRIVER_FORCE_POS          (0)
 458#define RXON_RX_CHAIN_VALID_MSK                 cpu_to_le16(0x7 << 1)
 459#define RXON_RX_CHAIN_VALID_POS                 (1)
 460#define RXON_RX_CHAIN_FORCE_SEL_MSK             cpu_to_le16(0x7 << 4)
 461#define RXON_RX_CHAIN_FORCE_SEL_POS             (4)
 462#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK        cpu_to_le16(0x7 << 7)
 463#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS        (7)
 464#define RXON_RX_CHAIN_CNT_MSK                   cpu_to_le16(0x3 << 10)
 465#define RXON_RX_CHAIN_CNT_POS                   (10)
 466#define RXON_RX_CHAIN_MIMO_CNT_MSK              cpu_to_le16(0x3 << 12)
 467#define RXON_RX_CHAIN_MIMO_CNT_POS              (12)
 468#define RXON_RX_CHAIN_MIMO_FORCE_MSK            cpu_to_le16(0x1 << 14)
 469#define RXON_RX_CHAIN_MIMO_FORCE_POS            (14)
 470
 471/* rx_config flags */
 472/* band & modulation selection */
 473#define RXON_FLG_BAND_24G_MSK           cpu_to_le32(1 << 0)
 474#define RXON_FLG_CCK_MSK                cpu_to_le32(1 << 1)
 475/* auto detection enable */
 476#define RXON_FLG_AUTO_DETECT_MSK        cpu_to_le32(1 << 2)
 477/* TGg protection when tx */
 478#define RXON_FLG_TGG_PROTECT_MSK        cpu_to_le32(1 << 3)
 479/* cck short slot & preamble */
 480#define RXON_FLG_SHORT_SLOT_MSK          cpu_to_le32(1 << 4)
 481#define RXON_FLG_SHORT_PREAMBLE_MSK     cpu_to_le32(1 << 5)
 482/* antenna selection */
 483#define RXON_FLG_DIS_DIV_MSK            cpu_to_le32(1 << 7)
 484#define RXON_FLG_ANT_SEL_MSK            cpu_to_le32(0x0f00)
 485#define RXON_FLG_ANT_A_MSK              cpu_to_le32(1 << 8)
 486#define RXON_FLG_ANT_B_MSK              cpu_to_le32(1 << 9)
 487/* radar detection enable */
 488#define RXON_FLG_RADAR_DETECT_MSK       cpu_to_le32(1 << 12)
 489#define RXON_FLG_TGJ_NARROW_BAND_MSK    cpu_to_le32(1 << 13)
 490/* rx response to host with 8-byte TSF
 491* (according to ON_AIR deassertion) */
 492#define RXON_FLG_TSF2HOST_MSK           cpu_to_le32(1 << 15)
 493
 494
 495/* HT flags */
 496#define RXON_FLG_CTRL_CHANNEL_LOC_POS           (22)
 497#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK        cpu_to_le32(0x1 << 22)
 498
 499#define RXON_FLG_HT_OPERATING_MODE_POS          (23)
 500
 501#define RXON_FLG_HT_PROT_MSK                    cpu_to_le32(0x1 << 23)
 502#define RXON_FLG_HT40_PROT_MSK                  cpu_to_le32(0x2 << 23)
 503
 504#define RXON_FLG_CHANNEL_MODE_POS               (25)
 505#define RXON_FLG_CHANNEL_MODE_MSK               cpu_to_le32(0x3 << 25)
 506
 507/* channel mode */
 508enum {
 509        CHANNEL_MODE_LEGACY = 0,
 510        CHANNEL_MODE_PURE_40 = 1,
 511        CHANNEL_MODE_MIXED = 2,
 512        CHANNEL_MODE_RESERVED = 3,
 513};
 514#define RXON_FLG_CHANNEL_MODE_LEGACY    cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
 515#define RXON_FLG_CHANNEL_MODE_PURE_40   cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
 516#define RXON_FLG_CHANNEL_MODE_MIXED     cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
 517
 518/* CTS to self (if spec allows) flag */
 519#define RXON_FLG_SELF_CTS_EN                    cpu_to_le32(0x1<<30)
 520
 521/* rx_config filter flags */
 522/* accept all data frames */
 523#define RXON_FILTER_PROMISC_MSK         cpu_to_le32(1 << 0)
 524/* pass control & management to host */
 525#define RXON_FILTER_CTL2HOST_MSK        cpu_to_le32(1 << 1)
 526/* accept multi-cast */
 527#define RXON_FILTER_ACCEPT_GRP_MSK      cpu_to_le32(1 << 2)
 528/* don't decrypt uni-cast frames */
 529#define RXON_FILTER_DIS_DECRYPT_MSK     cpu_to_le32(1 << 3)
 530/* don't decrypt multi-cast frames */
 531#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
 532/* STA is associated */
 533#define RXON_FILTER_ASSOC_MSK           cpu_to_le32(1 << 5)
 534/* transfer to host non bssid beacons in associated state */
 535#define RXON_FILTER_BCON_AWARE_MSK      cpu_to_le32(1 << 6)
 536
 537/**
 538 * REPLY_RXON = 0x10 (command, has simple generic response)
 539 *
 540 * RXON tunes the radio tuner to a service channel, and sets up a number
 541 * of parameters that are used primarily for Rx, but also for Tx operations.
 542 *
 543 * NOTE:  When tuning to a new channel, driver must set the
 544 *        RXON_FILTER_ASSOC_MSK to 0.  This will clear station-dependent
 545 *        info within the device, including the station tables, tx retry
 546 *        rate tables, and txpower tables.  Driver must build a new station
 547 *        table and txpower table before transmitting anything on the RXON
 548 *        channel.
 549 *
 550 * NOTE:  All RXONs wipe clean the internal txpower table.  Driver must
 551 *        issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
 552 *        regardless of whether RXON_FILTER_ASSOC_MSK is set.
 553 */
 554
 555struct iwl_rxon_cmd {
 556        u8 node_addr[6];
 557        __le16 reserved1;
 558        u8 bssid_addr[6];
 559        __le16 reserved2;
 560        u8 wlap_bssid_addr[6];
 561        __le16 reserved3;
 562        u8 dev_type;
 563        u8 air_propagation;
 564        __le16 rx_chain;
 565        u8 ofdm_basic_rates;
 566        u8 cck_basic_rates;
 567        __le16 assoc_id;
 568        __le32 flags;
 569        __le32 filter_flags;
 570        __le16 channel;
 571        u8 ofdm_ht_single_stream_basic_rates;
 572        u8 ofdm_ht_dual_stream_basic_rates;
 573        u8 ofdm_ht_triple_stream_basic_rates;
 574        u8 reserved5;
 575        __le16 acquisition_data;
 576        __le16 reserved6;
 577} __packed;
 578
 579/*
 580 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
 581 */
 582struct iwl_rxon_assoc_cmd {
 583        __le32 flags;
 584        __le32 filter_flags;
 585        u8 ofdm_basic_rates;
 586        u8 cck_basic_rates;
 587        __le16 reserved1;
 588        u8 ofdm_ht_single_stream_basic_rates;
 589        u8 ofdm_ht_dual_stream_basic_rates;
 590        u8 ofdm_ht_triple_stream_basic_rates;
 591        u8 reserved2;
 592        __le16 rx_chain_select_flags;
 593        __le16 acquisition_data;
 594        __le32 reserved3;
 595} __packed;
 596
 597#define IWL_CONN_MAX_LISTEN_INTERVAL    10
 598#define IWL_MAX_UCODE_BEACON_INTERVAL   4 /* 4096 */
 599
 600/*
 601 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
 602 */
 603struct iwl_rxon_time_cmd {
 604        __le64 timestamp;
 605        __le16 beacon_interval;
 606        __le16 atim_window;
 607        __le32 beacon_init_val;
 608        __le16 listen_interval;
 609        u8 dtim_period;
 610        u8 delta_cp_bss_tbtts;
 611} __packed;
 612
 613/*
 614 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
 615 */
 616/**
 617 * struct iwl5000_channel_switch_cmd
 618 * @band: 0- 5.2GHz, 1- 2.4GHz
 619 * @expect_beacon: 0- resume transmits after channel switch
 620 *                 1- wait for beacon to resume transmits
 621 * @channel: new channel number
 622 * @rxon_flags: Rx on flags
 623 * @rxon_filter_flags: filtering parameters
 624 * @switch_time: switch time in extended beacon format
 625 * @reserved: reserved bytes
 626 */
 627struct iwl5000_channel_switch_cmd {
 628        u8 band;
 629        u8 expect_beacon;
 630        __le16 channel;
 631        __le32 rxon_flags;
 632        __le32 rxon_filter_flags;
 633        __le32 switch_time;
 634        __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
 635} __packed;
 636
 637/**
 638 * struct iwl6000_channel_switch_cmd
 639 * @band: 0- 5.2GHz, 1- 2.4GHz
 640 * @expect_beacon: 0- resume transmits after channel switch
 641 *                 1- wait for beacon to resume transmits
 642 * @channel: new channel number
 643 * @rxon_flags: Rx on flags
 644 * @rxon_filter_flags: filtering parameters
 645 * @switch_time: switch time in extended beacon format
 646 * @reserved: reserved bytes
 647 */
 648struct iwl6000_channel_switch_cmd {
 649        u8 band;
 650        u8 expect_beacon;
 651        __le16 channel;
 652        __le32 rxon_flags;
 653        __le32 rxon_filter_flags;
 654        __le32 switch_time;
 655        __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
 656} __packed;
 657
 658/*
 659 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
 660 */
 661struct iwl_csa_notification {
 662        __le16 band;
 663        __le16 channel;
 664        __le32 status;          /* 0 - OK, 1 - fail */
 665} __packed;
 666
 667/******************************************************************************
 668 * (2)
 669 * Quality-of-Service (QOS) Commands & Responses:
 670 *
 671 *****************************************************************************/
 672
 673/**
 674 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
 675 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
 676 *
 677 * @cw_min: Contention window, start value in numbers of slots.
 678 *          Should be a power-of-2, minus 1.  Device's default is 0x0f.
 679 * @cw_max: Contention window, max value in numbers of slots.
 680 *          Should be a power-of-2, minus 1.  Device's default is 0x3f.
 681 * @aifsn:  Number of slots in Arbitration Interframe Space (before
 682 *          performing random backoff timing prior to Tx).  Device default 1.
 683 * @edca_txop:  Length of Tx opportunity, in uSecs.  Device default is 0.
 684 *
 685 * Device will automatically increase contention window by (2*CW) + 1 for each
 686 * transmission retry.  Device uses cw_max as a bit mask, ANDed with new CW
 687 * value, to cap the CW value.
 688 */
 689struct iwl_ac_qos {
 690        __le16 cw_min;
 691        __le16 cw_max;
 692        u8 aifsn;
 693        u8 reserved1;
 694        __le16 edca_txop;
 695} __packed;
 696
 697/* QoS flags defines */
 698#define QOS_PARAM_FLG_UPDATE_EDCA_MSK   cpu_to_le32(0x01)
 699#define QOS_PARAM_FLG_TGN_MSK           cpu_to_le32(0x02)
 700#define QOS_PARAM_FLG_TXOP_TYPE_MSK     cpu_to_le32(0x10)
 701
 702/* Number of Access Categories (AC) (EDCA), queues 0..3 */
 703#define AC_NUM                4
 704
 705/*
 706 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
 707 *
 708 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
 709 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
 710 */
 711struct iwl_qosparam_cmd {
 712        __le32 qos_flags;
 713        struct iwl_ac_qos ac[AC_NUM];
 714} __packed;
 715
 716/******************************************************************************
 717 * (3)
 718 * Add/Modify Stations Commands & Responses:
 719 *
 720 *****************************************************************************/
 721/*
 722 * Multi station support
 723 */
 724
 725/* Special, dedicated locations within device's station table */
 726#define IWL_AP_ID               0
 727#define IWL_AP_ID_PAN           1
 728#define IWL_STA_ID              2
 729#define IWLAGN_PAN_BCAST_ID     14
 730#define IWLAGN_BROADCAST_ID     15
 731#define IWLAGN_STATION_COUNT    16
 732
 733#define IWL_TID_NON_QOS IWL_MAX_TID_COUNT
 734
 735#define STA_FLG_TX_RATE_MSK             cpu_to_le32(1 << 2)
 736#define STA_FLG_PWR_SAVE_MSK            cpu_to_le32(1 << 8)
 737#define STA_FLG_PAN_STATION             cpu_to_le32(1 << 13)
 738#define STA_FLG_RTS_MIMO_PROT_MSK       cpu_to_le32(1 << 17)
 739#define STA_FLG_AGG_MPDU_8US_MSK        cpu_to_le32(1 << 18)
 740#define STA_FLG_MAX_AGG_SIZE_POS        (19)
 741#define STA_FLG_MAX_AGG_SIZE_MSK        cpu_to_le32(3 << 19)
 742#define STA_FLG_HT40_EN_MSK             cpu_to_le32(1 << 21)
 743#define STA_FLG_MIMO_DIS_MSK            cpu_to_le32(1 << 22)
 744#define STA_FLG_AGG_MPDU_DENSITY_POS    (23)
 745#define STA_FLG_AGG_MPDU_DENSITY_MSK    cpu_to_le32(7 << 23)
 746
 747/* Use in mode field.  1: modify existing entry, 0: add new station entry */
 748#define STA_CONTROL_MODIFY_MSK          0x01
 749
 750/* key flags __le16*/
 751#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
 752#define STA_KEY_FLG_NO_ENC      cpu_to_le16(0x0000)
 753#define STA_KEY_FLG_WEP         cpu_to_le16(0x0001)
 754#define STA_KEY_FLG_CCMP        cpu_to_le16(0x0002)
 755#define STA_KEY_FLG_TKIP        cpu_to_le16(0x0003)
 756
 757#define STA_KEY_FLG_KEYID_POS   8
 758#define STA_KEY_FLG_INVALID     cpu_to_le16(0x0800)
 759/* wep key is either from global key (0) or from station info array (1) */
 760#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
 761
 762/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
 763#define STA_KEY_FLG_KEY_SIZE_MSK     cpu_to_le16(0x1000)
 764#define STA_KEY_MULTICAST_MSK        cpu_to_le16(0x4000)
 765#define STA_KEY_MAX_NUM         8
 766#define STA_KEY_MAX_NUM_PAN     16
 767/* must not match WEP_INVALID_OFFSET */
 768#define IWLAGN_HW_KEY_DEFAULT   0xfe
 769
 770/* Flags indicate whether to modify vs. don't change various station params */
 771#define STA_MODIFY_KEY_MASK             0x01
 772#define STA_MODIFY_TID_DISABLE_TX       0x02
 773#define STA_MODIFY_TX_RATE_MSK          0x04
 774#define STA_MODIFY_ADDBA_TID_MSK        0x08
 775#define STA_MODIFY_DELBA_TID_MSK        0x10
 776#define STA_MODIFY_SLEEP_TX_COUNT_MSK   0x20
 777
 778/* agn */
 779struct iwl_keyinfo {
 780        __le16 key_flags;
 781        u8 tkip_rx_tsc_byte2;   /* TSC[2] for key mix ph1 detection */
 782        u8 reserved1;
 783        __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
 784        u8 key_offset;
 785        u8 reserved2;
 786        u8 key[16];             /* 16-byte unicast decryption key */
 787        __le64 tx_secur_seq_cnt;
 788        __le64 hw_tkip_mic_rx_key;
 789        __le64 hw_tkip_mic_tx_key;
 790} __packed;
 791
 792/**
 793 * struct sta_id_modify
 794 * @addr[ETH_ALEN]: station's MAC address
 795 * @sta_id: index of station in uCode's station table
 796 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
 797 *
 798 * Driver selects unused table index when adding new station,
 799 * or the index to a pre-existing station entry when modifying that station.
 800 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
 801 *
 802 * modify_mask flags select which parameters to modify vs. leave alone.
 803 */
 804struct sta_id_modify {
 805        u8 addr[ETH_ALEN];
 806        __le16 reserved1;
 807        u8 sta_id;
 808        u8 modify_mask;
 809        __le16 reserved2;
 810} __packed;
 811
 812/*
 813 * REPLY_ADD_STA = 0x18 (command)
 814 *
 815 * The device contains an internal table of per-station information,
 816 * with info on security keys, aggregation parameters, and Tx rates for
 817 * initial Tx attempt and any retries (agn devices uses
 818 * REPLY_TX_LINK_QUALITY_CMD,
 819 *
 820 * REPLY_ADD_STA sets up the table entry for one station, either creating
 821 * a new entry, or modifying a pre-existing one.
 822 *
 823 * NOTE:  RXON command (without "associated" bit set) wipes the station table
 824 *        clean.  Moving into RF_KILL state does this also.  Driver must set up
 825 *        new station table before transmitting anything on the RXON channel
 826 *        (except active scans or active measurements; those commands carry
 827 *        their own txpower/rate setup data).
 828 *
 829 *        When getting started on a new channel, driver must set up the
 830 *        IWL_BROADCAST_ID entry (last entry in the table).  For a client
 831 *        station in a BSS, once an AP is selected, driver sets up the AP STA
 832 *        in the IWL_AP_ID entry (1st entry in the table).  BROADCAST and AP
 833 *        are all that are needed for a BSS client station.  If the device is
 834 *        used as AP, or in an IBSS network, driver must set up station table
 835 *        entries for all STAs in network, starting with index IWL_STA_ID.
 836 */
 837
 838struct iwl_addsta_cmd {
 839        u8 mode;                /* 1: modify existing, 0: add new station */
 840        u8 reserved[3];
 841        struct sta_id_modify sta;
 842        struct iwl_keyinfo key;
 843        __le32 station_flags;           /* STA_FLG_* */
 844        __le32 station_flags_msk;       /* STA_FLG_* */
 845
 846        /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
 847         * corresponding to bit (e.g. bit 5 controls TID 5).
 848         * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
 849        __le16 tid_disable_tx;
 850        __le16 legacy_reserved;
 851
 852        /* TID for which to add block-ack support.
 853         * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
 854        u8 add_immediate_ba_tid;
 855
 856        /* TID for which to remove block-ack support.
 857         * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
 858        u8 remove_immediate_ba_tid;
 859
 860        /* Starting Sequence Number for added block-ack support.
 861         * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
 862        __le16 add_immediate_ba_ssn;
 863
 864        /*
 865         * Number of packets OK to transmit to station even though
 866         * it is asleep -- used to synchronise PS-poll and u-APSD
 867         * responses while ucode keeps track of STA sleep state.
 868         */
 869        __le16 sleep_tx_count;
 870
 871        __le16 reserved2;
 872} __packed;
 873
 874
 875#define ADD_STA_SUCCESS_MSK             0x1
 876#define ADD_STA_NO_ROOM_IN_TABLE        0x2
 877#define ADD_STA_NO_BLOCK_ACK_RESOURCE   0x4
 878#define ADD_STA_MODIFY_NON_EXIST_STA    0x8
 879/*
 880 * REPLY_ADD_STA = 0x18 (response)
 881 */
 882struct iwl_add_sta_resp {
 883        u8 status;      /* ADD_STA_* */
 884} __packed;
 885
 886#define REM_STA_SUCCESS_MSK              0x1
 887/*
 888 *  REPLY_REM_STA = 0x19 (response)
 889 */
 890struct iwl_rem_sta_resp {
 891        u8 status;
 892} __packed;
 893
 894/*
 895 *  REPLY_REM_STA = 0x19 (command)
 896 */
 897struct iwl_rem_sta_cmd {
 898        u8 num_sta;     /* number of removed stations */
 899        u8 reserved[3];
 900        u8 addr[ETH_ALEN]; /* MAC addr of the first station */
 901        u8 reserved2[2];
 902} __packed;
 903
 904
 905/* WiFi queues mask */
 906#define IWL_SCD_BK_MSK                  BIT(0)
 907#define IWL_SCD_BE_MSK                  BIT(1)
 908#define IWL_SCD_VI_MSK                  BIT(2)
 909#define IWL_SCD_VO_MSK                  BIT(3)
 910#define IWL_SCD_MGMT_MSK                BIT(3)
 911
 912/* PAN queues mask */
 913#define IWL_PAN_SCD_BK_MSK              BIT(4)
 914#define IWL_PAN_SCD_BE_MSK              BIT(5)
 915#define IWL_PAN_SCD_VI_MSK              BIT(6)
 916#define IWL_PAN_SCD_VO_MSK              BIT(7)
 917#define IWL_PAN_SCD_MGMT_MSK            BIT(7)
 918#define IWL_PAN_SCD_MULTICAST_MSK       BIT(8)
 919
 920#define IWL_AGG_TX_QUEUE_MSK            0xffc00
 921
 922#define IWL_DROP_ALL                    BIT(1)
 923
 924/*
 925 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
 926 *
 927 * When using full FIFO flush this command checks the scheduler HW block WR/RD
 928 * pointers to check if all the frames were transferred by DMA into the
 929 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
 930 * empty the command can finish.
 931 * This command is used to flush the TXFIFO from transmit commands, it may
 932 * operate on single or multiple queues, the command queue can't be flushed by
 933 * this command. The command response is returned when all the queue flush
 934 * operations are done. Each TX command flushed return response with the FLUSH
 935 * status set in the TX response status. When FIFO flush operation is used,
 936 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
 937 * are set.
 938 *
 939 * @queue_control: bit mask for which queues to flush
 940 * @flush_control: flush controls
 941 *      0: Dump single MSDU
 942 *      1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
 943 *      2: Dump all FIFO
 944 */
 945struct iwl_txfifo_flush_cmd_v3 {
 946        __le32 queue_control;
 947        __le16 flush_control;
 948        __le16 reserved;
 949} __packed;
 950
 951struct iwl_txfifo_flush_cmd_v2 {
 952        __le16 queue_control;
 953        __le16 flush_control;
 954} __packed;
 955
 956/*
 957 * REPLY_WEP_KEY = 0x20
 958 */
 959struct iwl_wep_key {
 960        u8 key_index;
 961        u8 key_offset;
 962        u8 reserved1[2];
 963        u8 key_size;
 964        u8 reserved2[3];
 965        u8 key[16];
 966} __packed;
 967
 968struct iwl_wep_cmd {
 969        u8 num_keys;
 970        u8 global_key_type;
 971        u8 flags;
 972        u8 reserved;
 973        struct iwl_wep_key key[];
 974} __packed;
 975
 976#define WEP_KEY_WEP_TYPE 1
 977#define WEP_KEYS_MAX 4
 978#define WEP_INVALID_OFFSET 0xff
 979#define WEP_KEY_LEN_64 5
 980#define WEP_KEY_LEN_128 13
 981
 982/******************************************************************************
 983 * (4)
 984 * Rx Responses:
 985 *
 986 *****************************************************************************/
 987
 988#define RX_RES_STATUS_NO_CRC32_ERROR    cpu_to_le32(1 << 0)
 989#define RX_RES_STATUS_NO_RXE_OVERFLOW   cpu_to_le32(1 << 1)
 990
 991#define RX_RES_PHY_FLAGS_BAND_24_MSK    cpu_to_le16(1 << 0)
 992#define RX_RES_PHY_FLAGS_MOD_CCK_MSK            cpu_to_le16(1 << 1)
 993#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK     cpu_to_le16(1 << 2)
 994#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK        cpu_to_le16(1 << 3)
 995#define RX_RES_PHY_FLAGS_ANTENNA_MSK            0x70
 996#define RX_RES_PHY_FLAGS_ANTENNA_POS            4
 997#define RX_RES_PHY_FLAGS_AGG_MSK                cpu_to_le16(1 << 7)
 998
 999#define RX_RES_STATUS_SEC_TYPE_MSK      (0x7 << 8)
1000#define RX_RES_STATUS_SEC_TYPE_NONE     (0x0 << 8)
1001#define RX_RES_STATUS_SEC_TYPE_WEP      (0x1 << 8)
1002#define RX_RES_STATUS_SEC_TYPE_CCMP     (0x2 << 8)
1003#define RX_RES_STATUS_SEC_TYPE_TKIP     (0x3 << 8)
1004#define RX_RES_STATUS_SEC_TYPE_ERR      (0x7 << 8)
1005
1006#define RX_RES_STATUS_STATION_FOUND     (1<<6)
1007#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH  (1<<7)
1008
1009#define RX_RES_STATUS_DECRYPT_TYPE_MSK  (0x3 << 11)
1010#define RX_RES_STATUS_NOT_DECRYPT       (0x0 << 11)
1011#define RX_RES_STATUS_DECRYPT_OK        (0x3 << 11)
1012#define RX_RES_STATUS_BAD_ICV_MIC       (0x1 << 11)
1013#define RX_RES_STATUS_BAD_KEY_TTAK      (0x2 << 11)
1014
1015#define RX_MPDU_RES_STATUS_ICV_OK       (0x20)
1016#define RX_MPDU_RES_STATUS_MIC_OK       (0x40)
1017#define RX_MPDU_RES_STATUS_TTAK_OK      (1 << 7)
1018#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1019
1020
1021#define IWLAGN_RX_RES_PHY_CNT 8
1022#define IWLAGN_RX_RES_AGC_IDX     1
1023#define IWLAGN_RX_RES_RSSI_AB_IDX 2
1024#define IWLAGN_RX_RES_RSSI_C_IDX  3
1025#define IWLAGN_OFDM_AGC_MSK 0xfe00
1026#define IWLAGN_OFDM_AGC_BIT_POS 9
1027#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1028#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1029#define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1030#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1031#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1032#define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1033#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1034#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1035#define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1036
1037struct iwlagn_non_cfg_phy {
1038        __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT];  /* up to 8 phy entries */
1039} __packed;
1040
1041
1042/*
1043 * REPLY_RX = 0xc3 (response only, not a command)
1044 * Used only for legacy (non 11n) frames.
1045 */
1046struct iwl_rx_phy_res {
1047        u8 non_cfg_phy_cnt;     /* non configurable DSP phy data byte count */
1048        u8 cfg_phy_cnt;         /* configurable DSP phy data byte count */
1049        u8 stat_id;             /* configurable DSP phy data set ID */
1050        u8 reserved1;
1051        __le64 timestamp;       /* TSF at on air rise */
1052        __le32 beacon_time_stamp; /* beacon at on-air rise */
1053        __le16 phy_flags;       /* general phy flags: band, modulation, ... */
1054        __le16 channel;         /* channel number */
1055        u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
1056        __le32 rate_n_flags;    /* RATE_MCS_* */
1057        __le16 byte_count;      /* frame's byte-count */
1058        __le16 frame_time;      /* frame's time on the air */
1059} __packed;
1060
1061struct iwl_rx_mpdu_res_start {
1062        __le16 byte_count;
1063        __le16 reserved;
1064} __packed;
1065
1066
1067/******************************************************************************
1068 * (5)
1069 * Tx Commands & Responses:
1070 *
1071 * Driver must place each REPLY_TX command into one of the prioritized Tx
1072 * queues in host DRAM, shared between driver and device (see comments for
1073 * SCD registers and Tx/Rx Queues).  When the device's Tx scheduler and uCode
1074 * are preparing to transmit, the device pulls the Tx command over the PCI
1075 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1076 * from which data will be transmitted.
1077 *
1078 * uCode handles all timing and protocol related to control frames
1079 * (RTS/CTS/ACK), based on flags in the Tx command.  uCode and Tx scheduler
1080 * handle reception of block-acks; uCode updates the host driver via
1081 * REPLY_COMPRESSED_BA.
1082 *
1083 * uCode handles retrying Tx when an ACK is expected but not received.
1084 * This includes trying lower data rates than the one requested in the Tx
1085 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn).
1086 *
1087 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1088 * This command must be executed after every RXON command, before Tx can occur.
1089 *****************************************************************************/
1090
1091/* REPLY_TX Tx flags field */
1092
1093/*
1094 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
1095 * before this frame. if CTS-to-self required check
1096 * RXON_FLG_SELF_CTS_EN status.
1097 */
1098#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
1099
1100/* 1: Expect ACK from receiving station
1101 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1102 * Set this for unicast frames, but not broadcast/multicast. */
1103#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
1104
1105/* For agn devices:
1106 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1107 *    Tx command's initial_rate_index indicates first rate to try;
1108 *    uCode walks through table for additional Tx attempts.
1109 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1110 *    This rate will be used for all Tx attempts; it will not be scaled. */
1111#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
1112
1113/* 1: Expect immediate block-ack.
1114 * Set when Txing a block-ack request frame.  Also set TX_CMD_FLG_ACK_MSK. */
1115#define TX_CMD_FLG_IMM_BA_RSP_MASK  cpu_to_le32(1 << 6)
1116
1117/* Tx antenna selection field; reserved (0) for agn devices. */
1118#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1119
1120/* 1: Ignore Bluetooth priority for this frame.
1121 * 0: Delay Tx until Bluetooth device is done (normal usage). */
1122#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
1123
1124/* 1: uCode overrides sequence control field in MAC header.
1125 * 0: Driver provides sequence control field in MAC header.
1126 * Set this for management frames, non-QOS data frames, non-unicast frames,
1127 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
1128#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
1129
1130/* 1: This frame is non-last MPDU; more fragments are coming.
1131 * 0: Last fragment, or not using fragmentation. */
1132#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
1133
1134/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1135 * 0: No TSF required in outgoing frame.
1136 * Set this for transmitting beacons and probe responses. */
1137#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
1138
1139/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1140 *    alignment of frame's payload data field.
1141 * 0: No pad
1142 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1143 * field (but not both).  Driver must align frame data (i.e. data following
1144 * MAC header) to DWORD boundary. */
1145#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
1146
1147/* accelerate aggregation support
1148 * 0 - no CCMP encryption; 1 - CCMP encryption */
1149#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
1150
1151/* HCCA-AP - disable duration overwriting. */
1152#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
1153
1154
1155/*
1156 * TX command security control
1157 */
1158#define TX_CMD_SEC_WEP          0x01
1159#define TX_CMD_SEC_CCM          0x02
1160#define TX_CMD_SEC_TKIP         0x03
1161#define TX_CMD_SEC_MSK          0x03
1162#define TX_CMD_SEC_SHIFT        6
1163#define TX_CMD_SEC_KEY128       0x08
1164
1165/*
1166 * REPLY_TX = 0x1c (command)
1167 */
1168
1169/*
1170 * Used for managing Tx retries when expecting block-acks.
1171 * Driver should set these fields to 0.
1172 */
1173struct iwl_dram_scratch {
1174        u8 try_cnt;             /* Tx attempts */
1175        u8 bt_kill_cnt;         /* Tx attempts blocked by Bluetooth device */
1176        __le16 reserved;
1177} __packed;
1178
1179struct iwl_tx_cmd {
1180        /*
1181         * MPDU byte count:
1182         * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1183         * + 8 byte IV for CCM or TKIP (not used for WEP)
1184         * + Data payload
1185         * + 8-byte MIC (not used for CCM/WEP)
1186         * NOTE:  Does not include Tx command bytes, post-MAC pad bytes,
1187         *        MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1188         * Range: 14-2342 bytes.
1189         */
1190        __le16 len;
1191
1192        /*
1193         * MPDU or MSDU byte count for next frame.
1194         * Used for fragmentation and bursting, but not 11n aggregation.
1195         * Same as "len", but for next frame.  Set to 0 if not applicable.
1196         */
1197        __le16 next_frame_len;
1198
1199        __le32 tx_flags;        /* TX_CMD_FLG_* */
1200
1201        /* uCode may modify this field of the Tx command (in host DRAM!).
1202         * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
1203        struct iwl_dram_scratch scratch;
1204
1205        /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1206        __le32 rate_n_flags;    /* RATE_MCS_* */
1207
1208        /* Index of destination station in uCode's station table */
1209        u8 sta_id;
1210
1211        /* Type of security encryption:  CCM or TKIP */
1212        u8 sec_ctl;             /* TX_CMD_SEC_* */
1213
1214        /*
1215         * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1216         * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set.  Normally "0" for
1217         * data frames, this field may be used to selectively reduce initial
1218         * rate (via non-0 value) for special frames (e.g. management), while
1219         * still supporting rate scaling for all frames.
1220         */
1221        u8 initial_rate_index;
1222        u8 reserved;
1223        u8 key[16];
1224        __le16 next_frame_flags;
1225        __le16 reserved2;
1226        union {
1227                __le32 life_time;
1228                __le32 attempt;
1229        } stop_time;
1230
1231        /* Host DRAM physical address pointer to "scratch" in this command.
1232         * Must be dword aligned.  "0" in dram_lsb_ptr disables usage. */
1233        __le32 dram_lsb_ptr;
1234        u8 dram_msb_ptr;
1235
1236        u8 rts_retry_limit;     /*byte 50 */
1237        u8 data_retry_limit;    /*byte 51 */
1238        u8 tid_tspec;
1239        union {
1240                __le16 pm_frame_timeout;
1241                __le16 attempt_duration;
1242        } timeout;
1243
1244        /*
1245         * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1246         * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1247         */
1248        __le16 driver_txop;
1249
1250        /*
1251         * MAC header goes here, followed by 2 bytes padding if MAC header
1252         * length is 26 or 30 bytes, followed by payload data
1253         */
1254        u8 payload[0];
1255        struct ieee80211_hdr hdr[];
1256} __packed;
1257
1258/*
1259 * TX command response is sent after *agn* transmission attempts.
1260 *
1261 * both postpone and abort status are expected behavior from uCode. there is
1262 * no special operation required from driver; except for RFKILL_FLUSH,
1263 * which required tx flush host command to flush all the tx frames in queues
1264 */
1265enum {
1266        TX_STATUS_SUCCESS = 0x01,
1267        TX_STATUS_DIRECT_DONE = 0x02,
1268        /* postpone TX */
1269        TX_STATUS_POSTPONE_DELAY = 0x40,
1270        TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1271        TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1272        TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1273        TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1274        /* abort TX */
1275        TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
1276        TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1277        TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1278        TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
1279        TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1280        TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
1281        TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1282        TX_STATUS_FAIL_DEST_PS = 0x88,
1283        TX_STATUS_FAIL_HOST_ABORTED = 0x89,
1284        TX_STATUS_FAIL_BT_RETRY = 0x8a,
1285        TX_STATUS_FAIL_STA_INVALID = 0x8b,
1286        TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1287        TX_STATUS_FAIL_TID_DISABLE = 0x8d,
1288        TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
1289        TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1290        TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1291        TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
1292};
1293
1294#define TX_PACKET_MODE_REGULAR          0x0000
1295#define TX_PACKET_MODE_BURST_SEQ        0x0100
1296#define TX_PACKET_MODE_BURST_FIRST      0x0200
1297
1298enum {
1299        TX_POWER_PA_NOT_ACTIVE = 0x0,
1300};
1301
1302enum {
1303        TX_STATUS_MSK = 0x000000ff,             /* bits 0:7 */
1304        TX_STATUS_DELAY_MSK = 0x00000040,
1305        TX_STATUS_ABORT_MSK = 0x00000080,
1306        TX_PACKET_MODE_MSK = 0x0000ff00,        /* bits 8:15 */
1307        TX_FIFO_NUMBER_MSK = 0x00070000,        /* bits 16:18 */
1308        TX_RESERVED = 0x00780000,               /* bits 19:22 */
1309        TX_POWER_PA_DETECT_MSK = 0x7f800000,    /* bits 23:30 */
1310        TX_ABORT_REQUIRED_MSK = 0x80000000,     /* bits 31:31 */
1311};
1312
1313/* *******************************
1314 * TX aggregation status
1315 ******************************* */
1316
1317enum {
1318        AGG_TX_STATE_TRANSMITTED = 0x00,
1319        AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1320        AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1321        AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1322        AGG_TX_STATE_ABORT_MSK = 0x08,
1323        AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1324        AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1325        AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1326        AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1327        AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1328        AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1329        AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1330        AGG_TX_STATE_DELAY_TX_MSK = 0x400
1331};
1332
1333#define AGG_TX_STATUS_MSK       0x00000fff      /* bits 0:11 */
1334#define AGG_TX_TRY_MSK          0x0000f000      /* bits 12:15 */
1335#define AGG_TX_TRY_POS          12
1336
1337#define AGG_TX_STATE_LAST_SENT_MSK  (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1338                                     AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1339                                     AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
1340
1341/* # tx attempts for first frame in aggregation */
1342#define AGG_TX_STATE_TRY_CNT_POS 12
1343#define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1344
1345/* Command ID and sequence number of Tx command for this frame */
1346#define AGG_TX_STATE_SEQ_NUM_POS 16
1347#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1348
1349/*
1350 * REPLY_TX = 0x1c (response)
1351 *
1352 * This response may be in one of two slightly different formats, indicated
1353 * by the frame_count field:
1354 *
1355 * 1)  No aggregation (frame_count == 1).  This reports Tx results for
1356 *     a single frame.  Multiple attempts, at various bit rates, may have
1357 *     been made for this frame.
1358 *
1359 * 2)  Aggregation (frame_count > 1).  This reports Tx results for
1360 *     2 or more frames that used block-acknowledge.  All frames were
1361 *     transmitted at same rate.  Rate scaling may have been used if first
1362 *     frame in this new agg block failed in previous agg block(s).
1363 *
1364 *     Note that, for aggregation, ACK (block-ack) status is not delivered here;
1365 *     block-ack has not been received by the time the agn device records
1366 *     this status.
1367 *     This status relates to reasons the tx might have been blocked or aborted
1368 *     within the sending station (this agn device), rather than whether it was
1369 *     received successfully by the destination station.
1370 */
1371struct agg_tx_status {
1372        __le16 status;
1373        __le16 sequence;
1374} __packed;
1375
1376/* refer to ra_tid */
1377#define IWLAGN_TX_RES_TID_POS   0
1378#define IWLAGN_TX_RES_TID_MSK   0x0f
1379#define IWLAGN_TX_RES_RA_POS    4
1380#define IWLAGN_TX_RES_RA_MSK    0xf0
1381
1382struct iwlagn_tx_resp {
1383        u8 frame_count;         /* 1 no aggregation, >1 aggregation */
1384        u8 bt_kill_count;       /* # blocked by bluetooth (unused for agg) */
1385        u8 failure_rts;         /* # failures due to unsuccessful RTS */
1386        u8 failure_frame;       /* # failures due to no ACK (unused for agg) */
1387
1388        /* For non-agg:  Rate at which frame was successful.
1389         * For agg:  Rate at which all frames were transmitted. */
1390        __le32 rate_n_flags;    /* RATE_MCS_*  */
1391
1392        /* For non-agg:  RTS + CTS + frame tx attempts time + ACK.
1393         * For agg:  RTS + CTS + aggregation tx time + block-ack time. */
1394        __le16 wireless_media_time;     /* uSecs */
1395
1396        u8 pa_status;           /* RF power amplifier measurement (not used) */
1397        u8 pa_integ_res_a[3];
1398        u8 pa_integ_res_b[3];
1399        u8 pa_integ_res_C[3];
1400
1401        __le32 tfd_info;
1402        __le16 seq_ctl;
1403        __le16 byte_cnt;
1404        u8 tlc_info;
1405        u8 ra_tid;              /* tid (0:3), sta_id (4:7) */
1406        __le16 frame_ctrl;
1407        /*
1408         * For non-agg:  frame status TX_STATUS_*
1409         * For agg:  status of 1st frame, AGG_TX_STATE_*; other frame status
1410         *           fields follow this one, up to frame_count.
1411         *           Bit fields:
1412         *           11- 0:  AGG_TX_STATE_* status code
1413         *           15-12:  Retry count for 1st frame in aggregation (retries
1414         *                   occur if tx failed for this frame when it was a
1415         *                   member of a previous aggregation block).  If rate
1416         *                   scaling is used, retry count indicates the rate
1417         *                   table entry used for all frames in the new agg.
1418         *           31-16:  Sequence # for this frame's Tx cmd (not SSN!)
1419         */
1420        struct agg_tx_status status;    /* TX status (in aggregation -
1421                                         * status of 1st frame) */
1422} __packed;
1423/*
1424 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
1425 *
1426 * Reports Block-Acknowledge from recipient station
1427 */
1428struct iwl_compressed_ba_resp {
1429        __le32 sta_addr_lo32;
1430        __le16 sta_addr_hi16;
1431        __le16 reserved;
1432
1433        /* Index of recipient (BA-sending) station in uCode's station table */
1434        u8 sta_id;
1435        u8 tid;
1436        __le16 seq_ctl;
1437        __le64 bitmap;
1438        __le16 scd_flow;
1439        __le16 scd_ssn;
1440        u8 txed;        /* number of frames sent */
1441        u8 txed_2_done; /* number of frames acked */
1442        __le16 reserved1;
1443} __packed;
1444
1445/*
1446 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
1447 *
1448 */
1449
1450/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
1451#define  LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK    (1 << 0)
1452
1453/* # of EDCA prioritized tx fifos */
1454#define  LINK_QUAL_AC_NUM AC_NUM
1455
1456/* # entries in rate scale table to support Tx retries */
1457#define  LINK_QUAL_MAX_RETRY_NUM 16
1458
1459/* Tx antenna selection values */
1460#define  LINK_QUAL_ANT_A_MSK (1 << 0)
1461#define  LINK_QUAL_ANT_B_MSK (1 << 1)
1462#define  LINK_QUAL_ANT_MSK   (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1463
1464
1465/**
1466 * struct iwl_link_qual_general_params
1467 *
1468 * Used in REPLY_TX_LINK_QUALITY_CMD
1469 */
1470struct iwl_link_qual_general_params {
1471        u8 flags;
1472
1473        /* No entries at or above this (driver chosen) index contain MIMO */
1474        u8 mimo_delimiter;
1475
1476        /* Best single antenna to use for single stream (legacy, SISO). */
1477        u8 single_stream_ant_msk;       /* LINK_QUAL_ANT_* */
1478
1479        /* Best antennas to use for MIMO */
1480        u8 dual_stream_ant_msk;         /* LINK_QUAL_ANT_* */
1481
1482        /*
1483         * If driver needs to use different initial rates for different
1484         * EDCA QOS access categories (as implemented by tx fifos 0-3),
1485         * this table will set that up, by indicating the indexes in the
1486         * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1487         * Otherwise, driver should set all entries to 0.
1488         *
1489         * Entry usage:
1490         * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1491         * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1492         */
1493        u8 start_rate_index[LINK_QUAL_AC_NUM];
1494} __packed;
1495
1496#define LINK_QUAL_AGG_TIME_LIMIT_DEF    (4000) /* 4 milliseconds */
1497#define LINK_QUAL_AGG_TIME_LIMIT_MAX    (8000)
1498#define LINK_QUAL_AGG_TIME_LIMIT_MIN    (100)
1499
1500#define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1501#define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1502#define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1503
1504#define LINK_QUAL_AGG_FRAME_LIMIT_DEF   (63)
1505#define LINK_QUAL_AGG_FRAME_LIMIT_MAX   (63)
1506#define LINK_QUAL_AGG_FRAME_LIMIT_MIN   (0)
1507
1508/**
1509 * struct iwl_link_qual_agg_params
1510 *
1511 * Used in REPLY_TX_LINK_QUALITY_CMD
1512 */
1513struct iwl_link_qual_agg_params {
1514
1515        /*
1516         *Maximum number of uSec in aggregation.
1517         * default set to 4000 (4 milliseconds) if not configured in .cfg
1518         */
1519        __le16 agg_time_limit;
1520
1521        /*
1522         * Number of Tx retries allowed for a frame, before that frame will
1523         * no longer be considered for the start of an aggregation sequence
1524         * (scheduler will then try to tx it as single frame).
1525         * Driver should set this to 3.
1526         */
1527        u8 agg_dis_start_th;
1528
1529        /*
1530         * Maximum number of frames in aggregation.
1531         * 0 = no limit (default).  1 = no aggregation.
1532         * Other values = max # frames in aggregation.
1533         */
1534        u8 agg_frame_cnt_limit;
1535
1536        __le32 reserved;
1537} __packed;
1538
1539/*
1540 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
1541 *
1542 * For agn devices
1543 *
1544 * Each station in the agn device's internal station table has its own table
1545 * of 16
1546 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1547 * an ACK is not received.  This command replaces the entire table for
1548 * one station.
1549 *
1550 * NOTE:  Station must already be in agn device's station table.
1551 *        Use REPLY_ADD_STA.
1552 *
1553 * The rate scaling procedures described below work well.  Of course, other
1554 * procedures are possible, and may work better for particular environments.
1555 *
1556 *
1557 * FILLING THE RATE TABLE
1558 *
1559 * Given a particular initial rate and mode, as determined by the rate
1560 * scaling algorithm described below, the Linux driver uses the following
1561 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1562 * Link Quality command:
1563 *
1564 *
1565 * 1)  If using High-throughput (HT) (SISO or MIMO) initial rate:
1566 *     a) Use this same initial rate for first 3 entries.
1567 *     b) Find next lower available rate using same mode (SISO or MIMO),
1568 *        use for next 3 entries.  If no lower rate available, switch to
1569 *        legacy mode (no HT40 channel, no MIMO, no short guard interval).
1570 *     c) If using MIMO, set command's mimo_delimiter to number of entries
1571 *        using MIMO (3 or 6).
1572 *     d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
1573 *        no MIMO, no short guard interval), at the next lower bit rate
1574 *        (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1575 *        legacy procedure for remaining table entries.
1576 *
1577 * 2)  If using legacy initial rate:
1578 *     a) Use the initial rate for only one entry.
1579 *     b) For each following entry, reduce the rate to next lower available
1580 *        rate, until reaching the lowest available rate.
1581 *     c) When reducing rate, also switch antenna selection.
1582 *     d) Once lowest available rate is reached, repeat this rate until
1583 *        rate table is filled (16 entries), switching antenna each entry.
1584 *
1585 *
1586 * ACCUMULATING HISTORY
1587 *
1588 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1589 * uses two sets of frame Tx success history:  One for the current/active
1590 * modulation mode, and one for a speculative/search mode that is being
1591 * attempted. If the speculative mode turns out to be more effective (i.e.
1592 * actual transfer rate is better), then the driver continues to use the
1593 * speculative mode as the new current active mode.
1594 *
1595 * Each history set contains, separately for each possible rate, data for a
1596 * sliding window of the 62 most recent tx attempts at that rate.  The data
1597 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1598 * and attempted frames, from which the driver can additionally calculate a
1599 * success ratio (success / attempted) and number of failures
1600 * (attempted - success), and control the size of the window (attempted).
1601 * The driver uses the bit map to remove successes from the success sum, as
1602 * the oldest tx attempts fall out of the window.
1603 *
1604 * When the agn device makes multiple tx attempts for a given frame, each
1605 * attempt might be at a different rate, and have different modulation
1606 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1607 * up in the rate scaling table in the Link Quality command.  The driver must
1608 * determine which rate table entry was used for each tx attempt, to determine
1609 * which rate-specific history to update, and record only those attempts that
1610 * match the modulation characteristics of the history set.
1611 *
1612 * When using block-ack (aggregation), all frames are transmitted at the same
1613 * rate, since there is no per-attempt acknowledgment from the destination
1614 * station.  The Tx response struct iwl_tx_resp indicates the Tx rate in
1615 * rate_n_flags field.  After receiving a block-ack, the driver can update
1616 * history for the entire block all at once.
1617 *
1618 *
1619 * FINDING BEST STARTING RATE:
1620 *
1621 * When working with a selected initial modulation mode (see below), the
1622 * driver attempts to find a best initial rate.  The initial rate is the
1623 * first entry in the Link Quality command's rate table.
1624 *
1625 * 1)  Calculate actual throughput (success ratio * expected throughput, see
1626 *     table below) for current initial rate.  Do this only if enough frames
1627 *     have been attempted to make the value meaningful:  at least 6 failed
1628 *     tx attempts, or at least 8 successes.  If not enough, don't try rate
1629 *     scaling yet.
1630 *
1631 * 2)  Find available rates adjacent to current initial rate.  Available means:
1632 *     a)  supported by hardware &&
1633 *     b)  supported by association &&
1634 *     c)  within any constraints selected by user
1635 *
1636 * 3)  Gather measured throughputs for adjacent rates.  These might not have
1637 *     enough history to calculate a throughput.  That's okay, we might try
1638 *     using one of them anyway!
1639 *
1640 * 4)  Try decreasing rate if, for current rate:
1641 *     a)  success ratio is < 15% ||
1642 *     b)  lower adjacent rate has better measured throughput ||
1643 *     c)  higher adjacent rate has worse throughput, and lower is unmeasured
1644 *
1645 *     As a sanity check, if decrease was determined above, leave rate
1646 *     unchanged if:
1647 *     a)  lower rate unavailable
1648 *     b)  success ratio at current rate > 85% (very good)
1649 *     c)  current measured throughput is better than expected throughput
1650 *         of lower rate (under perfect 100% tx conditions, see table below)
1651 *
1652 * 5)  Try increasing rate if, for current rate:
1653 *     a)  success ratio is < 15% ||
1654 *     b)  both adjacent rates' throughputs are unmeasured (try it!) ||
1655 *     b)  higher adjacent rate has better measured throughput ||
1656 *     c)  lower adjacent rate has worse throughput, and higher is unmeasured
1657 *
1658 *     As a sanity check, if increase was determined above, leave rate
1659 *     unchanged if:
1660 *     a)  success ratio at current rate < 70%.  This is not particularly
1661 *         good performance; higher rate is sure to have poorer success.
1662 *
1663 * 6)  Re-evaluate the rate after each tx frame.  If working with block-
1664 *     acknowledge, history and statistics may be calculated for the entire
1665 *     block (including prior history that fits within the history windows),
1666 *     before re-evaluation.
1667 *
1668 * FINDING BEST STARTING MODULATION MODE:
1669 *
1670 * After working with a modulation mode for a "while" (and doing rate scaling),
1671 * the driver searches for a new initial mode in an attempt to improve
1672 * throughput.  The "while" is measured by numbers of attempted frames:
1673 *
1674 * For legacy mode, search for new mode after:
1675 *   480 successful frames, or 160 failed frames
1676 * For high-throughput modes (SISO or MIMO), search for new mode after:
1677 *   4500 successful frames, or 400 failed frames
1678 *
1679 * Mode switch possibilities are (3 for each mode):
1680 *
1681 * For legacy:
1682 *   Change antenna, try SISO (if HT association), try MIMO (if HT association)
1683 * For SISO:
1684 *   Change antenna, try MIMO, try shortened guard interval (SGI)
1685 * For MIMO:
1686 *   Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1687 *
1688 * When trying a new mode, use the same bit rate as the old/current mode when
1689 * trying antenna switches and shortened guard interval.  When switching to
1690 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1691 * for which the expected throughput (under perfect conditions) is about the
1692 * same or slightly better than the actual measured throughput delivered by
1693 * the old/current mode.
1694 *
1695 * Actual throughput can be estimated by multiplying the expected throughput
1696 * by the success ratio (successful / attempted tx frames).  Frame size is
1697 * not considered in this calculation; it assumes that frame size will average
1698 * out to be fairly consistent over several samples.  The following are
1699 * metric values for expected throughput assuming 100% success ratio.
1700 * Only G band has support for CCK rates:
1701 *
1702 *           RATE:  1    2    5   11    6   9   12   18   24   36   48   54   60
1703 *
1704 *              G:  7   13   35   58   40  57   72   98  121  154  177  186  186
1705 *              A:  0    0    0    0   40  57   72   98  121  154  177  186  186
1706 *     SISO 20MHz:  0    0    0    0   42  42   76  102  124  159  183  193  202
1707 * SGI SISO 20MHz:  0    0    0    0   46  46   82  110  132  168  192  202  211
1708 *     MIMO 20MHz:  0    0    0    0   74  74  123  155  179  214  236  244  251
1709 * SGI MIMO 20MHz:  0    0    0    0   81  81  131  164  188  222  243  251  257
1710 *     SISO 40MHz:  0    0    0    0   77  77  127  160  184  220  242  250  257
1711 * SGI SISO 40MHz:  0    0    0    0   83  83  135  169  193  229  250  257  264
1712 *     MIMO 40MHz:  0    0    0    0  123 123  182  214  235  264  279  285  289
1713 * SGI MIMO 40MHz:  0    0    0    0  131 131  191  222  242  270  284  289  293
1714 *
1715 * After the new mode has been tried for a short while (minimum of 6 failed
1716 * frames or 8 successful frames), compare success ratio and actual throughput
1717 * estimate of the new mode with the old.  If either is better with the new
1718 * mode, continue to use the new mode.
1719 *
1720 * Continue comparing modes until all 3 possibilities have been tried.
1721 * If moving from legacy to HT, try all 3 possibilities from the new HT
1722 * mode.  After trying all 3, a best mode is found.  Continue to use this mode
1723 * for the longer "while" described above (e.g. 480 successful frames for
1724 * legacy), and then repeat the search process.
1725 *
1726 */
1727struct iwl_link_quality_cmd {
1728
1729        /* Index of destination/recipient station in uCode's station table */
1730        u8 sta_id;
1731        u8 reserved1;
1732        __le16 control;         /* not used */
1733        struct iwl_link_qual_general_params general_params;
1734        struct iwl_link_qual_agg_params agg_params;
1735
1736        /*
1737         * Rate info; when using rate-scaling, Tx command's initial_rate_index
1738         * specifies 1st Tx rate attempted, via index into this table.
1739         * agn devices works its way through table when retrying Tx.
1740         */
1741        struct {
1742                __le32 rate_n_flags;    /* RATE_MCS_*, IWL_RATE_* */
1743        } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1744        __le32 reserved2;
1745} __packed;
1746
1747/*
1748 * BT configuration enable flags:
1749 *   bit 0 - 1: BT channel announcement enabled
1750 *           0: disable
1751 *   bit 1 - 1: priority of BT device enabled
1752 *           0: disable
1753 *   bit 2 - 1: BT 2 wire support enabled
1754 *           0: disable
1755 */
1756#define BT_COEX_DISABLE (0x0)
1757#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1758#define BT_ENABLE_PRIORITY         BIT(1)
1759#define BT_ENABLE_2_WIRE           BIT(2)
1760
1761#define BT_COEX_DISABLE (0x0)
1762#define BT_COEX_ENABLE  (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1763
1764#define BT_LEAD_TIME_MIN (0x0)
1765#define BT_LEAD_TIME_DEF (0x1E)
1766#define BT_LEAD_TIME_MAX (0xFF)
1767
1768#define BT_MAX_KILL_MIN (0x1)
1769#define BT_MAX_KILL_DEF (0x5)
1770#define BT_MAX_KILL_MAX (0xFF)
1771
1772#define BT_DURATION_LIMIT_DEF   625
1773#define BT_DURATION_LIMIT_MAX   1250
1774#define BT_DURATION_LIMIT_MIN   625
1775
1776#define BT_ON_THRESHOLD_DEF     4
1777#define BT_ON_THRESHOLD_MAX     1000
1778#define BT_ON_THRESHOLD_MIN     1
1779
1780#define BT_FRAG_THRESHOLD_DEF   0
1781#define BT_FRAG_THRESHOLD_MAX   0
1782#define BT_FRAG_THRESHOLD_MIN   0
1783
1784#define BT_AGG_THRESHOLD_DEF    1200
1785#define BT_AGG_THRESHOLD_MAX    8000
1786#define BT_AGG_THRESHOLD_MIN    400
1787
1788/*
1789 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
1790 *
1791 * agn devices support hardware handshake with Bluetooth device on
1792 * same platform.  Bluetooth device alerts wireless device when it will Tx;
1793 * wireless device can delay or kill its own Tx to accommodate.
1794 */
1795struct iwl_bt_cmd {
1796        u8 flags;
1797        u8 lead_time;
1798        u8 max_kill;
1799        u8 reserved;
1800        __le32 kill_ack_mask;
1801        __le32 kill_cts_mask;
1802} __packed;
1803
1804#define IWLAGN_BT_FLAG_CHANNEL_INHIBITION       BIT(0)
1805
1806#define IWLAGN_BT_FLAG_COEX_MODE_MASK           (BIT(3)|BIT(4)|BIT(5))
1807#define IWLAGN_BT_FLAG_COEX_MODE_SHIFT          3
1808#define IWLAGN_BT_FLAG_COEX_MODE_DISABLED       0
1809#define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W      1
1810#define IWLAGN_BT_FLAG_COEX_MODE_3W             2
1811#define IWLAGN_BT_FLAG_COEX_MODE_4W             3
1812
1813#define IWLAGN_BT_FLAG_UCODE_DEFAULT            BIT(6)
1814/* Disable Sync PSPoll on SCO/eSCO */
1815#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE        BIT(7)
1816
1817#define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD        -75 /* dBm */
1818#define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD        -65 /* dBm */
1819
1820#define IWLAGN_BT_PRIO_BOOST_MAX        0xFF
1821#define IWLAGN_BT_PRIO_BOOST_MIN        0x00
1822#define IWLAGN_BT_PRIO_BOOST_DEFAULT    0xF0
1823#define IWLAGN_BT_PRIO_BOOST_DEFAULT32  0xF0F0F0F0
1824
1825#define IWLAGN_BT_MAX_KILL_DEFAULT      5
1826
1827#define IWLAGN_BT3_T7_DEFAULT           1
1828
1829enum iwl_bt_kill_idx {
1830        IWL_BT_KILL_DEFAULT = 0,
1831        IWL_BT_KILL_OVERRIDE = 1,
1832        IWL_BT_KILL_REDUCE = 2,
1833};
1834
1835#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1836#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
1837#define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
1838#define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE      cpu_to_le32(0)
1839
1840#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT  2
1841
1842#define IWLAGN_BT3_T2_DEFAULT           0xc
1843
1844#define IWLAGN_BT_VALID_ENABLE_FLAGS    cpu_to_le16(BIT(0))
1845#define IWLAGN_BT_VALID_BOOST           cpu_to_le16(BIT(1))
1846#define IWLAGN_BT_VALID_MAX_KILL        cpu_to_le16(BIT(2))
1847#define IWLAGN_BT_VALID_3W_TIMERS       cpu_to_le16(BIT(3))
1848#define IWLAGN_BT_VALID_KILL_ACK_MASK   cpu_to_le16(BIT(4))
1849#define IWLAGN_BT_VALID_KILL_CTS_MASK   cpu_to_le16(BIT(5))
1850#define IWLAGN_BT_VALID_REDUCED_TX_PWR  cpu_to_le16(BIT(6))
1851#define IWLAGN_BT_VALID_3W_LUT          cpu_to_le16(BIT(7))
1852
1853#define IWLAGN_BT_ALL_VALID_MSK         (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1854                                        IWLAGN_BT_VALID_BOOST | \
1855                                        IWLAGN_BT_VALID_MAX_KILL | \
1856                                        IWLAGN_BT_VALID_3W_TIMERS | \
1857                                        IWLAGN_BT_VALID_KILL_ACK_MASK | \
1858                                        IWLAGN_BT_VALID_KILL_CTS_MASK | \
1859                                        IWLAGN_BT_VALID_REDUCED_TX_PWR | \
1860                                        IWLAGN_BT_VALID_3W_LUT)
1861
1862#define IWLAGN_BT_REDUCED_TX_PWR        BIT(0)
1863
1864#define IWLAGN_BT_DECISION_LUT_SIZE     12
1865
1866struct iwl_basic_bt_cmd {
1867        u8 flags;
1868        u8 ledtime; /* unused */
1869        u8 max_kill;
1870        u8 bt3_timer_t7_value;
1871        __le32 kill_ack_mask;
1872        __le32 kill_cts_mask;
1873        u8 bt3_prio_sample_time;
1874        u8 bt3_timer_t2_value;
1875        __le16 bt4_reaction_time; /* unused */
1876        __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE];
1877        /*
1878         * bit 0: use reduced tx power for control frame
1879         * bit 1 - 7: reserved
1880         */
1881        u8 reduce_txpower;
1882        u8 reserved;
1883        __le16 valid;
1884};
1885
1886struct iwl_bt_cmd_v1 {
1887        struct iwl_basic_bt_cmd basic;
1888        u8 prio_boost;
1889        /*
1890         * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1891         * if configure the following patterns
1892         */
1893        u8 tx_prio_boost;       /* SW boost of WiFi tx priority */
1894        __le16 rx_prio_boost;   /* SW boost of WiFi rx priority */
1895};
1896
1897struct iwl_bt_cmd_v2 {
1898        struct iwl_basic_bt_cmd basic;
1899        __le32 prio_boost;
1900        /*
1901         * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1902         * if configure the following patterns
1903         */
1904        u8 reserved;
1905        u8 tx_prio_boost;       /* SW boost of WiFi tx priority */
1906        __le16 rx_prio_boost;   /* SW boost of WiFi rx priority */
1907};
1908
1909#define IWLAGN_BT_SCO_ACTIVE    cpu_to_le32(BIT(0))
1910
1911struct iwlagn_bt_sco_cmd {
1912        __le32 flags;
1913};
1914
1915/******************************************************************************
1916 * (6)
1917 * Spectrum Management (802.11h) Commands, Responses, Notifications:
1918 *
1919 *****************************************************************************/
1920
1921/*
1922 * Spectrum Management
1923 */
1924#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK         | \
1925                                 RXON_FILTER_CTL2HOST_MSK        | \
1926                                 RXON_FILTER_ACCEPT_GRP_MSK      | \
1927                                 RXON_FILTER_DIS_DECRYPT_MSK     | \
1928                                 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
1929                                 RXON_FILTER_ASSOC_MSK           | \
1930                                 RXON_FILTER_BCON_AWARE_MSK)
1931
1932struct iwl_measure_channel {
1933        __le32 duration;        /* measurement duration in extended beacon
1934                                 * format */
1935        u8 channel;             /* channel to measure */
1936        u8 type;                /* see enum iwl_measure_type */
1937        __le16 reserved;
1938} __packed;
1939
1940/*
1941 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
1942 */
1943struct iwl_spectrum_cmd {
1944        __le16 len;             /* number of bytes starting from token */
1945        u8 token;               /* token id */
1946        u8 id;                  /* measurement id -- 0 or 1 */
1947        u8 origin;              /* 0 = TGh, 1 = other, 2 = TGk */
1948        u8 periodic;            /* 1 = periodic */
1949        __le16 path_loss_timeout;
1950        __le32 start_time;      /* start time in extended beacon format */
1951        __le32 reserved2;
1952        __le32 flags;           /* rxon flags */
1953        __le32 filter_flags;    /* rxon filter flags */
1954        __le16 channel_count;   /* minimum 1, maximum 10 */
1955        __le16 reserved3;
1956        struct iwl_measure_channel channels[10];
1957} __packed;
1958
1959/*
1960 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
1961 */
1962struct iwl_spectrum_resp {
1963        u8 token;
1964        u8 id;                  /* id of the prior command replaced, or 0xff */
1965        __le16 status;          /* 0 - command will be handled
1966                                 * 1 - cannot handle (conflicts with another
1967                                 *     measurement) */
1968} __packed;
1969
1970enum iwl_measurement_state {
1971        IWL_MEASUREMENT_START = 0,
1972        IWL_MEASUREMENT_STOP = 1,
1973};
1974
1975enum iwl_measurement_status {
1976        IWL_MEASUREMENT_OK = 0,
1977        IWL_MEASUREMENT_CONCURRENT = 1,
1978        IWL_MEASUREMENT_CSA_CONFLICT = 2,
1979        IWL_MEASUREMENT_TGH_CONFLICT = 3,
1980        /* 4-5 reserved */
1981        IWL_MEASUREMENT_STOPPED = 6,
1982        IWL_MEASUREMENT_TIMEOUT = 7,
1983        IWL_MEASUREMENT_PERIODIC_FAILED = 8,
1984};
1985
1986#define NUM_ELEMENTS_IN_HISTOGRAM 8
1987
1988struct iwl_measurement_histogram {
1989        __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
1990        __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM];  /* in 1usec counts */
1991} __packed;
1992
1993/* clear channel availability counters */
1994struct iwl_measurement_cca_counters {
1995        __le32 ofdm;
1996        __le32 cck;
1997} __packed;
1998
1999enum iwl_measure_type {
2000        IWL_MEASURE_BASIC = (1 << 0),
2001        IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2002        IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2003        IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2004        IWL_MEASURE_FRAME = (1 << 4),
2005        /* bits 5:6 are reserved */
2006        IWL_MEASURE_IDLE = (1 << 7),
2007};
2008
2009/*
2010 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2011 */
2012struct iwl_spectrum_notification {
2013        u8 id;                  /* measurement id -- 0 or 1 */
2014        u8 token;
2015        u8 channel_index;       /* index in measurement channel list */
2016        u8 state;               /* 0 - start, 1 - stop */
2017        __le32 start_time;      /* lower 32-bits of TSF */
2018        u8 band;                /* 0 - 5.2GHz, 1 - 2.4GHz */
2019        u8 channel;
2020        u8 type;                /* see enum iwl_measurement_type */
2021        u8 reserved1;
2022        /* NOTE:  cca_ofdm, cca_cck, basic_type, and histogram are only only
2023         * valid if applicable for measurement type requested. */
2024        __le32 cca_ofdm;        /* cca fraction time in 40Mhz clock periods */
2025        __le32 cca_cck;         /* cca fraction time in 44Mhz clock periods */
2026        __le32 cca_time;        /* channel load time in usecs */
2027        u8 basic_type;          /* 0 - bss, 1 - ofdm preamble, 2 -
2028                                 * unidentified */
2029        u8 reserved2[3];
2030        struct iwl_measurement_histogram histogram;
2031        __le32 stop_time;       /* lower 32-bits of TSF */
2032        __le32 status;          /* see iwl_measurement_status */
2033} __packed;
2034
2035/******************************************************************************
2036 * (7)
2037 * Power Management Commands, Responses, Notifications:
2038 *
2039 *****************************************************************************/
2040
2041/**
2042 * struct iwl_powertable_cmd - Power Table Command
2043 * @flags: See below:
2044 *
2045 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2046 *
2047 * PM allow:
2048 *   bit 0 - '0' Driver not allow power management
2049 *           '1' Driver allow PM (use rest of parameters)
2050 *
2051 * uCode send sleep notifications:
2052 *   bit 1 - '0' Don't send sleep notification
2053 *           '1' send sleep notification (SEND_PM_NOTIFICATION)
2054 *
2055 * Sleep over DTIM
2056 *   bit 2 - '0' PM have to walk up every DTIM
2057 *           '1' PM could sleep over DTIM till listen Interval.
2058 *
2059 * PCI power managed
2060 *   bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2061 *           '1' !(PCI_CFG_LINK_CTRL & 0x1)
2062 *
2063 * Fast PD
2064 *   bit 4 - '1' Put radio to sleep when receiving frame for others
2065 *
2066 * Force sleep Modes
2067 *   bit 31/30- '00' use both mac/xtal sleeps
2068 *              '01' force Mac sleep
2069 *              '10' force xtal sleep
2070 *              '11' Illegal set
2071 *
2072 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
2073 * ucode assume sleep over DTIM is allowed and we don't need to wake up
2074 * for every DTIM.
2075 */
2076#define IWL_POWER_VEC_SIZE 5
2077
2078#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK        cpu_to_le16(BIT(0))
2079#define IWL_POWER_POWER_SAVE_ENA_MSK            cpu_to_le16(BIT(0))
2080#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK      cpu_to_le16(BIT(1))
2081#define IWL_POWER_SLEEP_OVER_DTIM_MSK           cpu_to_le16(BIT(2))
2082#define IWL_POWER_PCI_PM_MSK                    cpu_to_le16(BIT(3))
2083#define IWL_POWER_FAST_PD                       cpu_to_le16(BIT(4))
2084#define IWL_POWER_BEACON_FILTERING              cpu_to_le16(BIT(5))
2085#define IWL_POWER_SHADOW_REG_ENA                cpu_to_le16(BIT(6))
2086#define IWL_POWER_CT_KILL_SET                   cpu_to_le16(BIT(7))
2087#define IWL_POWER_BT_SCO_ENA                    cpu_to_le16(BIT(8))
2088#define IWL_POWER_ADVANCE_PM_ENA_MSK            cpu_to_le16(BIT(9))
2089
2090struct iwl_powertable_cmd {
2091        __le16 flags;
2092        u8 keep_alive_seconds;
2093        u8 debug_flags;
2094        __le32 rx_data_timeout;
2095        __le32 tx_data_timeout;
2096        __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2097        __le32 keep_alive_beacons;
2098} __packed;
2099
2100/*
2101 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
2102 * all devices identical.
2103 */
2104struct iwl_sleep_notification {
2105        u8 pm_sleep_mode;
2106        u8 pm_wakeup_src;
2107        __le16 reserved;
2108        __le32 sleep_time;
2109        __le32 tsf_low;
2110        __le32 bcon_timer;
2111} __packed;
2112
2113/* Sleep states.  all devices identical. */
2114enum {
2115        IWL_PM_NO_SLEEP = 0,
2116        IWL_PM_SLP_MAC = 1,
2117        IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2118        IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2119        IWL_PM_SLP_PHY = 4,
2120        IWL_PM_SLP_REPENT = 5,
2121        IWL_PM_WAKEUP_BY_TIMER = 6,
2122        IWL_PM_WAKEUP_BY_DRIVER = 7,
2123        IWL_PM_WAKEUP_BY_RFKILL = 8,
2124        /* 3 reserved */
2125        IWL_PM_NUM_OF_MODES = 12,
2126};
2127
2128/*
2129 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2130 */
2131#define CARD_STATE_CMD_DISABLE 0x00     /* Put card to sleep */
2132#define CARD_STATE_CMD_ENABLE  0x01     /* Wake up card */
2133#define CARD_STATE_CMD_HALT    0x02     /* Power down permanently */
2134struct iwl_card_state_cmd {
2135        __le32 status;          /* CARD_STATE_CMD_* request new power state */
2136} __packed;
2137
2138/*
2139 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2140 */
2141struct iwl_card_state_notif {
2142        __le32 flags;
2143} __packed;
2144
2145#define HW_CARD_DISABLED   0x01
2146#define SW_CARD_DISABLED   0x02
2147#define CT_CARD_DISABLED   0x04
2148#define RXON_CARD_DISABLED 0x10
2149
2150struct iwl_ct_kill_config {
2151        __le32   reserved;
2152        __le32   critical_temperature_M;
2153        __le32   critical_temperature_R;
2154}  __packed;
2155
2156/* 1000, and 6x00 */
2157struct iwl_ct_kill_throttling_config {
2158        __le32   critical_temperature_exit;
2159        __le32   reserved;
2160        __le32   critical_temperature_enter;
2161}  __packed;
2162
2163/******************************************************************************
2164 * (8)
2165 * Scan Commands, Responses, Notifications:
2166 *
2167 *****************************************************************************/
2168
2169#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2170#define SCAN_CHANNEL_TYPE_ACTIVE  cpu_to_le32(1)
2171
2172/**
2173 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
2174 *
2175 * One for each channel in the scan list.
2176 * Each channel can independently select:
2177 * 1)  SSID for directed active scans
2178 * 2)  Txpower setting (for rate specified within Tx command)
2179 * 3)  How long to stay on-channel (behavior may be modified by quiet_time,
2180 *     quiet_plcp_th, good_CRC_th)
2181 *
2182 * To avoid uCode errors, make sure the following are true (see comments
2183 * under struct iwl_scan_cmd about max_out_time and quiet_time):
2184 * 1)  If using passive_dwell (i.e. passive_dwell != 0):
2185 *     active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2186 * 2)  quiet_time <= active_dwell
2187 * 3)  If restricting off-channel time (i.e. max_out_time !=0):
2188 *     passive_dwell < max_out_time
2189 *     active_dwell < max_out_time
2190 */
2191
2192struct iwl_scan_channel {
2193        /*
2194         * type is defined as:
2195         * 0:0 1 = active, 0 = passive
2196         * 1:20 SSID direct bit map; if a bit is set, then corresponding
2197         *     SSID IE is transmitted in probe request.
2198         * 21:31 reserved
2199         */
2200        __le32 type;
2201        __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
2202        u8 tx_gain;             /* gain for analog radio */
2203        u8 dsp_atten;           /* gain for DSP */
2204        __le16 active_dwell;    /* in 1024-uSec TU (time units), typ 5-50 */
2205        __le16 passive_dwell;   /* in 1024-uSec TU (time units), typ 20-500 */
2206} __packed;
2207
2208/* set number of direct probes __le32 type */
2209#define IWL_SCAN_PROBE_MASK(n)  cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2210
2211/**
2212 * struct iwl_ssid_ie - directed scan network information element
2213 *
2214 * Up to 20 of these may appear in REPLY_SCAN_CMD,
2215 * selected by "type" bit field in struct iwl_scan_channel;
2216 * each channel may select different ssids from among the 20 entries.
2217 * SSID IEs get transmitted in reverse order of entry.
2218 */
2219struct iwl_ssid_ie {
2220        u8 id;
2221        u8 len;
2222        u8 ssid[32];
2223} __packed;
2224
2225#define PROBE_OPTION_MAX                20
2226#define TX_CMD_LIFE_TIME_INFINITE       cpu_to_le32(0xFFFFFFFF)
2227#define IWL_GOOD_CRC_TH_DISABLED        0
2228#define IWL_GOOD_CRC_TH_DEFAULT         cpu_to_le16(1)
2229#define IWL_GOOD_CRC_TH_NEVER           cpu_to_le16(0xffff)
2230#define IWL_MAX_CMD_SIZE 4096
2231
2232/*
2233 * REPLY_SCAN_CMD = 0x80 (command)
2234 *
2235 * The hardware scan command is very powerful; the driver can set it up to
2236 * maintain (relatively) normal network traffic while doing a scan in the
2237 * background.  The max_out_time and suspend_time control the ratio of how
2238 * long the device stays on an associated network channel ("service channel")
2239 * vs. how long it's away from the service channel, i.e. tuned to other channels
2240 * for scanning.
2241 *
2242 * max_out_time is the max time off-channel (in usec), and suspend_time
2243 * is how long (in "extended beacon" format) that the scan is "suspended"
2244 * after returning to the service channel.  That is, suspend_time is the
2245 * time that we stay on the service channel, doing normal work, between
2246 * scan segments.  The driver may set these parameters differently to support
2247 * scanning when associated vs. not associated, and light vs. heavy traffic
2248 * loads when associated.
2249 *
2250 * After receiving this command, the device's scan engine does the following;
2251 *
2252 * 1)  Sends SCAN_START notification to driver
2253 * 2)  Checks to see if it has time to do scan for one channel
2254 * 3)  Sends NULL packet, with power-save (PS) bit set to 1,
2255 *     to tell AP that we're going off-channel
2256 * 4)  Tunes to first channel in scan list, does active or passive scan
2257 * 5)  Sends SCAN_RESULT notification to driver
2258 * 6)  Checks to see if it has time to do scan on *next* channel in list
2259 * 7)  Repeats 4-6 until it no longer has time to scan the next channel
2260 *     before max_out_time expires
2261 * 8)  Returns to service channel
2262 * 9)  Sends NULL packet with PS=0 to tell AP that we're back
2263 * 10) Stays on service channel until suspend_time expires
2264 * 11) Repeats entire process 2-10 until list is complete
2265 * 12) Sends SCAN_COMPLETE notification
2266 *
2267 * For fast, efficient scans, the scan command also has support for staying on
2268 * a channel for just a short time, if doing active scanning and getting no
2269 * responses to the transmitted probe request.  This time is controlled by
2270 * quiet_time, and the number of received packets below which a channel is
2271 * considered "quiet" is controlled by quiet_plcp_threshold.
2272 *
2273 * For active scanning on channels that have regulatory restrictions against
2274 * blindly transmitting, the scan can listen before transmitting, to make sure
2275 * that there is already legitimate activity on the channel.  If enough
2276 * packets are cleanly received on the channel (controlled by good_CRC_th,
2277 * typical value 1), the scan engine starts transmitting probe requests.
2278 *
2279 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2280 *
2281 * To avoid uCode errors, see timing restrictions described under
2282 * struct iwl_scan_channel.
2283 */
2284
2285enum iwl_scan_flags {
2286        /* BIT(0) currently unused */
2287        IWL_SCAN_FLAGS_ACTION_FRAME_TX  = BIT(1),
2288        /* bits 2-7 reserved */
2289};
2290
2291struct iwl_scan_cmd {
2292        __le16 len;
2293        u8 scan_flags;          /* scan flags: see enum iwl_scan_flags */
2294        u8 channel_count;       /* # channels in channel list */
2295        __le16 quiet_time;      /* dwell only this # millisecs on quiet channel
2296                                 * (only for active scan) */
2297        __le16 quiet_plcp_th;   /* quiet chnl is < this # pkts (typ. 1) */
2298        __le16 good_CRC_th;     /* passive -> active promotion threshold */
2299        __le16 rx_chain;        /* RXON_RX_CHAIN_* */
2300        __le32 max_out_time;    /* max usec to be away from associated (service)
2301                                 * channel */
2302        __le32 suspend_time;    /* pause scan this long (in "extended beacon
2303                                 * format") when returning to service chnl:
2304                                 */
2305        __le32 flags;           /* RXON_FLG_* */
2306        __le32 filter_flags;    /* RXON_FILTER_* */
2307
2308        /* For active scans (set to all-0s for passive scans).
2309         * Does not include payload.  Must specify Tx rate; no rate scaling. */
2310        struct iwl_tx_cmd tx_cmd;
2311
2312        /* For directed active scans (set to all-0s otherwise) */
2313        struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
2314
2315        /*
2316         * Probe request frame, followed by channel list.
2317         *
2318         * Size of probe request frame is specified by byte count in tx_cmd.
2319         * Channel list follows immediately after probe request frame.
2320         * Number of channels in list is specified by channel_count.
2321         * Each channel in list is of type:
2322         *
2323         * struct iwl_scan_channel channels[0];
2324         *
2325         * NOTE:  Only one band of channels can be scanned per pass.  You
2326         * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2327         * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2328         * before requesting another scan.
2329         */
2330        u8 data[];
2331} __packed;
2332
2333/* Can abort will notify by complete notification with abort status. */
2334#define CAN_ABORT_STATUS        cpu_to_le32(0x1)
2335/* complete notification statuses */
2336#define ABORT_STATUS            0x2
2337
2338/*
2339 * REPLY_SCAN_CMD = 0x80 (response)
2340 */
2341struct iwl_scanreq_notification {
2342        __le32 status;          /* 1: okay, 2: cannot fulfill request */
2343} __packed;
2344
2345/*
2346 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2347 */
2348struct iwl_scanstart_notification {
2349        __le32 tsf_low;
2350        __le32 tsf_high;
2351        __le32 beacon_timer;
2352        u8 channel;
2353        u8 band;
2354        u8 reserved[2];
2355        __le32 status;
2356} __packed;
2357
2358#define  SCAN_OWNER_STATUS 0x1
2359#define  MEASURE_OWNER_STATUS 0x2
2360
2361#define IWL_PROBE_STATUS_OK             0
2362#define IWL_PROBE_STATUS_TX_FAILED      BIT(0)
2363/* error statuses combined with TX_FAILED */
2364#define IWL_PROBE_STATUS_FAIL_TTL       BIT(1)
2365#define IWL_PROBE_STATUS_FAIL_BT        BIT(2)
2366
2367#define NUMBER_OF_STATISTICS 1  /* first __le32 is good CRC */
2368/*
2369 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2370 */
2371struct iwl_scanresults_notification {
2372        u8 channel;
2373        u8 band;
2374        u8 probe_status;
2375        u8 num_probe_not_sent; /* not enough time to send */
2376        __le32 tsf_low;
2377        __le32 tsf_high;
2378        __le32 statistics[NUMBER_OF_STATISTICS];
2379} __packed;
2380
2381/*
2382 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2383 */
2384struct iwl_scancomplete_notification {
2385        u8 scanned_channels;
2386        u8 status;
2387        u8 bt_status;   /* BT On/Off status */
2388        u8 last_channel;
2389        __le32 tsf_low;
2390        __le32 tsf_high;
2391} __packed;
2392
2393
2394/******************************************************************************
2395 * (9)
2396 * IBSS/AP Commands and Notifications:
2397 *
2398 *****************************************************************************/
2399
2400enum iwl_ibss_manager {
2401        IWL_NOT_IBSS_MANAGER = 0,
2402        IWL_IBSS_MANAGER = 1,
2403};
2404
2405/*
2406 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2407 */
2408
2409struct iwlagn_beacon_notif {
2410        struct iwlagn_tx_resp beacon_notify_hdr;
2411        __le32 low_tsf;
2412        __le32 high_tsf;
2413        __le32 ibss_mgr_status;
2414} __packed;
2415
2416/*
2417 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2418 */
2419
2420struct iwl_tx_beacon_cmd {
2421        struct iwl_tx_cmd tx;
2422        __le16 tim_idx;
2423        u8 tim_size;
2424        u8 reserved1;
2425        struct ieee80211_hdr frame[];   /* beacon frame */
2426} __packed;
2427
2428/******************************************************************************
2429 * (10)
2430 * Statistics Commands and Notifications:
2431 *
2432 *****************************************************************************/
2433
2434#define IWL_TEMP_CONVERT 260
2435
2436#define SUP_RATE_11A_MAX_NUM_CHANNELS  8
2437#define SUP_RATE_11B_MAX_NUM_CHANNELS  4
2438#define SUP_RATE_11G_MAX_NUM_CHANNELS  12
2439
2440/* Used for passing to driver number of successes and failures per rate */
2441struct rate_histogram {
2442        union {
2443                __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2444                __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2445                __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2446        } success;
2447        union {
2448                __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2449                __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2450                __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2451        } failed;
2452} __packed;
2453
2454/* statistics command response */
2455
2456struct statistics_dbg {
2457        __le32 burst_check;
2458        __le32 burst_count;
2459        __le32 wait_for_silence_timeout_cnt;
2460        __le32 reserved[3];
2461} __packed;
2462
2463struct statistics_rx_phy {
2464        __le32 ina_cnt;
2465        __le32 fina_cnt;
2466        __le32 plcp_err;
2467        __le32 crc32_err;
2468        __le32 overrun_err;
2469        __le32 early_overrun_err;
2470        __le32 crc32_good;
2471        __le32 false_alarm_cnt;
2472        __le32 fina_sync_err_cnt;
2473        __le32 sfd_timeout;
2474        __le32 fina_timeout;
2475        __le32 unresponded_rts;
2476        __le32 rxe_frame_limit_overrun;
2477        __le32 sent_ack_cnt;
2478        __le32 sent_cts_cnt;
2479        __le32 sent_ba_rsp_cnt;
2480        __le32 dsp_self_kill;
2481        __le32 mh_format_err;
2482        __le32 re_acq_main_rssi_sum;
2483        __le32 reserved3;
2484} __packed;
2485
2486struct statistics_rx_ht_phy {
2487        __le32 plcp_err;
2488        __le32 overrun_err;
2489        __le32 early_overrun_err;
2490        __le32 crc32_good;
2491        __le32 crc32_err;
2492        __le32 mh_format_err;
2493        __le32 agg_crc32_good;
2494        __le32 agg_mpdu_cnt;
2495        __le32 agg_cnt;
2496        __le32 unsupport_mcs;
2497} __packed;
2498
2499#define INTERFERENCE_DATA_AVAILABLE      cpu_to_le32(1)
2500
2501struct statistics_rx_non_phy {
2502        __le32 bogus_cts;       /* CTS received when not expecting CTS */
2503        __le32 bogus_ack;       /* ACK received when not expecting ACK */
2504        __le32 non_bssid_frames;        /* number of frames with BSSID that
2505                                         * doesn't belong to the STA BSSID */
2506        __le32 filtered_frames; /* count frames that were dumped in the
2507                                 * filtering process */
2508        __le32 non_channel_beacons;     /* beacons with our bss id but not on
2509                                         * our serving channel */
2510        __le32 channel_beacons; /* beacons with our bss id and in our
2511                                 * serving channel */
2512        __le32 num_missed_bcon; /* number of missed beacons */
2513        __le32 adc_rx_saturation_time;  /* count in 0.8us units the time the
2514                                         * ADC was in saturation */
2515        __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2516                                          * for INA */
2517        __le32 beacon_silence_rssi_a;   /* RSSI silence after beacon frame */
2518        __le32 beacon_silence_rssi_b;   /* RSSI silence after beacon frame */
2519        __le32 beacon_silence_rssi_c;   /* RSSI silence after beacon frame */
2520        __le32 interference_data_flag;  /* flag for interference data
2521                                         * availability. 1 when data is
2522                                         * available. */
2523        __le32 channel_load;            /* counts RX Enable time in uSec */
2524        __le32 dsp_false_alarms;        /* DSP false alarm (both OFDM
2525                                         * and CCK) counter */
2526        __le32 beacon_rssi_a;
2527        __le32 beacon_rssi_b;
2528        __le32 beacon_rssi_c;
2529        __le32 beacon_energy_a;
2530        __le32 beacon_energy_b;
2531        __le32 beacon_energy_c;
2532} __packed;
2533
2534struct statistics_rx_non_phy_bt {
2535        struct statistics_rx_non_phy common;
2536        /* additional stats for bt */
2537        __le32 num_bt_kills;
2538        __le32 reserved[2];
2539} __packed;
2540
2541struct statistics_rx {
2542        struct statistics_rx_phy ofdm;
2543        struct statistics_rx_phy cck;
2544        struct statistics_rx_non_phy general;
2545        struct statistics_rx_ht_phy ofdm_ht;
2546} __packed;
2547
2548struct statistics_rx_bt {
2549        struct statistics_rx_phy ofdm;
2550        struct statistics_rx_phy cck;
2551        struct statistics_rx_non_phy_bt general;
2552        struct statistics_rx_ht_phy ofdm_ht;
2553} __packed;
2554
2555/**
2556 * struct statistics_tx_power - current tx power
2557 *
2558 * @ant_a: current tx power on chain a in 1/2 dB step
2559 * @ant_b: current tx power on chain b in 1/2 dB step
2560 * @ant_c: current tx power on chain c in 1/2 dB step
2561 */
2562struct statistics_tx_power {
2563        u8 ant_a;
2564        u8 ant_b;
2565        u8 ant_c;
2566        u8 reserved;
2567} __packed;
2568
2569struct statistics_tx_non_phy_agg {
2570        __le32 ba_timeout;
2571        __le32 ba_reschedule_frames;
2572        __le32 scd_query_agg_frame_cnt;
2573        __le32 scd_query_no_agg;
2574        __le32 scd_query_agg;
2575        __le32 scd_query_mismatch;
2576        __le32 frame_not_ready;
2577        __le32 underrun;
2578        __le32 bt_prio_kill;
2579        __le32 rx_ba_rsp_cnt;
2580} __packed;
2581
2582struct statistics_tx {
2583        __le32 preamble_cnt;
2584        __le32 rx_detected_cnt;
2585        __le32 bt_prio_defer_cnt;
2586        __le32 bt_prio_kill_cnt;
2587        __le32 few_bytes_cnt;
2588        __le32 cts_timeout;
2589        __le32 ack_timeout;
2590        __le32 expected_ack_cnt;
2591        __le32 actual_ack_cnt;
2592        __le32 dump_msdu_cnt;
2593        __le32 burst_abort_next_frame_mismatch_cnt;
2594        __le32 burst_abort_missing_next_frame_cnt;
2595        __le32 cts_timeout_collision;
2596        __le32 ack_or_ba_timeout_collision;
2597        struct statistics_tx_non_phy_agg agg;
2598        /*
2599         * "tx_power" are optional parameters provided by uCode,
2600         * 6000 series is the only device provide the information,
2601         * Those are reserved fields for all the other devices
2602         */
2603        struct statistics_tx_power tx_power;
2604        __le32 reserved1;
2605} __packed;
2606
2607
2608struct statistics_div {
2609        __le32 tx_on_a;
2610        __le32 tx_on_b;
2611        __le32 exec_time;
2612        __le32 probe_time;
2613        __le32 reserved1;
2614        __le32 reserved2;
2615} __packed;
2616
2617struct statistics_general_common {
2618        __le32 temperature;   /* radio temperature */
2619        __le32 temperature_m; /* radio voltage */
2620        struct statistics_dbg dbg;
2621        __le32 sleep_time;
2622        __le32 slots_out;
2623        __le32 slots_idle;
2624        __le32 ttl_timestamp;
2625        struct statistics_div div;
2626        __le32 rx_enable_counter;
2627        /*
2628         * num_of_sos_states:
2629         *  count the number of times we have to re-tune
2630         *  in order to get out of bad PHY status
2631         */
2632        __le32 num_of_sos_states;
2633} __packed;
2634
2635struct statistics_bt_activity {
2636        /* Tx statistics */
2637        __le32 hi_priority_tx_req_cnt;
2638        __le32 hi_priority_tx_denied_cnt;
2639        __le32 lo_priority_tx_req_cnt;
2640        __le32 lo_priority_tx_denied_cnt;
2641        /* Rx statistics */
2642        __le32 hi_priority_rx_req_cnt;
2643        __le32 hi_priority_rx_denied_cnt;
2644        __le32 lo_priority_rx_req_cnt;
2645        __le32 lo_priority_rx_denied_cnt;
2646} __packed;
2647
2648struct statistics_general {
2649        struct statistics_general_common common;
2650        __le32 reserved2;
2651        __le32 reserved3;
2652} __packed;
2653
2654struct statistics_general_bt {
2655        struct statistics_general_common common;
2656        struct statistics_bt_activity activity;
2657        __le32 reserved2;
2658        __le32 reserved3;
2659} __packed;
2660
2661#define UCODE_STATISTICS_CLEAR_MSK              (0x1 << 0)
2662#define UCODE_STATISTICS_FREQUENCY_MSK          (0x1 << 1)
2663#define UCODE_STATISTICS_NARROW_BAND_MSK        (0x1 << 2)
2664
2665/*
2666 * REPLY_STATISTICS_CMD = 0x9c,
2667 * all devices identical.
2668 *
2669 * This command triggers an immediate response containing uCode statistics.
2670 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2671 *
2672 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2673 * internal copy of the statistics (counters) after issuing the response.
2674 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2675 *
2676 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2677 * STATISTICS_NOTIFICATIONs after received beacons (see below).  This flag
2678 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2679 */
2680#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1)     /* see above */
2681#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
2682struct iwl_statistics_cmd {
2683        __le32 configuration_flags;     /* IWL_STATS_CONF_* */
2684} __packed;
2685
2686/*
2687 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2688 *
2689 * By default, uCode issues this notification after receiving a beacon
2690 * while associated.  To disable this behavior, set DISABLE_NOTIF flag in the
2691 * REPLY_STATISTICS_CMD 0x9c, above.
2692 *
2693 * Statistics counters continue to increment beacon after beacon, but are
2694 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2695 * 0x9c with CLEAR_STATS bit set (see above).
2696 *
2697 * uCode also issues this notification during scans.  uCode clears statistics
2698 * appropriately so that each notification contains statistics for only the
2699 * one channel that has just been scanned.
2700 */
2701#define STATISTICS_REPLY_FLG_BAND_24G_MSK         cpu_to_le32(0x2)
2702#define STATISTICS_REPLY_FLG_HT40_MODE_MSK        cpu_to_le32(0x8)
2703
2704struct iwl_notif_statistics {
2705        __le32 flag;
2706        struct statistics_rx rx;
2707        struct statistics_tx tx;
2708        struct statistics_general general;
2709} __packed;
2710
2711struct iwl_bt_notif_statistics {
2712        __le32 flag;
2713        struct statistics_rx_bt rx;
2714        struct statistics_tx tx;
2715        struct statistics_general_bt general;
2716} __packed;
2717
2718/*
2719 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
2720 *
2721 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2722 * in regardless of how many missed beacons, which mean when driver receive the
2723 * notification, inside the command, it can find all the beacons information
2724 * which include number of total missed beacons, number of consecutive missed
2725 * beacons, number of beacons received and number of beacons expected to
2726 * receive.
2727 *
2728 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2729 * in order to bring the radio/PHY back to working state; which has no relation
2730 * to when driver will perform sensitivity calibration.
2731 *
2732 * Driver should set it own missed_beacon_threshold to decide when to perform
2733 * sensitivity calibration based on number of consecutive missed beacons in
2734 * order to improve overall performance, especially in noisy environment.
2735 *
2736 */
2737
2738#define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2739#define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2740#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
2741
2742struct iwl_missed_beacon_notif {
2743        __le32 consecutive_missed_beacons;
2744        __le32 total_missed_becons;
2745        __le32 num_expected_beacons;
2746        __le32 num_recvd_beacons;
2747} __packed;
2748
2749
2750/******************************************************************************
2751 * (11)
2752 * Rx Calibration Commands:
2753 *
2754 * With the uCode used for open source drivers, most Tx calibration (except
2755 * for Tx Power) and most Rx calibration is done by uCode during the
2756 * "initialize" phase of uCode boot.  Driver must calibrate only:
2757 *
2758 * 1)  Tx power (depends on temperature), described elsewhere
2759 * 2)  Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2760 * 3)  Receiver sensitivity (to optimize signal detection)
2761 *
2762 *****************************************************************************/
2763
2764/**
2765 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2766 *
2767 * This command sets up the Rx signal detector for a sensitivity level that
2768 * is high enough to lock onto all signals within the associated network,
2769 * but low enough to ignore signals that are below a certain threshold, so as
2770 * not to have too many "false alarms".  False alarms are signals that the
2771 * Rx DSP tries to lock onto, but then discards after determining that they
2772 * are noise.
2773 *
2774 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2775 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2776 * time listening, not transmitting).  Driver must adjust sensitivity so that
2777 * the ratio of actual false alarms to actual Rx time falls within this range.
2778 *
2779 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2780 * received beacon.  These provide information to the driver to analyze the
2781 * sensitivity.  Don't analyze statistics that come in from scanning, or any
2782 * other non-associated-network source.  Pertinent statistics include:
2783 *
2784 * From "general" statistics (struct statistics_rx_non_phy):
2785 *
2786 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2787 *   Measure of energy of desired signal.  Used for establishing a level
2788 *   below which the device does not detect signals.
2789 *
2790 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2791 *   Measure of background noise in silent period after beacon.
2792 *
2793 * channel_load
2794 *   uSecs of actual Rx time during beacon period (varies according to
2795 *   how much time was spent transmitting).
2796 *
2797 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2798 *
2799 * false_alarm_cnt
2800 *   Signal locks abandoned early (before phy-level header).
2801 *
2802 * plcp_err
2803 *   Signal locks abandoned late (during phy-level header).
2804 *
2805 * NOTE:  Both false_alarm_cnt and plcp_err increment monotonically from
2806 *        beacon to beacon, i.e. each value is an accumulation of all errors
2807 *        before and including the latest beacon.  Values will wrap around to 0
2808 *        after counting up to 2^32 - 1.  Driver must differentiate vs.
2809 *        previous beacon's values to determine # false alarms in the current
2810 *        beacon period.
2811 *
2812 * Total number of false alarms = false_alarms + plcp_errs
2813 *
2814 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2815 * (notice that the start points for OFDM are at or close to settings for
2816 * maximum sensitivity):
2817 *
2818 *                                             START  /  MIN  /  MAX
2819 *   HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX          90   /   85  /  120
2820 *   HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX     170   /  170  /  210
2821 *   HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX         105   /  105  /  140
2822 *   HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX     220   /  220  /  270
2823 *
2824 *   If actual rate of OFDM false alarms (+ plcp_errors) is too high
2825 *   (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2826 *   by *adding* 1 to all 4 of the table entries above, up to the max for
2827 *   each entry.  Conversely, if false alarm rate is too low (less than 5
2828 *   for each 204.8 msecs listening), *subtract* 1 from each entry to
2829 *   increase sensitivity.
2830 *
2831 * For CCK sensitivity, keep track of the following:
2832 *
2833 *   1).  20-beacon history of maximum background noise, indicated by
2834 *        (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2835 *        3 receivers.  For any given beacon, the "silence reference" is
2836 *        the maximum of last 60 samples (20 beacons * 3 receivers).
2837 *
2838 *   2).  10-beacon history of strongest signal level, as indicated
2839 *        by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2840 *        i.e. the strength of the signal through the best receiver at the
2841 *        moment.  These measurements are "upside down", with lower values
2842 *        for stronger signals, so max energy will be *minimum* value.
2843 *
2844 *        Then for any given beacon, the driver must determine the *weakest*
2845 *        of the strongest signals; this is the minimum level that needs to be
2846 *        successfully detected, when using the best receiver at the moment.
2847 *        "Max cck energy" is the maximum (higher value means lower energy!)
2848 *        of the last 10 minima.  Once this is determined, driver must add
2849 *        a little margin by adding "6" to it.
2850 *
2851 *   3).  Number of consecutive beacon periods with too few false alarms.
2852 *        Reset this to 0 at the first beacon period that falls within the
2853 *        "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2854 *
2855 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2856 * (notice that the start points for CCK are at maximum sensitivity):
2857 *
2858 *                                             START  /  MIN  /  MAX
2859 *   HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX         125   /  125  /  200
2860 *   HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX     200   /  200  /  400
2861 *   HD_MIN_ENERGY_CCK_DET_INDEX                100   /    0  /  100
2862 *
2863 *   If actual rate of CCK false alarms (+ plcp_errors) is too high
2864 *   (greater than 50 for each 204.8 msecs listening), method for reducing
2865 *   sensitivity is:
2866 *
2867 *   1)  *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2868 *       up to max 400.
2869 *
2870 *   2)  If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2871 *       sensitivity has been reduced a significant amount; bring it up to
2872 *       a moderate 161.  Otherwise, *add* 3, up to max 200.
2873 *
2874 *   3)  a)  If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2875 *       sensitivity has been reduced only a moderate or small amount;
2876 *       *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2877 *       down to min 0.  Otherwise (if gain has been significantly reduced),
2878 *       don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2879 *
2880 *       b)  Save a snapshot of the "silence reference".
2881 *
2882 *   If actual rate of CCK false alarms (+ plcp_errors) is too low
2883 *   (less than 5 for each 204.8 msecs listening), method for increasing
2884 *   sensitivity is used only if:
2885 *
2886 *   1a)  Previous beacon did not have too many false alarms
2887 *   1b)  AND difference between previous "silence reference" and current
2888 *        "silence reference" (prev - current) is 2 or more,
2889 *   OR 2)  100 or more consecutive beacon periods have had rate of
2890 *          less than 5 false alarms per 204.8 milliseconds rx time.
2891 *
2892 *   Method for increasing sensitivity:
2893 *
2894 *   1)  *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
2895 *       down to min 125.
2896 *
2897 *   2)  *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2898 *       down to min 200.
2899 *
2900 *   3)  *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
2901 *
2902 *   If actual rate of CCK false alarms (+ plcp_errors) is within good range
2903 *   (between 5 and 50 for each 204.8 msecs listening):
2904 *
2905 *   1)  Save a snapshot of the silence reference.
2906 *
2907 *   2)  If previous beacon had too many CCK false alarms (+ plcp_errors),
2908 *       give some extra margin to energy threshold by *subtracting* 8
2909 *       from value in HD_MIN_ENERGY_CCK_DET_INDEX.
2910 *
2911 *   For all cases (too few, too many, good range), make sure that the CCK
2912 *   detection threshold (energy) is below the energy level for robust
2913 *   detection over the past 10 beacon periods, the "Max cck energy".
2914 *   Lower values mean higher energy; this means making sure that the value
2915 *   in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
2916 *
2917 */
2918
2919/*
2920 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
2921 */
2922#define HD_TABLE_SIZE  (11)     /* number of entries */
2923#define HD_MIN_ENERGY_CCK_DET_INDEX                 (0) /* table indexes */
2924#define HD_MIN_ENERGY_OFDM_DET_INDEX                (1)
2925#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX          (2)
2926#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX      (3)
2927#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX      (4)
2928#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX          (5)
2929#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX      (6)
2930#define HD_BARKER_CORR_TH_ADD_MIN_INDEX             (7)
2931#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX         (8)
2932#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX          (9)
2933#define HD_OFDM_ENERGY_TH_IN_INDEX                  (10)
2934
2935/*
2936 * Additional table entries in enhance SENSITIVITY_CMD
2937 */
2938#define HD_INA_NON_SQUARE_DET_OFDM_INDEX                (11)
2939#define HD_INA_NON_SQUARE_DET_CCK_INDEX                 (12)
2940#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX           (13)
2941#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX          (14)
2942#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX      (15)
2943#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX              (16)
2944#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX          (17)
2945#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX           (18)
2946#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX       (19)
2947#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX               (20)
2948#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX           (21)
2949#define HD_RESERVED                                     (22)
2950
2951/* number of entries for enhanced tbl */
2952#define ENHANCE_HD_TABLE_SIZE  (23)
2953
2954/* number of additional entries for enhanced tbl */
2955#define ENHANCE_HD_TABLE_ENTRIES  (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
2956
2957#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1              cpu_to_le16(0)
2958#define HD_INA_NON_SQUARE_DET_CCK_DATA_V1               cpu_to_le16(0)
2959#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1         cpu_to_le16(0)
2960#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1        cpu_to_le16(668)
2961#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1    cpu_to_le16(4)
2962#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1            cpu_to_le16(486)
2963#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1        cpu_to_le16(37)
2964#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1         cpu_to_le16(853)
2965#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1     cpu_to_le16(4)
2966#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1             cpu_to_le16(476)
2967#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1         cpu_to_le16(99)
2968
2969#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2              cpu_to_le16(1)
2970#define HD_INA_NON_SQUARE_DET_CCK_DATA_V2               cpu_to_le16(1)
2971#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2         cpu_to_le16(1)
2972#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2        cpu_to_le16(600)
2973#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2    cpu_to_le16(40)
2974#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2            cpu_to_le16(486)
2975#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2        cpu_to_le16(45)
2976#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2         cpu_to_le16(853)
2977#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2     cpu_to_le16(60)
2978#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2             cpu_to_le16(476)
2979#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2         cpu_to_le16(99)
2980
2981
2982/* Control field in struct iwl_sensitivity_cmd */
2983#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE   cpu_to_le16(0)
2984#define SENSITIVITY_CMD_CONTROL_WORK_TABLE      cpu_to_le16(1)
2985
2986/**
2987 * struct iwl_sensitivity_cmd
2988 * @control:  (1) updates working table, (0) updates default table
2989 * @table:  energy threshold values, use HD_* as index into table
2990 *
2991 * Always use "1" in "control" to update uCode's working table and DSP.
2992 */
2993struct iwl_sensitivity_cmd {
2994        __le16 control;                 /* always use "1" */
2995        __le16 table[HD_TABLE_SIZE];    /* use HD_* as index */
2996} __packed;
2997
2998/*
2999 *
3000 */
3001struct iwl_enhance_sensitivity_cmd {
3002        __le16 control;                 /* always use "1" */
3003        __le16 enhance_table[ENHANCE_HD_TABLE_SIZE];    /* use HD_* as index */
3004} __packed;
3005
3006
3007/**
3008 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3009 *
3010 * This command sets the relative gains of agn device's 3 radio receiver chains.
3011 *
3012 * After the first association, driver should accumulate signal and noise
3013 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3014 * beacons from the associated network (don't collect statistics that come
3015 * in from scanning, or any other non-network source).
3016 *
3017 * DISCONNECTED ANTENNA:
3018 *
3019 * Driver should determine which antennas are actually connected, by comparing
3020 * average beacon signal levels for the 3 Rx chains.  Accumulate (add) the
3021 * following values over 20 beacons, one accumulator for each of the chains
3022 * a/b/c, from struct statistics_rx_non_phy:
3023 *
3024 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3025 *
3026 * Find the strongest signal from among a/b/c.  Compare the other two to the
3027 * strongest.  If any signal is more than 15 dB (times 20, unless you
3028 * divide the accumulated values by 20) below the strongest, the driver
3029 * considers that antenna to be disconnected, and should not try to use that
3030 * antenna/chain for Rx or Tx.  If both A and B seem to be disconnected,
3031 * driver should declare the stronger one as connected, and attempt to use it
3032 * (A and B are the only 2 Tx chains!).
3033 *
3034 *
3035 * RX BALANCE:
3036 *
3037 * Driver should balance the 3 receivers (but just the ones that are connected
3038 * to antennas, see above) for gain, by comparing the average signal levels
3039 * detected during the silence after each beacon (background noise).
3040 * Accumulate (add) the following values over 20 beacons, one accumulator for
3041 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3042 *
3043 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3044 *
3045 * Find the weakest background noise level from among a/b/c.  This Rx chain
3046 * will be the reference, with 0 gain adjustment.  Attenuate other channels by
3047 * finding noise difference:
3048 *
3049 * (accum_noise[i] - accum_noise[reference]) / 30
3050 *
3051 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3052 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3053 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3054 * and set bit 2 to indicate "reduce gain".  The value for the reference
3055 * (weakest) chain should be "0".
3056 *
3057 * diff_gain_[abc] bit fields:
3058 *   2: (1) reduce gain, (0) increase gain
3059 * 1-0: amount of gain, units of 1.5 dB
3060 */
3061
3062/* Phy calibration command for series */
3063enum {
3064        IWL_PHY_CALIBRATE_DC_CMD                = 8,
3065        IWL_PHY_CALIBRATE_LO_CMD                = 9,
3066        IWL_PHY_CALIBRATE_TX_IQ_CMD             = 11,
3067        IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD       = 15,
3068        IWL_PHY_CALIBRATE_BASE_BAND_CMD         = 16,
3069        IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD        = 17,
3070        IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD       = 18,
3071};
3072
3073/* This enum defines the bitmap of various calibrations to enable in both
3074 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3075 */
3076enum iwl_ucode_calib_cfg {
3077        IWL_CALIB_CFG_RX_BB_IDX                 = BIT(0),
3078        IWL_CALIB_CFG_DC_IDX                    = BIT(1),
3079        IWL_CALIB_CFG_LO_IDX                    = BIT(2),
3080        IWL_CALIB_CFG_TX_IQ_IDX                 = BIT(3),
3081        IWL_CALIB_CFG_RX_IQ_IDX                 = BIT(4),
3082        IWL_CALIB_CFG_NOISE_IDX                 = BIT(5),
3083        IWL_CALIB_CFG_CRYSTAL_IDX               = BIT(6),
3084        IWL_CALIB_CFG_TEMPERATURE_IDX           = BIT(7),
3085        IWL_CALIB_CFG_PAPD_IDX                  = BIT(8),
3086        IWL_CALIB_CFG_SENSITIVITY_IDX           = BIT(9),
3087        IWL_CALIB_CFG_TX_PWR_IDX                = BIT(10),
3088};
3089
3090#define IWL_CALIB_INIT_CFG_ALL  cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX |   \
3091                                        IWL_CALIB_CFG_DC_IDX |          \
3092                                        IWL_CALIB_CFG_LO_IDX |          \
3093                                        IWL_CALIB_CFG_TX_IQ_IDX |       \
3094                                        IWL_CALIB_CFG_RX_IQ_IDX |       \
3095                                        IWL_CALIB_CFG_CRYSTAL_IDX)
3096
3097#define IWL_CALIB_RT_CFG_ALL    cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX |   \
3098                                        IWL_CALIB_CFG_DC_IDX |          \
3099                                        IWL_CALIB_CFG_LO_IDX |          \
3100                                        IWL_CALIB_CFG_TX_IQ_IDX |       \
3101                                        IWL_CALIB_CFG_RX_IQ_IDX |       \
3102                                        IWL_CALIB_CFG_TEMPERATURE_IDX | \
3103                                        IWL_CALIB_CFG_PAPD_IDX |        \
3104                                        IWL_CALIB_CFG_TX_PWR_IDX |      \
3105                                        IWL_CALIB_CFG_CRYSTAL_IDX)
3106
3107#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK       cpu_to_le32(BIT(0))
3108
3109struct iwl_calib_cfg_elmnt_s {
3110        __le32 is_enable;
3111        __le32 start;
3112        __le32 send_res;
3113        __le32 apply_res;
3114        __le32 reserved;
3115} __packed;
3116
3117struct iwl_calib_cfg_status_s {
3118        struct iwl_calib_cfg_elmnt_s once;
3119        struct iwl_calib_cfg_elmnt_s perd;
3120        __le32 flags;
3121} __packed;
3122
3123struct iwl_calib_cfg_cmd {
3124        struct iwl_calib_cfg_status_s ucd_calib_cfg;
3125        struct iwl_calib_cfg_status_s drv_calib_cfg;
3126        __le32 reserved1;
3127} __packed;
3128
3129struct iwl_calib_hdr {
3130        u8 op_code;
3131        u8 first_group;
3132        u8 groups_num;
3133        u8 data_valid;
3134} __packed;
3135
3136struct iwl_calib_cmd {
3137        struct iwl_calib_hdr hdr;
3138        u8 data[];
3139} __packed;
3140
3141struct iwl_calib_xtal_freq_cmd {
3142        struct iwl_calib_hdr hdr;
3143        u8 cap_pin1;
3144        u8 cap_pin2;
3145        u8 pad[2];
3146} __packed;
3147
3148#define DEFAULT_RADIO_SENSOR_OFFSET    cpu_to_le16(2700)
3149struct iwl_calib_temperature_offset_cmd {
3150        struct iwl_calib_hdr hdr;
3151        __le16 radio_sensor_offset;
3152        __le16 reserved;
3153} __packed;
3154
3155struct iwl_calib_temperature_offset_v2_cmd {
3156        struct iwl_calib_hdr hdr;
3157        __le16 radio_sensor_offset_high;
3158        __le16 radio_sensor_offset_low;
3159        __le16 burntVoltageRef;
3160        __le16 reserved;
3161} __packed;
3162
3163/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3164struct iwl_calib_chain_noise_reset_cmd {
3165        struct iwl_calib_hdr hdr;
3166        u8 data[];
3167};
3168
3169/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
3170struct iwl_calib_chain_noise_gain_cmd {
3171        struct iwl_calib_hdr hdr;
3172        u8 delta_gain_1;
3173        u8 delta_gain_2;
3174        u8 pad[2];
3175} __packed;
3176
3177/******************************************************************************
3178 * (12)
3179 * Miscellaneous Commands:
3180 *
3181 *****************************************************************************/
3182
3183/*
3184 * LEDs Command & Response
3185 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3186 *
3187 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3188 * this command turns it on or off, or sets up a periodic blinking cycle.
3189 */
3190struct iwl_led_cmd {
3191        __le32 interval;        /* "interval" in uSec */
3192        u8 id;                  /* 1: Activity, 2: Link, 3: Tech */
3193        u8 off;                 /* # intervals off while blinking;
3194                                 * "0", with >0 "on" value, turns LED on */
3195        u8 on;                  /* # intervals on while blinking;
3196                                 * "0", regardless of "off", turns LED off */
3197        u8 reserved;
3198} __packed;
3199
3200/*
3201 * station priority table entries
3202 * also used as potential "events" value for both
3203 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
3204 */
3205
3206/*
3207 * COEX events entry flag masks
3208 * RP - Requested Priority
3209 * WP - Win Medium Priority: priority assigned when the contention has been won
3210 */
3211#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG        (0x1)
3212#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG        (0x2)
3213#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG  (0x4)
3214
3215#define COEX_CU_UNASSOC_IDLE_RP               4
3216#define COEX_CU_UNASSOC_MANUAL_SCAN_RP        4
3217#define COEX_CU_UNASSOC_AUTO_SCAN_RP          4
3218#define COEX_CU_CALIBRATION_RP                4
3219#define COEX_CU_PERIODIC_CALIBRATION_RP       4
3220#define COEX_CU_CONNECTION_ESTAB_RP           4
3221#define COEX_CU_ASSOCIATED_IDLE_RP            4
3222#define COEX_CU_ASSOC_MANUAL_SCAN_RP          4
3223#define COEX_CU_ASSOC_AUTO_SCAN_RP            4
3224#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP         4
3225#define COEX_CU_RF_ON_RP                      6
3226#define COEX_CU_RF_OFF_RP                     4
3227#define COEX_CU_STAND_ALONE_DEBUG_RP          6
3228#define COEX_CU_IPAN_ASSOC_LEVEL_RP           4
3229#define COEX_CU_RSRVD1_RP                     4
3230#define COEX_CU_RSRVD2_RP                     4
3231
3232#define COEX_CU_UNASSOC_IDLE_WP               3
3233#define COEX_CU_UNASSOC_MANUAL_SCAN_WP        3
3234#define COEX_CU_UNASSOC_AUTO_SCAN_WP          3
3235#define COEX_CU_CALIBRATION_WP                3
3236#define COEX_CU_PERIODIC_CALIBRATION_WP       3
3237#define COEX_CU_CONNECTION_ESTAB_WP           3
3238#define COEX_CU_ASSOCIATED_IDLE_WP            3
3239#define COEX_CU_ASSOC_MANUAL_SCAN_WP          3
3240#define COEX_CU_ASSOC_AUTO_SCAN_WP            3
3241#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP         3
3242#define COEX_CU_RF_ON_WP                      3
3243#define COEX_CU_RF_OFF_WP                     3
3244#define COEX_CU_STAND_ALONE_DEBUG_WP          6
3245#define COEX_CU_IPAN_ASSOC_LEVEL_WP           3
3246#define COEX_CU_RSRVD1_WP                     3
3247#define COEX_CU_RSRVD2_WP                     3
3248
3249#define COEX_UNASSOC_IDLE_FLAGS                     0
3250#define COEX_UNASSOC_MANUAL_SCAN_FLAGS          \
3251        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3252        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3253#define COEX_UNASSOC_AUTO_SCAN_FLAGS            \
3254        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3255        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3256#define COEX_CALIBRATION_FLAGS                  \
3257        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3258        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3259#define COEX_PERIODIC_CALIBRATION_FLAGS             0
3260/*
3261 * COEX_CONNECTION_ESTAB:
3262 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3263 */
3264#define COEX_CONNECTION_ESTAB_FLAGS             \
3265        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3266        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG |    \
3267        COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3268#define COEX_ASSOCIATED_IDLE_FLAGS                  0
3269#define COEX_ASSOC_MANUAL_SCAN_FLAGS            \
3270        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3271        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3272#define COEX_ASSOC_AUTO_SCAN_FLAGS              \
3273        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3274         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3275#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS               0
3276#define COEX_RF_ON_FLAGS                            0
3277#define COEX_RF_OFF_FLAGS                           0
3278#define COEX_STAND_ALONE_DEBUG_FLAGS            \
3279        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3280         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3281#define COEX_IPAN_ASSOC_LEVEL_FLAGS             \
3282        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3283         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG |   \
3284         COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3285#define COEX_RSRVD1_FLAGS                           0
3286#define COEX_RSRVD2_FLAGS                           0
3287/*
3288 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3289 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3290 */
3291#define COEX_CU_RF_ON_FLAGS                     \
3292        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3293         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG |   \
3294         COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3295
3296
3297enum {
3298        /* un-association part */
3299        COEX_UNASSOC_IDLE               = 0,
3300        COEX_UNASSOC_MANUAL_SCAN        = 1,
3301        COEX_UNASSOC_AUTO_SCAN          = 2,
3302        /* calibration */
3303        COEX_CALIBRATION                = 3,
3304        COEX_PERIODIC_CALIBRATION       = 4,
3305        /* connection */
3306        COEX_CONNECTION_ESTAB           = 5,
3307        /* association part */
3308        COEX_ASSOCIATED_IDLE            = 6,
3309        COEX_ASSOC_MANUAL_SCAN          = 7,
3310        COEX_ASSOC_AUTO_SCAN            = 8,
3311        COEX_ASSOC_ACTIVE_LEVEL         = 9,
3312        /* RF ON/OFF */
3313        COEX_RF_ON                      = 10,
3314        COEX_RF_OFF                     = 11,
3315        COEX_STAND_ALONE_DEBUG          = 12,
3316        /* IPAN */
3317        COEX_IPAN_ASSOC_LEVEL           = 13,
3318        /* reserved */
3319        COEX_RSRVD1                     = 14,
3320        COEX_RSRVD2                     = 15,
3321        COEX_NUM_OF_EVENTS              = 16
3322};
3323
3324/*
3325 * Coexistence WIFI/WIMAX  Command
3326 * COEX_PRIORITY_TABLE_CMD = 0x5a
3327 *
3328 */
3329struct iwl_wimax_coex_event_entry {
3330        u8 request_prio;
3331        u8 win_medium_prio;
3332        u8 reserved;
3333        u8 flags;
3334} __packed;
3335
3336/* COEX flag masks */
3337
3338/* Station table is valid */
3339#define COEX_FLAGS_STA_TABLE_VALID_MSK      (0x1)
3340/* UnMask wake up src at unassociated sleep */
3341#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK    (0x4)
3342/* UnMask wake up src at associated sleep */
3343#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK      (0x8)
3344/* Enable CoEx feature. */
3345#define COEX_FLAGS_COEX_ENABLE_MSK          (0x80)
3346
3347struct iwl_wimax_coex_cmd {
3348        u8 flags;
3349        u8 reserved[3];
3350        struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
3351} __packed;
3352
3353/*
3354 * Coexistence MEDIUM NOTIFICATION
3355 * COEX_MEDIUM_NOTIFICATION = 0x5b
3356 *
3357 * notification from uCode to host to indicate medium changes
3358 *
3359 */
3360/*
3361 * status field
3362 * bit 0 - 2: medium status
3363 * bit 3: medium change indication
3364 * bit 4 - 31: reserved
3365 */
3366/* status option values, (0 - 2 bits) */
3367#define COEX_MEDIUM_BUSY        (0x0) /* radio belongs to WiMAX */
3368#define COEX_MEDIUM_ACTIVE      (0x1) /* radio belongs to WiFi */
3369#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3370#define COEX_MEDIUM_MSK         (0x7)
3371
3372/* send notification status (1 bit) */
3373#define COEX_MEDIUM_CHANGED     (0x8)
3374#define COEX_MEDIUM_CHANGED_MSK (0x8)
3375#define COEX_MEDIUM_SHIFT       (3)
3376
3377struct iwl_coex_medium_notification {
3378        __le32 status;
3379        __le32 events;
3380} __packed;
3381
3382/*
3383 * Coexistence EVENT  Command
3384 * COEX_EVENT_CMD = 0x5c
3385 *
3386 * send from host to uCode for coex event request.
3387 */
3388/* flags options */
3389#define COEX_EVENT_REQUEST_MSK  (0x1)
3390
3391struct iwl_coex_event_cmd {
3392        u8 flags;
3393        u8 event;
3394        __le16 reserved;
3395} __packed;
3396
3397struct iwl_coex_event_resp {
3398        __le32 status;
3399} __packed;
3400
3401
3402/******************************************************************************
3403 * Bluetooth Coexistence commands
3404 *
3405 *****************************************************************************/
3406
3407/*
3408 * BT Status notification
3409 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
3410 */
3411enum iwl_bt_coex_profile_traffic_load {
3412        IWL_BT_COEX_TRAFFIC_LOAD_NONE =         0,
3413        IWL_BT_COEX_TRAFFIC_LOAD_LOW =          1,
3414        IWL_BT_COEX_TRAFFIC_LOAD_HIGH =         2,
3415        IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS =   3,
3416/*
3417 * There are no more even though below is a u8, the
3418 * indication from the BT device only has two bits.
3419 */
3420};
3421
3422#define BT_SESSION_ACTIVITY_1_UART_MSG          0x1
3423#define BT_SESSION_ACTIVITY_2_UART_MSG          0x2
3424
3425/* BT UART message - Share Part (BT -> WiFi) */
3426#define BT_UART_MSG_FRAME1MSGTYPE_POS           (0)
3427#define BT_UART_MSG_FRAME1MSGTYPE_MSK           \
3428                (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3429#define BT_UART_MSG_FRAME1SSN_POS               (3)
3430#define BT_UART_MSG_FRAME1SSN_MSK               \
3431                (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3432#define BT_UART_MSG_FRAME1UPDATEREQ_POS         (5)
3433#define BT_UART_MSG_FRAME1UPDATEREQ_MSK         \
3434                (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3435#define BT_UART_MSG_FRAME1RESERVED_POS          (6)
3436#define BT_UART_MSG_FRAME1RESERVED_MSK          \
3437                (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3438
3439#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS   (0)
3440#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK   \
3441                (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3442#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS       (2)
3443#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK       \
3444                (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3445#define BT_UART_MSG_FRAME2CHLSEQN_POS           (4)
3446#define BT_UART_MSG_FRAME2CHLSEQN_MSK           \
3447                (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3448#define BT_UART_MSG_FRAME2INBAND_POS            (5)
3449#define BT_UART_MSG_FRAME2INBAND_MSK            \
3450                (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3451#define BT_UART_MSG_FRAME2RESERVED_POS          (6)
3452#define BT_UART_MSG_FRAME2RESERVED_MSK          \
3453                (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3454
3455#define BT_UART_MSG_FRAME3SCOESCO_POS           (0)
3456#define BT_UART_MSG_FRAME3SCOESCO_MSK           \
3457                (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3458#define BT_UART_MSG_FRAME3SNIFF_POS             (1)
3459#define BT_UART_MSG_FRAME3SNIFF_MSK             \
3460                (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3461#define BT_UART_MSG_FRAME3A2DP_POS              (2)
3462#define BT_UART_MSG_FRAME3A2DP_MSK              \
3463                (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3464#define BT_UART_MSG_FRAME3ACL_POS               (3)
3465#define BT_UART_MSG_FRAME3ACL_MSK               \
3466                (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3467#define BT_UART_MSG_FRAME3MASTER_POS            (4)
3468#define BT_UART_MSG_FRAME3MASTER_MSK            \
3469                (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3470#define BT_UART_MSG_FRAME3OBEX_POS              (5)
3471#define BT_UART_MSG_FRAME3OBEX_MSK              \
3472                (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3473#define BT_UART_MSG_FRAME3RESERVED_POS          (6)
3474#define BT_UART_MSG_FRAME3RESERVED_MSK          \
3475                (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3476
3477#define BT_UART_MSG_FRAME4IDLEDURATION_POS      (0)
3478#define BT_UART_MSG_FRAME4IDLEDURATION_MSK      \
3479                (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3480#define BT_UART_MSG_FRAME4RESERVED_POS          (6)
3481#define BT_UART_MSG_FRAME4RESERVED_MSK          \
3482                (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3483
3484#define BT_UART_MSG_FRAME5TXACTIVITY_POS        (0)
3485#define BT_UART_MSG_FRAME5TXACTIVITY_MSK        \
3486                (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3487#define BT_UART_MSG_FRAME5RXACTIVITY_POS        (2)
3488#define BT_UART_MSG_FRAME5RXACTIVITY_MSK        \
3489                (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3490#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS    (4)
3491#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK    \
3492                (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3493#define BT_UART_MSG_FRAME5RESERVED_POS          (6)
3494#define BT_UART_MSG_FRAME5RESERVED_MSK          \
3495                (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3496
3497#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS     (0)
3498#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK     \
3499                (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3500#define BT_UART_MSG_FRAME6DISCOVERABLE_POS      (5)
3501#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK      \
3502                (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3503#define BT_UART_MSG_FRAME6RESERVED_POS          (6)
3504#define BT_UART_MSG_FRAME6RESERVED_MSK          \
3505                (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3506
3507#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS     (0)
3508#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK     \
3509                (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
3510#define BT_UART_MSG_FRAME7PAGE_POS              (3)
3511#define BT_UART_MSG_FRAME7PAGE_MSK              \
3512                (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3513#define BT_UART_MSG_FRAME7INQUIRY_POS           (4)
3514#define BT_UART_MSG_FRAME7INQUIRY_MSK           \
3515                (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
3516#define BT_UART_MSG_FRAME7CONNECTABLE_POS       (5)
3517#define BT_UART_MSG_FRAME7CONNECTABLE_MSK       \
3518                (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3519#define BT_UART_MSG_FRAME7RESERVED_POS          (6)
3520#define BT_UART_MSG_FRAME7RESERVED_MSK          \
3521                (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3522
3523/* BT Session Activity 2 UART message (BT -> WiFi) */
3524#define BT_UART_MSG_2_FRAME1RESERVED1_POS       (5)
3525#define BT_UART_MSG_2_FRAME1RESERVED1_MSK       \
3526                (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3527#define BT_UART_MSG_2_FRAME1RESERVED2_POS       (6)
3528#define BT_UART_MSG_2_FRAME1RESERVED2_MSK       \
3529                (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3530
3531#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS  (0)
3532#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK  \
3533                (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3534#define BT_UART_MSG_2_FRAME2RESERVED_POS        (6)
3535#define BT_UART_MSG_2_FRAME2RESERVED_MSK        \
3536                (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3537
3538#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS   (0)
3539#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK   \
3540                (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3541#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS   (4)
3542#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK   \
3543                (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3544#define BT_UART_MSG_2_FRAME3LEMASTER_POS        (5)
3545#define BT_UART_MSG_2_FRAME3LEMASTER_MSK        \
3546                (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3547#define BT_UART_MSG_2_FRAME3RESERVED_POS        (6)
3548#define BT_UART_MSG_2_FRAME3RESERVED_MSK        \
3549                (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3550
3551#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS   (0)
3552#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK   \
3553                (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3554#define BT_UART_MSG_2_FRAME4NUMLECONN_POS       (4)
3555#define BT_UART_MSG_2_FRAME4NUMLECONN_MSK       \
3556                (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3557#define BT_UART_MSG_2_FRAME4RESERVED_POS        (6)
3558#define BT_UART_MSG_2_FRAME4RESERVED_MSK        \
3559                (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3560
3561#define BT_UART_MSG_2_FRAME5BTMINRSSI_POS       (0)
3562#define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK       \
3563                (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3564#define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS  (4)
3565#define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK  \
3566                (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3567#define BT_UART_MSG_2_FRAME5LEADVERMODE_POS     (5)
3568#define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK     \
3569                (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3570#define BT_UART_MSG_2_FRAME5RESERVED_POS        (6)
3571#define BT_UART_MSG_2_FRAME5RESERVED_MSK        \
3572                (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3573
3574#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS  (0)
3575#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK  \
3576                (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3577#define BT_UART_MSG_2_FRAME6RFU_POS             (5)
3578#define BT_UART_MSG_2_FRAME6RFU_MSK             \
3579                (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3580#define BT_UART_MSG_2_FRAME6RESERVED_POS        (6)
3581#define BT_UART_MSG_2_FRAME6RESERVED_MSK        \
3582                (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3583
3584#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS  (0)
3585#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK  \
3586                (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3587#define BT_UART_MSG_2_FRAME7LEPROFILE1_POS      (3)
3588#define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK      \
3589                (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3590#define BT_UART_MSG_2_FRAME7LEPROFILE2_POS      (4)
3591#define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK      \
3592                (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3593#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS  (5)
3594#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK  \
3595                (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3596#define BT_UART_MSG_2_FRAME7RESERVED_POS        (6)
3597#define BT_UART_MSG_2_FRAME7RESERVED_MSK        \
3598                (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3599
3600
3601#define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD     (-62)
3602#define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD    (-65)
3603
3604struct iwl_bt_uart_msg {
3605        u8 header;
3606        u8 frame1;
3607        u8 frame2;
3608        u8 frame3;
3609        u8 frame4;
3610        u8 frame5;
3611        u8 frame6;
3612        u8 frame7;
3613} __packed;
3614
3615struct iwl_bt_coex_profile_notif {
3616        struct iwl_bt_uart_msg last_bt_uart_msg;
3617        u8 bt_status; /* 0 - off, 1 - on */
3618        u8 bt_traffic_load; /* 0 .. 3? */
3619        u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3620        u8 reserved;
3621} __packed;
3622
3623#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3624#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3625#define IWL_BT_COEX_PRIO_TBL_PRIO_POS           1
3626#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK          0x0e
3627#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS       4
3628#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK      0xf0
3629#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT         1
3630
3631/*
3632 * BT Coexistence Priority table
3633 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3634 */
3635enum bt_coex_prio_table_events {
3636        BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3637        BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3638        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3639        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3640        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3641        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3642        BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3643        BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3644        BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3645        BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3646        BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3647        BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3648        BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3649        BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3650        BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3651        BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3652        /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3653        BT_COEX_PRIO_TBL_EVT_MAX,
3654};
3655
3656enum bt_coex_prio_table_priorities {
3657        BT_COEX_PRIO_TBL_DISABLED = 0,
3658        BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3659        BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3660        BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3661        BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3662        BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3663        BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3664        BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3665        BT_COEX_PRIO_TBL_MAX,
3666};
3667
3668struct iwl_bt_coex_prio_table_cmd {
3669        u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
3670} __packed;
3671
3672#define IWL_BT_COEX_ENV_CLOSE   0
3673#define IWL_BT_COEX_ENV_OPEN    1
3674/*
3675 * BT Protection Envelope
3676 * REPLY_BT_COEX_PROT_ENV = 0xcd
3677 */
3678struct iwl_bt_coex_prot_env_cmd {
3679        u8 action; /* 0 = closed, 1 = open */
3680        u8 type; /* 0 .. 15 */
3681        u8 reserved[2];
3682} __packed;
3683
3684/*
3685 * REPLY_D3_CONFIG
3686 */
3687enum iwlagn_d3_wakeup_filters {
3688        IWLAGN_D3_WAKEUP_RFKILL         = BIT(0),
3689        IWLAGN_D3_WAKEUP_SYSASSERT      = BIT(1),
3690};
3691
3692struct iwlagn_d3_config_cmd {
3693        __le32 min_sleep_time;
3694        __le32 wakeup_flags;
3695} __packed;
3696
3697/*
3698 * REPLY_WOWLAN_PATTERNS
3699 */
3700#define IWLAGN_WOWLAN_MIN_PATTERN_LEN   16
3701#define IWLAGN_WOWLAN_MAX_PATTERN_LEN   128
3702
3703struct iwlagn_wowlan_pattern {
3704        u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8];
3705        u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN];
3706        u8 mask_size;
3707        u8 pattern_size;
3708        __le16 reserved;
3709} __packed;
3710
3711#define IWLAGN_WOWLAN_MAX_PATTERNS      20
3712
3713struct iwlagn_wowlan_patterns_cmd {
3714        __le32 n_patterns;
3715        struct iwlagn_wowlan_pattern patterns[];
3716} __packed;
3717
3718/*
3719 * REPLY_WOWLAN_WAKEUP_FILTER
3720 */
3721enum iwlagn_wowlan_wakeup_filters {
3722        IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET       = BIT(0),
3723        IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH      = BIT(1),
3724        IWLAGN_WOWLAN_WAKEUP_BEACON_MISS        = BIT(2),
3725        IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE        = BIT(3),
3726        IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL     = BIT(4),
3727        IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ      = BIT(5),
3728        IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE     = BIT(6),
3729        IWLAGN_WOWLAN_WAKEUP_ALWAYS             = BIT(7),
3730        IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT  = BIT(8),
3731};
3732
3733struct iwlagn_wowlan_wakeup_filter_cmd {
3734        __le32 enabled;
3735        __le16 non_qos_seq;
3736        __le16 reserved;
3737        __le16 qos_seq[8];
3738};
3739
3740/*
3741 * REPLY_WOWLAN_TSC_RSC_PARAMS
3742 */
3743#define IWLAGN_NUM_RSC  16
3744
3745struct tkip_sc {
3746        __le16 iv16;
3747        __le16 pad;
3748        __le32 iv32;
3749} __packed;
3750
3751struct iwlagn_tkip_rsc_tsc {
3752        struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC];
3753        struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC];
3754        struct tkip_sc tsc;
3755} __packed;
3756
3757struct aes_sc {
3758        __le64 pn;
3759} __packed;
3760
3761struct iwlagn_aes_rsc_tsc {
3762        struct aes_sc unicast_rsc[IWLAGN_NUM_RSC];
3763        struct aes_sc multicast_rsc[IWLAGN_NUM_RSC];
3764        struct aes_sc tsc;
3765} __packed;
3766
3767union iwlagn_all_tsc_rsc {
3768        struct iwlagn_tkip_rsc_tsc tkip;
3769        struct iwlagn_aes_rsc_tsc aes;
3770};
3771
3772struct iwlagn_wowlan_rsc_tsc_params_cmd {
3773        union iwlagn_all_tsc_rsc all_tsc_rsc;
3774} __packed;
3775
3776/*
3777 * REPLY_WOWLAN_TKIP_PARAMS
3778 */
3779#define IWLAGN_MIC_KEY_SIZE     8
3780#define IWLAGN_P1K_SIZE         5
3781struct iwlagn_mic_keys {
3782        u8 tx[IWLAGN_MIC_KEY_SIZE];
3783        u8 rx_unicast[IWLAGN_MIC_KEY_SIZE];
3784        u8 rx_mcast[IWLAGN_MIC_KEY_SIZE];
3785} __packed;
3786
3787struct iwlagn_p1k_cache {
3788        __le16 p1k[IWLAGN_P1K_SIZE];
3789} __packed;
3790
3791#define IWLAGN_NUM_RX_P1K_CACHE 2
3792
3793struct iwlagn_wowlan_tkip_params_cmd {
3794        struct iwlagn_mic_keys mic_keys;
3795        struct iwlagn_p1k_cache tx;
3796        struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE];
3797        struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE];
3798} __packed;
3799
3800/*
3801 * REPLY_WOWLAN_KEK_KCK_MATERIAL
3802 */
3803
3804#define IWLAGN_KCK_MAX_SIZE     32
3805#define IWLAGN_KEK_MAX_SIZE     32
3806
3807struct iwlagn_wowlan_kek_kck_material_cmd {
3808        u8      kck[IWLAGN_KCK_MAX_SIZE];
3809        u8      kek[IWLAGN_KEK_MAX_SIZE];
3810        __le16  kck_len;
3811        __le16  kek_len;
3812        __le64  replay_ctr;
3813} __packed;
3814
3815#define RF_KILL_INDICATOR_FOR_WOWLAN    0x87
3816
3817/*
3818 * REPLY_WOWLAN_GET_STATUS = 0xe5
3819 */
3820struct iwlagn_wowlan_status {
3821        __le64 replay_ctr;
3822        __le32 rekey_status;
3823        __le32 wakeup_reason;
3824        u8 pattern_number;
3825        u8 reserved1;
3826        __le16 qos_seq_ctr[8];
3827        __le16 non_qos_seq_ctr;
3828        __le16 reserved2;
3829        union iwlagn_all_tsc_rsc tsc_rsc;
3830        __le16 reserved3;
3831} __packed;
3832
3833/*
3834 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3835 */
3836
3837/*
3838 * Minimum slot time in TU
3839 */
3840#define IWL_MIN_SLOT_TIME       20
3841
3842/**
3843 * struct iwl_wipan_slot
3844 * @width: Time in TU
3845 * @type:
3846 *   0 - BSS
3847 *   1 - PAN
3848 */
3849struct iwl_wipan_slot {
3850        __le16 width;
3851        u8 type;
3852        u8 reserved;
3853} __packed;
3854
3855#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS          BIT(1)  /* reserved */
3856#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET        BIT(2)  /* reserved */
3857#define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE               BIT(3)  /* reserved */
3858#define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF        BIT(4)
3859#define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE          BIT(5)
3860
3861/**
3862 * struct iwl_wipan_params_cmd
3863 * @flags:
3864 *   bit0: reserved
3865 *   bit1: CP leave channel with CTS
3866 *   bit2: CP leave channel qith Quiet
3867 *   bit3: slotted mode
3868 *     1 - work in slotted mode
3869 *     0 - work in non slotted mode
3870 *   bit4: filter beacon notification
3871 *   bit5: full tx slotted mode. if this flag is set,
3872 *         uCode will perform leaving channel methods in context switch
3873 *         also when working in same channel mode
3874 * @num_slots: 1 - 10
3875 */
3876struct iwl_wipan_params_cmd {
3877        __le16 flags;
3878        u8 reserved;
3879        u8 num_slots;
3880        struct iwl_wipan_slot slots[10];
3881} __packed;
3882
3883/*
3884 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3885 *
3886 * TODO: Figure out what this is used for,
3887 *       it can only switch between 2.4 GHz
3888 *       channels!!
3889 */
3890
3891struct iwl_wipan_p2p_channel_switch_cmd {
3892        __le16 channel;
3893        __le16 reserved;
3894};
3895
3896/*
3897 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3898 *
3899 * This is used by the device to notify us of the
3900 * NoA schedule it determined so we can forward it
3901 * to userspace for inclusion in probe responses.
3902 *
3903 * In beacons, the NoA schedule is simply appended
3904 * to the frame we give the device.
3905 */
3906
3907struct iwl_wipan_noa_descriptor {
3908        u8 count;
3909        __le32 duration;
3910        __le32 interval;
3911        __le32 starttime;
3912} __packed;
3913
3914struct iwl_wipan_noa_attribute {
3915        u8 id;
3916        __le16 length;
3917        u8 index;
3918        u8 ct_window;
3919        struct iwl_wipan_noa_descriptor descr0, descr1;
3920        u8 reserved;
3921} __packed;
3922
3923struct iwl_wipan_noa_notification {
3924        u32 noa_active;
3925        struct iwl_wipan_noa_attribute noa_attribute;
3926} __packed;
3927
3928#endif                          /* __iwl_commands_h__ */
3929