1
2
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5
6
7#include <net/mac80211.h>
8#include <linux/netdevice.h>
9#include <linux/dmi.h>
10
11#include "iwl-trans.h"
12#include "iwl-op-mode.h"
13#include "fw/img.h"
14#include "iwl-debug.h"
15#include "iwl-csr.h"
16#include "iwl-io.h"
17#include "iwl-prph.h"
18#include "fw/acpi.h"
19#include "fw/pnvm.h"
20
21#include "mvm.h"
22#include "fw/dbg.h"
23#include "iwl-phy-db.h"
24#include "iwl-modparams.h"
25#include "iwl-nvm-parse.h"
26
27#define MVM_UCODE_ALIVE_TIMEOUT (HZ)
28#define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
29
30#define UCODE_VALID_OK cpu_to_le32(0x1)
31
32#define IWL_PPAG_MASK 3
33#define IWL_PPAG_ETSI_MASK BIT(0)
34
35struct iwl_mvm_alive_data {
36 bool valid;
37 u32 scd_base_addr;
38};
39
40static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
41{
42 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
43 .valid = cpu_to_le32(valid_tx_ant),
44 };
45
46 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
47 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
48 sizeof(tx_ant_cmd), &tx_ant_cmd);
49}
50
51static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
52{
53 int i;
54 struct iwl_rss_config_cmd cmd = {
55 .flags = cpu_to_le32(IWL_RSS_ENABLE),
56 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
57 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
58 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
59 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
60 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
61 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
62 };
63
64 if (mvm->trans->num_rx_queues == 1)
65 return 0;
66
67
68 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
69 cmd.indirection_table[i] =
70 1 + (i % (mvm->trans->num_rx_queues - 1));
71 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
72
73 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
74}
75
76static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
77{
78 struct iwl_dqa_enable_cmd dqa_cmd = {
79 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
80 };
81 u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
82 int ret;
83
84 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
85 if (ret)
86 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
87 else
88 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
89
90 return ret;
91}
92
93void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
94 struct iwl_rx_cmd_buffer *rxb)
95{
96 struct iwl_rx_packet *pkt = rxb_addr(rxb);
97 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
98 __le32 *dump_data = mfu_dump_notif->data;
99 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
100 int i;
101
102 if (mfu_dump_notif->index_num == 0)
103 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
104 le32_to_cpu(mfu_dump_notif->assert_id));
105
106 for (i = 0; i < n_words; i++)
107 IWL_DEBUG_INFO(mvm,
108 "MFUART assert dump, dword %u: 0x%08x\n",
109 le16_to_cpu(mfu_dump_notif->index_num) *
110 n_words + i,
111 le32_to_cpu(dump_data[i]));
112}
113
114static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
115 struct iwl_rx_packet *pkt, void *data)
116{
117 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
118 struct iwl_mvm *mvm =
119 container_of(notif_wait, struct iwl_mvm, notif_wait);
120 struct iwl_mvm_alive_data *alive_data = data;
121 struct iwl_umac_alive *umac;
122 struct iwl_lmac_alive *lmac1;
123 struct iwl_lmac_alive *lmac2 = NULL;
124 u16 status;
125 u32 lmac_error_event_table, umac_error_table;
126
127
128
129
130
131 if (iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
132 UCODE_ALIVE_NTFY, 0) == 5) {
133 struct iwl_alive_ntf_v5 *palive;
134
135 if (pkt_len < sizeof(*palive))
136 return false;
137
138 palive = (void *)pkt->data;
139 umac = &palive->umac_data;
140 lmac1 = &palive->lmac_data[0];
141 lmac2 = &palive->lmac_data[1];
142 status = le16_to_cpu(palive->status);
143
144 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
145 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
146 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
147
148 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
149 mvm->trans->sku_id[0],
150 mvm->trans->sku_id[1],
151 mvm->trans->sku_id[2]);
152 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
153 struct iwl_alive_ntf_v4 *palive;
154
155 if (pkt_len < sizeof(*palive))
156 return false;
157
158 palive = (void *)pkt->data;
159 umac = &palive->umac_data;
160 lmac1 = &palive->lmac_data[0];
161 lmac2 = &palive->lmac_data[1];
162 status = le16_to_cpu(palive->status);
163 } else if (iwl_rx_packet_payload_len(pkt) ==
164 sizeof(struct iwl_alive_ntf_v3)) {
165 struct iwl_alive_ntf_v3 *palive3;
166
167 if (pkt_len < sizeof(*palive3))
168 return false;
169
170 palive3 = (void *)pkt->data;
171 umac = &palive3->umac_data;
172 lmac1 = &palive3->lmac_data;
173 status = le16_to_cpu(palive3->status);
174 } else {
175 WARN(1, "unsupported alive notification (size %d)\n",
176 iwl_rx_packet_payload_len(pkt));
177
178 return false;
179 }
180
181 lmac_error_event_table =
182 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
183 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
184
185 if (lmac2)
186 mvm->trans->dbg.lmac_error_event_table[1] =
187 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
188
189 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
190 ~FW_ADDR_CACHE_CONTROL;
191
192 if (umac_error_table) {
193 if (umac_error_table >=
194 mvm->trans->cfg->min_umac_error_event_table) {
195 iwl_fw_umac_set_alive_err_table(mvm->trans,
196 umac_error_table);
197 } else {
198 IWL_ERR(mvm,
199 "Not valid error log pointer 0x%08X for %s uCode\n",
200 umac_error_table,
201 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
202 "Init" : "RT");
203 }
204 }
205
206 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
207 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
208
209 IWL_DEBUG_FW(mvm,
210 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
211 status, lmac1->ver_type, lmac1->ver_subtype);
212
213 if (lmac2)
214 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
215
216 IWL_DEBUG_FW(mvm,
217 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
218 le32_to_cpu(umac->umac_major),
219 le32_to_cpu(umac->umac_minor));
220
221 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
222
223 return true;
224}
225
226static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
227 struct iwl_rx_packet *pkt, void *data)
228{
229 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
230
231 return true;
232}
233
234static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
235 struct iwl_rx_packet *pkt, void *data)
236{
237 struct iwl_phy_db *phy_db = data;
238
239 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
240 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
241 return true;
242 }
243
244 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
245
246 return false;
247}
248
249static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
250 enum iwl_ucode_type ucode_type)
251{
252 struct iwl_notification_wait alive_wait;
253 struct iwl_mvm_alive_data alive_data = {};
254 const struct fw_img *fw;
255 int ret;
256 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
257 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
258 bool run_in_rfkill =
259 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
260
261 if (ucode_type == IWL_UCODE_REGULAR &&
262 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
263 !(fw_has_capa(&mvm->fw->ucode_capa,
264 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
265 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
266 else
267 fw = iwl_get_ucode_image(mvm->fw, ucode_type);
268 if (WARN_ON(!fw))
269 return -EINVAL;
270 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
271 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
272
273 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
274 alive_cmd, ARRAY_SIZE(alive_cmd),
275 iwl_alive_fn, &alive_data);
276
277
278
279
280
281
282 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
283 if (ret) {
284 iwl_fw_set_current_image(&mvm->fwrt, old_type);
285 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
286 return ret;
287 }
288
289
290
291
292
293 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
294 MVM_UCODE_ALIVE_TIMEOUT);
295 if (ret) {
296 struct iwl_trans *trans = mvm->trans;
297
298 if (trans->trans_cfg->device_family >=
299 IWL_DEVICE_FAMILY_22000) {
300 IWL_ERR(mvm,
301 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
302 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
303 iwl_read_umac_prph(trans,
304 UMAG_SB_CPU_2_STATUS));
305 IWL_ERR(mvm, "UMAC PC: 0x%x\n",
306 iwl_read_umac_prph(trans,
307 UREG_UMAC_CURRENT_PC));
308 IWL_ERR(mvm, "LMAC PC: 0x%x\n",
309 iwl_read_umac_prph(trans,
310 UREG_LMAC1_CURRENT_PC));
311 if (iwl_mvm_is_cdb_supported(mvm))
312 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
313 iwl_read_umac_prph(trans,
314 UREG_LMAC2_CURRENT_PC));
315 } else if (trans->trans_cfg->device_family >=
316 IWL_DEVICE_FAMILY_8000) {
317 IWL_ERR(mvm,
318 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
319 iwl_read_prph(trans, SB_CPU_1_STATUS),
320 iwl_read_prph(trans, SB_CPU_2_STATUS));
321 }
322
323 if (ret == -ETIMEDOUT)
324 iwl_fw_dbg_error_collect(&mvm->fwrt,
325 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
326
327 iwl_fw_set_current_image(&mvm->fwrt, old_type);
328 return ret;
329 }
330
331 if (!alive_data.valid) {
332 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
333 iwl_fw_set_current_image(&mvm->fwrt, old_type);
334 return -EIO;
335 }
336
337 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait);
338 if (ret) {
339 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
340 iwl_fw_set_current_image(&mvm->fwrt, old_type);
341 return ret;
342 }
343
344 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
345
346
347
348
349
350
351
352
353
354
355 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
356
357
358
359
360
361
362 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
363 BIT(IWL_MAX_TID_COUNT + 2);
364
365 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
366#ifdef CONFIG_IWLWIFI_DEBUGFS
367 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
368#endif
369
370
371
372
373
374
375
376 cfg80211_bss_flush(mvm->hw->wiphy);
377
378 return 0;
379}
380
381static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
382{
383 struct iwl_notification_wait init_wait;
384 struct iwl_nvm_access_complete_cmd nvm_complete = {};
385 struct iwl_init_extended_cfg_cmd init_cfg = {
386 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
387 };
388 static const u16 init_complete[] = {
389 INIT_COMPLETE_NOTIF,
390 };
391 int ret;
392
393 if (mvm->trans->cfg->tx_with_siso_diversity)
394 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
395
396 lockdep_assert_held(&mvm->mutex);
397
398 mvm->rfkill_safe_init_done = false;
399
400 iwl_init_notification_wait(&mvm->notif_wait,
401 &init_wait,
402 init_complete,
403 ARRAY_SIZE(init_complete),
404 iwl_wait_init_complete,
405 NULL);
406
407 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
408
409
410 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
411 if (ret) {
412 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
413 goto error;
414 }
415 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
416 NULL);
417
418
419
420
421 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
422 INIT_EXTENDED_CFG_CMD),
423 CMD_SEND_IN_RFKILL,
424 sizeof(init_cfg), &init_cfg);
425 if (ret) {
426 IWL_ERR(mvm, "Failed to run init config command: %d\n",
427 ret);
428 goto error;
429 }
430
431
432 if (mvm->nvm_file_name) {
433 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
434 mvm->nvm_sections);
435 if (ret)
436 goto error;
437 ret = iwl_mvm_load_nvm_to_nic(mvm);
438 if (ret)
439 goto error;
440 }
441
442 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
443 ret = iwl_nvm_init(mvm);
444 if (ret) {
445 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
446 goto error;
447 }
448 }
449
450 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
451 NVM_ACCESS_COMPLETE),
452 CMD_SEND_IN_RFKILL,
453 sizeof(nvm_complete), &nvm_complete);
454 if (ret) {
455 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
456 ret);
457 goto error;
458 }
459
460
461 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
462 MVM_UCODE_ALIVE_TIMEOUT);
463 if (ret)
464 return ret;
465
466
467 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
468 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
469 if (IS_ERR(mvm->nvm_data)) {
470 ret = PTR_ERR(mvm->nvm_data);
471 mvm->nvm_data = NULL;
472 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
473 return ret;
474 }
475 }
476
477 mvm->rfkill_safe_init_done = true;
478
479 return 0;
480
481error:
482 iwl_remove_notification(&mvm->notif_wait, &init_wait);
483 return ret;
484}
485
486#ifdef CONFIG_ACPI
487static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
488 struct iwl_phy_specific_cfg *phy_filters)
489{
490
491
492
493
494
495
496 if (IWL_MVM_PHY_FILTER_CHAIN_A) {
497 phy_filters->filter_cfg_chain_a =
498 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A);
499 }
500 if (IWL_MVM_PHY_FILTER_CHAIN_B) {
501 phy_filters->filter_cfg_chain_b =
502 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B);
503 }
504 if (IWL_MVM_PHY_FILTER_CHAIN_C) {
505 phy_filters->filter_cfg_chain_c =
506 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C);
507 }
508 if (IWL_MVM_PHY_FILTER_CHAIN_D) {
509 phy_filters->filter_cfg_chain_d =
510 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D);
511 }
512}
513
514#else
515
516static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
517 struct iwl_phy_specific_cfg *phy_filters)
518{
519}
520#endif
521
522static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
523{
524 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
525 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
526 struct iwl_phy_specific_cfg phy_filters = {};
527 u8 cmd_ver;
528 size_t cmd_size;
529
530 if (iwl_mvm_has_unified_ucode(mvm) &&
531 !mvm->trans->cfg->tx_with_siso_diversity)
532 return 0;
533
534 if (mvm->trans->cfg->tx_with_siso_diversity) {
535
536
537
538
539 phy_cfg_cmd.phy_cfg =
540 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
541 }
542
543
544 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
545
546
547 phy_cfg_cmd.phy_cfg |=
548 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
549
550 phy_cfg_cmd.calib_control.event_trigger =
551 mvm->fw->default_calib[ucode_type].event_trigger;
552 phy_cfg_cmd.calib_control.flow_trigger =
553 mvm->fw->default_calib[ucode_type].flow_trigger;
554
555 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
556 PHY_CONFIGURATION_CMD,
557 IWL_FW_CMD_VER_UNKNOWN);
558 if (cmd_ver == 3) {
559 iwl_mvm_phy_filter_init(mvm, &phy_filters);
560 memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters,
561 sizeof(struct iwl_phy_specific_cfg));
562 }
563
564 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
565 phy_cfg_cmd.phy_cfg);
566 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
567 sizeof(struct iwl_phy_cfg_cmd_v1);
568 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
569 cmd_size, &phy_cfg_cmd);
570}
571
572int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
573{
574 struct iwl_notification_wait calib_wait;
575 static const u16 init_complete[] = {
576 INIT_COMPLETE_NOTIF,
577 CALIB_RES_NOTIF_PHY_DB
578 };
579 int ret;
580
581 if (iwl_mvm_has_unified_ucode(mvm))
582 return iwl_run_unified_mvm_ucode(mvm);
583
584 lockdep_assert_held(&mvm->mutex);
585
586 mvm->rfkill_safe_init_done = false;
587
588 iwl_init_notification_wait(&mvm->notif_wait,
589 &calib_wait,
590 init_complete,
591 ARRAY_SIZE(init_complete),
592 iwl_wait_phy_db_entry,
593 mvm->phy_db);
594
595 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
596
597
598 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
599 if (ret) {
600 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
601 goto remove_notif;
602 }
603
604 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
605 ret = iwl_mvm_send_bt_init_conf(mvm);
606 if (ret)
607 goto remove_notif;
608 }
609
610
611 if (!mvm->nvm_data) {
612 ret = iwl_nvm_init(mvm);
613 if (ret) {
614 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
615 goto remove_notif;
616 }
617 }
618
619
620 if (mvm->nvm_file_name) {
621 ret = iwl_mvm_load_nvm_to_nic(mvm);
622 if (ret)
623 goto remove_notif;
624 }
625
626 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
627 "Too old NVM version (0x%0x, required = 0x%0x)",
628 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
629
630
631
632
633
634 if (iwl_mvm_is_radio_hw_killed(mvm)) {
635 IWL_DEBUG_RF_KILL(mvm,
636 "jump over all phy activities due to RF kill\n");
637 goto remove_notif;
638 }
639
640 mvm->rfkill_safe_init_done = true;
641
642
643 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
644 if (ret)
645 goto remove_notif;
646
647 ret = iwl_send_phy_cfg_cmd(mvm);
648 if (ret) {
649 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
650 ret);
651 goto remove_notif;
652 }
653
654
655
656
657
658 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
659 MVM_UCODE_CALIB_TIMEOUT);
660 if (!ret)
661 goto out;
662
663 if (iwl_mvm_is_radio_hw_killed(mvm)) {
664 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
665 ret = 0;
666 } else {
667 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
668 ret);
669 }
670
671 goto out;
672
673remove_notif:
674 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
675out:
676 mvm->rfkill_safe_init_done = false;
677 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
678
679 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
680 sizeof(struct ieee80211_channel) +
681 sizeof(struct ieee80211_rate),
682 GFP_KERNEL);
683 if (!mvm->nvm_data)
684 return -ENOMEM;
685 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
686 mvm->nvm_data->bands[0].n_channels = 1;
687 mvm->nvm_data->bands[0].n_bitrates = 1;
688 mvm->nvm_data->bands[0].bitrates =
689 (void *)mvm->nvm_data->channels + 1;
690 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
691 }
692
693 return ret;
694}
695
696static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
697{
698 struct iwl_ltr_config_cmd cmd = {
699 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
700 };
701
702 if (!mvm->trans->ltr_enabled)
703 return 0;
704
705 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
706 sizeof(cmd), &cmd);
707}
708
709#ifdef CONFIG_ACPI
710int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
711{
712 struct iwl_dev_tx_power_cmd cmd = {
713 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
714 };
715 __le16 *per_chain;
716 int ret;
717 u16 len = 0;
718 u32 n_subbands;
719 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
720 REDUCE_TX_POWER_CMD,
721 IWL_FW_CMD_VER_UNKNOWN);
722
723 if (cmd_ver == 6) {
724 len = sizeof(cmd.v6);
725 n_subbands = IWL_NUM_SUB_BANDS_V2;
726 per_chain = cmd.v6.per_chain[0][0];
727 } else if (fw_has_api(&mvm->fw->ucode_capa,
728 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
729 len = sizeof(cmd.v5);
730 n_subbands = IWL_NUM_SUB_BANDS_V1;
731 per_chain = cmd.v5.per_chain[0][0];
732 } else if (fw_has_capa(&mvm->fw->ucode_capa,
733 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
734 len = sizeof(cmd.v4);
735 n_subbands = IWL_NUM_SUB_BANDS_V1;
736 per_chain = cmd.v4.per_chain[0][0];
737 } else {
738 len = sizeof(cmd.v3);
739 n_subbands = IWL_NUM_SUB_BANDS_V1;
740 per_chain = cmd.v3.per_chain[0][0];
741 }
742
743
744 len += sizeof(cmd.common);
745
746 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, ACPI_SAR_NUM_TABLES,
747 n_subbands, prof_a, prof_b);
748
749
750 if (ret)
751 return ret;
752
753 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
754 return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
755}
756
757int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
758{
759 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
760 struct iwl_geo_tx_power_profiles_resp *resp;
761 u16 len;
762 int ret;
763 struct iwl_host_cmd cmd;
764 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
765 GEO_TX_POWER_LIMIT,
766 IWL_FW_CMD_VER_UNKNOWN);
767
768
769 geo_tx_cmd.v1.ops =
770 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
771
772 if (cmd_ver == 3)
773 len = sizeof(geo_tx_cmd.v3);
774 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
775 IWL_UCODE_TLV_API_SAR_TABLE_VER))
776 len = sizeof(geo_tx_cmd.v2);
777 else
778 len = sizeof(geo_tx_cmd.v1);
779
780 if (!iwl_sar_geo_support(&mvm->fwrt))
781 return -EOPNOTSUPP;
782
783 cmd = (struct iwl_host_cmd){
784 .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
785 .len = { len, },
786 .flags = CMD_WANT_SKB,
787 .data = { &geo_tx_cmd },
788 };
789
790 ret = iwl_mvm_send_cmd(mvm, &cmd);
791 if (ret) {
792 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
793 return ret;
794 }
795
796 resp = (void *)cmd.resp_pkt->data;
797 ret = le32_to_cpu(resp->profile_idx);
798
799 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES))
800 ret = -EIO;
801
802 iwl_free_resp(&cmd);
803 return ret;
804}
805
806static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
807{
808 union iwl_geo_tx_power_profiles_cmd cmd;
809 u16 len;
810 u32 n_bands;
811 int ret;
812 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
813 GEO_TX_POWER_LIMIT,
814 IWL_FW_CMD_VER_UNKNOWN);
815
816 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
817 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
818 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
819 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops));
820
821 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
822
823 if (cmd_ver == 3) {
824 len = sizeof(cmd.v3);
825 n_bands = ARRAY_SIZE(cmd.v3.table[0]);
826 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
827 IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
828 len = sizeof(cmd.v2);
829 n_bands = ARRAY_SIZE(cmd.v2.table[0]);
830 } else {
831 len = sizeof(cmd.v1);
832 n_bands = ARRAY_SIZE(cmd.v1.table[0]);
833 }
834
835 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
836 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
837 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
838 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table));
839
840 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], n_bands);
841
842
843
844
845
846 if (ret)
847 return 0;
848
849
850
851
852
853 if (cmd_ver == 3)
854 cmd.v3.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
855 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
856 IWL_UCODE_TLV_API_SAR_TABLE_VER))
857 cmd.v2.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
858
859 return iwl_mvm_send_cmd_pdu(mvm,
860 WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
861 0, len, &cmd);
862}
863
864static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
865{
866 union acpi_object *wifi_pkg, *data, *flags;
867 int i, j, ret, tbl_rev, num_sub_bands;
868 int idx = 2;
869 s8 *gain;
870
871
872
873
874
875 mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0);
876
877 data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
878 if (IS_ERR(data))
879 return PTR_ERR(data);
880
881
882 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
883 ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev);
884 if (!IS_ERR(wifi_pkg)) {
885 if (tbl_rev == 1 || tbl_rev == 2) {
886 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
887 gain = mvm->fwrt.ppag_table.v2.gain[0];
888 mvm->fwrt.ppag_ver = tbl_rev;
889 IWL_DEBUG_RADIO(mvm,
890 "Reading PPAG table v2 (tbl_rev=%d)\n",
891 tbl_rev);
892 goto read_table;
893 } else {
894 ret = -EINVAL;
895 goto out_free;
896 }
897 }
898
899
900 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
901 ACPI_PPAG_WIFI_DATA_SIZE_V1, &tbl_rev);
902 if (!IS_ERR(wifi_pkg)) {
903 if (tbl_rev != 0) {
904 ret = -EINVAL;
905 goto out_free;
906 }
907 num_sub_bands = IWL_NUM_SUB_BANDS_V1;
908 gain = mvm->fwrt.ppag_table.v1.gain[0];
909 mvm->fwrt.ppag_ver = 0;
910 IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n");
911 goto read_table;
912 }
913 ret = PTR_ERR(wifi_pkg);
914 goto out_free;
915
916read_table:
917 flags = &wifi_pkg->package.elements[1];
918
919 if (flags->type != ACPI_TYPE_INTEGER) {
920 ret = -EINVAL;
921 goto out_free;
922 }
923
924 mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(flags->integer.value &
925 IWL_PPAG_MASK);
926
927 if (!mvm->fwrt.ppag_table.v1.flags) {
928 ret = 0;
929 goto out_free;
930 }
931
932
933
934
935
936
937 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
938 for (j = 0; j < num_sub_bands; j++) {
939 union acpi_object *ent;
940
941 ent = &wifi_pkg->package.elements[idx++];
942 if (ent->type != ACPI_TYPE_INTEGER) {
943 ret = -EINVAL;
944 goto out_free;
945 }
946
947 gain[i * num_sub_bands + j] = ent->integer.value;
948
949 if ((j == 0 &&
950 (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_LB ||
951 gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_LB)) ||
952 (j != 0 &&
953 (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_HB ||
954 gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_HB))) {
955 mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0);
956 ret = -EINVAL;
957 goto out_free;
958 }
959 }
960 }
961
962 ret = 0;
963out_free:
964 kfree(data);
965 return ret;
966}
967
968int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
969{
970 u8 cmd_ver;
971 int i, j, ret, num_sub_bands, cmd_size;
972 s8 *gain;
973
974 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
975 IWL_DEBUG_RADIO(mvm,
976 "PPAG capability not supported by FW, command not sent.\n");
977 return 0;
978 }
979 if (!mvm->fwrt.ppag_table.v1.flags) {
980 IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n");
981 return 0;
982 }
983
984 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
985 PER_PLATFORM_ANT_GAIN_CMD,
986 IWL_FW_CMD_VER_UNKNOWN);
987 if (cmd_ver == 1) {
988 num_sub_bands = IWL_NUM_SUB_BANDS_V1;
989 gain = mvm->fwrt.ppag_table.v1.gain[0];
990 cmd_size = sizeof(mvm->fwrt.ppag_table.v1);
991 if (mvm->fwrt.ppag_ver == 1 || mvm->fwrt.ppag_ver == 2) {
992 IWL_DEBUG_RADIO(mvm,
993 "PPAG table rev is %d but FW supports v1, sending truncated table\n",
994 mvm->fwrt.ppag_ver);
995 mvm->fwrt.ppag_table.v1.flags &=
996 cpu_to_le32(IWL_PPAG_ETSI_MASK);
997 }
998 } else if (cmd_ver == 2 || cmd_ver == 3) {
999 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
1000 gain = mvm->fwrt.ppag_table.v2.gain[0];
1001 cmd_size = sizeof(mvm->fwrt.ppag_table.v2);
1002 if (mvm->fwrt.ppag_ver == 0) {
1003 IWL_DEBUG_RADIO(mvm,
1004 "PPAG table is v1 but FW supports v2, sending padded table\n");
1005 } else if (cmd_ver == 2 && mvm->fwrt.ppag_ver == 2) {
1006 IWL_DEBUG_RADIO(mvm,
1007 "PPAG table is v3 but FW supports v2, sending partial bitmap.\n");
1008 mvm->fwrt.ppag_table.v1.flags &=
1009 cpu_to_le32(IWL_PPAG_ETSI_MASK);
1010 }
1011 } else {
1012 IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n");
1013 return 0;
1014 }
1015
1016 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1017 for (j = 0; j < num_sub_bands; j++) {
1018 IWL_DEBUG_RADIO(mvm,
1019 "PPAG table: chain[%d] band[%d]: gain = %d\n",
1020 i, j, gain[i * num_sub_bands + j]);
1021 }
1022 }
1023 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1024 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1025 PER_PLATFORM_ANT_GAIN_CMD),
1026 0, cmd_size, &mvm->fwrt.ppag_table);
1027 if (ret < 0)
1028 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1029 ret);
1030
1031 return ret;
1032}
1033
1034static const struct dmi_system_id dmi_ppag_approved_list[] = {
1035 { .ident = "HP",
1036 .matches = {
1037 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1038 },
1039 },
1040 { .ident = "SAMSUNG",
1041 .matches = {
1042 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
1043 },
1044 },
1045 { .ident = "MSFT",
1046 .matches = {
1047 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
1048 },
1049 },
1050 { .ident = "ASUS",
1051 .matches = {
1052 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."),
1053 },
1054 },
1055 {}
1056};
1057
1058static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1059{
1060 int ret;
1061
1062 ret = iwl_mvm_get_ppag_table(mvm);
1063 if (ret < 0) {
1064 IWL_DEBUG_RADIO(mvm,
1065 "PPAG BIOS table invalid or unavailable. (%d)\n",
1066 ret);
1067 return 0;
1068 }
1069
1070 if (!dmi_check_system(dmi_ppag_approved_list)) {
1071 IWL_DEBUG_RADIO(mvm,
1072 "System vendor '%s' is not in the approved list, disabling PPAG.\n",
1073 dmi_get_system_info(DMI_SYS_VENDOR));
1074 mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0);
1075 return 0;
1076 }
1077
1078 return iwl_mvm_ppag_send_cmd(mvm);
1079}
1080
1081static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1082{
1083 int ret;
1084 struct iwl_tas_config_cmd cmd = {};
1085 int list_size;
1086
1087 BUILD_BUG_ON(ARRAY_SIZE(cmd.block_list_array) <
1088 APCI_WTAS_BLACK_LIST_MAX);
1089
1090 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1091 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1092 return;
1093 }
1094
1095 ret = iwl_acpi_get_tas(&mvm->fwrt, cmd.block_list_array, &list_size);
1096 if (ret < 0) {
1097 IWL_DEBUG_RADIO(mvm,
1098 "TAS table invalid or unavailable. (%d)\n",
1099 ret);
1100 return;
1101 }
1102
1103 if (list_size < 0)
1104 return;
1105
1106
1107 cmd.block_list_size = cpu_to_le32((u32)list_size);
1108
1109 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
1110 TAS_CONFIG),
1111 0, sizeof(cmd), &cmd);
1112 if (ret < 0)
1113 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1114}
1115
1116static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1117{
1118 u8 value;
1119 int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0, DSM_RFI_FUNC_ENABLE,
1120 &iwl_rfi_guid, &value);
1121
1122 if (ret < 0) {
1123 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret);
1124
1125 } else if (value >= DSM_VALUE_RFI_MAX) {
1126 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n",
1127 value);
1128
1129 } else if (value == DSM_VALUE_RFI_ENABLE) {
1130 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n");
1131 return DSM_VALUE_RFI_ENABLE;
1132 }
1133
1134 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n");
1135
1136
1137 return DSM_VALUE_RFI_DISABLE;
1138}
1139
1140static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1141{
1142 int ret;
1143 u32 value;
1144 struct iwl_lari_config_change_cmd_v4 cmd = {};
1145
1146 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt);
1147
1148 ret = iwl_acpi_get_dsm_u32((&mvm->fwrt)->dev, 0, DSM_FUNC_11AX_ENABLEMENT,
1149 &iwl_guid, &value);
1150 if (!ret)
1151 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value);
1152
1153
1154 ret = iwl_acpi_get_dsm_u32((&mvm->fwrt)->dev, 0,
1155 DSM_FUNC_ENABLE_UNII4_CHAN,
1156 &iwl_guid, &value);
1157 if (!ret)
1158 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value);
1159
1160 if (cmd.config_bitmap ||
1161 cmd.oem_11ax_allow_bitmap ||
1162 cmd.oem_unii4_allow_bitmap) {
1163 size_t cmd_size;
1164 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw,
1165 REGULATORY_AND_NVM_GROUP,
1166 LARI_CONFIG_CHANGE, 1);
1167 if (cmd_ver == 4)
1168 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4);
1169 else if (cmd_ver == 3)
1170 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3);
1171 else if (cmd_ver == 2)
1172 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2);
1173 else
1174 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
1175
1176 IWL_DEBUG_RADIO(mvm,
1177 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
1178 le32_to_cpu(cmd.config_bitmap),
1179 le32_to_cpu(cmd.oem_11ax_allow_bitmap));
1180 IWL_DEBUG_RADIO(mvm,
1181 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, cmd_ver=%d\n",
1182 le32_to_cpu(cmd.oem_unii4_allow_bitmap),
1183 cmd_ver);
1184 ret = iwl_mvm_send_cmd_pdu(mvm,
1185 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1186 LARI_CONFIG_CHANGE),
1187 0, cmd_size, &cmd);
1188 if (ret < 0)
1189 IWL_DEBUG_RADIO(mvm,
1190 "Failed to send LARI_CONFIG_CHANGE (%d)\n",
1191 ret);
1192 }
1193}
1194#else
1195
1196inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
1197 int prof_a, int prof_b)
1198{
1199 return -ENOENT;
1200}
1201
1202inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
1203{
1204 return -ENOENT;
1205}
1206
1207static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1208{
1209 return 0;
1210}
1211
1212int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1213{
1214 return -ENOENT;
1215}
1216
1217static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1218{
1219 return 0;
1220}
1221
1222static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1223{
1224}
1225
1226static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1227{
1228}
1229
1230static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1231{
1232 return DSM_VALUE_RFI_DISABLE;
1233}
1234#endif
1235
1236void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1237{
1238 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1239 int ret;
1240 u32 resp;
1241
1242 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1243 .flags = cpu_to_le32(flags),
1244 .buf_size = 0,
1245 };
1246 struct iwl_host_cmd host_cmd = {
1247 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1248 .flags = CMD_WANT_SKB,
1249 .data = {&recovery_cmd, },
1250 .len = {sizeof(recovery_cmd), },
1251 };
1252
1253
1254 if (!error_log_size)
1255 return;
1256
1257 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1258
1259 if (!mvm->error_recovery_buf)
1260 return;
1261
1262 host_cmd.data[1] = mvm->error_recovery_buf;
1263 host_cmd.len[1] = error_log_size;
1264 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1265 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1266 }
1267
1268 ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1269 kfree(mvm->error_recovery_buf);
1270 mvm->error_recovery_buf = NULL;
1271
1272 if (ret) {
1273 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1274 return;
1275 }
1276
1277
1278 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1279 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1280 if (resp)
1281 IWL_ERR(mvm,
1282 "Failed to send recovery cmd blob was invalid %d\n",
1283 resp);
1284 }
1285}
1286
1287static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1288{
1289 int ret;
1290
1291 ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1292 if (ret < 0) {
1293 IWL_DEBUG_RADIO(mvm,
1294 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1295 ret);
1296
1297
1298
1299
1300 return 1;
1301 }
1302
1303 ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
1304
1305 if (ret < 0)
1306 IWL_DEBUG_RADIO(mvm,
1307 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1308 ret);
1309
1310 return iwl_mvm_sar_select_profile(mvm, 1, 1);
1311}
1312
1313static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1314{
1315 int ret;
1316
1317 if (iwl_mvm_has_unified_ucode(mvm))
1318 return iwl_run_unified_mvm_ucode(mvm);
1319
1320 WARN_ON(!mvm->nvm_data);
1321 ret = iwl_run_init_mvm_ucode(mvm);
1322
1323 if (ret) {
1324 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1325
1326 if (iwlmvm_mod_params.init_dbg)
1327 return 0;
1328 return ret;
1329 }
1330
1331 iwl_fw_dbg_stop_sync(&mvm->fwrt);
1332 iwl_trans_stop_device(mvm->trans);
1333 ret = iwl_trans_start_hw(mvm->trans);
1334 if (ret)
1335 return ret;
1336
1337 mvm->rfkill_safe_init_done = false;
1338 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1339 if (ret)
1340 return ret;
1341
1342 mvm->rfkill_safe_init_done = true;
1343
1344 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1345 NULL);
1346
1347 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1348}
1349
1350int iwl_mvm_up(struct iwl_mvm *mvm)
1351{
1352 int ret, i;
1353 struct ieee80211_channel *chan;
1354 struct cfg80211_chan_def chandef;
1355 struct ieee80211_supported_band *sband = NULL;
1356
1357 lockdep_assert_held(&mvm->mutex);
1358
1359 ret = iwl_trans_start_hw(mvm->trans);
1360 if (ret)
1361 return ret;
1362
1363 ret = iwl_mvm_load_rt_fw(mvm);
1364 if (ret) {
1365 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1366 if (ret != -ERFKILL)
1367 iwl_fw_dbg_error_collect(&mvm->fwrt,
1368 FW_DBG_TRIGGER_DRIVER);
1369 goto error;
1370 }
1371
1372 iwl_get_shared_mem_conf(&mvm->fwrt);
1373
1374 ret = iwl_mvm_sf_update(mvm, NULL, false);
1375 if (ret)
1376 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1377
1378 if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1379 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1380
1381 if (mvm->fw->dbg.dest_tlv)
1382 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1383 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1384 }
1385
1386 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1387 if (ret)
1388 goto error;
1389
1390 if (!iwl_mvm_has_unified_ucode(mvm)) {
1391
1392 ret = iwl_send_phy_db_data(mvm->phy_db);
1393 if (ret)
1394 goto error;
1395 }
1396
1397 ret = iwl_send_phy_cfg_cmd(mvm);
1398 if (ret)
1399 goto error;
1400
1401 ret = iwl_mvm_send_bt_init_conf(mvm);
1402 if (ret)
1403 goto error;
1404
1405 if (fw_has_capa(&mvm->fw->ucode_capa,
1406 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1407 ret = iwl_set_soc_latency(&mvm->fwrt);
1408 if (ret)
1409 goto error;
1410 }
1411
1412
1413 ret = iwl_configure_rxq(&mvm->fwrt);
1414 if (ret)
1415 goto error;
1416
1417 if (iwl_mvm_has_new_rx_api(mvm)) {
1418 ret = iwl_send_rss_cfg_cmd(mvm);
1419 if (ret) {
1420 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1421 ret);
1422 goto error;
1423 }
1424 }
1425
1426
1427 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
1428 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1429
1430 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1431
1432
1433 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1434
1435 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1436 ret = iwl_mvm_send_dqa_cmd(mvm);
1437 if (ret)
1438 goto error;
1439 }
1440
1441
1442
1443
1444
1445
1446
1447 if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
1448 ADD_STA,
1449 0) < 12) {
1450
1451
1452
1453
1454 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1455 if (ret)
1456 goto error;
1457 }
1458
1459
1460 i = 0;
1461 while (!sband && i < NUM_NL80211_BANDS)
1462 sband = mvm->hw->wiphy->bands[i++];
1463
1464 if (WARN_ON_ONCE(!sband))
1465 goto error;
1466
1467 chan = &sband->channels[0];
1468
1469 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1470 for (i = 0; i < NUM_PHY_CTX; i++) {
1471
1472
1473
1474
1475
1476 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1477 &chandef, 1, 1);
1478 if (ret)
1479 goto error;
1480 }
1481
1482 if (iwl_mvm_is_tt_in_fw(mvm)) {
1483
1484
1485
1486
1487 iwl_mvm_send_temp_report_ths_cmd(mvm);
1488 } else {
1489
1490 iwl_mvm_tt_tx_backoff(mvm, 0);
1491 }
1492
1493#ifdef CONFIG_THERMAL
1494
1495
1496
1497
1498
1499
1500 if (iwl_mvm_is_ctdp_supported(mvm)) {
1501 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1502 mvm->cooling_dev.cur_state);
1503 if (ret)
1504 goto error;
1505 }
1506#endif
1507
1508 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1509 WARN_ON(iwl_mvm_config_ltr(mvm));
1510
1511 ret = iwl_mvm_power_update_device(mvm);
1512 if (ret)
1513 goto error;
1514
1515 iwl_mvm_lari_cfg(mvm);
1516
1517
1518
1519
1520 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1521 ret = iwl_mvm_init_mcc(mvm);
1522 if (ret)
1523 goto error;
1524 }
1525
1526 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1527 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1528 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1529 ret = iwl_mvm_config_scan(mvm);
1530 if (ret)
1531 goto error;
1532 }
1533
1534 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1535 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1536
1537 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1538 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1539
1540 ret = iwl_mvm_ppag_init(mvm);
1541 if (ret)
1542 goto error;
1543
1544 ret = iwl_mvm_sar_init(mvm);
1545 if (ret == 0) {
1546 ret = iwl_mvm_sar_geo_init(mvm);
1547 } else if (ret == -ENOENT && !iwl_sar_get_wgds_table(&mvm->fwrt)) {
1548
1549
1550
1551
1552
1553
1554 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1555 }
1556
1557 if (ret < 0)
1558 goto error;
1559
1560 iwl_mvm_tas_init(mvm);
1561 iwl_mvm_leds_sync(mvm);
1562
1563 iwl_mvm_ftm_initiator_smooth_config(mvm);
1564
1565 if (fw_has_capa(&mvm->fw->ucode_capa,
1566 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT)) {
1567 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE)
1568 iwl_rfi_send_config_cmd(mvm, NULL);
1569 }
1570
1571 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1572 return 0;
1573 error:
1574 if (!iwlmvm_mod_params.init_dbg || !ret)
1575 iwl_mvm_stop_device(mvm);
1576 return ret;
1577}
1578
1579int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1580{
1581 int ret, i;
1582
1583 lockdep_assert_held(&mvm->mutex);
1584
1585 ret = iwl_trans_start_hw(mvm->trans);
1586 if (ret)
1587 return ret;
1588
1589 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1590 if (ret) {
1591 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1592 goto error;
1593 }
1594
1595 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1596 if (ret)
1597 goto error;
1598
1599
1600 ret = iwl_send_phy_db_data(mvm->phy_db);
1601 if (ret)
1602 goto error;
1603
1604 ret = iwl_send_phy_cfg_cmd(mvm);
1605 if (ret)
1606 goto error;
1607
1608
1609 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
1610 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1611
1612 if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
1613 ADD_STA,
1614 0) < 12) {
1615
1616
1617
1618
1619
1620
1621
1622
1623 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1624 if (ret)
1625 goto error;
1626 }
1627
1628 return 0;
1629 error:
1630 iwl_mvm_stop_device(mvm);
1631 return ret;
1632}
1633
1634void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1635 struct iwl_rx_cmd_buffer *rxb)
1636{
1637 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1638 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1639 u32 flags = le32_to_cpu(card_state_notif->flags);
1640
1641 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1642 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1643 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1644 (flags & CT_KILL_CARD_DISABLED) ?
1645 "Reached" : "Not reached");
1646}
1647
1648void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1649 struct iwl_rx_cmd_buffer *rxb)
1650{
1651 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1652 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1653
1654 IWL_DEBUG_INFO(mvm,
1655 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1656 le32_to_cpu(mfuart_notif->installed_ver),
1657 le32_to_cpu(mfuart_notif->external_ver),
1658 le32_to_cpu(mfuart_notif->status),
1659 le32_to_cpu(mfuart_notif->duration));
1660
1661 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1662 IWL_DEBUG_INFO(mvm,
1663 "MFUART: image size: 0x%08x\n",
1664 le32_to_cpu(mfuart_notif->image_size));
1665}
1666
