1
2
3
4#ifndef __MT7615_H
5#define __MT7615_H
6
7#include <linux/completion.h>
8#include <linux/interrupt.h>
9#include <linux/ktime.h>
10#include <linux/regmap.h>
11#include "../mt76_connac_mcu.h"
12#include "regs.h"
13
14#define MT7615_MAX_INTERFACES 16
15#define MT7615_MAX_WMM_SETS 4
16#define MT7663_WTBL_SIZE 32
17#define MT7615_WTBL_SIZE 128
18#define MT7615_WTBL_RESERVED (mt7615_wtbl_size(dev) - 1)
19#define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \
20 MT7615_MAX_INTERFACES)
21
22#define MT7615_PM_TIMEOUT (HZ / 12)
23#define MT7615_HW_SCAN_TIMEOUT (HZ / 10)
24#define MT7615_RESET_TIMEOUT (30 * HZ)
25#define MT7615_RATE_RETRY 2
26
27#define MT7615_TX_RING_SIZE 1024
28#define MT7615_TX_MGMT_RING_SIZE 128
29#define MT7615_TX_MCU_RING_SIZE 128
30#define MT7615_TX_FWDL_RING_SIZE 128
31
32#define MT7615_RX_RING_SIZE 1024
33#define MT7615_RX_MCU_RING_SIZE 512
34
35#define MT7615_DRV_OWN_RETRY_COUNT 10
36
37#define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin"
38#define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin"
39#define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin"
40
41#define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin"
42#define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin"
43
44#define MT7615_FIRMWARE_V1 1
45#define MT7615_FIRMWARE_V2 2
46#define MT7615_FIRMWARE_V3 3
47
48#define MT7663_OFFLOAD_ROM_PATCH "mediatek/mt7663pr2h.bin"
49#define MT7663_OFFLOAD_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin"
50#define MT7663_ROM_PATCH "mediatek/mt7663pr2h_rebb.bin"
51#define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_rebb.bin"
52
53#define MT7615_EEPROM_SIZE 1024
54#define MT7615_TOKEN_SIZE 4096
55
56#define MT_FRAC_SCALE 12
57#define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div))
58
59#define MT_CHFREQ_VALID BIT(7)
60#define MT_CHFREQ_DBDC_IDX BIT(6)
61#define MT_CHFREQ_SEQ GENMASK(5, 0)
62
63#define MT7615_BAR_RATE_DEFAULT 0x4b
64#define MT7615_CFEND_RATE_DEFAULT 0x49
65#define MT7615_CFEND_RATE_11B 0x03
66
67struct mt7615_vif;
68struct mt7615_sta;
69struct mt7615_dfs_pulse;
70struct mt7615_dfs_pattern;
71enum mt7615_cipher_type;
72
73enum mt7615_hw_txq_id {
74 MT7615_TXQ_MAIN,
75 MT7615_TXQ_EXT,
76 MT7615_TXQ_MCU,
77 MT7615_TXQ_FWDL,
78};
79
80enum mt7622_hw_txq_id {
81 MT7622_TXQ_AC0,
82 MT7622_TXQ_AC1,
83 MT7622_TXQ_AC2,
84 MT7622_TXQ_FWDL = MT7615_TXQ_FWDL,
85 MT7622_TXQ_AC3,
86 MT7622_TXQ_MGMT,
87 MT7622_TXQ_MCU = 15,
88};
89
90struct mt7615_rate_set {
91 struct ieee80211_tx_rate probe_rate;
92 struct ieee80211_tx_rate rates[4];
93};
94
95struct mt7615_rate_desc {
96 bool rateset;
97 u16 probe_val;
98 u16 val[4];
99 u8 bw_idx;
100 u8 bw;
101};
102
103struct mt7615_wtbl_rate_desc {
104 struct list_head node;
105
106 struct mt7615_rate_desc rate;
107 struct mt7615_sta *sta;
108};
109
110struct mt7615_sta {
111 struct mt76_wcid wcid;
112
113 struct mt7615_vif *vif;
114
115 struct list_head poll_list;
116 u32 airtime_ac[8];
117
118 struct ieee80211_tx_rate rates[4];
119
120 struct mt7615_rate_set rateset[2];
121 u32 rate_set_tsf;
122
123 u8 rate_count;
124 u8 n_rates;
125
126 u8 rate_probe;
127};
128
129struct mt7615_vif {
130 struct mt76_vif mt76;
131 struct mt7615_sta sta;
132};
133
134struct mib_stats {
135 u32 ack_fail_cnt;
136 u32 fcs_err_cnt;
137 u32 rts_cnt;
138 u32 rts_retries_cnt;
139 u32 ba_miss_cnt;
140 unsigned long aggr_per;
141};
142
143struct mt7615_phy {
144 struct mt76_phy *mt76;
145 struct mt7615_dev *dev;
146
147 struct ieee80211_vif *monitor_vif;
148
149 u8 n_beacon_vif;
150
151 u32 rxfilter;
152 u64 omac_mask;
153
154 u16 noise;
155
156 bool scs_en;
157
158 unsigned long last_cca_adj;
159 int false_cca_ofdm, false_cca_cck;
160 s8 ofdm_sensitivity;
161 s8 cck_sensitivity;
162
163 s16 coverage_class;
164 u8 slottime;
165
166 u8 chfreq;
167 u8 rdd_state;
168 int dfs_state;
169
170 u32 rx_ampdu_ts;
171 u32 ampdu_ref;
172
173 struct mib_stats mib;
174
175 struct sk_buff_head scan_event_list;
176 struct delayed_work scan_work;
177
178 struct work_struct roc_work;
179 struct timer_list roc_timer;
180 wait_queue_head_t roc_wait;
181 bool roc_grant;
182
183#ifdef CONFIG_NL80211_TESTMODE
184 struct {
185 u32 *reg_backup;
186
187 s16 last_freq_offset;
188 u8 last_rcpi[4];
189 s8 last_ib_rssi[4];
190 s8 last_wb_rssi[4];
191 } test;
192#endif
193};
194
195#define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__)
196#define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__)
197#define mt7615_mcu_sta_add(phy, ...) ((phy)->dev)->mcu_ops->sta_add((phy), __VA_ARGS__)
198#define mt7615_mcu_add_dev_info(phy, ...) ((phy)->dev)->mcu_ops->add_dev_info((phy), __VA_ARGS__)
199#define mt7615_mcu_add_bss_info(phy, ...) ((phy)->dev)->mcu_ops->add_bss_info((phy), __VA_ARGS__)
200#define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__)
201#define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__)
202#define mt7615_mcu_set_drv_ctrl(dev) (dev)->mcu_ops->set_drv_ctrl((dev))
203#define mt7615_mcu_set_fw_ctrl(dev) (dev)->mcu_ops->set_fw_ctrl((dev))
204#define mt7615_mcu_set_sta_decap_offload(dev, ...) (dev)->mcu_ops->set_sta_decap_offload((dev), __VA_ARGS__)
205struct mt7615_mcu_ops {
206 int (*add_tx_ba)(struct mt7615_dev *dev,
207 struct ieee80211_ampdu_params *params,
208 bool enable);
209 int (*add_rx_ba)(struct mt7615_dev *dev,
210 struct ieee80211_ampdu_params *params,
211 bool enable);
212 int (*sta_add)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
213 struct ieee80211_sta *sta, bool enable);
214 int (*add_dev_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
215 bool enable);
216 int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
217 struct ieee80211_sta *sta, bool enable);
218 int (*add_beacon_offload)(struct mt7615_dev *dev,
219 struct ieee80211_hw *hw,
220 struct ieee80211_vif *vif, bool enable);
221 int (*set_pm_state)(struct mt7615_dev *dev, int band, int state);
222 int (*set_drv_ctrl)(struct mt7615_dev *dev);
223 int (*set_fw_ctrl)(struct mt7615_dev *dev);
224 int (*set_sta_decap_offload)(struct mt7615_dev *dev,
225 struct ieee80211_vif *vif,
226 struct ieee80211_sta *sta);
227};
228
229struct mt7615_dev {
230 union {
231 struct mt76_dev mt76;
232 struct mt76_phy mphy;
233 };
234
235 const struct mt76_bus_ops *bus_ops;
236 struct tasklet_struct irq_tasklet;
237
238 struct mt7615_phy phy;
239 u64 omac_mask;
240
241 u16 chainmask;
242
243 struct ieee80211_ops *ops;
244 const struct mt7615_mcu_ops *mcu_ops;
245 struct regmap *infracfg;
246 const u32 *reg_map;
247
248 struct work_struct mcu_work;
249
250 struct work_struct reset_work;
251 wait_queue_head_t reset_wait;
252 u32 reset_state;
253
254 struct list_head sta_poll_list;
255 spinlock_t sta_poll_lock;
256
257 struct {
258 u8 n_pulses;
259 u32 period;
260 u16 width;
261 s16 power;
262 } radar_pattern;
263 u32 hw_pattern;
264
265 bool fw_debug;
266 bool flash_eeprom;
267 bool dbdc_support;
268
269 u8 fw_ver;
270
271 struct work_struct rate_work;
272 struct list_head wrd_head;
273
274 u32 debugfs_rf_wf;
275 u32 debugfs_rf_reg;
276
277 u32 muar_mask;
278
279 struct mt76_connac_pm pm;
280 struct mt76_connac_coredump coredump;
281};
282
283enum tx_pkt_queue_idx {
284 MT_LMAC_AC00,
285 MT_LMAC_AC01,
286 MT_LMAC_AC02,
287 MT_LMAC_AC03,
288 MT_LMAC_ALTX0 = 0x10,
289 MT_LMAC_BMC0,
290 MT_LMAC_BCN0,
291 MT_LMAC_PSMP0,
292 MT_LMAC_ALTX1,
293 MT_LMAC_BMC1,
294 MT_LMAC_BCN1,
295 MT_LMAC_PSMP1,
296};
297
298enum {
299 MT_RX_SEL0,
300 MT_RX_SEL1,
301};
302
303enum mt7615_rdd_cmd {
304 RDD_STOP,
305 RDD_START,
306 RDD_DET_MODE,
307 RDD_DET_STOP,
308 RDD_CAC_START,
309 RDD_CAC_END,
310 RDD_NORMAL_START,
311 RDD_DISABLE_DFS_CAL,
312 RDD_PULSE_DBG,
313 RDD_READ_PULSE,
314 RDD_RESUME_BF,
315};
316
317static inline struct mt7615_phy *
318mt7615_hw_phy(struct ieee80211_hw *hw)
319{
320 struct mt76_phy *phy = hw->priv;
321
322 return phy->priv;
323}
324
325static inline struct mt7615_dev *
326mt7615_hw_dev(struct ieee80211_hw *hw)
327{
328 struct mt76_phy *phy = hw->priv;
329
330 return container_of(phy->dev, struct mt7615_dev, mt76);
331}
332
333static inline struct mt7615_phy *
334mt7615_ext_phy(struct mt7615_dev *dev)
335{
336 struct mt76_phy *phy = dev->mt76.phy2;
337
338 if (!phy)
339 return NULL;
340
341 return phy->priv;
342}
343
344extern struct ieee80211_rate mt7615_rates[12];
345extern const struct ieee80211_ops mt7615_ops;
346extern const u32 mt7615e_reg_map[__MT_BASE_MAX];
347extern const u32 mt7663e_reg_map[__MT_BASE_MAX];
348extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX];
349extern struct pci_driver mt7615_pci_driver;
350extern struct platform_driver mt7622_wmac_driver;
351extern const struct mt76_testmode_ops mt7615_testmode_ops;
352
353#ifdef CONFIG_MT7622_WMAC
354int mt7622_wmac_init(struct mt7615_dev *dev);
355#else
356static inline int mt7622_wmac_init(struct mt7615_dev *dev)
357{
358 return 0;
359}
360#endif
361
362int mt7615_thermal_init(struct mt7615_dev *dev);
363int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
364 int irq, const u32 *map);
365u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
366
367void mt7615_init_device(struct mt7615_dev *dev);
368int mt7615_register_device(struct mt7615_dev *dev);
369void mt7615_unregister_device(struct mt7615_dev *dev);
370int mt7615_register_ext_phy(struct mt7615_dev *dev);
371void mt7615_unregister_ext_phy(struct mt7615_dev *dev);
372int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr);
373int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev,
374 struct ieee80211_channel *chan,
375 u8 chain_idx);
376int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev,
377 enum nl80211_band band);
378int mt7615_wait_pdma_busy(struct mt7615_dev *dev);
379int mt7615_dma_init(struct mt7615_dev *dev);
380void mt7615_dma_start(struct mt7615_dev *dev);
381void mt7615_dma_cleanup(struct mt7615_dev *dev);
382int mt7615_mcu_init(struct mt7615_dev *dev);
383bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev);
384void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
385 struct ieee80211_tx_rate *probe_rate,
386 struct ieee80211_tx_rate *rates);
387void mt7615_pm_wake_work(struct work_struct *work);
388void mt7615_pm_power_save_work(struct work_struct *work);
389int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev);
390int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd);
391int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
392 const struct ieee80211_tx_queue_params *params);
393void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);
394int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev,
395 enum mt7615_rdd_cmd cmd, u8 index,
396 u8 rx_sel, u8 val);
397int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);
398int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl);
399
400static inline bool is_mt7622(struct mt76_dev *dev)
401{
402 if (!IS_ENABLED(CONFIG_MT7622_WMAC))
403 return false;
404
405 return mt76_chip(dev) == 0x7622;
406}
407
408static inline bool is_mt7615(struct mt76_dev *dev)
409{
410 return mt76_chip(dev) == 0x7615 || mt76_chip(dev) == 0x7611;
411}
412
413static inline bool is_mt7611(struct mt76_dev *dev)
414{
415 return mt76_chip(dev) == 0x7611;
416}
417
418static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask)
419{
420 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
421
422 tasklet_schedule(&dev->irq_tasklet);
423}
424
425static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)
426{
427 return dev->fw_ver > MT7615_FIRMWARE_V2;
428}
429
430static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev)
431{
432 if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev))
433 return MT7663_WTBL_SIZE;
434 else
435 return MT7615_WTBL_SIZE;
436}
437
438#define mt7615_mutex_acquire(dev) \
439 mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm)
440#define mt7615_mutex_release(dev) \
441 mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm)
442
443static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
444{
445 static const u8 lmac_queue_map[] = {
446 [IEEE80211_AC_BK] = MT_LMAC_AC00,
447 [IEEE80211_AC_BE] = MT_LMAC_AC01,
448 [IEEE80211_AC_VI] = MT_LMAC_AC02,
449 [IEEE80211_AC_VO] = MT_LMAC_AC03,
450 };
451
452 if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))
453 return MT_LMAC_AC01;
454
455 return lmac_queue_map[ac];
456}
457
458static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev)
459{
460 return MT_INT_TX_DONE(dev->mt76.q_mcu[MT_MCUQ_WM]->hw_idx);
461}
462
463static inline unsigned long
464mt7615_get_macwork_timeout(struct mt7615_dev *dev)
465{
466 return dev->pm.enable ? HZ / 3 : HZ / 10;
467}
468
469void mt7615_dma_reset(struct mt7615_dev *dev);
470void mt7615_scan_work(struct work_struct *work);
471void mt7615_roc_work(struct work_struct *work);
472void mt7615_roc_timer(struct timer_list *timer);
473void mt7615_init_txpower(struct mt7615_dev *dev,
474 struct ieee80211_supported_band *sband);
475int mt7615_set_channel(struct mt7615_phy *phy);
476void mt7615_init_work(struct mt7615_dev *dev);
477
478int mt7615_mcu_restart(struct mt76_dev *dev);
479void mt7615_update_channel(struct mt76_phy *mphy);
480bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask);
481void mt7615_mac_reset_counters(struct mt7615_dev *dev);
482void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy);
483void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable);
484void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy);
485void mt7615_mac_sta_poll(struct mt7615_dev *dev);
486int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
487 struct sk_buff *skb, struct mt76_wcid *wcid,
488 struct ieee80211_sta *sta, int pid,
489 struct ieee80211_key_conf *key, bool beacon);
490void mt7615_mac_set_timing(struct mt7615_phy *phy);
491int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev,
492 struct mt76_wcid *wcid,
493 struct ieee80211_key_conf *key,
494 enum set_key_cmd cmd);
495int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
496 struct ieee80211_key_conf *key,
497 enum set_key_cmd cmd);
498void mt7615_mac_reset_work(struct work_struct *work);
499u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid);
500
501int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd,
502 struct sk_buff *skb, int seq);
503u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg);
504int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val);
505int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);
506int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
507int mt7615_mcu_get_temperature(struct mt7615_dev *dev);
508int mt7615_mcu_set_tx_power(struct mt7615_phy *phy);
509void mt7615_mcu_exit(struct mt7615_dev *dev);
510void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,
511 int cmd, int *wait_seq);
512
513int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
514 enum mt76_txq_id qid, struct mt76_wcid *wcid,
515 struct ieee80211_sta *sta,
516 struct mt76_tx_info *tx_info);
517
518void mt7615_tx_worker(struct mt76_worker *w);
519void mt7615_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
520void mt7615_tx_token_put(struct mt7615_dev *dev);
521void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
522 struct sk_buff *skb);
523void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
524int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
525 struct ieee80211_sta *sta);
526void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
527 struct ieee80211_sta *sta);
528void mt7615_mac_work(struct work_struct *work);
529void mt7615_txp_skb_unmap(struct mt76_dev *dev,
530 struct mt76_txwi_cache *txwi);
531int mt7615_mcu_set_rx_hdr_trans_blacklist(struct mt7615_dev *dev);
532int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val);
533int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,
534 const struct mt7615_dfs_pulse *pulse);
535int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index,
536 const struct mt7615_dfs_pattern *pattern);
537int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode,
538 u32 val);
539int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable);
540int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy);
541int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy);
542int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy);
543
544int mt7615_mcu_set_p2p_oppps(struct ieee80211_hw *hw,
545 struct ieee80211_vif *vif);
546int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif,
547 struct ieee80211_channel *chan, int duration);
548
549int mt7615_init_debugfs(struct mt7615_dev *dev);
550int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);
551
552int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy,
553 struct ieee80211_vif *vif,
554 bool enable);
555int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif,
556 bool enable);
557int __mt7663_load_firmware(struct mt7615_dev *dev);
558u32 mt7615_mcu_reg_rr(struct mt76_dev *dev, u32 offset);
559void mt7615_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val);
560void mt7615_coredump_work(struct work_struct *work);
561
562void mt7622_trigger_hif_int(struct mt7615_dev *dev, bool en);
563
564
565int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
566 enum mt76_txq_id qid, struct mt76_wcid *wcid,
567 struct ieee80211_sta *sta,
568 struct mt76_tx_info *tx_info);
569bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update);
570void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
571 struct mt76_queue_entry *e);
572int mt7663_usb_sdio_register_device(struct mt7615_dev *dev);
573int mt7663u_mcu_init(struct mt7615_dev *dev);
574
575
576u32 mt7663s_read_pcr(struct mt7615_dev *dev);
577int mt7663s_mcu_init(struct mt7615_dev *dev);
578void mt7663s_txrx_worker(struct mt76_worker *w);
579void mt7663s_rx_work(struct work_struct *work);
580void mt7663s_sdio_irq(struct sdio_func *func);
581
582#endif
583
