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7#include <linux/of.h>
8#include <linux/mtd/mtd.h>
9#include <linux/mtd/partitions.h>
10#include <linux/etherdevice.h>
11#include <asm/unaligned.h>
12#include "mt7601u.h"
13#include "eeprom.h"
14#include "mac.h"
15
16static bool
17field_valid(u8 val)
18{
19 return val != 0xff;
20}
21
22static s8
23field_validate(u8 val)
24{
25 if (!field_valid(val))
26 return 0;
27
28 return val;
29}
30
31static int
32mt7601u_efuse_read(struct mt7601u_dev *dev, u16 addr, u8 *data,
33 enum mt7601u_eeprom_access_modes mode)
34{
35 u32 val;
36 int i;
37
38 val = mt76_rr(dev, MT_EFUSE_CTRL);
39 val &= ~(MT_EFUSE_CTRL_AIN |
40 MT_EFUSE_CTRL_MODE);
41 val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf) |
42 FIELD_PREP(MT_EFUSE_CTRL_MODE, mode) |
43 MT_EFUSE_CTRL_KICK;
44 mt76_wr(dev, MT_EFUSE_CTRL, val);
45
46 if (!mt76_poll(dev, MT_EFUSE_CTRL, MT_EFUSE_CTRL_KICK, 0, 1000))
47 return -ETIMEDOUT;
48
49 val = mt76_rr(dev, MT_EFUSE_CTRL);
50 if ((val & MT_EFUSE_CTRL_AOUT) == MT_EFUSE_CTRL_AOUT) {
51
52
53
54 memset(data, 0xff, 16);
55 return 0;
56 }
57
58 for (i = 0; i < 4; i++) {
59 val = mt76_rr(dev, MT_EFUSE_DATA(i));
60 put_unaligned_le32(val, data + 4 * i);
61 }
62
63 return 0;
64}
65
66static int
67mt7601u_efuse_physical_size_check(struct mt7601u_dev *dev)
68{
69 const int map_reads = DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16);
70 u8 data[round_up(MT_EFUSE_USAGE_MAP_SIZE, 16)];
71 int ret, i;
72 u32 start = 0, end = 0, cnt_free;
73
74 for (i = 0; i < map_reads; i++) {
75 ret = mt7601u_efuse_read(dev, MT_EE_USAGE_MAP_START + i * 16,
76 data + i * 16, MT_EE_PHYSICAL_READ);
77 if (ret)
78 return ret;
79 }
80
81 for (i = 0; i < MT_EFUSE_USAGE_MAP_SIZE; i++)
82 if (!data[i]) {
83 if (!start)
84 start = MT_EE_USAGE_MAP_START + i;
85 end = MT_EE_USAGE_MAP_START + i;
86 }
87 cnt_free = end - start + 1;
88
89 if (MT_EFUSE_USAGE_MAP_SIZE - cnt_free < 5) {
90 dev_err(dev->dev, "Error: your device needs default EEPROM file and this driver doesn't support it!\n");
91 return -EINVAL;
92 }
93
94 return 0;
95}
96
97static bool
98mt7601u_has_tssi(struct mt7601u_dev *dev, u8 *eeprom)
99{
100 u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1);
101
102 return (u16)~nic_conf1 && (nic_conf1 & MT_EE_NIC_CONF_1_TX_ALC_EN);
103}
104
105static void
106mt7601u_set_chip_cap(struct mt7601u_dev *dev, u8 *eeprom)
107{
108 u16 nic_conf0 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_0);
109 u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1);
110
111 if (!field_valid(nic_conf1 & 0xff))
112 nic_conf1 &= 0xff00;
113
114 dev->ee->tssi_enabled = mt7601u_has_tssi(dev, eeprom) &&
115 !(nic_conf1 & MT_EE_NIC_CONF_1_TEMP_TX_ALC);
116
117 if (nic_conf1 & MT_EE_NIC_CONF_1_HW_RF_CTRL)
118 dev_err(dev->dev,
119 "Error: this driver does not support HW RF ctrl\n");
120
121 if (!field_valid(nic_conf0 >> 8))
122 return;
123
124 if (FIELD_GET(MT_EE_NIC_CONF_0_RX_PATH, nic_conf0) > 1 ||
125 FIELD_GET(MT_EE_NIC_CONF_0_TX_PATH, nic_conf0) > 1)
126 dev_err(dev->dev,
127 "Error: device has more than 1 RX/TX stream!\n");
128}
129
130static void mt7601u_set_channel_target_power(struct mt7601u_dev *dev,
131 u8 *eeprom, u8 max_pwr)
132{
133 u8 trgt_pwr = eeprom[MT_EE_TX_TSSI_TARGET_POWER];
134
135 if (trgt_pwr > max_pwr || !trgt_pwr) {
136 dev_warn(dev->dev, "Error: EEPROM trgt power invalid %hhx!\n",
137 trgt_pwr);
138 trgt_pwr = 0x20;
139 }
140
141 memset(dev->ee->chan_pwr, trgt_pwr, sizeof(dev->ee->chan_pwr));
142}
143
144static void
145mt7601u_set_channel_power(struct mt7601u_dev *dev, u8 *eeprom)
146{
147 u32 i, val;
148 u8 max_pwr;
149
150 val = mt7601u_rr(dev, MT_TX_ALC_CFG_0);
151 max_pwr = FIELD_GET(MT_TX_ALC_CFG_0_LIMIT_0, val);
152
153 if (mt7601u_has_tssi(dev, eeprom)) {
154 mt7601u_set_channel_target_power(dev, eeprom, max_pwr);
155 return;
156 }
157
158 for (i = 0; i < 14; i++) {
159 s8 power = field_validate(eeprom[MT_EE_TX_POWER_OFFSET + i]);
160
161 if (power > max_pwr || power < 0)
162 power = MT7601U_DEFAULT_TX_POWER;
163
164 dev->ee->chan_pwr[i] = power;
165 }
166}
167
168static void
169mt7601u_set_country_reg(struct mt7601u_dev *dev, u8 *eeprom)
170{
171
172
173
174 static const struct reg_channel_bounds chan_bounds[] = {
175
176 { 1, 11 }, { 1, 13 }, { 10, 2 }, { 10, 4 },
177 { 14, 1 }, { 1, 14 }, { 3, 7 }, { 5, 9 },
178
179 { 1, 11 }, { 1, 14 }
180 };
181 u8 val = eeprom[MT_EE_COUNTRY_REGION];
182 int idx = -1;
183
184 if (val < 8)
185 idx = val;
186 if (val > 31 && val < 33)
187 idx = val - 32 + 8;
188
189 if (idx != -1)
190 dev_info(dev->dev,
191 "EEPROM country region %02hhx (channels %hhd-%hhd)\n",
192 val, chan_bounds[idx].start,
193 chan_bounds[idx].start + chan_bounds[idx].num - 1);
194 else
195 idx = 5;
196
197 dev->ee->reg = chan_bounds[idx];
198
199
200
201
202}
203
204static void
205mt7601u_set_rf_freq_off(struct mt7601u_dev *dev, u8 *eeprom)
206{
207 u8 comp;
208
209 dev->ee->rf_freq_off = field_validate(eeprom[MT_EE_FREQ_OFFSET]);
210 comp = field_validate(eeprom[MT_EE_FREQ_OFFSET_COMPENSATION]);
211
212 if (comp & BIT(7))
213 dev->ee->rf_freq_off -= comp & 0x7f;
214 else
215 dev->ee->rf_freq_off += comp;
216}
217
218static void
219mt7601u_set_rssi_offset(struct mt7601u_dev *dev, u8 *eeprom)
220{
221 int i;
222 s8 *rssi_offset = dev->ee->rssi_offset;
223
224 for (i = 0; i < 2; i++) {
225 rssi_offset[i] = eeprom[MT_EE_RSSI_OFFSET + i];
226
227 if (rssi_offset[i] < -10 || rssi_offset[i] > 10) {
228 dev_warn(dev->dev,
229 "Warning: EEPROM RSSI is invalid %02hhx\n",
230 rssi_offset[i]);
231 rssi_offset[i] = 0;
232 }
233 }
234}
235
236static void
237mt7601u_extra_power_over_mac(struct mt7601u_dev *dev)
238{
239 u32 val;
240
241 val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_1) & 0x0000ff00) >> 8);
242 val |= ((mt7601u_rr(dev, MT_TX_PWR_CFG_2) & 0x0000ff00) << 8);
243 mt7601u_wr(dev, MT_TX_PWR_CFG_7, val);
244
245 val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_4) & 0x0000ff00) >> 8);
246 mt7601u_wr(dev, MT_TX_PWR_CFG_9, val);
247}
248
249static void
250mt7601u_set_power_rate(struct power_per_rate *rate, s8 delta, u8 value)
251{
252
253 if (value == 0xff)
254 return;
255
256 rate->raw = s6_validate(value);
257 rate->bw20 = s6_to_int(value);
258
259 rate->bw40 = rate->bw20 + delta;
260}
261
262static void
263mt7601u_save_power_rate(struct mt7601u_dev *dev, s8 delta, u32 val, int i)
264{
265 struct mt7601u_rate_power *t = &dev->ee->power_rate_table;
266
267 switch (i) {
268 case 0:
269 mt7601u_set_power_rate(&t->cck[0], delta, (val >> 0) & 0xff);
270 mt7601u_set_power_rate(&t->cck[1], delta, (val >> 8) & 0xff);
271
272 dev->ee->real_cck_bw20[0] = t->cck[0].bw20;
273 dev->ee->real_cck_bw20[1] = t->cck[1].bw20;
274
275 mt7601u_set_power_rate(&t->ofdm[0], delta, (val >> 16) & 0xff);
276 mt7601u_set_power_rate(&t->ofdm[1], delta, (val >> 24) & 0xff);
277 break;
278 case 1:
279 mt7601u_set_power_rate(&t->ofdm[2], delta, (val >> 0) & 0xff);
280 mt7601u_set_power_rate(&t->ofdm[3], delta, (val >> 8) & 0xff);
281 mt7601u_set_power_rate(&t->ht[0], delta, (val >> 16) & 0xff);
282 mt7601u_set_power_rate(&t->ht[1], delta, (val >> 24) & 0xff);
283 break;
284 case 2:
285 mt7601u_set_power_rate(&t->ht[2], delta, (val >> 0) & 0xff);
286 mt7601u_set_power_rate(&t->ht[3], delta, (val >> 8) & 0xff);
287 break;
288 }
289}
290
291static s8
292get_delta(u8 val)
293{
294 s8 ret;
295
296 if (!field_valid(val) || !(val & BIT(7)))
297 return 0;
298
299 ret = val & 0x1f;
300 if (ret > 8)
301 ret = 8;
302 if (val & BIT(6))
303 ret = -ret;
304
305 return ret;
306}
307
308static void
309mt7601u_config_tx_power_per_rate(struct mt7601u_dev *dev, u8 *eeprom)
310{
311 u32 val;
312 s8 bw40_delta;
313 int i;
314
315 bw40_delta = get_delta(eeprom[MT_EE_TX_POWER_DELTA_BW40]);
316
317 for (i = 0; i < 5; i++) {
318 val = get_unaligned_le32(eeprom + MT_EE_TX_POWER_BYRATE(i));
319
320 mt7601u_save_power_rate(dev, bw40_delta, val, i);
321
322 if (~val)
323 mt7601u_wr(dev, MT_TX_PWR_CFG_0 + i * 4, val);
324 }
325
326 mt7601u_extra_power_over_mac(dev);
327}
328
329static void
330mt7601u_init_tssi_params(struct mt7601u_dev *dev, u8 *eeprom)
331{
332 struct tssi_data *d = &dev->ee->tssi_data;
333
334 if (!dev->ee->tssi_enabled)
335 return;
336
337 d->slope = eeprom[MT_EE_TX_TSSI_SLOPE];
338 d->tx0_delta_offset = eeprom[MT_EE_TX_TSSI_OFFSET] * 1024;
339 d->offset[0] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP];
340 d->offset[1] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 1];
341 d->offset[2] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 2];
342}
343
344int
345mt7601u_eeprom_init(struct mt7601u_dev *dev)
346{
347 u8 *eeprom;
348 int i, ret;
349
350 ret = mt7601u_efuse_physical_size_check(dev);
351 if (ret)
352 return ret;
353
354 dev->ee = devm_kzalloc(dev->dev, sizeof(*dev->ee), GFP_KERNEL);
355 if (!dev->ee)
356 return -ENOMEM;
357
358 eeprom = kmalloc(MT7601U_EEPROM_SIZE, GFP_KERNEL);
359 if (!eeprom)
360 return -ENOMEM;
361
362 for (i = 0; i + 16 <= MT7601U_EEPROM_SIZE; i += 16) {
363 ret = mt7601u_efuse_read(dev, i, eeprom + i, MT_EE_READ);
364 if (ret)
365 goto out;
366 }
367
368 if (eeprom[MT_EE_VERSION_EE] > MT7601U_EE_MAX_VER)
369 dev_warn(dev->dev,
370 "Warning: unsupported EEPROM version %02hhx\n",
371 eeprom[MT_EE_VERSION_EE]);
372 dev_info(dev->dev, "EEPROM ver:%02hhx fae:%02hhx\n",
373 eeprom[MT_EE_VERSION_EE], eeprom[MT_EE_VERSION_FAE]);
374
375 mt7601u_set_macaddr(dev, eeprom + MT_EE_MAC_ADDR);
376 mt7601u_set_chip_cap(dev, eeprom);
377 mt7601u_set_channel_power(dev, eeprom);
378 mt7601u_set_country_reg(dev, eeprom);
379 mt7601u_set_rf_freq_off(dev, eeprom);
380 mt7601u_set_rssi_offset(dev, eeprom);
381 dev->ee->ref_temp = eeprom[MT_EE_REF_TEMP];
382 dev->ee->lna_gain = eeprom[MT_EE_LNA_GAIN];
383
384 mt7601u_config_tx_power_per_rate(dev, eeprom);
385
386 mt7601u_init_tssi_params(dev, eeprom);
387out:
388 kfree(eeprom);
389 return ret;
390}
391
