1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17#ifndef __RSI_MAIN_H__
18#define __RSI_MAIN_H__
19
20#include <linux/string.h>
21#include <linux/skbuff.h>
22#include <net/mac80211.h>
23#include <net/rsi_91x.h>
24
25struct rsi_sta {
26 struct ieee80211_sta *sta;
27 s16 sta_id;
28 u16 seq_start[IEEE80211_NUM_TIDS];
29 bool start_tx_aggr[IEEE80211_NUM_TIDS];
30};
31
32struct rsi_hw;
33
34#include "rsi_ps.h"
35
36#define ERR_ZONE BIT(0)
37#define INFO_ZONE BIT(1)
38#define INIT_ZONE BIT(2)
39#define MGMT_TX_ZONE BIT(3)
40#define MGMT_RX_ZONE BIT(4)
41#define DATA_TX_ZONE BIT(5)
42#define DATA_RX_ZONE BIT(6)
43#define FSM_ZONE BIT(7)
44#define ISR_ZONE BIT(8)
45
46enum RSI_FSM_STATES {
47 FSM_FW_NOT_LOADED,
48 FSM_CARD_NOT_READY,
49 FSM_COMMON_DEV_PARAMS_SENT,
50 FSM_BOOT_PARAMS_SENT,
51 FSM_EEPROM_READ_MAC_ADDR,
52 FSM_EEPROM_READ_RF_TYPE,
53 FSM_RESET_MAC_SENT,
54 FSM_RADIO_CAPS_SENT,
55 FSM_BB_RF_PROG_SENT,
56 FSM_MAC_INIT_DONE,
57
58 NUM_FSM_STATES
59};
60
61extern u32 rsi_zone_enabled;
62extern __printf(2, 3) void rsi_dbg(u32 zone, const char *fmt, ...);
63
64#define RSI_MAX_VIFS 3
65#define NUM_EDCA_QUEUES 4
66#define IEEE80211_ADDR_LEN 6
67#define FRAME_DESC_SZ 16
68#define MIN_802_11_HDR_LEN 24
69#define RSI_DEF_KEEPALIVE 90
70#define RSI_WOW_KEEPALIVE 5
71#define RSI_BCN_MISS_THRESHOLD 24
72
73#define DATA_QUEUE_WATER_MARK 400
74#define MIN_DATA_QUEUE_WATER_MARK 300
75#define MULTICAST_WATER_MARK 200
76#define MAC_80211_HDR_FRAME_CONTROL 0
77#define WME_NUM_AC 4
78#define NUM_SOFT_QUEUES 6
79#define MAX_HW_QUEUES 12
80#define INVALID_QUEUE 0xff
81#define MAX_CONTINUOUS_VO_PKTS 8
82#define MAX_CONTINUOUS_VI_PKTS 4
83
84
85#define BROADCAST_HW_Q 9
86#define MGMT_HW_Q 10
87#define BEACON_HW_Q 11
88
89#define IEEE80211_MGMT_FRAME 0x00
90#define IEEE80211_CTL_FRAME 0x04
91
92#define RSI_MAX_ASSOC_STAS 32
93#define IEEE80211_QOS_TID 0x0f
94#define IEEE80211_NONQOS_TID 16
95
96#define MAX_DEBUGFS_ENTRIES 4
97
98#define TID_TO_WME_AC(_tid) ( \
99 ((_tid) == 0 || (_tid) == 3) ? BE_Q : \
100 ((_tid) < 3) ? BK_Q : \
101 ((_tid) < 6) ? VI_Q : \
102 VO_Q)
103
104#define WME_AC(_q) ( \
105 ((_q) == BK_Q) ? IEEE80211_AC_BK : \
106 ((_q) == BE_Q) ? IEEE80211_AC_BE : \
107 ((_q) == VI_Q) ? IEEE80211_AC_VI : \
108 IEEE80211_AC_VO)
109
110
111#define RSI_WOW_ENABLED BIT(0)
112#define RSI_WOW_NO_CONNECTION BIT(1)
113
114#define RSI_MAX_RX_PKTS 64
115
116enum rsi_dev_model {
117 RSI_DEV_9113 = 0,
118 RSI_DEV_9116
119};
120
121struct version_info {
122 u16 major;
123 u16 minor;
124 u8 release_num;
125 u8 patch_num;
126 union {
127 struct {
128 u8 fw_ver[8];
129 } info;
130 } ver;
131} __packed;
132
133struct skb_info {
134 s8 rssi;
135 u32 flags;
136 u16 channel;
137 s8 tid;
138 s8 sta_id;
139 u8 internal_hdr_size;
140 struct ieee80211_vif *vif;
141 u8 vap_id;
142};
143
144enum edca_queue {
145 BK_Q,
146 BE_Q,
147 VI_Q,
148 VO_Q,
149 MGMT_SOFT_Q,
150 MGMT_BEACON_Q
151};
152
153struct security_info {
154 u32 ptk_cipher;
155 u32 gtk_cipher;
156};
157
158struct wmm_qinfo {
159 s32 weight;
160 s32 wme_params;
161 s32 pkt_contended;
162 s32 txop;
163};
164
165struct transmit_q_stats {
166 u32 total_tx_pkt_send[NUM_EDCA_QUEUES + 2];
167 u32 total_tx_pkt_freed[NUM_EDCA_QUEUES + 2];
168};
169
170#define MAX_BGSCAN_CHANNELS_DUAL_BAND 38
171#define MAX_BGSCAN_PROBE_REQ_LEN 0x64
172#define RSI_DEF_BGSCAN_THRLD 0x0
173#define RSI_DEF_ROAM_THRLD 0xa
174#define RSI_BGSCAN_PERIODICITY 0x1e
175#define RSI_ACTIVE_SCAN_TIME 0x14
176#define RSI_PASSIVE_SCAN_TIME 0x46
177#define RSI_CHANNEL_SCAN_TIME 20
178struct rsi_bgscan_params {
179 u16 bgscan_threshold;
180 u16 roam_threshold;
181 u16 bgscan_periodicity;
182 u8 num_bgscan_channels;
183 u8 two_probe;
184 u16 active_scan_duration;
185 u16 passive_scan_duration;
186};
187
188struct vif_priv {
189 bool is_ht;
190 bool sgi;
191 u16 seq_start;
192 int vap_id;
193};
194
195struct rsi_event {
196 atomic_t event_condition;
197 wait_queue_head_t event_queue;
198};
199
200struct rsi_thread {
201 void (*thread_function)(void *);
202 struct completion completion;
203 struct task_struct *task;
204 struct rsi_event event;
205 atomic_t thread_done;
206};
207
208struct cqm_info {
209 s8 last_cqm_event_rssi;
210 int rssi_thold;
211 u32 rssi_hyst;
212};
213
214enum rsi_dfs_regions {
215 RSI_REGION_FCC = 0,
216 RSI_REGION_ETSI,
217 RSI_REGION_TELEC,
218 RSI_REGION_WORLD
219};
220
221struct rsi_9116_features {
222 u8 pll_mode;
223 u8 rf_type;
224 u8 wireless_mode;
225 u8 afe_type;
226 u8 enable_ppe;
227 u8 dpd;
228 u32 sifs_tx_enable;
229 u32 ps_options;
230};
231
232struct rsi_common {
233 struct rsi_hw *priv;
234 struct vif_priv vif_info[RSI_MAX_VIFS];
235
236 void *coex_cb;
237 bool mgmt_q_block;
238 struct version_info lmac_ver;
239
240 struct rsi_thread tx_thread;
241 struct sk_buff_head tx_queue[NUM_EDCA_QUEUES + 2];
242 struct completion wlan_init_completion;
243
244 struct mutex mutex;
245
246 struct mutex tx_lock;
247
248 struct mutex rx_lock;
249 u8 endpoint;
250
251
252 u8 band;
253 u8 num_supp_bands;
254 u8 channel_width;
255
256 u16 rts_threshold;
257 u16 bitrate_mask[2];
258 u32 fixedrate_mask[2];
259
260 u8 rf_reset;
261 struct transmit_q_stats tx_stats;
262 struct security_info secinfo;
263 struct wmm_qinfo tx_qinfo[NUM_EDCA_QUEUES];
264 struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES];
265 u8 mac_addr[IEEE80211_ADDR_LEN];
266
267
268 u32 fsm_state;
269 bool init_done;
270 u8 bb_rf_prog_count;
271 bool iface_down;
272
273
274 u8 channel;
275 u8 *rx_data_pkt;
276 u8 mac_id;
277 u8 radio_id;
278 u16 rate_pwr[20];
279 u16 min_rate;
280
281
282 u8 selected_qnum;
283 u32 pkt_cnt;
284 u8 min_weight;
285
286
287 struct cqm_info cqm_info;
288
289 bool hw_data_qs_blocked;
290 u8 driver_mode;
291 u8 coex_mode;
292 u16 oper_mode;
293 u8 lp_ps_handshake_mode;
294 u8 ulp_ps_handshake_mode;
295 u8 uapsd_bitmap;
296 u8 rf_power_val;
297 u8 wlan_rf_power_mode;
298 u8 obm_ant_sel_val;
299 int tx_power;
300 u8 ant_in_use;
301
302 struct mutex tx_bus_mutex;
303 bool hibernate_resume;
304 bool reinit_hw;
305 u8 wow_flags;
306 u16 beacon_interval;
307 u8 dtim_cnt;
308
309
310 u8 beacon_enabled;
311 u16 beacon_cnt;
312 struct rsi_sta stations[RSI_MAX_ASSOC_STAS + 1];
313 int num_stations;
314 int max_stations;
315 struct ieee80211_key_conf *key;
316
317
318 bool p2p_enabled;
319 struct timer_list roc_timer;
320 struct ieee80211_vif *roc_vif;
321
322 bool eapol4_confirm;
323 void *bt_adapter;
324
325 struct cfg80211_scan_request *hwscan;
326 struct rsi_bgscan_params bgscan;
327 struct rsi_9116_features w9116_features;
328 u8 bgscan_en;
329 u8 mac_ops_resumed;
330};
331
332struct eepromrw_info {
333 u32 offset;
334 u32 length;
335 u8 write;
336 u16 eeprom_erase;
337 u8 data[480];
338};
339
340struct eeprom_read {
341 u16 length;
342 u16 off_set;
343};
344
345struct rsi_hw {
346 struct rsi_common *priv;
347 enum rsi_dev_model device_model;
348 struct ieee80211_hw *hw;
349 struct ieee80211_vif *vifs[RSI_MAX_VIFS];
350 struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES];
351 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
352
353 struct device *device;
354 u8 sc_nvifs;
355
356 enum rsi_host_intf rsi_host_intf;
357 u16 block_size;
358 enum ps_state ps_state;
359 struct rsi_ps_info ps_info;
360 spinlock_t ps_lock;
361 u32 usb_buffer_status_reg;
362#ifdef CONFIG_RSI_DEBUGFS
363 struct rsi_debugfs *dfsentry;
364 u8 num_debugfs_entries;
365#endif
366 char *fw_file_name;
367 struct timer_list bl_cmd_timer;
368 bool blcmd_timer_expired;
369 u32 flash_capacity;
370 struct eepromrw_info eeprom;
371 u32 interrupt_status;
372 u8 dfs_region;
373 char country[2];
374 void *rsi_dev;
375 struct rsi_host_intf_ops *host_intf_ops;
376 int (*check_hw_queue_status)(struct rsi_hw *adapter, u8 q_num);
377 int (*determine_event_timeout)(struct rsi_hw *adapter);
378};
379
380void rsi_print_version(struct rsi_common *common);
381
382struct rsi_host_intf_ops {
383 int (*read_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len);
384 int (*write_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len);
385 int (*master_access_msword)(struct rsi_hw *adapter, u16 ms_word);
386 int (*read_reg_multiple)(struct rsi_hw *adapter, u32 addr,
387 u8 *data, u16 count);
388 int (*write_reg_multiple)(struct rsi_hw *adapter, u32 addr,
389 u8 *data, u16 count);
390 int (*master_reg_read)(struct rsi_hw *adapter, u32 addr,
391 u32 *read_buf, u16 size);
392 int (*master_reg_write)(struct rsi_hw *adapter,
393 unsigned long addr, unsigned long data,
394 u16 size);
395 int (*load_data_master_write)(struct rsi_hw *adapter, u32 addr,
396 u32 instructions_size, u16 block_size,
397 u8 *fw);
398 int (*reinit_device)(struct rsi_hw *adapter);
399 int (*ta_reset)(struct rsi_hw *adapter);
400};
401
402enum rsi_host_intf rsi_get_host_intf(void *priv);
403void rsi_set_bt_context(void *priv, void *bt_context);
404
405#endif
406
