LXR linux/drivers/net/wireless/wl3501.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef __WL3501_H__
   3#define __WL3501_H__
   4
   5#include <linux/spinlock.h>
   6#include <linux/ieee80211.h>
   7
   8/* define for WLA 2.0 */
   9#define WL3501_BLKSZ 256
  10/*
  11 * ID for input Signals of DRIVER block
  12 * bit[7-5] is block ID: 000
  13 * bit[4-0] is signal ID
  14*/
  15enum wl3501_signals {
  16        WL3501_SIG_ALARM,
  17        WL3501_SIG_MD_CONFIRM,
  18        WL3501_SIG_MD_IND,
  19        WL3501_SIG_ASSOC_CONFIRM,
  20        WL3501_SIG_ASSOC_IND,
  21        WL3501_SIG_AUTH_CONFIRM,
  22        WL3501_SIG_AUTH_IND,
  23        WL3501_SIG_DEAUTH_CONFIRM,
  24        WL3501_SIG_DEAUTH_IND,
  25        WL3501_SIG_DISASSOC_CONFIRM,
  26        WL3501_SIG_DISASSOC_IND,
  27        WL3501_SIG_GET_CONFIRM,
  28        WL3501_SIG_JOIN_CONFIRM,
  29        WL3501_SIG_PWR_MGMT_CONFIRM,
  30        WL3501_SIG_REASSOC_CONFIRM,
  31        WL3501_SIG_REASSOC_IND,
  32        WL3501_SIG_SCAN_CONFIRM,
  33        WL3501_SIG_SET_CONFIRM,
  34        WL3501_SIG_START_CONFIRM,
  35        WL3501_SIG_RESYNC_CONFIRM,
  36        WL3501_SIG_SITE_CONFIRM,
  37        WL3501_SIG_SAVE_CONFIRM,
  38        WL3501_SIG_RFTEST_CONFIRM,
  39/*
  40 * ID for input Signals of MLME block
  41 * bit[7-5] is block ID: 010
  42 * bit[4-0] is signal ID
  43 */
  44        WL3501_SIG_ASSOC_REQ = 0x20,
  45        WL3501_SIG_AUTH_REQ,
  46        WL3501_SIG_DEAUTH_REQ,
  47        WL3501_SIG_DISASSOC_REQ,
  48        WL3501_SIG_GET_REQ,
  49        WL3501_SIG_JOIN_REQ,
  50        WL3501_SIG_PWR_MGMT_REQ,
  51        WL3501_SIG_REASSOC_REQ,
  52        WL3501_SIG_SCAN_REQ,
  53        WL3501_SIG_SET_REQ,
  54        WL3501_SIG_START_REQ,
  55        WL3501_SIG_MD_REQ,
  56        WL3501_SIG_RESYNC_REQ,
  57        WL3501_SIG_SITE_REQ,
  58        WL3501_SIG_SAVE_REQ,
  59        WL3501_SIG_RF_TEST_REQ,
  60        WL3501_SIG_MM_CONFIRM = 0x60,
  61        WL3501_SIG_MM_IND,
  62};
  63
  64enum wl3501_mib_attribs {
  65        WL3501_MIB_ATTR_STATION_ID,
  66        WL3501_MIB_ATTR_AUTH_ALGORITHMS,
  67        WL3501_MIB_ATTR_AUTH_TYPE,
  68        WL3501_MIB_ATTR_MEDIUM_OCCUPANCY_LIMIT,
  69        WL3501_MIB_ATTR_CF_POLLABLE,
  70        WL3501_MIB_ATTR_CFP_PERIOD,
  71        WL3501_MIB_ATTR_CFPMAX_DURATION,
  72        WL3501_MIB_ATTR_AUTH_RESP_TMOUT,
  73        WL3501_MIB_ATTR_RX_DTIMS,
  74        WL3501_MIB_ATTR_PRIV_OPT_IMPLEMENTED,
  75        WL3501_MIB_ATTR_PRIV_INVOKED,
  76        WL3501_MIB_ATTR_WEP_DEFAULT_KEYS,
  77        WL3501_MIB_ATTR_WEP_DEFAULT_KEY_ID,
  78        WL3501_MIB_ATTR_WEP_KEY_MAPPINGS,
  79        WL3501_MIB_ATTR_WEP_KEY_MAPPINGS_LEN,
  80        WL3501_MIB_ATTR_EXCLUDE_UNENCRYPTED,
  81        WL3501_MIB_ATTR_WEP_ICV_ERROR_COUNT,
  82        WL3501_MIB_ATTR_WEP_UNDECRYPTABLE_COUNT,
  83        WL3501_MIB_ATTR_WEP_EXCLUDED_COUNT,
  84        WL3501_MIB_ATTR_MAC_ADDR,
  85        WL3501_MIB_ATTR_GROUP_ADDRS,
  86        WL3501_MIB_ATTR_RTS_THRESHOLD,
  87        WL3501_MIB_ATTR_SHORT_RETRY_LIMIT,
  88        WL3501_MIB_ATTR_LONG_RETRY_LIMIT,
  89        WL3501_MIB_ATTR_FRAG_THRESHOLD,
  90        WL3501_MIB_ATTR_MAX_TX_MSDU_LIFETIME,
  91        WL3501_MIB_ATTR_MAX_RX_LIFETIME,
  92        WL3501_MIB_ATTR_MANUFACTURER_ID,
  93        WL3501_MIB_ATTR_PRODUCT_ID,
  94        WL3501_MIB_ATTR_TX_FRAG_COUNT,
  95        WL3501_MIB_ATTR_MULTICAST_TX_FRAME_COUNT,
  96        WL3501_MIB_ATTR_FAILED_COUNT,
  97        WL3501_MIB_ATTR_RX_FRAG_COUNT,
  98        WL3501_MIB_ATTR_MULTICAST_RX_COUNT,
  99        WL3501_MIB_ATTR_FCS_ERROR_COUNT,
 100        WL3501_MIB_ATTR_RETRY_COUNT,
 101        WL3501_MIB_ATTR_MULTIPLE_RETRY_COUNT,
 102        WL3501_MIB_ATTR_RTS_SUCCESS_COUNT,
 103        WL3501_MIB_ATTR_RTS_FAILURE_COUNT,
 104        WL3501_MIB_ATTR_ACK_FAILURE_COUNT,
 105        WL3501_MIB_ATTR_FRAME_DUPLICATE_COUNT,
 106        WL3501_MIB_ATTR_PHY_TYPE,
 107        WL3501_MIB_ATTR_REG_DOMAINS_SUPPORT,
 108        WL3501_MIB_ATTR_CURRENT_REG_DOMAIN,
 109        WL3501_MIB_ATTR_SLOT_TIME,
 110        WL3501_MIB_ATTR_CCA_TIME,
 111        WL3501_MIB_ATTR_RX_TX_TURNAROUND_TIME,
 112        WL3501_MIB_ATTR_TX_PLCP_DELAY,
 113        WL3501_MIB_ATTR_RX_TX_SWITCH_TIME,
 114        WL3501_MIB_ATTR_TX_RAMP_ON_TIME,
 115        WL3501_MIB_ATTR_TX_RF_DELAY,
 116        WL3501_MIB_ATTR_SIFS_TIME,
 117        WL3501_MIB_ATTR_RX_RF_DELAY,
 118        WL3501_MIB_ATTR_RX_PLCP_DELAY,
 119        WL3501_MIB_ATTR_MAC_PROCESSING_DELAY,
 120        WL3501_MIB_ATTR_TX_RAMP_OFF_TIME,
 121        WL3501_MIB_ATTR_PREAMBLE_LEN,
 122        WL3501_MIB_ATTR_PLCP_HEADER_LEN,
 123        WL3501_MIB_ATTR_MPDU_DURATION_FACTOR,
 124        WL3501_MIB_ATTR_AIR_PROPAGATION_TIME,
 125        WL3501_MIB_ATTR_TEMP_TYPE,
 126        WL3501_MIB_ATTR_CW_MIN,
 127        WL3501_MIB_ATTR_CW_MAX,
 128        WL3501_MIB_ATTR_SUPPORT_DATA_RATES_TX,
 129        WL3501_MIB_ATTR_SUPPORT_DATA_RATES_RX,
 130        WL3501_MIB_ATTR_MPDU_MAX_LEN,
 131        WL3501_MIB_ATTR_SUPPORT_TX_ANTENNAS,
 132        WL3501_MIB_ATTR_CURRENT_TX_ANTENNA,
 133        WL3501_MIB_ATTR_SUPPORT_RX_ANTENNAS,
 134        WL3501_MIB_ATTR_DIVERSITY_SUPPORT,
 135        WL3501_MIB_ATTR_DIVERSITY_SELECTION_RS,
 136        WL3501_MIB_ATTR_NR_SUPPORTED_PWR_LEVELS,
 137        WL3501_MIB_ATTR_TX_PWR_LEVEL1,
 138        WL3501_MIB_ATTR_TX_PWR_LEVEL2,
 139        WL3501_MIB_ATTR_TX_PWR_LEVEL3,
 140        WL3501_MIB_ATTR_TX_PWR_LEVEL4,
 141        WL3501_MIB_ATTR_TX_PWR_LEVEL5,
 142        WL3501_MIB_ATTR_TX_PWR_LEVEL6,
 143        WL3501_MIB_ATTR_TX_PWR_LEVEL7,
 144        WL3501_MIB_ATTR_TX_PWR_LEVEL8,
 145        WL3501_MIB_ATTR_CURRENT_TX_PWR_LEVEL,
 146        WL3501_MIB_ATTR_CURRENT_CHAN,
 147        WL3501_MIB_ATTR_CCA_MODE_SUPPORTED,
 148        WL3501_MIB_ATTR_CURRENT_CCA_MODE,
 149        WL3501_MIB_ATTR_ED_THRESHOLD,
 150        WL3501_MIB_ATTR_SINTHESIZER_LOCKED,
 151        WL3501_MIB_ATTR_CURRENT_PWR_STATE,
 152        WL3501_MIB_ATTR_DOZE_TURNON_TIME,
 153        WL3501_MIB_ATTR_RCR33,
 154        WL3501_MIB_ATTR_DEFAULT_CHAN,
 155        WL3501_MIB_ATTR_SSID,
 156        WL3501_MIB_ATTR_PWR_MGMT_ENABLE,
 157        WL3501_MIB_ATTR_NET_CAPABILITY,
 158        WL3501_MIB_ATTR_ROUTING,
 159};
 160
 161enum wl3501_net_type {
 162        WL3501_NET_TYPE_INFRA,
 163        WL3501_NET_TYPE_ADHOC,
 164        WL3501_NET_TYPE_ANY_BSS,
 165};
 166
 167enum wl3501_scan_type {
 168        WL3501_SCAN_TYPE_ACTIVE,
 169        WL3501_SCAN_TYPE_PASSIVE,
 170};
 171
 172enum wl3501_tx_result {
 173        WL3501_TX_RESULT_SUCCESS,
 174        WL3501_TX_RESULT_NO_BSS,
 175        WL3501_TX_RESULT_RETRY_LIMIT,
 176};
 177
 178enum wl3501_sys_type {
 179        WL3501_SYS_TYPE_OPEN,
 180        WL3501_SYS_TYPE_SHARE_KEY,
 181};
 182
 183enum wl3501_status {
 184        WL3501_STATUS_SUCCESS,
 185        WL3501_STATUS_INVALID,
 186        WL3501_STATUS_TIMEOUT,
 187        WL3501_STATUS_REFUSED,
 188        WL3501_STATUS_MANY_REQ,
 189        WL3501_STATUS_ALREADY_BSS,
 190};
 191
 192#define WL3501_MGMT_CAPABILITY_ESS              0x0001  /* see 802.11 p.58 */
 193#define WL3501_MGMT_CAPABILITY_IBSS             0x0002  /*      - " -      */
 194#define WL3501_MGMT_CAPABILITY_CF_POLLABLE      0x0004  /*      - " -      */
 195#define WL3501_MGMT_CAPABILITY_CF_POLL_REQUEST  0x0008  /*      - " -      */
 196#define WL3501_MGMT_CAPABILITY_PRIVACY          0x0010  /*      - " -      */
 197
 198#define IW_REG_DOMAIN_FCC       0x10    /* Channel 1 to 11      USA    */
 199#define IW_REG_DOMAIN_DOC       0x20    /* Channel 1 to 11      Canada */
 200#define IW_REG_DOMAIN_ETSI      0x30    /* Channel 1 to 13      Europe */
 201#define IW_REG_DOMAIN_SPAIN     0x31    /* Channel 10 to 11     Spain  */
 202#define IW_REG_DOMAIN_FRANCE    0x32    /* Channel 10 to 13     France */
 203#define IW_REG_DOMAIN_MKK       0x40    /* Channel 14           Japan  */
 204#define IW_REG_DOMAIN_MKK1      0x41    /* Channel 1-14         Japan  */
 205#define IW_REG_DOMAIN_ISRAEL    0x50    /* Channel 3 - 9        Israel */
 206
 207#define IW_MGMT_RATE_LABEL_MANDATORY 128 /* MSB */
 208
 209enum iw_mgmt_rate_labels {
 210        IW_MGMT_RATE_LABEL_1MBIT   = 2,
 211        IW_MGMT_RATE_LABEL_2MBIT   = 4,
 212        IW_MGMT_RATE_LABEL_5_5MBIT = 11,
 213        IW_MGMT_RATE_LABEL_11MBIT  = 22,
 214};
 215
 216enum iw_mgmt_info_element_ids {
 217        IW_MGMT_INFO_ELEMENT_SSID,                /* Service Set Identity */
 218        IW_MGMT_INFO_ELEMENT_SUPPORTED_RATES,
 219        IW_MGMT_INFO_ELEMENT_FH_PARAMETER_SET,
 220        IW_MGMT_INFO_ELEMENT_DS_PARAMETER_SET,
 221        IW_MGMT_INFO_ELEMENT_CS_PARAMETER_SET,
 222        IW_MGMT_INFO_ELEMENT_CS_TIM,              /* Traffic Information Map */
 223        IW_MGMT_INFO_ELEMENT_IBSS_PARAMETER_SET,
 224        /* 7-15: Reserved, unused */
 225        IW_MGMT_INFO_ELEMENT_CHALLENGE_TEXT = 16,
 226        /* 17-31 Reserved for challenge text extension */
 227        /* 32-255 Reserved, unused */
 228};
 229
 230struct iw_mgmt_info_element {
 231        u8 id; /* one of enum iw_mgmt_info_element_ids,
 232                  but sizeof(enum) > sizeof(u8) :-( */
 233        u8 len;
 234        u8 data[];
 235} __packed;
 236
 237struct iw_mgmt_essid_pset {
 238        struct iw_mgmt_info_element el;
 239        u8                          essid[IW_ESSID_MAX_SIZE];
 240} __packed;
 241
 242/*
 243 * According to 802.11 Wireless Networks, the definitive guide - O'Reilly
 244 * Pg 75
 245 */ 
 246#define IW_DATA_RATE_MAX_LABELS 8
 247
 248struct iw_mgmt_data_rset {
 249        struct iw_mgmt_info_element el;
 250        u8                          data_rate_labels[IW_DATA_RATE_MAX_LABELS];
 251} __packed;
 252
 253struct iw_mgmt_ds_pset {
 254        struct iw_mgmt_info_element el;
 255        u8                          chan;
 256} __packed;
 257
 258struct iw_mgmt_cf_pset {
 259        struct iw_mgmt_info_element el;
 260        u8                          cfp_count;
 261        u8                          cfp_period;
 262        u16                         cfp_max_duration;
 263        u16                         cfp_dur_remaining;
 264} __packed;
 265
 266struct iw_mgmt_ibss_pset {
 267        struct iw_mgmt_info_element el;
 268        u16                         atim_window;
 269} __packed;
 270
 271struct wl3501_tx_hdr {
 272        u16     tx_cnt;
 273        u8      sync[16];
 274        u16     sfd;
 275        u8      signal;
 276        u8      service;
 277        u16     len;
 278        u16     crc16;
 279        u16     frame_ctrl;
 280        u16     duration_id;
 281        u8      addr1[ETH_ALEN];
 282        u8      addr2[ETH_ALEN];
 283        u8      addr3[ETH_ALEN];
 284        u16     seq_ctrl;
 285        u8      addr4[ETH_ALEN];
 286};
 287
 288struct wl3501_rx_hdr {
 289        u16     rx_next_blk;
 290        u16     rc_next_frame_blk;
 291        u8      rx_blk_ctrl;
 292        u8      rx_next_frame;
 293        u8      rx_next_frame1;
 294        u8      rssi;
 295        char    time[8];
 296        u8      signal;
 297        u8      service;
 298        u16     len;
 299        u16     crc16;
 300        u16     frame_ctrl;
 301        u16     duration;
 302        u8      addr1[ETH_ALEN];
 303        u8      addr2[ETH_ALEN];
 304        u8      addr3[ETH_ALEN];
 305        u16     seq;
 306        u8      addr4[ETH_ALEN];
 307};
 308
 309struct wl3501_start_req {
 310        u16                         next_blk;
 311        u8                          sig_id;
 312        u8                          bss_type;
 313        u16                         beacon_period;
 314        u16                         dtim_period;
 315        u16                         probe_delay;
 316        u16                         cap_info;
 317        struct iw_mgmt_essid_pset   ssid;
 318        struct iw_mgmt_data_rset    bss_basic_rset;
 319        struct iw_mgmt_data_rset    operational_rset;
 320        struct iw_mgmt_cf_pset      cf_pset;
 321        struct iw_mgmt_ds_pset      ds_pset;
 322        struct iw_mgmt_ibss_pset    ibss_pset;
 323};
 324
 325struct wl3501_assoc_req {
 326        u16     next_blk;
 327        u8      sig_id;
 328        u8      reserved;
 329        u16     timeout;
 330        u16     cap_info;
 331        u16     listen_interval;
 332        u8      mac_addr[ETH_ALEN];
 333};
 334
 335struct wl3501_assoc_confirm {
 336        u16     next_blk;
 337        u8      sig_id;
 338        u8      reserved;
 339        u16     status;
 340};
 341
 342struct wl3501_assoc_ind {
 343        u16     next_blk;
 344        u8      sig_id;
 345        u8      mac_addr[ETH_ALEN];
 346};
 347
 348struct wl3501_auth_req {
 349        u16     next_blk;
 350        u8      sig_id;
 351        u8      reserved;
 352        u16     type;
 353        u16     timeout;
 354        u8      mac_addr[ETH_ALEN];
 355};
 356
 357struct wl3501_auth_confirm {
 358        u16     next_blk;
 359        u8      sig_id;
 360        u8      reserved;
 361        u16     type;
 362        u16     status;
 363        u8      mac_addr[ETH_ALEN];
 364};
 365
 366struct wl3501_get_req {
 367        u16     next_blk;
 368        u8      sig_id;
 369        u8      reserved;
 370        u16     mib_attrib;
 371};
 372
 373struct wl3501_get_confirm {
 374        u16     next_blk;
 375        u8      sig_id;
 376        u8      reserved;
 377        u16     mib_status;
 378        u16     mib_attrib;
 379        u8      mib_value[100];
 380};
 381
 382struct wl3501_req {
 383        u16                         beacon_period;
 384        u16                         dtim_period;
 385        u16                         cap_info;
 386        u8                          bss_type;
 387        u8                          bssid[ETH_ALEN];
 388        struct iw_mgmt_essid_pset   ssid;
 389        struct iw_mgmt_ds_pset      ds_pset;
 390        struct iw_mgmt_cf_pset      cf_pset;
 391        struct iw_mgmt_ibss_pset    ibss_pset;
 392        struct iw_mgmt_data_rset    bss_basic_rset;
 393};
 394
 395struct wl3501_join_req {
 396        u16                         next_blk;
 397        u8                          sig_id;
 398        u8                          reserved;
 399        struct iw_mgmt_data_rset    operational_rset;
 400        u16                         reserved2;
 401        u16                         timeout;
 402        u16                         probe_delay;
 403        u8                          timestamp[8];
 404        u8                          local_time[8];
 405        struct wl3501_req           req;
 406};
 407
 408struct wl3501_join_confirm {
 409        u16     next_blk;
 410        u8      sig_id;
 411        u8      reserved;
 412        u16     status;
 413};
 414
 415struct wl3501_pwr_mgmt_req {
 416        u16     next_blk;
 417        u8      sig_id;
 418        u8      pwr_save;
 419        u8      wake_up;
 420        u8      receive_dtims;
 421};
 422
 423struct wl3501_pwr_mgmt_confirm {
 424        u16     next_blk;
 425        u8      sig_id;
 426        u8      reserved;
 427        u16     status;
 428};
 429
 430struct wl3501_scan_req {
 431        u16                         next_blk;
 432        u8                          sig_id;
 433        u8                          bss_type;
 434        u16                         probe_delay;
 435        u16                         min_chan_time;
 436        u16                         max_chan_time;
 437        u8                          chan_list[14];
 438        u8                          bssid[ETH_ALEN];
 439        struct iw_mgmt_essid_pset   ssid;
 440        enum wl3501_scan_type       scan_type;
 441};
 442
 443struct wl3501_scan_confirm {
 444        u16                         next_blk;
 445        u8                          sig_id;
 446        u8                          reserved;
 447        u16                         status;
 448        char                        timestamp[8];
 449        char                        localtime[8];
 450        struct wl3501_req           req;
 451        u8                          rssi;
 452};
 453
 454struct wl3501_start_confirm {
 455        u16     next_blk;
 456        u8      sig_id;
 457        u8      reserved;
 458        u16     status;
 459};
 460
 461struct wl3501_md_req {
 462        u16     next_blk;
 463        u8      sig_id;
 464        u8      routing;
 465        u16     data;
 466        u16     size;
 467        u8      pri;
 468        u8      service_class;
 469        struct {
 470                u8      daddr[ETH_ALEN];
 471                u8      saddr[ETH_ALEN];
 472        } addr;
 473};
 474
 475struct wl3501_md_ind {
 476        u16     next_blk;
 477        u8      sig_id;
 478        u8      routing;
 479        u16     data;
 480        u16     size;
 481        u8      reception;
 482        u8      pri;
 483        u8      service_class;
 484        struct {
 485                u8      daddr[ETH_ALEN];
 486                u8      saddr[ETH_ALEN];
 487        } addr;
 488};
 489
 490struct wl3501_md_confirm {
 491        u16     next_blk;
 492        u8      sig_id;
 493        u8      reserved;
 494        u16     data;
 495        u8      status;
 496        u8      pri;
 497        u8      service_class;
 498};
 499
 500struct wl3501_resync_req {
 501        u16     next_blk;
 502        u8      sig_id;
 503};
 504
 505/* Definitions for supporting clone adapters. */
 506/* System Interface Registers (SIR space) */
 507#define WL3501_NIC_GCR ((u8)0x00)       /* SIR0 - General Conf Register */
 508#define WL3501_NIC_BSS ((u8)0x01)       /* SIR1 - Bank Switching Select Reg */
 509#define WL3501_NIC_LMAL ((u8)0x02)      /* SIR2 - Local Mem addr Reg [7:0] */
 510#define WL3501_NIC_LMAH ((u8)0x03)      /* SIR3 - Local Mem addr Reg [14:8] */
 511#define WL3501_NIC_IODPA ((u8)0x04)     /* SIR4 - I/O Data Port A */
 512#define WL3501_NIC_IODPB ((u8)0x05)     /* SIR5 - I/O Data Port B */
 513#define WL3501_NIC_IODPC ((u8)0x06)     /* SIR6 - I/O Data Port C */
 514#define WL3501_NIC_IODPD ((u8)0x07)     /* SIR7 - I/O Data Port D */
 515
 516/* Bits in GCR */
 517#define WL3501_GCR_SWRESET ((u8)0x80)
 518#define WL3501_GCR_CORESET ((u8)0x40)
 519#define WL3501_GCR_DISPWDN ((u8)0x20)
 520#define WL3501_GCR_ECWAIT  ((u8)0x10)
 521#define WL3501_GCR_ECINT   ((u8)0x08)
 522#define WL3501_GCR_INT2EC  ((u8)0x04)
 523#define WL3501_GCR_ENECINT ((u8)0x02)
 524#define WL3501_GCR_DAM     ((u8)0x01)
 525
 526/* Bits in BSS (Bank Switching Select Register) */
 527#define WL3501_BSS_FPAGE0 ((u8)0x20)    /* Flash memory page0 */
 528#define WL3501_BSS_FPAGE1 ((u8)0x28)
 529#define WL3501_BSS_FPAGE2 ((u8)0x30)
 530#define WL3501_BSS_FPAGE3 ((u8)0x38)
 531#define WL3501_BSS_SPAGE0 ((u8)0x00)    /* SRAM page0 */
 532#define WL3501_BSS_SPAGE1 ((u8)0x08)
 533#define WL3501_BSS_SPAGE2 ((u8)0x10)
 534#define WL3501_BSS_SPAGE3 ((u8)0x18)
 535
 536/* Define Driver Interface */
 537/* Refer IEEE 802.11 */
 538/* Tx packet header, include PLCP and MPDU */
 539/* Tx PLCP Header */
 540struct wl3501_80211_tx_plcp_hdr {
 541        u8      sync[16];
 542        u16     sfd;
 543        u8      signal;
 544        u8      service;
 545        u16     len;
 546        u16     crc16;
 547} __packed;
 548
 549struct wl3501_80211_tx_hdr {
 550        struct wl3501_80211_tx_plcp_hdr pclp_hdr;
 551        struct ieee80211_hdr            mac_hdr;
 552} __packed __aligned(2);
 553
 554/*
 555   Reserve the beginning Tx space for descriptor use.
 556
 557   TxBlockOffset -->    *----*----*----*----* \
 558        (TxFreeDesc)    |  0 |  1 |  2 |  3 |  \
 559                        |  4 |  5 |  6 |  7 |   |
 560                        |  8 |  9 | 10 | 11 |   TX_DESC * 20
 561                        | 12 | 13 | 14 | 15 |   |
 562                        | 16 | 17 | 18 | 19 |  /
 563   TxBufferBegin -->    *----*----*----*----* /
 564   (TxBufferHead)       |                   |
 565   (TxBufferTail)       |                   |
 566                        |    Send Buffer    |
 567                        |                   |
 568                        |                   |
 569                        *-------------------*
 570   TxBufferEnd    -------------------------/
 571
 572*/
 573
 574struct wl3501_card {
 575        int                             base_addr;
 576        u8                              mac_addr[ETH_ALEN];
 577        spinlock_t                      lock;
 578        wait_queue_head_t               wait;
 579        struct wl3501_get_confirm       sig_get_confirm;
 580        struct wl3501_pwr_mgmt_confirm  sig_pwr_mgmt_confirm;
 581        u16                             tx_buffer_size;
 582        u16                             tx_buffer_head;
 583        u16                             tx_buffer_tail;
 584        u16                             tx_buffer_cnt;
 585        u16                             esbq_req_start;
 586        u16                             esbq_req_end;
 587        u16                             esbq_req_head;
 588        u16                             esbq_req_tail;
 589        u16                             esbq_confirm_start;
 590        u16                             esbq_confirm_end;
 591        u16                             esbq_confirm;
 592        struct iw_mgmt_essid_pset       essid;
 593        struct iw_mgmt_essid_pset       keep_essid;
 594        u8                              bssid[ETH_ALEN];
 595        int                             net_type;
 596        char                            nick[32];
 597        char                            card_name[32];
 598        char                            firmware_date[32];
 599        u8                              chan;
 600        u8                              cap_info;
 601        u16                             start_seg;
 602        u16                             bss_cnt;
 603        u16                             join_sta_bss;
 604        u8                              rssi;
 605        u8                              adhoc_times;
 606        u8                              reg_domain;
 607        u8                              version[2];
 608        struct wl3501_scan_confirm      bss_set[20];
 609
 610        struct iw_statistics            wstats;
 611        struct iw_spy_data              spy_data;
 612        struct iw_public_data           wireless_data;
 613        struct pcmcia_device            *p_dev;
 614};
 615#endif
 616