1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6#ifndef __QLA_BSG_H 7#define __QLA_BSG_H 8 9/* BSG Vendor specific commands */ 10#define QL_VND_LOOPBACK 0x01 11#define QL_VND_A84_RESET 0x02 12#define QL_VND_A84_UPDATE_FW 0x03 13#define QL_VND_A84_MGMT_CMD 0x04 14#define QL_VND_IIDMA 0x05 15#define QL_VND_FCP_PRIO_CFG_CMD 0x06 16#define QL_VND_READ_FLASH 0x07 17#define QL_VND_UPDATE_FLASH 0x08 18#define QL_VND_SET_FRU_VERSION 0x0B 19#define QL_VND_READ_FRU_STATUS 0x0C 20#define QL_VND_WRITE_FRU_STATUS 0x0D 21#define QL_VND_DIAG_IO_CMD 0x0A 22#define QL_VND_WRITE_I2C 0x10 23#define QL_VND_READ_I2C 0x11 24#define QL_VND_FX00_MGMT_CMD 0x12 25#define QL_VND_SERDES_OP 0x13 26#define QL_VND_SERDES_OP_EX 0x14 27#define QL_VND_GET_FLASH_UPDATE_CAPS 0x15 28#define QL_VND_SET_FLASH_UPDATE_CAPS 0x16 29#define QL_VND_GET_BBCR_DATA 0x17 30#define QL_VND_GET_PRIV_STATS 0x18 31#define QL_VND_DPORT_DIAGNOSTICS 0x19 32#define QL_VND_GET_PRIV_STATS_EX 0x1A 33#define QL_VND_SS_GET_FLASH_IMAGE_STATUS 0x1E 34#define QL_VND_MANAGE_HOST_STATS 0x23 35#define QL_VND_GET_HOST_STATS 0x24 36#define QL_VND_GET_TGT_STATS 0x25 37#define QL_VND_MANAGE_HOST_PORT 0x26 38 39/* BSG Vendor specific subcode returns */ 40#define EXT_STATUS_OK 0 41#define EXT_STATUS_ERR 1 42#define EXT_STATUS_BUSY 2 43#define EXT_STATUS_INVALID_PARAM 6 44#define EXT_STATUS_DATA_OVERRUN 7 45#define EXT_STATUS_DATA_UNDERRUN 8 46#define EXT_STATUS_MAILBOX 11 47#define EXT_STATUS_BUFFER_TOO_SMALL 16 48#define EXT_STATUS_NO_MEMORY 17 49#define EXT_STATUS_DEVICE_OFFLINE 22 50 51/* 52 * To support bidirectional iocb 53 * BSG Vendor specific returns 54 */ 55#define EXT_STATUS_NOT_SUPPORTED 27 56#define EXT_STATUS_INVALID_CFG 28 57#define EXT_STATUS_DMA_ERR 29 58#define EXT_STATUS_TIMEOUT 30 59#define EXT_STATUS_THREAD_FAILED 31 60#define EXT_STATUS_DATA_CMP_FAILED 32 61 62/* BSG definations for interpreting CommandSent field */ 63#define INT_DEF_LB_LOOPBACK_CMD 0 64#define INT_DEF_LB_ECHO_CMD 1 65 66/* Loopback related definations */ 67#define INTERNAL_LOOPBACK 0xF1 68#define EXTERNAL_LOOPBACK 0xF2 69#define ENABLE_INTERNAL_LOOPBACK 0x02 70#define ENABLE_EXTERNAL_LOOPBACK 0x04 71#define INTERNAL_LOOPBACK_MASK 0x000E 72#define MAX_ELS_FRAME_PAYLOAD 252 73#define ELS_OPCODE_BYTE 0x10 74 75/* BSG Vendor specific definations */ 76#define A84_ISSUE_WRITE_TYPE_CMD 0 77#define A84_ISSUE_READ_TYPE_CMD 1 78#define A84_CLEANUP_CMD 2 79#define A84_ISSUE_RESET_OP_FW 3 80#define A84_ISSUE_RESET_DIAG_FW 4 81#define A84_ISSUE_UPDATE_OPFW_CMD 5 82#define A84_ISSUE_UPDATE_DIAGFW_CMD 6 83 84struct qla84_mgmt_param { 85 union { 86 struct { 87 uint32_t start_addr; 88 } mem; /* for QLA84_MGMT_READ/WRITE_MEM */ 89 struct { 90 uint32_t id; 91#define QLA84_MGMT_CONFIG_ID_UIF 1 92#define QLA84_MGMT_CONFIG_ID_FCOE_COS 2 93#define QLA84_MGMT_CONFIG_ID_PAUSE 3 94#define QLA84_MGMT_CONFIG_ID_TIMEOUTS 4 95 96 uint32_t param0; 97 uint32_t param1; 98 } config; /* for QLA84_MGMT_CHNG_CONFIG */ 99 100 struct { 101 uint32_t type; 102#define QLA84_MGMT_INFO_CONFIG_LOG_DATA 1 /* Get Config Log Data */ 103#define QLA84_MGMT_INFO_LOG_DATA 2 /* Get Log Data */ 104#define QLA84_MGMT_INFO_PORT_STAT 3 /* Get Port Statistics */ 105#define QLA84_MGMT_INFO_LIF_STAT 4 /* Get LIF Statistics */ 106#define QLA84_MGMT_INFO_ASIC_STAT 5 /* Get ASIC Statistics */ 107#define QLA84_MGMT_INFO_CONFIG_PARAMS 6 /* Get Config Parameters */ 108#define QLA84_MGMT_INFO_PANIC_LOG 7 /* Get Panic Log */ 109 110 uint32_t context; 111/* 112* context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA 113*/ 114#define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0 115#define IC_LOG_DATA_LOG_ID_LEARN_LOG 1 116#define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2 117#define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3 118#define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4 119#define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5 120#define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6 121#define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7 122#define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8 123#define IC_LOG_DATA_LOG_ID_DCX_LOG 9 124 125/* 126* context definitions for QLA84_MGMT_INFO_PORT_STAT 127*/ 128#define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0 129#define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1 130#define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2 131#define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3 132#define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4 133#define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5 134 135 136/* 137* context definitions for QLA84_MGMT_INFO_LIF_STAT 138*/ 139#define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0 140#define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1 141#define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2 142#define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3 143#define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6 144 145 } info; /* for QLA84_MGMT_GET_INFO */ 146 } u; 147}; 148 149struct qla84_msg_mgmt { 150 uint16_t cmd; 151#define QLA84_MGMT_READ_MEM 0x00 152#define QLA84_MGMT_WRITE_MEM 0x01 153#define QLA84_MGMT_CHNG_CONFIG 0x02 154#define QLA84_MGMT_GET_INFO 0x03 155 uint16_t rsrvd; 156 struct qla84_mgmt_param mgmtp;/* parameters for cmd */ 157 uint32_t len; /* bytes in payload following this struct */ 158 uint8_t payload[0]; /* payload for cmd */ 159}; 160 161struct qla_bsg_a84_mgmt { 162 struct qla84_msg_mgmt mgmt; 163} __attribute__ ((packed)); 164 165struct qla_scsi_addr { 166 uint16_t bus; 167 uint16_t target; 168} __attribute__ ((packed)); 169 170struct qla_ext_dest_addr { 171 union { 172 uint8_t wwnn[8]; 173 uint8_t wwpn[8]; 174 uint8_t id[4]; 175 struct qla_scsi_addr scsi_addr; 176 } dest_addr; 177 uint16_t dest_type; 178#define EXT_DEF_TYPE_WWPN 2 179 uint16_t lun; 180 uint16_t padding[2]; 181} __attribute__ ((packed)); 182 183struct qla_port_param { 184 struct qla_ext_dest_addr fc_scsi_addr; 185 uint16_t mode; 186 uint16_t speed; 187} __attribute__ ((packed)); 188 189 190/* FRU VPD */ 191 192#define MAX_FRU_SIZE 36 193 194struct qla_field_address { 195 uint16_t offset; 196 uint16_t device; 197 uint16_t option; 198} __packed; 199 200struct qla_field_info { 201 uint8_t version[MAX_FRU_SIZE]; 202} __packed; 203 204struct qla_image_version { 205 struct qla_field_address field_address; 206 struct qla_field_info field_info; 207} __packed; 208 209struct qla_image_version_list { 210 uint32_t count; 211 struct qla_image_version version[0]; 212} __packed; 213 214struct qla_status_reg { 215 struct qla_field_address field_address; 216 uint8_t status_reg; 217 uint8_t reserved[7]; 218} __packed; 219 220struct qla_i2c_access { 221 uint16_t device; 222 uint16_t offset; 223 uint16_t option; 224 uint16_t length; 225 uint8_t buffer[0x40]; 226} __packed; 227 228/* 26xx serdes register interface */ 229 230/* serdes reg commands */ 231#define INT_SC_SERDES_READ_REG 1 232#define INT_SC_SERDES_WRITE_REG 2 233 234struct qla_serdes_reg { 235 uint16_t cmd; 236 uint16_t addr; 237 uint16_t val; 238} __packed; 239 240struct qla_serdes_reg_ex { 241 uint16_t cmd; 242 uint32_t addr; 243 uint32_t val; 244} __packed; 245 246struct qla_flash_update_caps { 247 uint64_t capabilities; 248 uint32_t outage_duration; 249 uint8_t reserved[20]; 250} __packed; 251 252/* BB_CR Status */ 253#define QLA_BBCR_STATUS_DISABLED 0 254#define QLA_BBCR_STATUS_ENABLED 1 255#define QLA_BBCR_STATUS_UNKNOWN 2 256 257/* BB_CR State */ 258#define QLA_BBCR_STATE_OFFLINE 0 259#define QLA_BBCR_STATE_ONLINE 1 260 261/* BB_CR Offline Reason Code */ 262#define QLA_BBCR_REASON_PORT_SPEED 1 263#define QLA_BBCR_REASON_PEER_PORT 2 264#define QLA_BBCR_REASON_SWITCH 3 265#define QLA_BBCR_REASON_LOGIN_REJECT 4 266 267struct qla_bbcr_data { 268 uint8_t status; /* 1 - enabled, 0 - Disabled */ 269 uint8_t state; /* 1 - online, 0 - offline */ 270 uint8_t configured_bbscn; /* 0-15 */ 271 uint8_t negotiated_bbscn; /* 0-15 */ 272 uint8_t offline_reason_code; 273 uint16_t mbx1; /* Port state */ 274 uint8_t reserved[9]; 275} __packed; 276 277struct qla_dport_diag { 278 uint16_t options; 279 uint32_t buf[16]; 280 uint8_t unused[62]; 281} __packed; 282 283/* D_Port options */ 284#define QLA_DPORT_RESULT 0x0 285#define QLA_DPORT_START 0x2 286 287/* active images in flash */ 288struct qla_active_regions { 289 uint8_t global_image; 290 uint8_t board_config; 291 uint8_t vpd_nvram; 292 uint8_t npiv_config_0_1; 293 uint8_t npiv_config_2_3; 294 uint8_t reserved[32]; 295} __packed; 296 297#endif 298