LXR linux/drivers/staging/rtl8188eu/include/rtl8188e

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/******************************************************************************
   3 *
   4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5 *
   6 ******************************************************************************/
   7#ifndef __RTL8188E_XMIT_H__
   8#define __RTL8188E_XMIT_H__
   9
  10#define         MAX_TX_AGG_PACKET_NUMBER        0xFF
  11/*  */
  12/*  Queue Select Value in TxDesc */
  13/*  */
  14#define QSLT_BK                                                 0x2/* 0x01 */
  15#define QSLT_BE                                                 0x0
  16#define QSLT_VI                                                 0x5/* 0x4 */
  17#define QSLT_VO                                                 0x7/* 0x6 */
  18#define QSLT_BEACON                                             0x10
  19#define QSLT_HIGH                                               0x11
  20#define QSLT_MGNT                                               0x12
  21#define QSLT_CMD                                                0x13
  22
  23/* For 88e early mode */
  24#define SET_EARLYMODE_PKTNUM(__pAddr, __Value)                  \
  25        SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
  26#define SET_EARLYMODE_LEN0(__pAddr, __Value)                    \
  27        SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value)
  28#define SET_EARLYMODE_LEN1(__pAddr, __Value)                    \
  29        SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value)
  30#define SET_EARLYMODE_LEN2_1(__pAddr, __Value)                  \
  31        SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value)
  32#define SET_EARLYMODE_LEN2_2(__pAddr, __Value)                  \
  33        SET_BITS_TO_LE_4BYTE(__pAddr + 4, 0, 8, __Value)
  34#define SET_EARLYMODE_LEN3(__pAddr, __Value)                    \
  35        SET_BITS_TO_LE_4BYTE(__pAddr + 4, 8, 12, __Value)
  36#define SET_EARLYMODE_LEN4(__pAddr, __Value)                    \
  37        SET_BITS_TO_LE_4BYTE(__pAddr + 4, 20, 12, __Value)
  38
  39/*  */
  40/* defined for TX DESC Operation */
  41/*  */
  42
  43#define MAX_TID (15)
  44
  45/* OFFSET 0 */
  46#define OFFSET_SZ       0
  47#define OFFSET_SHT      16
  48#define BMC             BIT(24)
  49#define LSG             BIT(26)
  50#define FSG             BIT(27)
  51#define OWN             BIT(31)
  52
  53/* OFFSET 4 */
  54#define PKT_OFFSET_SZ           0
  55#define QSEL_SHT                8
  56#define RATE_ID_SHT             16
  57#define NAVUSEHDR               BIT(20)
  58#define SEC_TYPE_SHT            22
  59#define PKT_OFFSET_SHT          26
  60
  61/* OFFSET 8 */
  62#define AGG_EN                  BIT(12)
  63#define AGG_BK                  BIT(16)
  64#define AMPDU_DENSITY_SHT       20
  65#define ANTSEL_A                BIT(24)
  66#define ANTSEL_B                BIT(25)
  67#define TX_ANT_CCK_SHT          26
  68#define TX_ANTL_SHT             28
  69#define TX_ANT_HT_SHT           30
  70
  71/* OFFSET 12 */
  72#define SEQ_SHT                 16
  73#define EN_HWSEQ                BIT(31)
  74
  75/* OFFSET 16 */
  76#define QOS                     BIT(6)
  77#define HW_SSN                  BIT(7)
  78#define USERATE                 BIT(8)
  79#define DISDATAFB               BIT(10)
  80#define CTS_2_SELF              BIT(11)
  81#define RTS_EN                  BIT(12)
  82#define HW_RTS_EN               BIT(13)
  83#define DATA_SHORT              BIT(24)
  84#define PWR_STATUS_SHT          15
  85#define DATA_SC_SHT             20
  86#define DATA_BW                 BIT(25)
  87
  88/* OFFSET 20 */
  89#define RTY_LMT_EN              BIT(17)
  90
  91enum TXDESC_SC {
  92        SC_DONT_CARE = 0x00,
  93        SC_UPPER = 0x01,
  94        SC_LOWER = 0x02,
  95        SC_DUPLICATE = 0x03
  96};
  97
  98/* OFFSET 20 */
  99#define SGI                     BIT(6)
 100#define USB_TXAGG_NUM_SHT       24
 101
 102#define txdesc_set_ccx_sw_88e(txdesc, value) \
 103        do { \
 104                ((struct txdesc_88e *)(txdesc))->sw1 = (((value) >> 8) & 0x0f); \
 105                ((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \
 106        } while (0)
 107
 108struct txrpt_ccx_88e {
 109        /* offset 0 */
 110        u8 tag1:1;
 111        u8 pkt_num:3;
 112        u8 txdma_underflow:1;
 113        u8 int_bt:1;
 114        u8 int_tri:1;
 115        u8 int_ccx:1;
 116
 117        /* offset 1 */
 118        u8 mac_id:6;
 119        u8 pkt_ok:1;
 120        u8 bmc:1;
 121
 122        /* offset 2 */
 123        u8 retry_cnt:6;
 124        u8 lifetime_over:1;
 125        u8 retry_over:1;
 126
 127        /* offset 3 */
 128        u8 ccx_qtime0;
 129        u8 ccx_qtime1;
 130
 131        /* offset 5 */
 132        u8 final_data_rate;
 133
 134        /* offset 6 */
 135        u8 sw1:4;
 136        u8 qsel:4;
 137
 138        /* offset 7 */
 139        u8 sw0;
 140};
 141
 142#define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1 << 8))
 143#define txrpt_ccx_qtime_88e(txrpt_ccx)                  \
 144        ((txrpt_ccx)->ccx_qtime0 + ((txrpt_ccx)->ccx_qtime1 << 8))
 145
 146void rtl8188e_fill_fake_txdesc(struct adapter *padapter, u8 *pDesc,
 147                               u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull);
 148s32 rtl8188eu_init_xmit_priv(struct adapter *padapter);
 149s32 rtl8188eu_xmit_buf_handler(struct adapter *padapter);
 150#define hal_xmit_handler rtl8188eu_xmit_buf_handler
 151void rtl8188eu_xmit_tasklet(struct tasklet_struct *t);
 152bool rtl8188eu_xmitframe_complete(struct adapter *padapter,
 153                                  struct xmit_priv *pxmitpriv);
 154
 155void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf);
 156
 157#endif /* __RTL8188E_XMIT_H__ */
 158