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6
7#define _HAL_COM_C_
8
9#include <linux/kernel.h>
10#include <drv_types.h>
11#include <rtw_debug.h>
12#include "hal_com_h2c.h"
13
14#include "odm_precomp.h"
15
16u8 rtw_hal_data_init(struct adapter *padapter)
17{
18 if (is_primary_adapter(padapter)) {
19 padapter->hal_data_sz = sizeof(struct hal_com_data);
20 padapter->HalData = vzalloc(padapter->hal_data_sz);
21 if (!padapter->HalData)
22 return _FAIL;
23 }
24 return _SUCCESS;
25}
26
27void rtw_hal_data_deinit(struct adapter *padapter)
28{
29 if (is_primary_adapter(padapter)) {
30 if (padapter->HalData) {
31 vfree(padapter->HalData);
32 padapter->HalData = NULL;
33 padapter->hal_data_sz = 0;
34 }
35 }
36}
37
38
39void dump_chip_info(struct hal_version ChipVersion)
40{
41 char buf[128];
42 size_t cnt = 0;
43
44 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "Chip Version Info: CHIP_8723B_%s_",
45 IS_NORMAL_CHIP(ChipVersion) ? "Normal_Chip" : "Test_Chip");
46
47 if (IS_CHIP_VENDOR_TSMC(ChipVersion))
48 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "TSMC_");
49 else if (IS_CHIP_VENDOR_UMC(ChipVersion))
50 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "UMC_");
51 else if (IS_CHIP_VENDOR_SMIC(ChipVersion))
52 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "SMIC_");
53
54 if (IS_A_CUT(ChipVersion))
55 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "A_CUT_");
56 else if (IS_B_CUT(ChipVersion))
57 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "B_CUT_");
58 else if (IS_C_CUT(ChipVersion))
59 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "C_CUT_");
60 else if (IS_D_CUT(ChipVersion))
61 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "D_CUT_");
62 else if (IS_E_CUT(ChipVersion))
63 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "E_CUT_");
64 else if (IS_I_CUT(ChipVersion))
65 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "I_CUT_");
66 else if (IS_J_CUT(ChipVersion))
67 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "J_CUT_");
68 else if (IS_K_CUT(ChipVersion))
69 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "K_CUT_");
70 else
71 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt,
72 "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
73
74 if (IS_1T1R(ChipVersion))
75 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T1R_");
76 else if (IS_1T2R(ChipVersion))
77 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T2R_");
78 else if (IS_2T2R(ChipVersion))
79 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "2T2R_");
80 else
81 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt,
82 "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType);
83
84 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "RomVer(%d)\n", ChipVersion.ROMVer);
85}
86
87
88#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
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108u8 hal_com_config_channel_plan(
109 struct adapter *padapter,
110 u8 hw_channel_plan,
111 u8 sw_channel_plan,
112 u8 def_channel_plan,
113 bool AutoLoadFail
114)
115{
116 struct hal_com_data *pHalData;
117 u8 chnlPlan;
118
119 pHalData = GET_HAL_DATA(padapter);
120 pHalData->bDisableSWChannelPlan = false;
121 chnlPlan = def_channel_plan;
122
123 if (0xFF == hw_channel_plan)
124 AutoLoadFail = true;
125
126 if (!AutoLoadFail) {
127 u8 hw_chnlPlan;
128
129 hw_chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
130 if (rtw_is_channel_plan_valid(hw_chnlPlan)) {
131 if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
132 pHalData->bDisableSWChannelPlan = true;
133
134 chnlPlan = hw_chnlPlan;
135 }
136 }
137
138 if (
139 (false == pHalData->bDisableSWChannelPlan) &&
140 rtw_is_channel_plan_valid(sw_channel_plan)
141 )
142 chnlPlan = sw_channel_plan;
143
144 return chnlPlan;
145}
146
147bool HAL_IsLegalChannel(struct adapter *Adapter, u32 Channel)
148{
149 bool bLegalChannel = true;
150
151 if ((Channel <= 14) && (Channel >= 1)) {
152 if (IsSupported24G(Adapter->registrypriv.wireless_mode) == false)
153 bLegalChannel = false;
154 } else {
155 bLegalChannel = false;
156 }
157
158 return bLegalChannel;
159}
160
161u8 MRateToHwRate(u8 rate)
162{
163 u8 ret = DESC_RATE1M;
164
165 switch (rate) {
166 case MGN_1M:
167 ret = DESC_RATE1M;
168 break;
169 case MGN_2M:
170 ret = DESC_RATE2M;
171 break;
172 case MGN_5_5M:
173 ret = DESC_RATE5_5M;
174 break;
175 case MGN_11M:
176 ret = DESC_RATE11M;
177 break;
178 case MGN_6M:
179 ret = DESC_RATE6M;
180 break;
181 case MGN_9M:
182 ret = DESC_RATE9M;
183 break;
184 case MGN_12M:
185 ret = DESC_RATE12M;
186 break;
187 case MGN_18M:
188 ret = DESC_RATE18M;
189 break;
190 case MGN_24M:
191 ret = DESC_RATE24M;
192 break;
193 case MGN_36M:
194 ret = DESC_RATE36M;
195 break;
196 case MGN_48M:
197 ret = DESC_RATE48M;
198 break;
199 case MGN_54M:
200 ret = DESC_RATE54M;
201 break;
202 case MGN_MCS0:
203 ret = DESC_RATEMCS0;
204 break;
205 case MGN_MCS1:
206 ret = DESC_RATEMCS1;
207 break;
208 case MGN_MCS2:
209 ret = DESC_RATEMCS2;
210 break;
211 case MGN_MCS3:
212 ret = DESC_RATEMCS3;
213 break;
214 case MGN_MCS4:
215 ret = DESC_RATEMCS4;
216 break;
217 case MGN_MCS5:
218 ret = DESC_RATEMCS5;
219 break;
220 case MGN_MCS6:
221 ret = DESC_RATEMCS6;
222 break;
223 case MGN_MCS7:
224 ret = DESC_RATEMCS7;
225 break;
226 case MGN_MCS8:
227 ret = DESC_RATEMCS8;
228 break;
229 case MGN_MCS9:
230 ret = DESC_RATEMCS9;
231 break;
232 case MGN_MCS10:
233 ret = DESC_RATEMCS10;
234 break;
235 case MGN_MCS11:
236 ret = DESC_RATEMCS11;
237 break;
238 case MGN_MCS12:
239 ret = DESC_RATEMCS12;
240 break;
241 case MGN_MCS13:
242 ret = DESC_RATEMCS13;
243 break;
244 case MGN_MCS14:
245 ret = DESC_RATEMCS14;
246 break;
247 case MGN_MCS15:
248 ret = DESC_RATEMCS15;
249 break;
250 case MGN_MCS16:
251 ret = DESC_RATEMCS16;
252 break;
253 case MGN_MCS17:
254 ret = DESC_RATEMCS17;
255 break;
256 case MGN_MCS18:
257 ret = DESC_RATEMCS18;
258 break;
259 case MGN_MCS19:
260 ret = DESC_RATEMCS19;
261 break;
262 case MGN_MCS20:
263 ret = DESC_RATEMCS20;
264 break;
265 case MGN_MCS21:
266 ret = DESC_RATEMCS21;
267 break;
268 case MGN_MCS22:
269 ret = DESC_RATEMCS22;
270 break;
271 case MGN_MCS23:
272 ret = DESC_RATEMCS23;
273 break;
274 case MGN_MCS24:
275 ret = DESC_RATEMCS24;
276 break;
277 case MGN_MCS25:
278 ret = DESC_RATEMCS25;
279 break;
280 case MGN_MCS26:
281 ret = DESC_RATEMCS26;
282 break;
283 case MGN_MCS27:
284 ret = DESC_RATEMCS27;
285 break;
286 case MGN_MCS28:
287 ret = DESC_RATEMCS28;
288 break;
289 case MGN_MCS29:
290 ret = DESC_RATEMCS29;
291 break;
292 case MGN_MCS30:
293 ret = DESC_RATEMCS30;
294 break;
295 case MGN_MCS31:
296 ret = DESC_RATEMCS31;
297 break;
298 default:
299 break;
300 }
301
302 return ret;
303}
304
305u8 HwRateToMRate(u8 rate)
306{
307 u8 ret_rate = MGN_1M;
308
309 switch (rate) {
310 case DESC_RATE1M:
311 ret_rate = MGN_1M;
312 break;
313 case DESC_RATE2M:
314 ret_rate = MGN_2M;
315 break;
316 case DESC_RATE5_5M:
317 ret_rate = MGN_5_5M;
318 break;
319 case DESC_RATE11M:
320 ret_rate = MGN_11M;
321 break;
322 case DESC_RATE6M:
323 ret_rate = MGN_6M;
324 break;
325 case DESC_RATE9M:
326 ret_rate = MGN_9M;
327 break;
328 case DESC_RATE12M:
329 ret_rate = MGN_12M;
330 break;
331 case DESC_RATE18M:
332 ret_rate = MGN_18M;
333 break;
334 case DESC_RATE24M:
335 ret_rate = MGN_24M;
336 break;
337 case DESC_RATE36M:
338 ret_rate = MGN_36M;
339 break;
340 case DESC_RATE48M:
341 ret_rate = MGN_48M;
342 break;
343 case DESC_RATE54M:
344 ret_rate = MGN_54M;
345 break;
346 case DESC_RATEMCS0:
347 ret_rate = MGN_MCS0;
348 break;
349 case DESC_RATEMCS1:
350 ret_rate = MGN_MCS1;
351 break;
352 case DESC_RATEMCS2:
353 ret_rate = MGN_MCS2;
354 break;
355 case DESC_RATEMCS3:
356 ret_rate = MGN_MCS3;
357 break;
358 case DESC_RATEMCS4:
359 ret_rate = MGN_MCS4;
360 break;
361 case DESC_RATEMCS5:
362 ret_rate = MGN_MCS5;
363 break;
364 case DESC_RATEMCS6:
365 ret_rate = MGN_MCS6;
366 break;
367 case DESC_RATEMCS7:
368 ret_rate = MGN_MCS7;
369 break;
370 case DESC_RATEMCS8:
371 ret_rate = MGN_MCS8;
372 break;
373 case DESC_RATEMCS9:
374 ret_rate = MGN_MCS9;
375 break;
376 case DESC_RATEMCS10:
377 ret_rate = MGN_MCS10;
378 break;
379 case DESC_RATEMCS11:
380 ret_rate = MGN_MCS11;
381 break;
382 case DESC_RATEMCS12:
383 ret_rate = MGN_MCS12;
384 break;
385 case DESC_RATEMCS13:
386 ret_rate = MGN_MCS13;
387 break;
388 case DESC_RATEMCS14:
389 ret_rate = MGN_MCS14;
390 break;
391 case DESC_RATEMCS15:
392 ret_rate = MGN_MCS15;
393 break;
394 case DESC_RATEMCS16:
395 ret_rate = MGN_MCS16;
396 break;
397 case DESC_RATEMCS17:
398 ret_rate = MGN_MCS17;
399 break;
400 case DESC_RATEMCS18:
401 ret_rate = MGN_MCS18;
402 break;
403 case DESC_RATEMCS19:
404 ret_rate = MGN_MCS19;
405 break;
406 case DESC_RATEMCS20:
407 ret_rate = MGN_MCS20;
408 break;
409 case DESC_RATEMCS21:
410 ret_rate = MGN_MCS21;
411 break;
412 case DESC_RATEMCS22:
413 ret_rate = MGN_MCS22;
414 break;
415 case DESC_RATEMCS23:
416 ret_rate = MGN_MCS23;
417 break;
418 case DESC_RATEMCS24:
419 ret_rate = MGN_MCS24;
420 break;
421 case DESC_RATEMCS25:
422 ret_rate = MGN_MCS25;
423 break;
424 case DESC_RATEMCS26:
425 ret_rate = MGN_MCS26;
426 break;
427 case DESC_RATEMCS27:
428 ret_rate = MGN_MCS27;
429 break;
430 case DESC_RATEMCS28:
431 ret_rate = MGN_MCS28;
432 break;
433 case DESC_RATEMCS29:
434 ret_rate = MGN_MCS29;
435 break;
436 case DESC_RATEMCS30:
437 ret_rate = MGN_MCS30;
438 break;
439 case DESC_RATEMCS31:
440 ret_rate = MGN_MCS31;
441 break;
442 default:
443 break;
444 }
445
446 return ret_rate;
447}
448
449void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg)
450{
451 u8 i, is_brate, brate;
452
453 for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
454
455 is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
456 brate = mBratesOS[i] & 0x7f;
457
458 if (is_brate) {
459 switch (brate) {
460 case IEEE80211_CCK_RATE_1MB:
461 *pBrateCfg |= RATE_1M;
462 break;
463 case IEEE80211_CCK_RATE_2MB:
464 *pBrateCfg |= RATE_2M;
465 break;
466 case IEEE80211_CCK_RATE_5MB:
467 *pBrateCfg |= RATE_5_5M;
468 break;
469 case IEEE80211_CCK_RATE_11MB:
470 *pBrateCfg |= RATE_11M;
471 break;
472 case IEEE80211_OFDM_RATE_6MB:
473 *pBrateCfg |= RATE_6M;
474 break;
475 case IEEE80211_OFDM_RATE_9MB:
476 *pBrateCfg |= RATE_9M;
477 break;
478 case IEEE80211_OFDM_RATE_12MB:
479 *pBrateCfg |= RATE_12M;
480 break;
481 case IEEE80211_OFDM_RATE_18MB:
482 *pBrateCfg |= RATE_18M;
483 break;
484 case IEEE80211_OFDM_RATE_24MB:
485 *pBrateCfg |= RATE_24M;
486 break;
487 case IEEE80211_OFDM_RATE_36MB:
488 *pBrateCfg |= RATE_36M;
489 break;
490 case IEEE80211_OFDM_RATE_48MB:
491 *pBrateCfg |= RATE_48M;
492 break;
493 case IEEE80211_OFDM_RATE_54MB:
494 *pBrateCfg |= RATE_54M;
495 break;
496 }
497 }
498 }
499}
500
501static void _OneOutPipeMapping(struct adapter *padapter)
502{
503 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
504
505 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];
506 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];
507 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];
508 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];
509
510 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];
511 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];
512 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];
513 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];
514}
515
516static void _TwoOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
517{
518 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
519
520 if (bWIFICfg) {
521
522
523
524
525
526 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];
527 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];
528 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];
529 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];
530
531 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];
532 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];
533 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];
534 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];
535
536 } else {
537
538
539
540
541
542
543 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];
544 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];
545 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];
546 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];
547
548 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];
549 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];
550 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];
551 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];
552
553 }
554
555}
556
557static void _ThreeOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
558{
559 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
560
561 if (bWIFICfg) {
562
563
564
565
566
567 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];
568 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];
569 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];
570 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];
571
572 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];
573 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];
574 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];
575 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];
576
577 } else {
578
579
580
581
582
583
584 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];
585 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];
586 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];
587 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];
588
589 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];
590 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];
591 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];
592 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];
593 }
594
595}
596
597bool Hal_MappingOutPipe(struct adapter *padapter, u8 NumOutPipe)
598{
599 struct registry_priv *pregistrypriv = &padapter->registrypriv;
600
601 bool bWIFICfg = (pregistrypriv->wifi_spec) ? true : false;
602
603 bool result = true;
604
605 switch (NumOutPipe) {
606 case 2:
607 _TwoOutPipeMapping(padapter, bWIFICfg);
608 break;
609 case 3:
610 case 4:
611 _ThreeOutPipeMapping(padapter, bWIFICfg);
612 break;
613 case 1:
614 _OneOutPipeMapping(padapter);
615 break;
616 default:
617 result = false;
618 break;
619 }
620
621 return result;
622
623}
624
625void hal_init_macaddr(struct adapter *adapter)
626{
627 rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
628}
629
630void rtw_init_hal_com_default_value(struct adapter *Adapter)
631{
632 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
633
634 pHalData->AntDetection = 1;
635}
636
637
638
639
640
641
642
643void c2h_evt_clear(struct adapter *adapter)
644{
645 rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
646}
647
648
649
650
651
652
653s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf)
654{
655 s32 ret = _FAIL;
656 struct c2h_evt_hdr_88xx *c2h_evt;
657 int i;
658 u8 trigger;
659
660 if (!buf)
661 goto exit;
662
663 trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
664
665 if (trigger == C2H_EVT_HOST_CLOSE)
666 goto exit;
667 else if (trigger != C2H_EVT_FW_CLOSE)
668 goto clear_evt;
669
670 c2h_evt = (struct c2h_evt_hdr_88xx *)buf;
671
672 memset(c2h_evt, 0, 16);
673
674 c2h_evt->id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
675 c2h_evt->seq = rtw_read8(adapter, REG_C2HEVT_CMD_SEQ_88XX);
676 c2h_evt->plen = rtw_read8(adapter, REG_C2HEVT_CMD_LEN_88XX);
677
678
679 for (i = 0; i < c2h_evt->plen; i++)
680 c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i);
681
682 ret = _SUCCESS;
683
684clear_evt:
685
686
687
688
689 c2h_evt_clear(adapter);
690exit:
691 return ret;
692}
693
694u8 rtw_get_mgntframe_raid(struct adapter *adapter, unsigned char network_type)
695{
696 return (network_type & WIRELESS_11B) ? RATEID_IDX_B : RATEID_IDX_G;
697}
698
699void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *psta)
700{
701 u8 i, rf_type, limit;
702 u32 tx_ra_bitmap;
703
704 if (!psta)
705 return;
706
707 tx_ra_bitmap = 0;
708
709
710 for (i = 0; i < sizeof(psta->bssrateset); i++) {
711 if (psta->bssrateset[i])
712 tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f);
713 }
714
715
716 if (psta->htpriv.ht_option) {
717 rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
718 if (rf_type == RF_2T2R)
719 limit = 16;
720 else
721 limit = 8;
722
723 for (i = 0; i < limit; i++) {
724 if (psta->htpriv.ht_cap.mcs.rx_mask[i/8] & BIT(i%8))
725 tx_ra_bitmap |= BIT(i+12);
726 }
727 }
728
729 psta->ra_mask = tx_ra_bitmap;
730 psta->init_rate = get_highest_rate_idx(tx_ra_bitmap)&0x3f;
731}
732
733void hw_var_port_switch(struct adapter *adapter)
734{
735}
736
737void SetHwReg(struct adapter *adapter, u8 variable, u8 *val)
738{
739 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
740 struct dm_odm_t *odm = &(hal_data->odmpriv);
741
742 switch (variable) {
743 case HW_VAR_PORT_SWITCH:
744 hw_var_port_switch(adapter);
745 break;
746 case HW_VAR_INIT_RTS_RATE:
747 rtw_warn_on(1);
748 break;
749 case HW_VAR_SEC_CFG:
750 {
751 u16 reg_scr;
752
753 reg_scr = rtw_read16(adapter, REG_SECCFG);
754 rtw_write16(adapter, REG_SECCFG, reg_scr|SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable);
755 }
756 break;
757 case HW_VAR_SEC_DK_CFG:
758 {
759 struct security_priv *sec = &adapter->securitypriv;
760 u8 reg_scr = rtw_read8(adapter, REG_SECCFG);
761
762 if (val) {
763 reg_scr |= SCR_TXBCUSEDK;
764 if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X)
765 reg_scr |= (SCR_RxUseDK|SCR_TxUseDK);
766 } else
767 reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK);
768
769 rtw_write8(adapter, REG_SECCFG, reg_scr);
770 }
771 break;
772 case HW_VAR_DM_FLAG:
773 odm->SupportAbility = *((u32 *)val);
774 break;
775 case HW_VAR_DM_FUNC_OP:
776 if (*((u8 *)val) == true) {
777
778 odm->BK_SupportAbility = odm->SupportAbility;
779 } else {
780
781 odm->SupportAbility = odm->BK_SupportAbility;
782 }
783 break;
784 case HW_VAR_DM_FUNC_SET:
785 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
786 struct dm_priv *dm = &hal_data->dmpriv;
787 dm->DMFlag = dm->InitDMFlag;
788 odm->SupportAbility = dm->InitODMFlag;
789 } else {
790 odm->SupportAbility |= *((u32 *)val);
791 }
792 break;
793 case HW_VAR_DM_FUNC_CLR:
794
795
796
797
798 odm->SupportAbility &= *((u32 *)val);
799 break;
800 case HW_VAR_AMPDU_MIN_SPACE:
801
802 break;
803 case HW_VAR_WIRELESS_MODE:
804
805 break;
806 default:
807 netdev_dbg(adapter->pnetdev,
808 FUNC_ADPT_FMT " variable(%d) not defined!\n",
809 FUNC_ADPT_ARG(adapter), variable);
810 break;
811 }
812}
813
814void GetHwReg(struct adapter *adapter, u8 variable, u8 *val)
815{
816 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
817 struct dm_odm_t *odm = &(hal_data->odmpriv);
818
819 switch (variable) {
820 case HW_VAR_BASIC_RATE:
821 *((u16 *)val) = hal_data->BasicRateSet;
822 break;
823 case HW_VAR_DM_FLAG:
824 *((u32 *)val) = odm->SupportAbility;
825 break;
826 case HW_VAR_RF_TYPE:
827 *((u8 *)val) = hal_data->rf_type;
828 break;
829 default:
830 netdev_dbg(adapter->pnetdev,
831 FUNC_ADPT_FMT " variable(%d) not defined!\n",
832 FUNC_ADPT_ARG(adapter), variable);
833 break;
834 }
835}
836
837
838
839
840u8 SetHalDefVar(
841 struct adapter *adapter, enum hal_def_variable variable, void *value
842)
843{
844 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
845 struct dm_odm_t *odm = &(hal_data->odmpriv);
846 u8 bResult = _SUCCESS;
847
848 switch (variable) {
849 case HAL_DEF_DBG_RX_INFO_DUMP:
850
851 if (odm->bLinked) {
852 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
853 rtw_dump_raw_rssi_info(adapter);
854 #endif
855 }
856 break;
857 case HW_DEF_ODM_DBG_FLAG:
858 ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_COMP, *((u64 *)value));
859 break;
860 case HW_DEF_ODM_DBG_LEVEL:
861 ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_LEVEL, *((u32 *)value));
862 break;
863 case HAL_DEF_DBG_DM_FUNC:
864 {
865 u8 dm_func = *((u8 *)value);
866 struct dm_priv *dm = &hal_data->dmpriv;
867
868 if (dm_func == 0) {
869 odm->SupportAbility = DYNAMIC_FUNC_DISABLE;
870 } else if (dm_func == 1) {
871 odm->SupportAbility &= (~DYNAMIC_BB_DIG);
872 } else if (dm_func == 2) {
873 odm->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR);
874 } else if (dm_func == 3) {
875 odm->SupportAbility &= (~DYNAMIC_RF_CALIBRATION);
876 } else if (dm_func == 4) {
877 dm->DMFlag &= (~DYNAMIC_FUNC_BT);
878 } else if (dm_func == 5) {
879 odm->SupportAbility &= (~DYNAMIC_BB_ANT_DIV);
880 } else if (dm_func == 6) {
881 if (!(odm->SupportAbility & DYNAMIC_BB_DIG)) {
882 struct dig_t *pDigTable = &odm->DM_DigTable;
883 pDigTable->CurIGValue = rtw_read8(adapter, 0xc50);
884 }
885 dm->DMFlag |= DYNAMIC_FUNC_BT;
886 odm->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
887 }
888 }
889 break;
890 case HAL_DEF_DBG_DUMP_RXPKT:
891 hal_data->bDumpRxPkt = *((u8 *)value);
892 break;
893 case HAL_DEF_DBG_DUMP_TXPKT:
894 hal_data->bDumpTxPkt = *((u8 *)value);
895 break;
896 case HAL_DEF_ANT_DETECT:
897 hal_data->AntDetection = *((u8 *)value);
898 break;
899 default:
900 netdev_dbg(adapter->pnetdev,
901 "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n",
902 __func__, variable);
903 bResult = _FAIL;
904 break;
905 }
906
907 return bResult;
908}
909
910u8 GetHalDefVar(
911 struct adapter *adapter, enum hal_def_variable variable, void *value
912)
913{
914 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
915 u8 bResult = _SUCCESS;
916
917 switch (variable) {
918 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
919 {
920 struct mlme_priv *pmlmepriv;
921 struct sta_priv *pstapriv;
922 struct sta_info *psta;
923
924 pmlmepriv = &adapter->mlmepriv;
925 pstapriv = &adapter->stapriv;
926 psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
927 if (psta)
928 *((int *)value) = psta->rssi_stat.UndecoratedSmoothedPWDB;
929 }
930 break;
931 case HAL_DEF_DBG_DM_FUNC:
932 *((u32 *)value) = hal_data->odmpriv.SupportAbility;
933 break;
934 case HAL_DEF_DBG_DUMP_RXPKT:
935 *((u8 *)value) = hal_data->bDumpRxPkt;
936 break;
937 case HAL_DEF_DBG_DUMP_TXPKT:
938 *((u8 *)value) = hal_data->bDumpTxPkt;
939 break;
940 case HAL_DEF_ANT_DETECT:
941 *((u8 *)value) = hal_data->AntDetection;
942 break;
943 case HAL_DEF_MACID_SLEEP:
944 *(u8 *)value = false;
945 break;
946 case HAL_DEF_TX_PAGE_SIZE:
947 *((u32 *)value) = PAGE_SIZE_128;
948 break;
949 default:
950 netdev_dbg(adapter->pnetdev,
951 "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n",
952 __func__, variable);
953 bResult = _FAIL;
954 break;
955 }
956
957 return bResult;
958}
959
960void GetHalODMVar(
961 struct adapter *Adapter,
962 enum hal_odm_variable eVariable,
963 void *pValue1,
964 void *pValue2
965)
966{
967 switch (eVariable) {
968 default:
969 break;
970 }
971}
972
973void SetHalODMVar(
974 struct adapter *Adapter,
975 enum hal_odm_variable eVariable,
976 void *pValue1,
977 bool bSet
978)
979{
980 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
981 struct dm_odm_t *podmpriv = &pHalData->odmpriv;
982
983 switch (eVariable) {
984 case HAL_ODM_STA_INFO:
985 {
986 struct sta_info *psta = pValue1;
987 if (bSet) {
988 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
989 } else {
990
991 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
992
993
994 }
995 }
996 break;
997 case HAL_ODM_P2P_STATE:
998 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
999 break;
1000 case HAL_ODM_WIFI_DISPLAY_STATE:
1001 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
1002 break;
1003
1004 default:
1005 break;
1006 }
1007}
1008
1009
1010bool eqNByte(u8 *str1, u8 *str2, u32 num)
1011{
1012 if (num == 0)
1013 return false;
1014 while (num > 0) {
1015 num--;
1016 if (str1[num] != str2[num])
1017 return false;
1018 }
1019 return true;
1020}
1021
1022
1023
1024
1025
1026
1027
1028bool IsHexDigit(char chTmp)
1029{
1030 if (
1031 (chTmp >= '0' && chTmp <= '9') ||
1032 (chTmp >= 'a' && chTmp <= 'f') ||
1033 (chTmp >= 'A' && chTmp <= 'F')
1034 )
1035 return true;
1036 else
1037 return false;
1038}
1039
1040
1041
1042
1043
1044
1045u32 MapCharToHexDigit(char chTmp)
1046{
1047 if (chTmp >= '0' && chTmp <= '9')
1048 return chTmp - '0';
1049 else if (chTmp >= 'a' && chTmp <= 'f')
1050 return 10 + (chTmp - 'a');
1051 else if (chTmp >= 'A' && chTmp <= 'F')
1052 return 10 + (chTmp - 'A');
1053 else
1054 return 0;
1055}
1056
1057
1058
1059
1060
1061bool GetHexValueFromString(char *szStr, u32 *pu4bVal, u32 *pu4bMove)
1062{
1063 char *szScan = szStr;
1064
1065
1066 if (!szStr || !pu4bVal || !pu4bMove)
1067 return false;
1068
1069
1070 *pu4bMove = 0;
1071 *pu4bVal = 0;
1072
1073
1074 while (*szScan != '\0' && (*szScan == ' ' || *szScan == '\t')) {
1075 szScan++;
1076 (*pu4bMove)++;
1077 }
1078
1079
1080 if (*szScan == '0' && (*(szScan+1) == 'x' || *(szScan+1) == 'X')) {
1081 szScan += 2;
1082 (*pu4bMove) += 2;
1083 }
1084
1085
1086
1087 if (!IsHexDigit(*szScan))
1088 return false;
1089
1090
1091 do {
1092 (*pu4bVal) <<= 4;
1093 *pu4bVal += MapCharToHexDigit(*szScan);
1094
1095 szScan++;
1096 (*pu4bMove)++;
1097 } while (IsHexDigit(*szScan));
1098
1099 return true;
1100}
1101
1102bool GetFractionValueFromString(
1103 char *szStr, u8 *pInteger, u8 *pFraction, u32 *pu4bMove
1104)
1105{
1106 char *szScan = szStr;
1107
1108
1109 *pu4bMove = 0;
1110 *pInteger = 0;
1111 *pFraction = 0;
1112
1113
1114 while (*szScan != '\0' && (*szScan == ' ' || *szScan == '\t')) {
1115 ++szScan;
1116 ++(*pu4bMove);
1117 }
1118
1119
1120 do {
1121 (*pInteger) *= 10;
1122 *pInteger += (*szScan - '0');
1123
1124 ++szScan;
1125 ++(*pu4bMove);
1126
1127 if (*szScan == '.') {
1128 ++szScan;
1129 ++(*pu4bMove);
1130
1131 if (*szScan < '0' || *szScan > '9')
1132 return false;
1133 else {
1134 *pFraction = *szScan - '0';
1135 ++szScan;
1136 ++(*pu4bMove);
1137 return true;
1138 }
1139 }
1140 } while (*szScan >= '0' && *szScan <= '9');
1141
1142 return true;
1143}
1144
1145
1146
1147
1148
1149bool IsCommentString(char *szStr)
1150{
1151 if (*szStr == '/' && *(szStr+1) == '/')
1152 return true;
1153 else
1154 return false;
1155}
1156
1157bool GetU1ByteIntegerFromStringInDecimal(char *Str, u8 *pInt)
1158{
1159 u16 i = 0;
1160 *pInt = 0;
1161
1162 while (Str[i] != '\0') {
1163 if (Str[i] >= '0' && Str[i] <= '9') {
1164 *pInt *= 10;
1165 *pInt += (Str[i] - '0');
1166 } else
1167 return false;
1168
1169 ++i;
1170 }
1171
1172 return true;
1173}
1174
1175
1176
1177
1178
1179
1180bool ParseQualifiedString(
1181 char *In, u32 *Start, char *Out, char LeftQualifier, char RightQualifier
1182)
1183{
1184 u32 i = 0, j = 0;
1185 char c = In[(*Start)++];
1186
1187 if (c != LeftQualifier)
1188 return false;
1189
1190 i = (*Start);
1191 while ((c = In[(*Start)++]) != RightQualifier)
1192 ;
1193 j = (*Start) - 2;
1194 strncpy((char *)Out, (const char *)(In+i), j-i+1);
1195
1196 return true;
1197}
1198
1199bool isAllSpaceOrTab(u8 *data, u8 size)
1200{
1201 u8 cnt = 0, NumOfSpaceAndTab = 0;
1202
1203 while (size > cnt) {
1204 if (data[cnt] == ' ' || data[cnt] == '\t' || data[cnt] == '\0')
1205 ++NumOfSpaceAndTab;
1206
1207 ++cnt;
1208 }
1209
1210 return size == NumOfSpaceAndTab;
1211}
1212
1213
1214void rtw_hal_check_rxfifo_full(struct adapter *adapter)
1215{
1216 struct dvobj_priv *psdpriv = adapter->dvobj;
1217 struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
1218 int save_cnt = false;
1219
1220
1221
1222 rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xf0);
1223 save_cnt = true;
1224
1225
1226 if (save_cnt) {
1227
1228 pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow;
1229 pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT);
1230 pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow;
1231 }
1232}
1233
1234void linked_info_dump(struct adapter *padapter, u8 benable)
1235{
1236 struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
1237
1238 if (padapter->bLinkInfoDump == benable)
1239 return;
1240
1241 if (benable) {
1242 pwrctrlpriv->org_power_mgnt = pwrctrlpriv->power_mgnt;
1243 rtw_pm_set_lps(padapter, PS_MODE_ACTIVE);
1244
1245 pwrctrlpriv->ips_org_mode = pwrctrlpriv->ips_mode;
1246 rtw_pm_set_ips(padapter, IPS_NONE);
1247 } else {
1248 rtw_pm_set_ips(padapter, pwrctrlpriv->ips_org_mode);
1249
1250 rtw_pm_set_lps(padapter, pwrctrlpriv->ips_org_mode);
1251 }
1252 padapter->bLinkInfoDump = benable;
1253}
1254
1255#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
1256void rtw_get_raw_rssi_info(void *sel, struct adapter *padapter)
1257{
1258 u8 isCCKrate, rf_path;
1259 struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
1260 struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
1261
1262 netdev_dbg(padapter->pnetdev,
1263 "RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n",
1264 HDATA_RATE(psample_pkt_rssi->data_rate),
1265 psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all);
1266
1267 isCCKrate = psample_pkt_rssi->data_rate <= DESC_RATE11M;
1268
1269 if (isCCKrate)
1270 psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball;
1271
1272 for (rf_path = 0; rf_path < pHalData->NumTotalRFPath; rf_path++) {
1273 netdev_dbg(padapter->pnetdev,
1274 "RF_PATH_%d =>signal_strength:%d(%%), signal_quality:%d(%%)\n",
1275 rf_path,
1276 psample_pkt_rssi->mimo_signal_strength[rf_path],
1277 psample_pkt_rssi->mimo_signal_quality[rf_path]);
1278
1279 if (!isCCKrate) {
1280 netdev_dbg(padapter->pnetdev,
1281 "\trx_ofdm_pwr:%d(dBm), rx_ofdm_snr:%d(dB)\n",
1282 psample_pkt_rssi->ofdm_pwr[rf_path],
1283 psample_pkt_rssi->ofdm_snr[rf_path]);
1284 }
1285 }
1286}
1287
1288void rtw_dump_raw_rssi_info(struct adapter *padapter)
1289{
1290 u8 isCCKrate, rf_path;
1291 struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
1292 struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
1293
1294 isCCKrate = psample_pkt_rssi->data_rate <= DESC_RATE11M;
1295
1296 if (isCCKrate)
1297 psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball;
1298
1299 for (rf_path = 0; rf_path < pHalData->NumTotalRFPath; rf_path++) {
1300 if (!isCCKrate) {
1301 printk(", rx_ofdm_pwr:%d(dBm), rx_ofdm_snr:%d(dB)\n",
1302 psample_pkt_rssi->ofdm_pwr[rf_path], psample_pkt_rssi->ofdm_snr[rf_path]);
1303 } else {
1304 printk("\n");
1305 }
1306 }
1307}
1308
1309void rtw_store_phy_info(struct adapter *padapter, union recv_frame *prframe)
1310{
1311 u8 isCCKrate, rf_path;
1312 struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
1313 struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
1314
1315 struct odm_phy_info *pPhyInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info);
1316 struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
1317
1318 psample_pkt_rssi->data_rate = pattrib->data_rate;
1319 isCCKrate = pattrib->data_rate <= DESC_RATE11M;
1320
1321 psample_pkt_rssi->pwdball = pPhyInfo->rx_pwd_ba11;
1322 psample_pkt_rssi->pwr_all = pPhyInfo->recv_signal_power;
1323
1324 for (rf_path = 0; rf_path < pHalData->NumTotalRFPath; rf_path++) {
1325 psample_pkt_rssi->mimo_signal_strength[rf_path] = pPhyInfo->rx_mimo_signal_strength[rf_path];
1326 psample_pkt_rssi->mimo_signal_quality[rf_path] = pPhyInfo->rx_mimo_signal_quality[rf_path];
1327 if (!isCCKrate) {
1328 psample_pkt_rssi->ofdm_pwr[rf_path] = pPhyInfo->RxPwr[rf_path];
1329 psample_pkt_rssi->ofdm_snr[rf_path] = pPhyInfo->RxSNR[rf_path];
1330 }
1331 }
1332}
1333#endif
1334
1335static u32 Array_kfreemap[] = {
1336 0xf8, 0xe,
1337 0xf6, 0xc,
1338 0xf4, 0xa,
1339 0xf2, 0x8,
1340 0xf0, 0x6,
1341 0xf3, 0x4,
1342 0xf5, 0x2,
1343 0xf7, 0x0,
1344 0xf9, 0x0,
1345 0xfc, 0x0,
1346};
1347
1348void rtw_bb_rf_gain_offset(struct adapter *padapter)
1349{
1350 u8 value = padapter->eeprompriv.EEPROMRFGainOffset;
1351 u32 res, i = 0;
1352 u32 *Array = Array_kfreemap;
1353 u32 v1 = 0, v2 = 0, target = 0;
1354
1355 if (value & BIT4) {
1356 if (padapter->eeprompriv.EEPROMRFGainVal != 0xff) {
1357 res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
1358 res &= 0xfff87fff;
1359
1360 for (i = 0; i < ARRAY_SIZE(Array_kfreemap); i += 2) {
1361 v1 = Array[i];
1362 v2 = Array[i+1];
1363 if (v1 == padapter->eeprompriv.EEPROMRFGainVal) {
1364 target = v2;
1365 break;
1366 }
1367 }
1368 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target);
1369
1370
1371
1372 res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
1373 }
1374 }
1375}
1376