LXR linux/drivers/staging/sm750fb/ddk750

   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef DDK750_DISPLAY_H__
   3#define DDK750_DISPLAY_H__
   4
   5/*
   6 * panel path select
   7 *      80000[29:28]
   8 */
   9
  10#define PNL_2_OFFSET 0
  11#define PNL_2_MASK (3 << PNL_2_OFFSET)
  12#define PNL_2_USAGE     (PNL_2_MASK << 16)
  13#define PNL_2_PRI       ((0 << PNL_2_OFFSET) | PNL_2_USAGE)
  14#define PNL_2_SEC       ((2 << PNL_2_OFFSET) | PNL_2_USAGE)
  15
  16/*
  17 * primary timing & plane enable bit
  18 *      1: 80000[8] & 80000[2] on
  19 *      0: both off
  20 */
  21#define PRI_TP_OFFSET 4
  22#define PRI_TP_MASK BIT(PRI_TP_OFFSET)
  23#define PRI_TP_USAGE (PRI_TP_MASK << 16)
  24#define PRI_TP_ON ((0x1 << PRI_TP_OFFSET) | PRI_TP_USAGE)
  25#define PRI_TP_OFF ((0x0 << PRI_TP_OFFSET) | PRI_TP_USAGE)
  26
  27/*
  28 * panel sequency status
  29 *      80000[27:24]
  30 */
  31#define PNL_SEQ_OFFSET 6
  32#define PNL_SEQ_MASK BIT(PNL_SEQ_OFFSET)
  33#define PNL_SEQ_USAGE (PNL_SEQ_MASK << 16)
  34#define PNL_SEQ_ON (BIT(PNL_SEQ_OFFSET) | PNL_SEQ_USAGE)
  35#define PNL_SEQ_OFF ((0 << PNL_SEQ_OFFSET) | PNL_SEQ_USAGE)
  36
  37/*
  38 * dual digital output
  39 *      80000[19]
  40 */
  41#define DUAL_TFT_OFFSET 8
  42#define DUAL_TFT_MASK BIT(DUAL_TFT_OFFSET)
  43#define DUAL_TFT_USAGE (DUAL_TFT_MASK << 16)
  44#define DUAL_TFT_ON (BIT(DUAL_TFT_OFFSET) | DUAL_TFT_USAGE)
  45#define DUAL_TFT_OFF ((0 << DUAL_TFT_OFFSET) | DUAL_TFT_USAGE)
  46
  47/*
  48 * secondary timing & plane enable bit
  49 *      1:80200[8] & 80200[2] on
  50 *      0: both off
  51 */
  52#define SEC_TP_OFFSET 5
  53#define SEC_TP_MASK BIT(SEC_TP_OFFSET)
  54#define SEC_TP_USAGE (SEC_TP_MASK << 16)
  55#define SEC_TP_ON  ((0x1 << SEC_TP_OFFSET) | SEC_TP_USAGE)
  56#define SEC_TP_OFF ((0x0 << SEC_TP_OFFSET) | SEC_TP_USAGE)
  57
  58/*
  59 * crt path select
  60 *      80200[19:18]
  61 */
  62#define CRT_2_OFFSET 2
  63#define CRT_2_MASK (3 << CRT_2_OFFSET)
  64#define CRT_2_USAGE (CRT_2_MASK << 16)
  65#define CRT_2_PRI ((0x0 << CRT_2_OFFSET) | CRT_2_USAGE)
  66#define CRT_2_SEC ((0x2 << CRT_2_OFFSET) | CRT_2_USAGE)
  67
  68/*
  69 * DAC affect both DVI and DSUB
  70 *      4[20]
  71 */
  72#define DAC_OFFSET 7
  73#define DAC_MASK BIT(DAC_OFFSET)
  74#define DAC_USAGE (DAC_MASK << 16)
  75#define DAC_ON ((0x0 << DAC_OFFSET) | DAC_USAGE)
  76#define DAC_OFF ((0x1 << DAC_OFFSET) | DAC_USAGE)
  77
  78/*
  79 * DPMS only affect D-SUB head
  80 *      0[31:30]
  81 */
  82#define DPMS_OFFSET 9
  83#define DPMS_MASK (3 << DPMS_OFFSET)
  84#define DPMS_USAGE (DPMS_MASK << 16)
  85#define DPMS_OFF ((3 << DPMS_OFFSET) | DPMS_USAGE)
  86#define DPMS_ON ((0 << DPMS_OFFSET) | DPMS_USAGE)
  87
  88/*
  89 * LCD1 means panel path TFT1  & panel path DVI (so enable DAC)
  90 * CRT means crt path DSUB
  91 */
  92enum disp_output {
  93        do_LCD1_PRI = PNL_2_PRI | PRI_TP_ON | PNL_SEQ_ON | DAC_ON,
  94        do_LCD1_SEC = PNL_2_SEC | SEC_TP_ON | PNL_SEQ_ON | DAC_ON,
  95        do_LCD2_PRI = CRT_2_PRI | PRI_TP_ON | DUAL_TFT_ON,
  96        do_LCD2_SEC = CRT_2_SEC | SEC_TP_ON | DUAL_TFT_ON,
  97        /*
  98         * do_DSUB_PRI = CRT_2_PRI | PRI_TP_ON | DPMS_ON|DAC_ON,
  99         * do_DSUB_SEC = CRT_2_SEC | SEC_TP_ON | DPMS_ON|DAC_ON,
 100         */
 101        do_CRT_PRI = CRT_2_PRI | PRI_TP_ON | DPMS_ON | DAC_ON,
 102        do_CRT_SEC = CRT_2_SEC | SEC_TP_ON | DPMS_ON | DAC_ON,
 103};
 104
 105void ddk750_set_logical_disp_out(enum disp_output output);
 106
 107#endif
 108