linux/drivers/usb/gadget/udc/s3c2410_udc.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * linux/drivers/usb/gadget/s3c2410_udc.c
   4 *
   5 * Samsung S3C24xx series on-chip full speed USB device controllers
   6 *
   7 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
   8 *      Additional cleanups by Ben Dooks <ben-linux@fluff.org>
   9 */
  10
  11#define pr_fmt(fmt) "s3c2410_udc: " fmt
  12
  13#include <linux/module.h>
  14#include <linux/kernel.h>
  15#include <linux/delay.h>
  16#include <linux/ioport.h>
  17#include <linux/sched.h>
  18#include <linux/slab.h>
  19#include <linux/errno.h>
  20#include <linux/init.h>
  21#include <linux/timer.h>
  22#include <linux/list.h>
  23#include <linux/interrupt.h>
  24#include <linux/platform_device.h>
  25#include <linux/clk.h>
  26#include <linux/gpio.h>
  27#include <linux/prefetch.h>
  28#include <linux/io.h>
  29
  30#include <linux/debugfs.h>
  31#include <linux/seq_file.h>
  32
  33#include <linux/usb.h>
  34#include <linux/usb/gadget.h>
  35
  36#include <asm/byteorder.h>
  37#include <asm/irq.h>
  38#include <asm/unaligned.h>
  39
  40#include <linux/platform_data/usb-s3c2410_udc.h>
  41
  42#include "s3c2410_udc.h"
  43#include "s3c2410_udc_regs.h"
  44
  45#define DRIVER_DESC     "S3C2410 USB Device Controller Gadget"
  46#define DRIVER_AUTHOR   "Herbert Pötzl <herbert@13thfloor.at>, " \
  47                        "Arnaud Patard <arnaud.patard@rtp-net.org>"
  48
  49static const char               gadget_name[] = "s3c2410_udc";
  50static const char               driver_desc[] = DRIVER_DESC;
  51
  52static struct s3c2410_udc       *the_controller;
  53static struct clk               *udc_clock;
  54static struct clk               *usb_bus_clock;
  55static void __iomem             *base_addr;
  56static int                      irq_usbd;
  57static struct dentry            *s3c2410_udc_debugfs_root;
  58
  59static inline u32 udc_read(u32 reg)
  60{
  61        return readb(base_addr + reg);
  62}
  63
  64static inline void udc_write(u32 value, u32 reg)
  65{
  66        writeb(value, base_addr + reg);
  67}
  68
  69static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
  70{
  71        writeb(value, base + reg);
  72}
  73
  74static struct s3c2410_udc_mach_info *udc_info;
  75
  76/*************************** DEBUG FUNCTION ***************************/
  77#define DEBUG_NORMAL    1
  78#define DEBUG_VERBOSE   2
  79
  80#ifdef CONFIG_USB_S3C2410_DEBUG
  81#define USB_S3C2410_DEBUG_LEVEL 0
  82
  83static uint32_t s3c2410_ticks = 0;
  84
  85__printf(2, 3)
  86static void dprintk(int level, const char *fmt, ...)
  87{
  88        static long prevticks;
  89        static int invocation;
  90        struct va_format vaf;
  91        va_list args;
  92
  93        if (level > USB_S3C2410_DEBUG_LEVEL)
  94                return;
  95
  96        va_start(args, fmt);
  97
  98        vaf.fmt = fmt;
  99        vaf.va = &args;
 100
 101        if (s3c2410_ticks != prevticks) {
 102                prevticks = s3c2410_ticks;
 103                invocation = 0;
 104        }
 105
 106        pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf);
 107
 108        va_end(args);
 109}
 110#else
 111__printf(2, 3)
 112static void dprintk(int level, const char *fmt, ...)
 113{
 114}
 115#endif
 116
 117static int s3c2410_udc_debugfs_show(struct seq_file *m, void *p)
 118{
 119        u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
 120        u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
 121        u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
 122        u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
 123
 124        addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
 125        pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
 126        ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
 127        usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
 128        ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
 129        usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
 130        udc_write(0, S3C2410_UDC_INDEX_REG);
 131        ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
 132        udc_write(1, S3C2410_UDC_INDEX_REG);
 133        ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 134        ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 135        ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 136        ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 137        udc_write(2, S3C2410_UDC_INDEX_REG);
 138        ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 139        ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 140        ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 141        ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 142
 143        seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
 144                 "PWR_REG        : 0x%04X\n"
 145                 "EP_INT_REG     : 0x%04X\n"
 146                 "USB_INT_REG    : 0x%04X\n"
 147                 "EP_INT_EN_REG  : 0x%04X\n"
 148                 "USB_INT_EN_REG : 0x%04X\n"
 149                 "EP0_CSR        : 0x%04X\n"
 150                 "EP1_I_CSR1     : 0x%04X\n"
 151                 "EP1_I_CSR2     : 0x%04X\n"
 152                 "EP1_O_CSR1     : 0x%04X\n"
 153                 "EP1_O_CSR2     : 0x%04X\n"
 154                 "EP2_I_CSR1     : 0x%04X\n"
 155                 "EP2_I_CSR2     : 0x%04X\n"
 156                 "EP2_O_CSR1     : 0x%04X\n"
 157                 "EP2_O_CSR2     : 0x%04X\n",
 158                        addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
 159                        ep_int_en_reg, usb_int_en_reg, ep0_csr,
 160                        ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
 161                        ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
 162                );
 163
 164        return 0;
 165}
 166DEFINE_SHOW_ATTRIBUTE(s3c2410_udc_debugfs);
 167
 168/* io macros */
 169
 170static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
 171{
 172        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 173        udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
 174                        S3C2410_UDC_EP0_CSR_REG);
 175}
 176
 177static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
 178{
 179        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 180        writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
 181}
 182
 183static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
 184{
 185        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 186        udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
 187}
 188
 189static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
 190{
 191        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 192        udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
 193}
 194
 195static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
 196{
 197        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 198        udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
 199}
 200
 201static inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
 202{
 203        udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 204        udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
 205}
 206
 207static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
 208{
 209        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 210
 211        udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 212                                | S3C2410_UDC_EP0_CSR_DE),
 213                        S3C2410_UDC_EP0_CSR_REG);
 214}
 215
 216static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
 217{
 218        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 219        udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
 220                        | S3C2410_UDC_EP0_CSR_DE),
 221                S3C2410_UDC_EP0_CSR_REG);
 222}
 223
 224/*------------------------- I/O ----------------------------------*/
 225
 226/*
 227 *      s3c2410_udc_done
 228 */
 229static void s3c2410_udc_done(struct s3c2410_ep *ep,
 230                struct s3c2410_request *req, int status)
 231{
 232        unsigned halted = ep->halted;
 233
 234        list_del_init(&req->queue);
 235
 236        if (likely(req->req.status == -EINPROGRESS))
 237                req->req.status = status;
 238        else
 239                status = req->req.status;
 240
 241        ep->halted = 1;
 242        usb_gadget_giveback_request(&ep->ep, &req->req);
 243        ep->halted = halted;
 244}
 245
 246static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
 247                struct s3c2410_ep *ep, int status)
 248{
 249        while (!list_empty(&ep->queue)) {
 250                struct s3c2410_request *req;
 251                req = list_entry(ep->queue.next, struct s3c2410_request,
 252                                queue);
 253                s3c2410_udc_done(ep, req, status);
 254        }
 255}
 256
 257static inline int s3c2410_udc_fifo_count_out(void)
 258{
 259        int tmp;
 260
 261        tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
 262        tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
 263        return tmp;
 264}
 265
 266/*
 267 *      s3c2410_udc_write_packet
 268 */
 269static inline int s3c2410_udc_write_packet(int fifo,
 270                struct s3c2410_request *req,
 271                unsigned max)
 272{
 273        unsigned len = min(req->req.length - req->req.actual, max);
 274        u8 *buf = req->req.buf + req->req.actual;
 275
 276        prefetch(buf);
 277
 278        dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
 279                req->req.actual, req->req.length, len, req->req.actual + len);
 280
 281        req->req.actual += len;
 282
 283        udelay(5);
 284        writesb(base_addr + fifo, buf, len);
 285        return len;
 286}
 287
 288/*
 289 *      s3c2410_udc_write_fifo
 290 *
 291 * return:  0 = still running, 1 = completed, negative = errno
 292 */
 293static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
 294                struct s3c2410_request *req)
 295{
 296        unsigned        count;
 297        int             is_last;
 298        u32             idx;
 299        int             fifo_reg;
 300        u32             ep_csr;
 301
 302        idx = ep->bEndpointAddress & 0x7F;
 303        switch (idx) {
 304        default:
 305                idx = 0;
 306                fallthrough;
 307        case 0:
 308                fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 309                break;
 310        case 1:
 311                fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 312                break;
 313        case 2:
 314                fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 315                break;
 316        case 3:
 317                fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 318                break;
 319        case 4:
 320                fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 321                break;
 322        }
 323
 324        count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
 325
 326        /* last packet is often short (sometimes a zlp) */
 327        if (count != ep->ep.maxpacket)
 328                is_last = 1;
 329        else if (req->req.length != req->req.actual || req->req.zero)
 330                is_last = 0;
 331        else
 332                is_last = 2;
 333
 334        /* Only ep0 debug messages are interesting */
 335        if (idx == 0)
 336                dprintk(DEBUG_NORMAL,
 337                        "Written ep%d %d.%d of %d b [last %d,z %d]\n",
 338                        idx, count, req->req.actual, req->req.length,
 339                        is_last, req->req.zero);
 340
 341        if (is_last) {
 342                /* The order is important. It prevents sending 2 packets
 343                 * at the same time */
 344
 345                if (idx == 0) {
 346                        /* Reset signal => no need to say 'data sent' */
 347                        if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 348                                        & S3C2410_UDC_USBINT_RESET))
 349                                s3c2410_udc_set_ep0_de_in(base_addr);
 350                        ep->dev->ep0state = EP0_IDLE;
 351                } else {
 352                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 353                        ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 354                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 355                        udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 356                                        S3C2410_UDC_IN_CSR1_REG);
 357                }
 358
 359                s3c2410_udc_done(ep, req, 0);
 360                is_last = 1;
 361        } else {
 362                if (idx == 0) {
 363                        /* Reset signal => no need to say 'data sent' */
 364                        if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 365                                        & S3C2410_UDC_USBINT_RESET))
 366                                s3c2410_udc_set_ep0_ipr(base_addr);
 367                } else {
 368                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 369                        ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 370                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 371                        udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 372                                        S3C2410_UDC_IN_CSR1_REG);
 373                }
 374        }
 375
 376        return is_last;
 377}
 378
 379static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
 380                struct s3c2410_request *req, unsigned avail)
 381{
 382        unsigned len;
 383
 384        len = min(req->req.length - req->req.actual, avail);
 385        req->req.actual += len;
 386
 387        readsb(fifo + base_addr, buf, len);
 388        return len;
 389}
 390
 391/*
 392 * return:  0 = still running, 1 = queue empty, negative = errno
 393 */
 394static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
 395                                 struct s3c2410_request *req)
 396{
 397        u8              *buf;
 398        u32             ep_csr;
 399        unsigned        bufferspace;
 400        int             is_last = 1;
 401        unsigned        avail;
 402        int             fifo_count = 0;
 403        u32             idx;
 404        int             fifo_reg;
 405
 406        idx = ep->bEndpointAddress & 0x7F;
 407
 408        switch (idx) {
 409        default:
 410                idx = 0;
 411                fallthrough;
 412        case 0:
 413                fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 414                break;
 415        case 1:
 416                fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 417                break;
 418        case 2:
 419                fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 420                break;
 421        case 3:
 422                fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 423                break;
 424        case 4:
 425                fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 426                break;
 427        }
 428
 429        if (!req->req.length)
 430                return 1;
 431
 432        buf = req->req.buf + req->req.actual;
 433        bufferspace = req->req.length - req->req.actual;
 434        if (!bufferspace) {
 435                dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
 436                return -1;
 437        }
 438
 439        udc_write(idx, S3C2410_UDC_INDEX_REG);
 440
 441        fifo_count = s3c2410_udc_fifo_count_out();
 442        dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
 443
 444        if (fifo_count > ep->ep.maxpacket)
 445                avail = ep->ep.maxpacket;
 446        else
 447                avail = fifo_count;
 448
 449        fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
 450
 451        /* checking this with ep0 is not accurate as we already
 452         * read a control request
 453         **/
 454        if (idx != 0 && fifo_count < ep->ep.maxpacket) {
 455                is_last = 1;
 456                /* overflowed this request?  flush extra data */
 457                if (fifo_count != avail)
 458                        req->req.status = -EOVERFLOW;
 459        } else {
 460                is_last = (req->req.length <= req->req.actual) ? 1 : 0;
 461        }
 462
 463        udc_write(idx, S3C2410_UDC_INDEX_REG);
 464        fifo_count = s3c2410_udc_fifo_count_out();
 465
 466        /* Only ep0 debug messages are interesting */
 467        if (idx == 0)
 468                dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
 469                        __func__, fifo_count, is_last);
 470
 471        if (is_last) {
 472                if (idx == 0) {
 473                        s3c2410_udc_set_ep0_de_out(base_addr);
 474                        ep->dev->ep0state = EP0_IDLE;
 475                } else {
 476                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 477                        ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 478                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 479                        udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 480                                        S3C2410_UDC_OUT_CSR1_REG);
 481                }
 482
 483                s3c2410_udc_done(ep, req, 0);
 484        } else {
 485                if (idx == 0) {
 486                        s3c2410_udc_clear_ep0_opr(base_addr);
 487                } else {
 488                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 489                        ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 490                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 491                        udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 492                                        S3C2410_UDC_OUT_CSR1_REG);
 493                }
 494        }
 495
 496        return is_last;
 497}
 498
 499static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
 500{
 501        unsigned char *outbuf = (unsigned char *)crq;
 502        int bytes_read = 0;
 503
 504        udc_write(0, S3C2410_UDC_INDEX_REG);
 505
 506        bytes_read = s3c2410_udc_fifo_count_out();
 507
 508        dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
 509
 510        if (bytes_read > sizeof(struct usb_ctrlrequest))
 511                bytes_read = sizeof(struct usb_ctrlrequest);
 512
 513        readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
 514
 515        dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
 516                bytes_read, crq->bRequest, crq->bRequestType,
 517                crq->wValue, crq->wIndex, crq->wLength);
 518
 519        return bytes_read;
 520}
 521
 522static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
 523                struct usb_ctrlrequest *crq)
 524{
 525        u16 status = 0;
 526        u8 ep_num = crq->wIndex & 0x7F;
 527        u8 is_in = crq->wIndex & USB_DIR_IN;
 528
 529        switch (crq->bRequestType & USB_RECIP_MASK) {
 530        case USB_RECIP_INTERFACE:
 531                break;
 532
 533        case USB_RECIP_DEVICE:
 534                status = dev->devstatus;
 535                break;
 536
 537        case USB_RECIP_ENDPOINT:
 538                if (ep_num > 4 || crq->wLength > 2)
 539                        return 1;
 540
 541                if (ep_num == 0) {
 542                        udc_write(0, S3C2410_UDC_INDEX_REG);
 543                        status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 544                        status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
 545                } else {
 546                        udc_write(ep_num, S3C2410_UDC_INDEX_REG);
 547                        if (is_in) {
 548                                status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 549                                status = status & S3C2410_UDC_ICSR1_SENDSTL;
 550                        } else {
 551                                status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 552                                status = status & S3C2410_UDC_OCSR1_SENDSTL;
 553                        }
 554                }
 555
 556                status = status ? 1 : 0;
 557                break;
 558
 559        default:
 560                return 1;
 561        }
 562
 563        /* Seems to be needed to get it working. ouch :( */
 564        udelay(5);
 565        udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
 566        udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
 567        s3c2410_udc_set_ep0_de_in(base_addr);
 568
 569        return 0;
 570}
 571/*------------------------- usb state machine -------------------------------*/
 572static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
 573
 574static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
 575                                        struct s3c2410_ep *ep,
 576                                        struct usb_ctrlrequest *crq,
 577                                        u32 ep0csr)
 578{
 579        int len, ret, tmp;
 580
 581        /* start control request? */
 582        if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
 583                return;
 584
 585        s3c2410_udc_nuke(dev, ep, -EPROTO);
 586
 587        len = s3c2410_udc_read_fifo_crq(crq);
 588        if (len != sizeof(*crq)) {
 589                dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
 590                        " wanted %d bytes got %d. Stalling out...\n",
 591                        sizeof(*crq), len);
 592                s3c2410_udc_set_ep0_ss(base_addr);
 593                return;
 594        }
 595
 596        dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
 597                crq->bRequest, crq->bRequestType, crq->wLength);
 598
 599        /* cope with automagic for some standard requests. */
 600        dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
 601                == USB_TYPE_STANDARD;
 602        dev->req_config = 0;
 603        dev->req_pending = 1;
 604
 605        switch (crq->bRequest) {
 606        case USB_REQ_SET_CONFIGURATION:
 607                dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
 608
 609                if (crq->bRequestType == USB_RECIP_DEVICE) {
 610                        dev->req_config = 1;
 611                        s3c2410_udc_set_ep0_de_out(base_addr);
 612                }
 613                break;
 614
 615        case USB_REQ_SET_INTERFACE:
 616                dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
 617
 618                if (crq->bRequestType == USB_RECIP_INTERFACE) {
 619                        dev->req_config = 1;
 620                        s3c2410_udc_set_ep0_de_out(base_addr);
 621                }
 622                break;
 623
 624        case USB_REQ_SET_ADDRESS:
 625                dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
 626
 627                if (crq->bRequestType == USB_RECIP_DEVICE) {
 628                        tmp = crq->wValue & 0x7F;
 629                        dev->address = tmp;
 630                        udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
 631                                        S3C2410_UDC_FUNC_ADDR_REG);
 632                        s3c2410_udc_set_ep0_de_out(base_addr);
 633                        return;
 634                }
 635                break;
 636
 637        case USB_REQ_GET_STATUS:
 638                dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
 639                s3c2410_udc_clear_ep0_opr(base_addr);
 640
 641                if (dev->req_std) {
 642                        if (!s3c2410_udc_get_status(dev, crq))
 643                                return;
 644                }
 645                break;
 646
 647        case USB_REQ_CLEAR_FEATURE:
 648                s3c2410_udc_clear_ep0_opr(base_addr);
 649
 650                if (crq->bRequestType != USB_RECIP_ENDPOINT)
 651                        break;
 652
 653                if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 654                        break;
 655
 656                s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
 657                s3c2410_udc_set_ep0_de_out(base_addr);
 658                return;
 659
 660        case USB_REQ_SET_FEATURE:
 661                s3c2410_udc_clear_ep0_opr(base_addr);
 662
 663                if (crq->bRequestType != USB_RECIP_ENDPOINT)
 664                        break;
 665
 666                if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 667                        break;
 668
 669                s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
 670                s3c2410_udc_set_ep0_de_out(base_addr);
 671                return;
 672
 673        default:
 674                s3c2410_udc_clear_ep0_opr(base_addr);
 675                break;
 676        }
 677
 678        if (crq->bRequestType & USB_DIR_IN)
 679                dev->ep0state = EP0_IN_DATA_PHASE;
 680        else
 681                dev->ep0state = EP0_OUT_DATA_PHASE;
 682
 683        if (!dev->driver)
 684                return;
 685
 686        /* deliver the request to the gadget driver */
 687        ret = dev->driver->setup(&dev->gadget, crq);
 688        if (ret < 0) {
 689                if (dev->req_config) {
 690                        dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
 691                                crq->bRequest, ret);
 692                        return;
 693                }
 694
 695                if (ret == -EOPNOTSUPP)
 696                        dprintk(DEBUG_NORMAL, "Operation not supported\n");
 697                else
 698                        dprintk(DEBUG_NORMAL,
 699                                "dev->driver->setup failed. (%d)\n", ret);
 700
 701                udelay(5);
 702                s3c2410_udc_set_ep0_ss(base_addr);
 703                s3c2410_udc_set_ep0_de_out(base_addr);
 704                dev->ep0state = EP0_IDLE;
 705                /* deferred i/o == no response yet */
 706        } else if (dev->req_pending) {
 707                dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
 708                dev->req_pending = 0;
 709        }
 710
 711        dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
 712}
 713
 714static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
 715{
 716        u32                     ep0csr;
 717        struct s3c2410_ep       *ep = &dev->ep[0];
 718        struct s3c2410_request  *req;
 719        struct usb_ctrlrequest  crq;
 720
 721        if (list_empty(&ep->queue))
 722                req = NULL;
 723        else
 724                req = list_entry(ep->queue.next, struct s3c2410_request, queue);
 725
 726        /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
 727         * S3C2410_UDC_EP0_CSR_REG when index is zero */
 728
 729        udc_write(0, S3C2410_UDC_INDEX_REG);
 730        ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 731
 732        dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
 733                ep0csr, ep0states[dev->ep0state]);
 734
 735        /* clear stall status */
 736        if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
 737                s3c2410_udc_nuke(dev, ep, -EPIPE);
 738                dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
 739                s3c2410_udc_clear_ep0_sst(base_addr);
 740                dev->ep0state = EP0_IDLE;
 741                return;
 742        }
 743
 744        /* clear setup end */
 745        if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
 746                dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
 747                s3c2410_udc_nuke(dev, ep, 0);
 748                s3c2410_udc_clear_ep0_se(base_addr);
 749                dev->ep0state = EP0_IDLE;
 750        }
 751
 752        switch (dev->ep0state) {
 753        case EP0_IDLE:
 754                s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
 755                break;
 756
 757        case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
 758                dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
 759                if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
 760                        s3c2410_udc_write_fifo(ep, req);
 761                break;
 762
 763        case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
 764                dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
 765                if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
 766                        s3c2410_udc_read_fifo(ep, req);
 767                break;
 768
 769        case EP0_END_XFER:
 770                dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
 771                dev->ep0state = EP0_IDLE;
 772                break;
 773
 774        case EP0_STALL:
 775                dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
 776                dev->ep0state = EP0_IDLE;
 777                break;
 778        }
 779}
 780
 781/*
 782 *      handle_ep - Manage I/O endpoints
 783 */
 784
 785static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
 786{
 787        struct s3c2410_request  *req;
 788        int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
 789        u32                     ep_csr1;
 790        u32                     idx;
 791
 792        if (likely(!list_empty(&ep->queue)))
 793                req = list_entry(ep->queue.next,
 794                                struct s3c2410_request, queue);
 795        else
 796                req = NULL;
 797
 798        idx = ep->bEndpointAddress & 0x7F;
 799
 800        if (is_in) {
 801                udc_write(idx, S3C2410_UDC_INDEX_REG);
 802                ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
 803                dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
 804                        idx, ep_csr1, req ? 1 : 0);
 805
 806                if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
 807                        dprintk(DEBUG_VERBOSE, "st\n");
 808                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 809                        udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
 810                                        S3C2410_UDC_IN_CSR1_REG);
 811                        return;
 812                }
 813
 814                if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
 815                        s3c2410_udc_write_fifo(ep, req);
 816        } else {
 817                udc_write(idx, S3C2410_UDC_INDEX_REG);
 818                ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 819                dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
 820
 821                if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
 822                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 823                        udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
 824                                        S3C2410_UDC_OUT_CSR1_REG);
 825                        return;
 826                }
 827
 828                if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
 829                        s3c2410_udc_read_fifo(ep, req);
 830        }
 831}
 832
 833/*
 834 *      s3c2410_udc_irq - interrupt handler
 835 */
 836static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
 837{
 838        struct s3c2410_udc *dev = _dev;
 839        int usb_status;
 840        int usbd_status;
 841        int pwr_reg;
 842        int ep0csr;
 843        int i;
 844        u32 idx, idx2;
 845        unsigned long flags;
 846
 847        spin_lock_irqsave(&dev->lock, flags);
 848
 849        /* Driver connected ? */
 850        if (!dev->driver) {
 851                /* Clear interrupts */
 852                udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
 853                                S3C2410_UDC_USB_INT_REG);
 854                udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
 855                                S3C2410_UDC_EP_INT_REG);
 856        }
 857
 858        /* Save index */
 859        idx = udc_read(S3C2410_UDC_INDEX_REG);
 860
 861        /* Read status registers */
 862        usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
 863        usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
 864        pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
 865
 866        udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 867        ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 868
 869        dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
 870                usb_status, usbd_status, pwr_reg, ep0csr);
 871
 872        /*
 873         * Now, handle interrupts. There's two types :
 874         * - Reset, Resume, Suspend coming -> usb_int_reg
 875         * - EP -> ep_int_reg
 876         */
 877
 878        /* RESET */
 879        if (usb_status & S3C2410_UDC_USBINT_RESET) {
 880                /* two kind of reset :
 881                 * - reset start -> pwr reg = 8
 882                 * - reset end   -> pwr reg = 0
 883                 **/
 884                dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
 885                        ep0csr, pwr_reg);
 886
 887                dev->gadget.speed = USB_SPEED_UNKNOWN;
 888                udc_write(0x00, S3C2410_UDC_INDEX_REG);
 889                udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
 890                                S3C2410_UDC_MAXP_REG);
 891                dev->address = 0;
 892
 893                dev->ep0state = EP0_IDLE;
 894                dev->gadget.speed = USB_SPEED_FULL;
 895
 896                /* clear interrupt */
 897                udc_write(S3C2410_UDC_USBINT_RESET,
 898                                S3C2410_UDC_USB_INT_REG);
 899
 900                udc_write(idx, S3C2410_UDC_INDEX_REG);
 901                spin_unlock_irqrestore(&dev->lock, flags);
 902                return IRQ_HANDLED;
 903        }
 904
 905        /* RESUME */
 906        if (usb_status & S3C2410_UDC_USBINT_RESUME) {
 907                dprintk(DEBUG_NORMAL, "USB resume\n");
 908
 909                /* clear interrupt */
 910                udc_write(S3C2410_UDC_USBINT_RESUME,
 911                                S3C2410_UDC_USB_INT_REG);
 912
 913                if (dev->gadget.speed != USB_SPEED_UNKNOWN
 914                                && dev->driver
 915                                && dev->driver->resume)
 916                        dev->driver->resume(&dev->gadget);
 917        }
 918
 919        /* SUSPEND */
 920        if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
 921                dprintk(DEBUG_NORMAL, "USB suspend\n");
 922
 923                /* clear interrupt */
 924                udc_write(S3C2410_UDC_USBINT_SUSPEND,
 925                                S3C2410_UDC_USB_INT_REG);
 926
 927                if (dev->gadget.speed != USB_SPEED_UNKNOWN
 928                                && dev->driver
 929                                && dev->driver->suspend)
 930                        dev->driver->suspend(&dev->gadget);
 931
 932                dev->ep0state = EP0_IDLE;
 933        }
 934
 935        /* EP */
 936        /* control traffic */
 937        /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
 938         * generate an interrupt
 939         */
 940        if (usbd_status & S3C2410_UDC_INT_EP0) {
 941                dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
 942                /* Clear the interrupt bit by setting it to 1 */
 943                udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
 944                s3c2410_udc_handle_ep0(dev);
 945        }
 946
 947        /* endpoint data transfers */
 948        for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 949                u32 tmp = 1 << i;
 950                if (usbd_status & tmp) {
 951                        dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
 952
 953                        /* Clear the interrupt bit by setting it to 1 */
 954                        udc_write(tmp, S3C2410_UDC_EP_INT_REG);
 955                        s3c2410_udc_handle_ep(&dev->ep[i]);
 956                }
 957        }
 958
 959        /* what else causes this interrupt? a receive! who is it? */
 960        if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
 961                for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 962                        idx2 = udc_read(S3C2410_UDC_INDEX_REG);
 963                        udc_write(i, S3C2410_UDC_INDEX_REG);
 964
 965                        if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
 966                                s3c2410_udc_handle_ep(&dev->ep[i]);
 967
 968                        /* restore index */
 969                        udc_write(idx2, S3C2410_UDC_INDEX_REG);
 970                }
 971        }
 972
 973        dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", irq_usbd);
 974
 975        /* Restore old index */
 976        udc_write(idx, S3C2410_UDC_INDEX_REG);
 977
 978        spin_unlock_irqrestore(&dev->lock, flags);
 979
 980        return IRQ_HANDLED;
 981}
 982/*------------------------- s3c2410_ep_ops ----------------------------------*/
 983
 984static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
 985{
 986        return container_of(ep, struct s3c2410_ep, ep);
 987}
 988
 989static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
 990{
 991        return container_of(gadget, struct s3c2410_udc, gadget);
 992}
 993
 994static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
 995{
 996        return container_of(req, struct s3c2410_request, req);
 997}
 998
 999/*
1000 *      s3c2410_udc_ep_enable
1001 */
1002static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1003                                 const struct usb_endpoint_descriptor *desc)
1004{
1005        struct s3c2410_udc      *dev;
1006        struct s3c2410_ep       *ep;
1007        u32                     max, tmp;
1008        unsigned long           flags;
1009        u32                     csr1, csr2;
1010        u32                     int_en_reg;
1011
1012        ep = to_s3c2410_ep(_ep);
1013
1014        if (!_ep || !desc
1015                        || _ep->name == ep0name
1016                        || desc->bDescriptorType != USB_DT_ENDPOINT)
1017                return -EINVAL;
1018
1019        dev = ep->dev;
1020        if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1021                return -ESHUTDOWN;
1022
1023        max = usb_endpoint_maxp(desc);
1024
1025        local_irq_save(flags);
1026        _ep->maxpacket = max;
1027        ep->ep.desc = desc;
1028        ep->halted = 0;
1029        ep->bEndpointAddress = desc->bEndpointAddress;
1030
1031        /* set max packet */
1032        udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1033        udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1034
1035        /* set type, direction, address; reset fifo counters */
1036        if (desc->bEndpointAddress & USB_DIR_IN) {
1037                csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1038                csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1039
1040                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1041                udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1042                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1043                udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1044        } else {
1045                /* don't flush in fifo or it will cause endpoint interrupt */
1046                csr1 = S3C2410_UDC_ICSR1_CLRDT;
1047                csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1048
1049                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1050                udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1051                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1052                udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1053
1054                csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1055                csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1056
1057                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1058                udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1059                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1060                udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1061        }
1062
1063        /* enable irqs */
1064        int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1065        udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1066
1067        /* print some debug message */
1068        tmp = desc->bEndpointAddress;
1069        dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1070                 _ep->name, ep->num, tmp,
1071                 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1072
1073        local_irq_restore(flags);
1074        s3c2410_udc_set_halt(_ep, 0);
1075
1076        return 0;
1077}
1078
1079/*
1080 * s3c2410_udc_ep_disable
1081 */
1082static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1083{
1084        struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1085        unsigned long flags;
1086        u32 int_en_reg;
1087
1088        if (!_ep || !ep->ep.desc) {
1089                dprintk(DEBUG_NORMAL, "%s not enabled\n",
1090                        _ep ? ep->ep.name : NULL);
1091                return -EINVAL;
1092        }
1093
1094        local_irq_save(flags);
1095
1096        dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1097
1098        ep->ep.desc = NULL;
1099        ep->halted = 1;
1100
1101        s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1102
1103        /* disable irqs */
1104        int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1105        udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1106
1107        local_irq_restore(flags);
1108
1109        dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1110
1111        return 0;
1112}
1113
1114/*
1115 * s3c2410_udc_alloc_request
1116 */
1117static struct usb_request *
1118s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1119{
1120        struct s3c2410_request *req;
1121
1122        dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1123
1124        if (!_ep)
1125                return NULL;
1126
1127        req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1128        if (!req)
1129                return NULL;
1130
1131        INIT_LIST_HEAD(&req->queue);
1132        return &req->req;
1133}
1134
1135/*
1136 * s3c2410_udc_free_request
1137 */
1138static void
1139s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1140{
1141        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1142        struct s3c2410_request  *req = to_s3c2410_req(_req);
1143
1144        dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1145
1146        if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1147                return;
1148
1149        WARN_ON(!list_empty(&req->queue));
1150        kfree(req);
1151}
1152
1153/*
1154 *      s3c2410_udc_queue
1155 */
1156static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1157                gfp_t gfp_flags)
1158{
1159        struct s3c2410_request  *req = to_s3c2410_req(_req);
1160        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1161        struct s3c2410_udc      *dev;
1162        u32                     ep_csr = 0;
1163        int                     fifo_count = 0;
1164        unsigned long           flags;
1165
1166        if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1167                dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1168                return -EINVAL;
1169        }
1170
1171        dev = ep->dev;
1172        if (unlikely(!dev->driver
1173                        || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1174                return -ESHUTDOWN;
1175        }
1176
1177        local_irq_save(flags);
1178
1179        if (unlikely(!_req || !_req->complete
1180                        || !_req->buf || !list_empty(&req->queue))) {
1181                if (!_req)
1182                        dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1183                else {
1184                        dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1185                                __func__, !_req->complete, !_req->buf,
1186                                !list_empty(&req->queue));
1187                }
1188
1189                local_irq_restore(flags);
1190                return -EINVAL;
1191        }
1192
1193        _req->status = -EINPROGRESS;
1194        _req->actual = 0;
1195
1196        dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1197                 __func__, ep->bEndpointAddress, _req->length);
1198
1199        if (ep->bEndpointAddress) {
1200                udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1201
1202                ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1203                                ? S3C2410_UDC_IN_CSR1_REG
1204                                : S3C2410_UDC_OUT_CSR1_REG);
1205                fifo_count = s3c2410_udc_fifo_count_out();
1206        } else {
1207                udc_write(0, S3C2410_UDC_INDEX_REG);
1208                ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1209                fifo_count = s3c2410_udc_fifo_count_out();
1210        }
1211
1212        /* kickstart this i/o queue? */
1213        if (list_empty(&ep->queue) && !ep->halted) {
1214                if (ep->bEndpointAddress == 0 /* ep0 */) {
1215                        switch (dev->ep0state) {
1216                        case EP0_IN_DATA_PHASE:
1217                                if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1218                                                && s3c2410_udc_write_fifo(ep,
1219                                                        req)) {
1220                                        dev->ep0state = EP0_IDLE;
1221                                        req = NULL;
1222                                }
1223                                break;
1224
1225                        case EP0_OUT_DATA_PHASE:
1226                                if ((!_req->length)
1227                                        || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1228                                                && s3c2410_udc_read_fifo(ep,
1229                                                        req))) {
1230                                        dev->ep0state = EP0_IDLE;
1231                                        req = NULL;
1232                                }
1233                                break;
1234
1235                        default:
1236                                local_irq_restore(flags);
1237                                return -EL2HLT;
1238                        }
1239                } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1240                                && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1241                                && s3c2410_udc_write_fifo(ep, req)) {
1242                        req = NULL;
1243                } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1244                                && fifo_count
1245                                && s3c2410_udc_read_fifo(ep, req)) {
1246                        req = NULL;
1247                }
1248        }
1249
1250        /* pio or dma irq handler advances the queue. */
1251        if (likely(req))
1252                list_add_tail(&req->queue, &ep->queue);
1253
1254        local_irq_restore(flags);
1255
1256        dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1257        return 0;
1258}
1259
1260/*
1261 *      s3c2410_udc_dequeue
1262 */
1263static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1264{
1265        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1266        int                     retval = -EINVAL;
1267        unsigned long           flags;
1268        struct s3c2410_request  *req = NULL;
1269
1270        dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1271
1272        if (!the_controller->driver)
1273                return -ESHUTDOWN;
1274
1275        if (!_ep || !_req)
1276                return retval;
1277
1278        local_irq_save(flags);
1279
1280        list_for_each_entry(req, &ep->queue, queue) {
1281                if (&req->req == _req) {
1282                        list_del_init(&req->queue);
1283                        _req->status = -ECONNRESET;
1284                        retval = 0;
1285                        break;
1286                }
1287        }
1288
1289        if (retval == 0) {
1290                dprintk(DEBUG_VERBOSE,
1291                        "dequeued req %p from %s, len %d buf %p\n",
1292                        req, _ep->name, _req->length, _req->buf);
1293
1294                s3c2410_udc_done(ep, req, -ECONNRESET);
1295        }
1296
1297        local_irq_restore(flags);
1298        return retval;
1299}
1300
1301/*
1302 * s3c2410_udc_set_halt
1303 */
1304static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1305{
1306        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1307        u32                     ep_csr = 0;
1308        unsigned long           flags;
1309        u32                     idx;
1310
1311        if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1312                dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1313                return -EINVAL;
1314        }
1315
1316        local_irq_save(flags);
1317
1318        idx = ep->bEndpointAddress & 0x7F;
1319
1320        if (idx == 0) {
1321                s3c2410_udc_set_ep0_ss(base_addr);
1322                s3c2410_udc_set_ep0_de_out(base_addr);
1323        } else {
1324                udc_write(idx, S3C2410_UDC_INDEX_REG);
1325                ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1326                                ? S3C2410_UDC_IN_CSR1_REG
1327                                : S3C2410_UDC_OUT_CSR1_REG);
1328
1329                if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1330                        if (value)
1331                                udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1332                                        S3C2410_UDC_IN_CSR1_REG);
1333                        else {
1334                                ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1335                                udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1336                                ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1337                                udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1338                        }
1339                } else {
1340                        if (value)
1341                                udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1342                                        S3C2410_UDC_OUT_CSR1_REG);
1343                        else {
1344                                ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1345                                udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1346                                ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1347                                udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1348                        }
1349                }
1350        }
1351
1352        ep->halted = value ? 1 : 0;
1353        local_irq_restore(flags);
1354
1355        return 0;
1356}
1357
1358static const struct usb_ep_ops s3c2410_ep_ops = {
1359        .enable         = s3c2410_udc_ep_enable,
1360        .disable        = s3c2410_udc_ep_disable,
1361
1362        .alloc_request  = s3c2410_udc_alloc_request,
1363        .free_request   = s3c2410_udc_free_request,
1364
1365        .queue          = s3c2410_udc_queue,
1366        .dequeue        = s3c2410_udc_dequeue,
1367
1368        .set_halt       = s3c2410_udc_set_halt,
1369};
1370
1371/*------------------------- usb_gadget_ops ----------------------------------*/
1372
1373/*
1374 *      s3c2410_udc_get_frame
1375 */
1376static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1377{
1378        int tmp;
1379
1380        dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1381
1382        tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1383        tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1384        return tmp;
1385}
1386
1387/*
1388 *      s3c2410_udc_wakeup
1389 */
1390static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1391{
1392        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1393        return 0;
1394}
1395
1396/*
1397 *      s3c2410_udc_set_selfpowered
1398 */
1399static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1400{
1401        struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1402
1403        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1404
1405        gadget->is_selfpowered = (value != 0);
1406        if (value)
1407                udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1408        else
1409                udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1410
1411        return 0;
1412}
1413
1414static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1415static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1416
1417static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1418{
1419        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1420
1421        if (udc_info && (udc_info->udc_command ||
1422                gpio_is_valid(udc_info->pullup_pin))) {
1423
1424                if (is_on)
1425                        s3c2410_udc_enable(udc);
1426                else {
1427                        if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1428                                if (udc->driver && udc->driver->disconnect)
1429                                        udc->driver->disconnect(&udc->gadget);
1430
1431                        }
1432                        s3c2410_udc_disable(udc);
1433                }
1434        } else {
1435                return -EOPNOTSUPP;
1436        }
1437
1438        return 0;
1439}
1440
1441static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1442{
1443        struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1444
1445        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1446
1447        udc->vbus = (is_active != 0);
1448        s3c2410_udc_set_pullup(udc, is_active);
1449        return 0;
1450}
1451
1452static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1453{
1454        struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1455
1456        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1457
1458        s3c2410_udc_set_pullup(udc, is_on);
1459        return 0;
1460}
1461
1462static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1463{
1464        struct s3c2410_udc      *dev = _dev;
1465        unsigned int            value;
1466
1467        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1468
1469        value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1470        if (udc_info->vbus_pin_inverted)
1471                value = !value;
1472
1473        if (value != dev->vbus)
1474                s3c2410_udc_vbus_session(&dev->gadget, value);
1475
1476        return IRQ_HANDLED;
1477}
1478
1479static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1480{
1481        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1482
1483        if (udc_info && udc_info->vbus_draw) {
1484                udc_info->vbus_draw(ma);
1485                return 0;
1486        }
1487
1488        return -ENOTSUPP;
1489}
1490
1491static int s3c2410_udc_start(struct usb_gadget *g,
1492                struct usb_gadget_driver *driver);
1493static int s3c2410_udc_stop(struct usb_gadget *g);
1494
1495static const struct usb_gadget_ops s3c2410_ops = {
1496        .get_frame              = s3c2410_udc_get_frame,
1497        .wakeup                 = s3c2410_udc_wakeup,
1498        .set_selfpowered        = s3c2410_udc_set_selfpowered,
1499        .pullup                 = s3c2410_udc_pullup,
1500        .vbus_session           = s3c2410_udc_vbus_session,
1501        .vbus_draw              = s3c2410_vbus_draw,
1502        .udc_start              = s3c2410_udc_start,
1503        .udc_stop               = s3c2410_udc_stop,
1504};
1505
1506static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1507{
1508        if (!udc_info)
1509                return;
1510
1511        if (udc_info->udc_command) {
1512                udc_info->udc_command(cmd);
1513        } else if (gpio_is_valid(udc_info->pullup_pin)) {
1514                int value;
1515
1516                switch (cmd) {
1517                case S3C2410_UDC_P_ENABLE:
1518                        value = 1;
1519                        break;
1520                case S3C2410_UDC_P_DISABLE:
1521                        value = 0;
1522                        break;
1523                default:
1524                        return;
1525                }
1526                value ^= udc_info->pullup_pin_inverted;
1527
1528                gpio_set_value(udc_info->pullup_pin, value);
1529        }
1530}
1531
1532/*------------------------- gadget driver handling---------------------------*/
1533/*
1534 * s3c2410_udc_disable
1535 */
1536static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1537{
1538        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1539
1540        /* Disable all interrupts */
1541        udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1542        udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1543
1544        /* Clear the interrupt registers */
1545        udc_write(S3C2410_UDC_USBINT_RESET
1546                                | S3C2410_UDC_USBINT_RESUME
1547                                | S3C2410_UDC_USBINT_SUSPEND,
1548                        S3C2410_UDC_USB_INT_REG);
1549
1550        udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1551
1552        /* Good bye, cruel world */
1553        s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1554
1555        /* Set speed to unknown */
1556        dev->gadget.speed = USB_SPEED_UNKNOWN;
1557}
1558
1559/*
1560 * s3c2410_udc_reinit
1561 */
1562static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1563{
1564        u32 i;
1565
1566        /* device/ep0 records init */
1567        INIT_LIST_HEAD(&dev->gadget.ep_list);
1568        INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1569        dev->ep0state = EP0_IDLE;
1570
1571        for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1572                struct s3c2410_ep *ep = &dev->ep[i];
1573
1574                if (i != 0)
1575                        list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1576
1577                ep->dev = dev;
1578                ep->ep.desc = NULL;
1579                ep->halted = 0;
1580                INIT_LIST_HEAD(&ep->queue);
1581                usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1582        }
1583}
1584
1585/*
1586 * s3c2410_udc_enable
1587 */
1588static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1589{
1590        int i;
1591
1592        dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1593
1594        /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1595        dev->gadget.speed = USB_SPEED_FULL;
1596
1597        /* Set MAXP for all endpoints */
1598        for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1599                udc_write(i, S3C2410_UDC_INDEX_REG);
1600                udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1601                                S3C2410_UDC_MAXP_REG);
1602        }
1603
1604        /* Set default power state */
1605        udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1606
1607        /* Enable reset and suspend interrupt interrupts */
1608        udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1609                        S3C2410_UDC_USB_INT_EN_REG);
1610
1611        /* Enable ep0 interrupt */
1612        udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1613
1614        /* time to say "hello, world" */
1615        s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1616}
1617
1618static int s3c2410_udc_start(struct usb_gadget *g,
1619                struct usb_gadget_driver *driver)
1620{
1621        struct s3c2410_udc *udc = to_s3c2410(g);
1622
1623        dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1624
1625        /* Hook the driver */
1626        udc->driver = driver;
1627
1628        /* Enable udc */
1629        s3c2410_udc_enable(udc);
1630
1631        return 0;
1632}
1633
1634static int s3c2410_udc_stop(struct usb_gadget *g)
1635{
1636        struct s3c2410_udc *udc = to_s3c2410(g);
1637
1638        udc->driver = NULL;
1639
1640        /* Disable udc */
1641        s3c2410_udc_disable(udc);
1642
1643        return 0;
1644}
1645
1646/*---------------------------------------------------------------------------*/
1647static struct s3c2410_udc memory = {
1648        .gadget = {
1649                .ops            = &s3c2410_ops,
1650                .ep0            = &memory.ep[0].ep,
1651                .name           = gadget_name,
1652                .dev = {
1653                        .init_name      = "gadget",
1654                },
1655        },
1656
1657        /* control endpoint */
1658        .ep[0] = {
1659                .num            = 0,
1660                .ep = {
1661                        .name           = ep0name,
1662                        .ops            = &s3c2410_ep_ops,
1663                        .maxpacket      = EP0_FIFO_SIZE,
1664                        .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1665                                                USB_EP_CAPS_DIR_ALL),
1666                },
1667                .dev            = &memory,
1668        },
1669
1670        /* first group of endpoints */
1671        .ep[1] = {
1672                .num            = 1,
1673                .ep = {
1674                        .name           = "ep1-bulk",
1675                        .ops            = &s3c2410_ep_ops,
1676                        .maxpacket      = EP_FIFO_SIZE,
1677                        .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1678                                                USB_EP_CAPS_DIR_ALL),
1679                },
1680                .dev            = &memory,
1681                .fifo_size      = EP_FIFO_SIZE,
1682                .bEndpointAddress = 1,
1683                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1684        },
1685        .ep[2] = {
1686                .num            = 2,
1687                .ep = {
1688                        .name           = "ep2-bulk",
1689                        .ops            = &s3c2410_ep_ops,
1690                        .maxpacket      = EP_FIFO_SIZE,
1691                        .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1692                                                USB_EP_CAPS_DIR_ALL),
1693                },
1694                .dev            = &memory,
1695                .fifo_size      = EP_FIFO_SIZE,
1696                .bEndpointAddress = 2,
1697                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1698        },
1699        .ep[3] = {
1700                .num            = 3,
1701                .ep = {
1702                        .name           = "ep3-bulk",
1703                        .ops            = &s3c2410_ep_ops,
1704                        .maxpacket      = EP_FIFO_SIZE,
1705                        .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1706                                                USB_EP_CAPS_DIR_ALL),
1707                },
1708                .dev            = &memory,
1709                .fifo_size      = EP_FIFO_SIZE,
1710                .bEndpointAddress = 3,
1711                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1712        },
1713        .ep[4] = {
1714                .num            = 4,
1715                .ep = {
1716                        .name           = "ep4-bulk",
1717                        .ops            = &s3c2410_ep_ops,
1718                        .maxpacket      = EP_FIFO_SIZE,
1719                        .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1720                                                USB_EP_CAPS_DIR_ALL),
1721                },
1722                .dev            = &memory,
1723                .fifo_size      = EP_FIFO_SIZE,
1724                .bEndpointAddress = 4,
1725                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1726        }
1727
1728};
1729
1730/*
1731 *      probe - binds to the platform device
1732 */
1733static int s3c2410_udc_probe(struct platform_device *pdev)
1734{
1735        struct s3c2410_udc *udc = &memory;
1736        struct device *dev = &pdev->dev;
1737        int retval;
1738        int irq;
1739
1740        dev_dbg(dev, "%s()\n", __func__);
1741
1742        usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1743        if (IS_ERR(usb_bus_clock)) {
1744                dev_err(dev, "failed to get usb bus clock source\n");
1745                return PTR_ERR(usb_bus_clock);
1746        }
1747
1748        clk_prepare_enable(usb_bus_clock);
1749
1750        udc_clock = clk_get(NULL, "usb-device");
1751        if (IS_ERR(udc_clock)) {
1752                dev_err(dev, "failed to get udc clock source\n");
1753                retval = PTR_ERR(udc_clock);
1754                goto err_usb_bus_clk;
1755        }
1756
1757        clk_prepare_enable(udc_clock);
1758
1759        mdelay(10);
1760
1761        dev_dbg(dev, "got and enabled clocks\n");
1762
1763        if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1764                dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1765                memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1766                memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1767                memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1768                memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1769        }
1770
1771        spin_lock_init(&udc->lock);
1772        udc_info = dev_get_platdata(&pdev->dev);
1773
1774        base_addr = devm_platform_ioremap_resource(pdev, 0);
1775        if (IS_ERR(base_addr)) {
1776                retval = PTR_ERR(base_addr);
1777                goto err_udc_clk;
1778        }
1779
1780        the_controller = udc;
1781        platform_set_drvdata(pdev, udc);
1782
1783        s3c2410_udc_disable(udc);
1784        s3c2410_udc_reinit(udc);
1785
1786        irq_usbd = platform_get_irq(pdev, 0);
1787
1788        /* irq setup after old hardware state is cleaned up */
1789        retval = request_irq(irq_usbd, s3c2410_udc_irq,
1790                             0, gadget_name, udc);
1791
1792        if (retval != 0) {
1793                dev_err(dev, "cannot get irq %i, err %d\n", irq_usbd, retval);
1794                retval = -EBUSY;
1795                goto err_udc_clk;
1796        }
1797
1798        dev_dbg(dev, "got irq %i\n", irq_usbd);
1799
1800        if (udc_info && udc_info->vbus_pin > 0) {
1801                retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1802                if (retval < 0) {
1803                        dev_err(dev, "cannot claim vbus pin\n");
1804                        goto err_int;
1805                }
1806
1807                irq = gpio_to_irq(udc_info->vbus_pin);
1808                if (irq < 0) {
1809                        dev_err(dev, "no irq for gpio vbus pin\n");
1810                        retval = irq;
1811                        goto err_gpio_claim;
1812                }
1813
1814                retval = request_irq(irq, s3c2410_udc_vbus_irq,
1815                                     IRQF_TRIGGER_RISING
1816                                     | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1817                                     gadget_name, udc);
1818
1819                if (retval != 0) {
1820                        dev_err(dev, "can't get vbus irq %d, err %d\n",
1821                                irq, retval);
1822                        retval = -EBUSY;
1823                        goto err_gpio_claim;
1824                }
1825
1826                dev_dbg(dev, "got irq %i\n", irq);
1827        } else {
1828                udc->vbus = 1;
1829        }
1830
1831        if (udc_info && !udc_info->udc_command &&
1832                gpio_is_valid(udc_info->pullup_pin)) {
1833
1834                retval = gpio_request_one(udc_info->pullup_pin,
1835                                udc_info->vbus_pin_inverted ?
1836                                GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1837                                "udc pullup");
1838                if (retval)
1839                        goto err_vbus_irq;
1840        }
1841
1842        retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1843        if (retval)
1844                goto err_add_udc;
1845
1846        debugfs_create_file("registers", S_IRUGO, s3c2410_udc_debugfs_root, udc,
1847                            &s3c2410_udc_debugfs_fops);
1848
1849        dev_dbg(dev, "probe ok\n");
1850
1851        return 0;
1852
1853err_add_udc:
1854        if (udc_info && !udc_info->udc_command &&
1855                        gpio_is_valid(udc_info->pullup_pin))
1856                gpio_free(udc_info->pullup_pin);
1857err_vbus_irq:
1858        if (udc_info && udc_info->vbus_pin > 0)
1859                free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1860err_gpio_claim:
1861        if (udc_info && udc_info->vbus_pin > 0)
1862                gpio_free(udc_info->vbus_pin);
1863err_int:
1864        free_irq(irq_usbd, udc);
1865err_udc_clk:
1866        clk_disable_unprepare(udc_clock);
1867        clk_put(udc_clock);
1868        udc_clock = NULL;
1869err_usb_bus_clk:
1870        clk_disable_unprepare(usb_bus_clock);
1871        clk_put(usb_bus_clock);
1872        usb_bus_clock = NULL;
1873
1874        return retval;
1875}
1876
1877/*
1878 *      s3c2410_udc_remove
1879 */
1880static int s3c2410_udc_remove(struct platform_device *pdev)
1881{
1882        struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1883        unsigned int irq;
1884
1885        dev_dbg(&pdev->dev, "%s()\n", __func__);
1886
1887        if (udc->driver)
1888                return -EBUSY;
1889
1890        usb_del_gadget_udc(&udc->gadget);
1891        debugfs_remove(debugfs_lookup("registers", s3c2410_udc_debugfs_root));
1892
1893        if (udc_info && !udc_info->udc_command &&
1894                gpio_is_valid(udc_info->pullup_pin))
1895                gpio_free(udc_info->pullup_pin);
1896
1897        if (udc_info && udc_info->vbus_pin > 0) {
1898                irq = gpio_to_irq(udc_info->vbus_pin);
1899                free_irq(irq, udc);
1900        }
1901
1902        free_irq(irq_usbd, udc);
1903
1904        if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1905                clk_disable_unprepare(udc_clock);
1906                clk_put(udc_clock);
1907                udc_clock = NULL;
1908        }
1909
1910        if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1911                clk_disable_unprepare(usb_bus_clock);
1912                clk_put(usb_bus_clock);
1913                usb_bus_clock = NULL;
1914        }
1915
1916        dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1917        return 0;
1918}
1919
1920#ifdef CONFIG_PM
1921static int
1922s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1923{
1924        s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1925
1926        return 0;
1927}
1928
1929static int s3c2410_udc_resume(struct platform_device *pdev)
1930{
1931        s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1932
1933        return 0;
1934}
1935#else
1936#define s3c2410_udc_suspend     NULL
1937#define s3c2410_udc_resume      NULL
1938#endif
1939
1940static const struct platform_device_id s3c_udc_ids[] = {
1941        { "s3c2410-usbgadget", },
1942        { "s3c2440-usbgadget", },
1943        { }
1944};
1945MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1946
1947static struct platform_driver udc_driver_24x0 = {
1948        .driver         = {
1949                .name   = "s3c24x0-usbgadget",
1950        },
1951        .probe          = s3c2410_udc_probe,
1952        .remove         = s3c2410_udc_remove,
1953        .suspend        = s3c2410_udc_suspend,
1954        .resume         = s3c2410_udc_resume,
1955        .id_table       = s3c_udc_ids,
1956};
1957
1958static int __init udc_init(void)
1959{
1960        int retval;
1961
1962        dprintk(DEBUG_NORMAL, "%s\n", gadget_name);
1963
1964        s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name,
1965                                                      usb_debug_root);
1966
1967        retval = platform_driver_register(&udc_driver_24x0);
1968        if (retval)
1969                goto err;
1970
1971        return 0;
1972
1973err:
1974        debugfs_remove(s3c2410_udc_debugfs_root);
1975        return retval;
1976}
1977
1978static void __exit udc_exit(void)
1979{
1980        platform_driver_unregister(&udc_driver_24x0);
1981        debugfs_remove_recursive(s3c2410_udc_debugfs_root);
1982}
1983
1984module_init(udc_init);
1985module_exit(udc_exit);
1986
1987MODULE_AUTHOR(DRIVER_AUTHOR);
1988MODULE_DESCRIPTION(DRIVER_DESC);
1989MODULE_LICENSE("GPL");
1990