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19#include <linux/init.h>
20#include <linux/delay.h>
21#include <linux/pci.h>
22#include <linux/slab.h>
23#include <linux/module.h>
24#include <linux/pm_runtime.h>
25#include <sound/core.h>
26#include <sound/jack.h>
27#include <sound/asoundef.h>
28#include <sound/tlv.h>
29#include <sound/hdaudio.h>
30#include <sound/hda_i915.h>
31#include <sound/hda_chmap.h>
32#include <sound/hda_codec.h>
33#include "hda_local.h"
34#include "hda_jack.h"
35#include "hda_controller.h"
36
37static bool static_hdmi_pcm;
38module_param(static_hdmi_pcm, bool, 0644);
39MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
40
41static bool enable_acomp = true;
42module_param(enable_acomp, bool, 0444);
43MODULE_PARM_DESC(enable_acomp, "Enable audio component binding (default=yes)");
44
45static bool enable_silent_stream =
46IS_ENABLED(CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM);
47module_param(enable_silent_stream, bool, 0644);
48MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
49
50struct hdmi_spec_per_cvt {
51 hda_nid_t cvt_nid;
52 int assigned;
53 unsigned int channels_min;
54 unsigned int channels_max;
55 u32 rates;
56 u64 formats;
57 unsigned int maxbps;
58};
59
60
61#define HDA_MAX_CONNECTIONS 32
62
63struct hdmi_spec_per_pin {
64 hda_nid_t pin_nid;
65 int dev_id;
66
67 int pin_nid_idx;
68 int num_mux_nids;
69 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
70 int mux_idx;
71 hda_nid_t cvt_nid;
72
73 struct hda_codec *codec;
74 struct hdmi_eld sink_eld;
75 struct mutex lock;
76 struct delayed_work work;
77 struct hdmi_pcm *pcm;
78 int pcm_idx;
79 int repoll_count;
80 bool setup;
81 bool silent_stream;
82 int channels;
83 bool non_pcm;
84 bool chmap_set;
85 unsigned char chmap[8];
86#ifdef CONFIG_SND_PROC_FS
87 struct snd_info_entry *proc_entry;
88#endif
89};
90
91
92struct hdmi_ops {
93 int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
94 int dev_id, unsigned char *buf, int *eld_size);
95
96 void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
97 int dev_id,
98 int ca, int active_channels, int conn_type);
99
100
101 int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
102 int dev_id, bool hbr);
103
104 int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
105 hda_nid_t pin_nid, int dev_id, u32 stream_tag,
106 int format);
107
108 void (*pin_cvt_fixup)(struct hda_codec *codec,
109 struct hdmi_spec_per_pin *per_pin,
110 hda_nid_t cvt_nid);
111};
112
113struct hdmi_pcm {
114 struct hda_pcm *pcm;
115 struct snd_jack *jack;
116 struct snd_kcontrol *eld_ctl;
117};
118
119struct hdmi_spec {
120 struct hda_codec *codec;
121 int num_cvts;
122 struct snd_array cvts;
123 hda_nid_t cvt_nids[4];
124
125
126
127
128
129
130 int num_pins;
131
132
133
134
135 int num_nids;
136
137
138
139
140
141 int dev_num;
142 struct snd_array pins;
143 struct hdmi_pcm pcm_rec[16];
144 struct mutex pcm_lock;
145 struct mutex bind_lock;
146
147 unsigned long pcm_bitmap;
148 int pcm_used;
149
150
151
152
153 unsigned long pcm_in_use;
154
155 struct hdmi_eld temp_eld;
156 struct hdmi_ops ops;
157
158 bool dyn_pin_out;
159 bool dyn_pcm_assign;
160 bool dyn_pcm_no_legacy;
161 bool intel_hsw_fixup;
162
163
164
165 struct hda_multi_out multiout;
166 struct hda_pcm_stream pcm_playback;
167
168 bool use_acomp_notifier;
169 bool acomp_registered;
170 bool force_connect;
171 struct drm_audio_component_audio_ops drm_audio_ops;
172 int (*port2pin)(struct hda_codec *, int);
173
174 struct hdac_chmap chmap;
175 hda_nid_t vendor_nid;
176 const int *port_map;
177 int port_num;
178 bool send_silent_stream;
179};
180
181#ifdef CONFIG_SND_HDA_COMPONENT
182static inline bool codec_has_acomp(struct hda_codec *codec)
183{
184 struct hdmi_spec *spec = codec->spec;
185 return spec->use_acomp_notifier;
186}
187#else
188#define codec_has_acomp(codec) false
189#endif
190
191struct hdmi_audio_infoframe {
192 u8 type;
193 u8 ver;
194 u8 len;
195
196 u8 checksum;
197
198 u8 CC02_CT47;
199 u8 SS01_SF24;
200 u8 CXT04;
201 u8 CA;
202 u8 LFEPBL01_LSV36_DM_INH7;
203};
204
205struct dp_audio_infoframe {
206 u8 type;
207 u8 len;
208 u8 ver;
209
210 u8 CC02_CT47;
211 u8 SS01_SF24;
212 u8 CXT04;
213 u8 CA;
214 u8 LFEPBL01_LSV36_DM_INH7;
215};
216
217union audio_infoframe {
218 struct hdmi_audio_infoframe hdmi;
219 struct dp_audio_infoframe dp;
220 u8 bytes[0];
221};
222
223
224
225
226
227#define get_pin(spec, idx) \
228 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
229#define get_cvt(spec, idx) \
230 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
231
232#define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
233
234#define get_pcm_rec(spec, idx) (get_hdmi_pcm(spec, idx)->pcm)
235
236static int pin_id_to_pin_index(struct hda_codec *codec,
237 hda_nid_t pin_nid, int dev_id)
238{
239 struct hdmi_spec *spec = codec->spec;
240 int pin_idx;
241 struct hdmi_spec_per_pin *per_pin;
242
243
244
245
246
247 if (dev_id == -1)
248 dev_id = 0;
249
250 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
251 per_pin = get_pin(spec, pin_idx);
252 if ((per_pin->pin_nid == pin_nid) &&
253 (per_pin->dev_id == dev_id))
254 return pin_idx;
255 }
256
257 codec_warn(codec, "HDMI: pin NID 0x%x not registered\n", pin_nid);
258 return -EINVAL;
259}
260
261static int hinfo_to_pcm_index(struct hda_codec *codec,
262 struct hda_pcm_stream *hinfo)
263{
264 struct hdmi_spec *spec = codec->spec;
265 int pcm_idx;
266
267 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
268 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
269 return pcm_idx;
270
271 codec_warn(codec, "HDMI: hinfo %p not tied to a PCM\n", hinfo);
272 return -EINVAL;
273}
274
275static int hinfo_to_pin_index(struct hda_codec *codec,
276 struct hda_pcm_stream *hinfo)
277{
278 struct hdmi_spec *spec = codec->spec;
279 struct hdmi_spec_per_pin *per_pin;
280 int pin_idx;
281
282 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
283 per_pin = get_pin(spec, pin_idx);
284 if (per_pin->pcm &&
285 per_pin->pcm->pcm->stream == hinfo)
286 return pin_idx;
287 }
288
289 codec_dbg(codec, "HDMI: hinfo %p (pcm %d) not registered\n", hinfo,
290 hinfo_to_pcm_index(codec, hinfo));
291 return -EINVAL;
292}
293
294static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
295 int pcm_idx)
296{
297 int i;
298 struct hdmi_spec_per_pin *per_pin;
299
300 for (i = 0; i < spec->num_pins; i++) {
301 per_pin = get_pin(spec, i);
302 if (per_pin->pcm_idx == pcm_idx)
303 return per_pin;
304 }
305 return NULL;
306}
307
308static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
309{
310 struct hdmi_spec *spec = codec->spec;
311 int cvt_idx;
312
313 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
314 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
315 return cvt_idx;
316
317 codec_warn(codec, "HDMI: cvt NID 0x%x not registered\n", cvt_nid);
318 return -EINVAL;
319}
320
321static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
322 struct snd_ctl_elem_info *uinfo)
323{
324 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
325 struct hdmi_spec *spec = codec->spec;
326 struct hdmi_spec_per_pin *per_pin;
327 struct hdmi_eld *eld;
328 int pcm_idx;
329
330 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
331
332 pcm_idx = kcontrol->private_value;
333 mutex_lock(&spec->pcm_lock);
334 per_pin = pcm_idx_to_pin(spec, pcm_idx);
335 if (!per_pin) {
336
337 uinfo->count = 0;
338 goto unlock;
339 }
340 eld = &per_pin->sink_eld;
341 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
342
343 unlock:
344 mutex_unlock(&spec->pcm_lock);
345 return 0;
346}
347
348static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
349 struct snd_ctl_elem_value *ucontrol)
350{
351 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
352 struct hdmi_spec *spec = codec->spec;
353 struct hdmi_spec_per_pin *per_pin;
354 struct hdmi_eld *eld;
355 int pcm_idx;
356 int err = 0;
357
358 pcm_idx = kcontrol->private_value;
359 mutex_lock(&spec->pcm_lock);
360 per_pin = pcm_idx_to_pin(spec, pcm_idx);
361 if (!per_pin) {
362
363 memset(ucontrol->value.bytes.data, 0,
364 ARRAY_SIZE(ucontrol->value.bytes.data));
365 goto unlock;
366 }
367
368 eld = &per_pin->sink_eld;
369 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
370 eld->eld_size > ELD_MAX_SIZE) {
371 snd_BUG();
372 err = -EINVAL;
373 goto unlock;
374 }
375
376 memset(ucontrol->value.bytes.data, 0,
377 ARRAY_SIZE(ucontrol->value.bytes.data));
378 if (eld->eld_valid)
379 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
380 eld->eld_size);
381
382 unlock:
383 mutex_unlock(&spec->pcm_lock);
384 return err;
385}
386
387static const struct snd_kcontrol_new eld_bytes_ctl = {
388 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE |
389 SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK,
390 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
391 .name = "ELD",
392 .info = hdmi_eld_ctl_info,
393 .get = hdmi_eld_ctl_get,
394};
395
396static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
397 int device)
398{
399 struct snd_kcontrol *kctl;
400 struct hdmi_spec *spec = codec->spec;
401 int err;
402
403 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
404 if (!kctl)
405 return -ENOMEM;
406 kctl->private_value = pcm_idx;
407 kctl->id.device = device;
408
409
410
411
412 err = snd_hda_ctl_add(codec, 0, kctl);
413 if (err < 0)
414 return err;
415
416 get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
417 return 0;
418}
419
420#ifdef BE_PARANOID
421static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
422 int *packet_index, int *byte_index)
423{
424 int val;
425
426 val = snd_hda_codec_read(codec, pin_nid, 0,
427 AC_VERB_GET_HDMI_DIP_INDEX, 0);
428
429 *packet_index = val >> 5;
430 *byte_index = val & 0x1f;
431}
432#endif
433
434static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
435 int packet_index, int byte_index)
436{
437 int val;
438
439 val = (packet_index << 5) | (byte_index & 0x1f);
440
441 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
442}
443
444static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
445 unsigned char val)
446{
447 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
448}
449
450static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
451{
452 struct hdmi_spec *spec = codec->spec;
453 int pin_out;
454
455
456 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
457 snd_hda_codec_write(codec, pin_nid, 0,
458 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
459
460 if (spec->dyn_pin_out)
461
462 pin_out = 0;
463 else
464
465
466
467 pin_out = PIN_OUT;
468
469 snd_hda_codec_write(codec, pin_nid, 0,
470 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
471}
472
473
474
475
476
477#ifdef CONFIG_SND_PROC_FS
478static void print_eld_info(struct snd_info_entry *entry,
479 struct snd_info_buffer *buffer)
480{
481 struct hdmi_spec_per_pin *per_pin = entry->private_data;
482
483 mutex_lock(&per_pin->lock);
484 snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
485 mutex_unlock(&per_pin->lock);
486}
487
488static void write_eld_info(struct snd_info_entry *entry,
489 struct snd_info_buffer *buffer)
490{
491 struct hdmi_spec_per_pin *per_pin = entry->private_data;
492
493 mutex_lock(&per_pin->lock);
494 snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
495 mutex_unlock(&per_pin->lock);
496}
497
498static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
499{
500 char name[32];
501 struct hda_codec *codec = per_pin->codec;
502 struct snd_info_entry *entry;
503 int err;
504
505 snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
506 err = snd_card_proc_new(codec->card, name, &entry);
507 if (err < 0)
508 return err;
509
510 snd_info_set_text_ops(entry, per_pin, print_eld_info);
511 entry->c.text.write = write_eld_info;
512 entry->mode |= 0200;
513 per_pin->proc_entry = entry;
514
515 return 0;
516}
517
518static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
519{
520 if (!per_pin->codec->bus->shutdown) {
521 snd_info_free_entry(per_pin->proc_entry);
522 per_pin->proc_entry = NULL;
523 }
524}
525#else
526static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
527 int index)
528{
529 return 0;
530}
531static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
532{
533}
534#endif
535
536
537
538
539
540
541
542
543static void hdmi_start_infoframe_trans(struct hda_codec *codec,
544 hda_nid_t pin_nid)
545{
546 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
547 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
548 AC_DIPXMIT_BEST);
549}
550
551
552
553
554static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
555 hda_nid_t pin_nid)
556{
557 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
558 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
559 AC_DIPXMIT_DISABLE);
560}
561
562static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
563{
564#ifdef CONFIG_SND_DEBUG_VERBOSE
565 int i;
566 int size;
567
568 size = snd_hdmi_get_eld_size(codec, pin_nid);
569 codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
570
571 for (i = 0; i < 8; i++) {
572 size = snd_hda_codec_read(codec, pin_nid, 0,
573 AC_VERB_GET_HDMI_DIP_SIZE, i);
574 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
575 }
576#endif
577}
578
579static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
580{
581#ifdef BE_PARANOID
582 int i, j;
583 int size;
584 int pi, bi;
585 for (i = 0; i < 8; i++) {
586 size = snd_hda_codec_read(codec, pin_nid, 0,
587 AC_VERB_GET_HDMI_DIP_SIZE, i);
588 if (size == 0)
589 continue;
590
591 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
592 for (j = 1; j < 1000; j++) {
593 hdmi_write_dip_byte(codec, pin_nid, 0x0);
594 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
595 if (pi != i)
596 codec_dbg(codec, "dip index %d: %d != %d\n",
597 bi, pi, i);
598 if (bi == 0)
599 break;
600 }
601 codec_dbg(codec,
602 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
603 i, size, j);
604 }
605#endif
606}
607
608static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
609{
610 u8 *bytes = (u8 *)hdmi_ai;
611 u8 sum = 0;
612 int i;
613
614 hdmi_ai->checksum = 0;
615
616 for (i = 0; i < sizeof(*hdmi_ai); i++)
617 sum += bytes[i];
618
619 hdmi_ai->checksum = -sum;
620}
621
622static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
623 hda_nid_t pin_nid,
624 u8 *dip, int size)
625{
626 int i;
627
628 hdmi_debug_dip_size(codec, pin_nid);
629 hdmi_clear_dip_buffers(codec, pin_nid);
630
631 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
632 for (i = 0; i < size; i++)
633 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
634}
635
636static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
637 u8 *dip, int size)
638{
639 u8 val;
640 int i;
641
642 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
643 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
644 != AC_DIPXMIT_BEST)
645 return false;
646
647 for (i = 0; i < size; i++) {
648 val = snd_hda_codec_read(codec, pin_nid, 0,
649 AC_VERB_GET_HDMI_DIP_DATA, 0);
650 if (val != dip[i])
651 return false;
652 }
653
654 return true;
655}
656
657static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
658 int dev_id, unsigned char *buf, int *eld_size)
659{
660 snd_hda_set_dev_select(codec, nid, dev_id);
661
662 return snd_hdmi_get_eld(codec, nid, buf, eld_size);
663}
664
665static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
666 hda_nid_t pin_nid, int dev_id,
667 int ca, int active_channels,
668 int conn_type)
669{
670 union audio_infoframe ai;
671
672 memset(&ai, 0, sizeof(ai));
673 if (conn_type == 0) {
674 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
675
676 hdmi_ai->type = 0x84;
677 hdmi_ai->ver = 0x01;
678 hdmi_ai->len = 0x0a;
679 hdmi_ai->CC02_CT47 = active_channels - 1;
680 hdmi_ai->CA = ca;
681 hdmi_checksum_audio_infoframe(hdmi_ai);
682 } else if (conn_type == 1) {
683 struct dp_audio_infoframe *dp_ai = &ai.dp;
684
685 dp_ai->type = 0x84;
686 dp_ai->len = 0x1b;
687 dp_ai->ver = 0x11 << 2;
688 dp_ai->CC02_CT47 = active_channels - 1;
689 dp_ai->CA = ca;
690 } else {
691 codec_dbg(codec, "HDMI: unknown connection type at pin NID 0x%x\n", pin_nid);
692 return;
693 }
694
695 snd_hda_set_dev_select(codec, pin_nid, dev_id);
696
697
698
699
700
701
702 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
703 sizeof(ai))) {
704 codec_dbg(codec, "%s: pin NID=0x%x channels=%d ca=0x%02x\n",
705 __func__, pin_nid, active_channels, ca);
706 hdmi_stop_infoframe_trans(codec, pin_nid);
707 hdmi_fill_audio_infoframe(codec, pin_nid,
708 ai.bytes, sizeof(ai));
709 hdmi_start_infoframe_trans(codec, pin_nid);
710 }
711}
712
713static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
714 struct hdmi_spec_per_pin *per_pin,
715 bool non_pcm)
716{
717 struct hdmi_spec *spec = codec->spec;
718 struct hdac_chmap *chmap = &spec->chmap;
719 hda_nid_t pin_nid = per_pin->pin_nid;
720 int dev_id = per_pin->dev_id;
721 int channels = per_pin->channels;
722 int active_channels;
723 struct hdmi_eld *eld;
724 int ca;
725
726 if (!channels)
727 return;
728
729 snd_hda_set_dev_select(codec, pin_nid, dev_id);
730
731
732 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
733 snd_hda_codec_write(codec, pin_nid, 0,
734 AC_VERB_SET_AMP_GAIN_MUTE,
735 AMP_OUT_UNMUTE);
736
737 eld = &per_pin->sink_eld;
738
739 ca = snd_hdac_channel_allocation(&codec->core,
740 eld->info.spk_alloc, channels,
741 per_pin->chmap_set, non_pcm, per_pin->chmap);
742
743 active_channels = snd_hdac_get_active_channels(ca);
744
745 chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
746 active_channels);
747
748
749
750
751
752 snd_hdac_setup_channel_mapping(&spec->chmap,
753 pin_nid, non_pcm, ca, channels,
754 per_pin->chmap, per_pin->chmap_set);
755
756 spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
757 ca, active_channels, eld->info.conn_type);
758
759 per_pin->non_pcm = non_pcm;
760}
761
762
763
764
765
766static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
767
768static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
769 int dev_id)
770{
771 struct hdmi_spec *spec = codec->spec;
772 int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
773
774 if (pin_idx < 0)
775 return;
776 mutex_lock(&spec->pcm_lock);
777 hdmi_present_sense(get_pin(spec, pin_idx), 1);
778 mutex_unlock(&spec->pcm_lock);
779}
780
781static void jack_callback(struct hda_codec *codec,
782 struct hda_jack_callback *jack)
783{
784
785 if (codec_has_acomp(codec))
786 return;
787
788 check_presence_and_report(codec, jack->nid, jack->dev_id);
789}
790
791static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res,
792 struct hda_jack_tbl *jack)
793{
794 jack->jack_dirty = 1;
795
796 codec_dbg(codec,
797 "HDMI hot plug event: Codec=%d NID=0x%x Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
798 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
799 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
800
801 check_presence_and_report(codec, jack->nid, jack->dev_id);
802}
803
804static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
805{
806 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
807 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
808 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
809 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
810
811 codec_info(codec,
812 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
813 codec->addr,
814 tag,
815 subtag,
816 cp_state,
817 cp_ready);
818
819
820 if (cp_state) {
821 ;
822 }
823 if (cp_ready) {
824 ;
825 }
826}
827
828
829static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
830{
831 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
832 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
833 struct hda_jack_tbl *jack;
834
835 if (codec_has_acomp(codec))
836 return;
837
838 if (codec->dp_mst) {
839 int dev_entry =
840 (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
841
842 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
843 } else {
844 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
845 }
846
847 if (!jack) {
848 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
849 return;
850 }
851
852 if (subtag == 0)
853 hdmi_intrinsic_event(codec, res, jack);
854 else
855 hdmi_non_intrinsic_event(codec, res);
856}
857
858static void haswell_verify_D0(struct hda_codec *codec,
859 hda_nid_t cvt_nid, hda_nid_t nid)
860{
861 int pwr;
862
863
864
865
866 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
867 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
868
869 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
870 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
871 AC_PWRST_D0);
872 msleep(40);
873 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
874 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
875 codec_dbg(codec, "Haswell HDMI audio: Power for NID 0x%x is now D%d\n", nid, pwr);
876 }
877}
878
879
880
881
882
883
884#define is_hbr_format(format) \
885 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
886
887static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
888 int dev_id, bool hbr)
889{
890 int pinctl, new_pinctl;
891
892 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
893 snd_hda_set_dev_select(codec, pin_nid, dev_id);
894 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
895 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
896
897 if (pinctl < 0)
898 return hbr ? -EINVAL : 0;
899
900 new_pinctl = pinctl & ~AC_PINCTL_EPT;
901 if (hbr)
902 new_pinctl |= AC_PINCTL_EPT_HBR;
903 else
904 new_pinctl |= AC_PINCTL_EPT_NATIVE;
905
906 codec_dbg(codec,
907 "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
908 pin_nid,
909 pinctl == new_pinctl ? "" : "new-",
910 new_pinctl);
911
912 if (pinctl != new_pinctl)
913 snd_hda_codec_write(codec, pin_nid, 0,
914 AC_VERB_SET_PIN_WIDGET_CONTROL,
915 new_pinctl);
916 } else if (hbr)
917 return -EINVAL;
918
919 return 0;
920}
921
922static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
923 hda_nid_t pin_nid, int dev_id,
924 u32 stream_tag, int format)
925{
926 struct hdmi_spec *spec = codec->spec;
927 unsigned int param;
928 int err;
929
930 err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
931 is_hbr_format(format));
932
933 if (err) {
934 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
935 return err;
936 }
937
938 if (spec->intel_hsw_fixup) {
939
940
941
942
943
944
945 param = snd_hda_codec_read(codec, cvt_nid, 0,
946 AC_VERB_GET_DIGI_CONVERT_1, 0);
947
948 param = (param >> 16) & ~(AC_DIG3_ICT);
949
950
951 if (is_hbr_format(format))
952 param |= 0x1;
953
954 snd_hda_codec_write(codec, cvt_nid, 0,
955 AC_VERB_SET_DIGI_CONVERT_3, param);
956 }
957
958 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
959 return 0;
960}
961
962
963
964
965
966
967static int hdmi_choose_cvt(struct hda_codec *codec,
968 int pin_idx, int *cvt_id)
969{
970 struct hdmi_spec *spec = codec->spec;
971 struct hdmi_spec_per_pin *per_pin;
972 struct hdmi_spec_per_cvt *per_cvt = NULL;
973 int cvt_idx, mux_idx = 0;
974
975
976 if (pin_idx < 0)
977 per_pin = NULL;
978 else
979 per_pin = get_pin(spec, pin_idx);
980
981 if (per_pin && per_pin->silent_stream) {
982 cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
983 if (cvt_id)
984 *cvt_id = cvt_idx;
985 return 0;
986 }
987
988
989 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
990 per_cvt = get_cvt(spec, cvt_idx);
991
992
993 if (per_cvt->assigned)
994 continue;
995 if (per_pin == NULL)
996 break;
997
998 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
999 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1000 break;
1001
1002 if (mux_idx == per_pin->num_mux_nids)
1003 continue;
1004 break;
1005 }
1006
1007
1008 if (cvt_idx == spec->num_cvts)
1009 return -EBUSY;
1010
1011 if (per_pin != NULL)
1012 per_pin->mux_idx = mux_idx;
1013
1014 if (cvt_id)
1015 *cvt_id = cvt_idx;
1016
1017 return 0;
1018}
1019
1020
1021static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1022 struct hdmi_spec_per_pin *per_pin)
1023{
1024 hda_nid_t pin_nid = per_pin->pin_nid;
1025 int mux_idx, curr;
1026
1027 mux_idx = per_pin->mux_idx;
1028 curr = snd_hda_codec_read(codec, pin_nid, 0,
1029 AC_VERB_GET_CONNECT_SEL, 0);
1030 if (curr != mux_idx)
1031 snd_hda_codec_write_cache(codec, pin_nid, 0,
1032 AC_VERB_SET_CONNECT_SEL,
1033 mux_idx);
1034}
1035
1036
1037
1038
1039static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1040 hda_nid_t cvt_nid)
1041{
1042 int i;
1043
1044 for (i = 0; i < spec->num_cvts; i++)
1045 if (spec->cvt_nids[i] == cvt_nid)
1046 return i;
1047 return -EINVAL;
1048}
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1060 hda_nid_t pin_nid,
1061 int dev_id, int mux_idx)
1062{
1063 struct hdmi_spec *spec = codec->spec;
1064 hda_nid_t nid;
1065 int cvt_idx, curr;
1066 struct hdmi_spec_per_cvt *per_cvt;
1067 struct hdmi_spec_per_pin *per_pin;
1068 int pin_idx;
1069
1070
1071 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1072 int dev_id_saved;
1073 int dev_num;
1074
1075 per_pin = get_pin(spec, pin_idx);
1076
1077
1078
1079
1080 if (!per_pin->pcm)
1081 continue;
1082
1083 if ((per_pin->pin_nid == pin_nid) &&
1084 (per_pin->dev_id == dev_id))
1085 continue;
1086
1087
1088
1089
1090
1091
1092
1093 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1094 if (per_pin->dev_id >= dev_num)
1095 continue;
1096
1097 nid = per_pin->pin_nid;
1098
1099
1100
1101
1102
1103
1104
1105 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1106 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1107 curr = snd_hda_codec_read(codec, nid, 0,
1108 AC_VERB_GET_CONNECT_SEL, 0);
1109 if (curr != mux_idx) {
1110 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1111 continue;
1112 }
1113
1114
1115
1116
1117
1118 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1119 per_cvt = get_cvt(spec, cvt_idx);
1120 if (!per_cvt->assigned) {
1121 codec_dbg(codec,
1122 "choose cvt %d for pin NID 0x%x\n",
1123 cvt_idx, nid);
1124 snd_hda_codec_write_cache(codec, nid, 0,
1125 AC_VERB_SET_CONNECT_SEL,
1126 cvt_idx);
1127 break;
1128 }
1129 }
1130 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1131 }
1132}
1133
1134
1135static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1136 hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1137{
1138 int mux_idx;
1139 struct hdmi_spec *spec = codec->spec;
1140
1141
1142
1143
1144
1145
1146 mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1147 if (mux_idx >= 0)
1148 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1149}
1150
1151
1152static void pin_cvt_fixup(struct hda_codec *codec,
1153 struct hdmi_spec_per_pin *per_pin,
1154 hda_nid_t cvt_nid)
1155{
1156 struct hdmi_spec *spec = codec->spec;
1157
1158 if (spec->ops.pin_cvt_fixup)
1159 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1160}
1161
1162
1163
1164
1165static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1166 struct hda_codec *codec,
1167 struct snd_pcm_substream *substream)
1168{
1169 struct hdmi_spec *spec = codec->spec;
1170 struct snd_pcm_runtime *runtime = substream->runtime;
1171 int cvt_idx, pcm_idx;
1172 struct hdmi_spec_per_cvt *per_cvt = NULL;
1173 int err;
1174
1175 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1176 if (pcm_idx < 0)
1177 return -EINVAL;
1178
1179 err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1180 if (err)
1181 return err;
1182
1183 per_cvt = get_cvt(spec, cvt_idx);
1184 per_cvt->assigned = 1;
1185 hinfo->nid = per_cvt->cvt_nid;
1186
1187 pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1188
1189 set_bit(pcm_idx, &spec->pcm_in_use);
1190
1191
1192
1193 hinfo->channels_min = per_cvt->channels_min;
1194 hinfo->channels_max = per_cvt->channels_max;
1195 hinfo->rates = per_cvt->rates;
1196 hinfo->formats = per_cvt->formats;
1197 hinfo->maxbps = per_cvt->maxbps;
1198
1199
1200 runtime->hw.channels_min = hinfo->channels_min;
1201 runtime->hw.channels_max = hinfo->channels_max;
1202 runtime->hw.formats = hinfo->formats;
1203 runtime->hw.rates = hinfo->rates;
1204
1205 snd_pcm_hw_constraint_step(substream->runtime, 0,
1206 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1207 return 0;
1208}
1209
1210
1211
1212
1213static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1214 struct hda_codec *codec,
1215 struct snd_pcm_substream *substream)
1216{
1217 struct hdmi_spec *spec = codec->spec;
1218 struct snd_pcm_runtime *runtime = substream->runtime;
1219 int pin_idx, cvt_idx, pcm_idx;
1220 struct hdmi_spec_per_pin *per_pin;
1221 struct hdmi_eld *eld;
1222 struct hdmi_spec_per_cvt *per_cvt = NULL;
1223 int err;
1224
1225
1226 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1227 if (pcm_idx < 0)
1228 return -EINVAL;
1229
1230 mutex_lock(&spec->pcm_lock);
1231 pin_idx = hinfo_to_pin_index(codec, hinfo);
1232 if (!spec->dyn_pcm_assign) {
1233 if (snd_BUG_ON(pin_idx < 0)) {
1234 err = -EINVAL;
1235 goto unlock;
1236 }
1237 } else {
1238
1239
1240
1241 if (pin_idx < 0) {
1242 err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1243 goto unlock;
1244 }
1245 }
1246
1247 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1248 if (err < 0)
1249 goto unlock;
1250
1251 per_cvt = get_cvt(spec, cvt_idx);
1252
1253 per_cvt->assigned = 1;
1254
1255 set_bit(pcm_idx, &spec->pcm_in_use);
1256 per_pin = get_pin(spec, pin_idx);
1257 per_pin->cvt_nid = per_cvt->cvt_nid;
1258 hinfo->nid = per_cvt->cvt_nid;
1259
1260
1261 if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1262 azx_stream(get_azx_dev(substream))->stripe = 1;
1263
1264 snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1265 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1266 AC_VERB_SET_CONNECT_SEL,
1267 per_pin->mux_idx);
1268
1269
1270 pin_cvt_fixup(codec, per_pin, 0);
1271
1272 snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1273
1274
1275 hinfo->channels_min = per_cvt->channels_min;
1276 hinfo->channels_max = per_cvt->channels_max;
1277 hinfo->rates = per_cvt->rates;
1278 hinfo->formats = per_cvt->formats;
1279 hinfo->maxbps = per_cvt->maxbps;
1280
1281 eld = &per_pin->sink_eld;
1282
1283 if (!static_hdmi_pcm && eld->eld_valid) {
1284 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1285 if (hinfo->channels_min > hinfo->channels_max ||
1286 !hinfo->rates || !hinfo->formats) {
1287 per_cvt->assigned = 0;
1288 hinfo->nid = 0;
1289 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1290 err = -ENODEV;
1291 goto unlock;
1292 }
1293 }
1294
1295
1296 runtime->hw.channels_min = hinfo->channels_min;
1297 runtime->hw.channels_max = hinfo->channels_max;
1298 runtime->hw.formats = hinfo->formats;
1299 runtime->hw.rates = hinfo->rates;
1300
1301 snd_pcm_hw_constraint_step(substream->runtime, 0,
1302 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1303 unlock:
1304 mutex_unlock(&spec->pcm_lock);
1305 return err;
1306}
1307
1308
1309
1310
1311static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1312{
1313 struct hdmi_spec *spec = codec->spec;
1314 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1315 hda_nid_t pin_nid = per_pin->pin_nid;
1316 int dev_id = per_pin->dev_id;
1317 int conns;
1318
1319 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1320 codec_warn(codec,
1321 "HDMI: pin NID 0x%x wcaps %#x does not support connection list\n",
1322 pin_nid, get_wcaps(codec, pin_nid));
1323 return -EINVAL;
1324 }
1325
1326 snd_hda_set_dev_select(codec, pin_nid, dev_id);
1327
1328 if (spec->intel_hsw_fixup) {
1329 conns = spec->num_cvts;
1330 memcpy(per_pin->mux_nids, spec->cvt_nids,
1331 sizeof(hda_nid_t) * conns);
1332 } else {
1333 conns = snd_hda_get_raw_connections(codec, pin_nid,
1334 per_pin->mux_nids,
1335 HDA_MAX_CONNECTIONS);
1336 }
1337
1338
1339 per_pin->num_mux_nids = conns;
1340
1341 return 0;
1342}
1343
1344static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1345 struct hdmi_spec_per_pin *per_pin)
1346{
1347 int i;
1348
1349
1350
1351
1352 if (spec->dyn_pcm_no_legacy)
1353 goto last_try;
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369 if (per_pin->dev_id == 0 || spec->intel_hsw_fixup) {
1370 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1371 return per_pin->pin_nid_idx;
1372 } else {
1373 i = spec->num_nids + (per_pin->dev_id - 1);
1374 if (i < spec->pcm_used && !(test_bit(i, &spec->pcm_bitmap)))
1375 return i;
1376 }
1377
1378
1379 for (i = spec->num_nids; i < spec->pcm_used; i++) {
1380 if (!test_bit(i, &spec->pcm_bitmap))
1381 return i;
1382 }
1383
1384 last_try:
1385
1386 for (i = 0; i < spec->num_nids; i++) {
1387 if (!test_bit(i, &spec->pcm_bitmap))
1388 return i;
1389 }
1390 return -EBUSY;
1391}
1392
1393static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1394 struct hdmi_spec_per_pin *per_pin)
1395{
1396 int idx;
1397
1398
1399 if (per_pin->pcm)
1400 return;
1401 idx = hdmi_find_pcm_slot(spec, per_pin);
1402 if (idx == -EBUSY)
1403 return;
1404 per_pin->pcm_idx = idx;
1405 per_pin->pcm = get_hdmi_pcm(spec, idx);
1406 set_bit(idx, &spec->pcm_bitmap);
1407}
1408
1409static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1410 struct hdmi_spec_per_pin *per_pin)
1411{
1412 int idx;
1413
1414
1415 if (!per_pin->pcm)
1416 return;
1417 idx = per_pin->pcm_idx;
1418 per_pin->pcm_idx = -1;
1419 per_pin->pcm = NULL;
1420 if (idx >= 0 && idx < spec->pcm_used)
1421 clear_bit(idx, &spec->pcm_bitmap);
1422}
1423
1424static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1425 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1426{
1427 int mux_idx;
1428
1429 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1430 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1431 break;
1432 return mux_idx;
1433}
1434
1435static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1436
1437static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1438 struct hdmi_spec_per_pin *per_pin)
1439{
1440 struct hda_codec *codec = per_pin->codec;
1441 struct hda_pcm *pcm;
1442 struct hda_pcm_stream *hinfo;
1443 struct snd_pcm_substream *substream;
1444 int mux_idx;
1445 bool non_pcm;
1446
1447 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1448 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1449 else
1450 return;
1451 if (!pcm->pcm)
1452 return;
1453 if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1454 return;
1455
1456
1457 hinfo = pcm->stream;
1458 substream = pcm->pcm->streams[0].substream;
1459
1460 per_pin->cvt_nid = hinfo->nid;
1461
1462 mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1463 if (mux_idx < per_pin->num_mux_nids) {
1464 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1465 per_pin->dev_id);
1466 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1467 AC_VERB_SET_CONNECT_SEL,
1468 mux_idx);
1469 }
1470 snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1471
1472 non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1473 if (substream->runtime)
1474 per_pin->channels = substream->runtime->channels;
1475 per_pin->setup = true;
1476 per_pin->mux_idx = mux_idx;
1477
1478 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1479}
1480
1481static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1482 struct hdmi_spec_per_pin *per_pin)
1483{
1484 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1485 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1486
1487 per_pin->chmap_set = false;
1488 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1489
1490 per_pin->setup = false;
1491 per_pin->channels = 0;
1492}
1493
1494static struct snd_jack *pin_idx_to_pcm_jack(struct hda_codec *codec,
1495 struct hdmi_spec_per_pin *per_pin)
1496{
1497 struct hdmi_spec *spec = codec->spec;
1498
1499 if (per_pin->pcm_idx >= 0)
1500 return spec->pcm_rec[per_pin->pcm_idx].jack;
1501 else
1502 return NULL;
1503}
1504
1505
1506
1507
1508
1509static void update_eld(struct hda_codec *codec,
1510 struct hdmi_spec_per_pin *per_pin,
1511 struct hdmi_eld *eld,
1512 int repoll)
1513{
1514 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1515 struct hdmi_spec *spec = codec->spec;
1516 struct snd_jack *pcm_jack;
1517 bool old_eld_valid = pin_eld->eld_valid;
1518 bool eld_changed;
1519 int pcm_idx;
1520
1521 if (eld->eld_valid) {
1522 if (eld->eld_size <= 0 ||
1523 snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1524 eld->eld_size) < 0) {
1525 eld->eld_valid = false;
1526 if (repoll) {
1527 schedule_delayed_work(&per_pin->work,
1528 msecs_to_jiffies(300));
1529 return;
1530 }
1531 }
1532 }
1533
1534 if (!eld->eld_valid || eld->eld_size <= 0) {
1535 eld->eld_valid = false;
1536 eld->eld_size = 0;
1537 }
1538
1539
1540 pcm_idx = per_pin->pcm_idx;
1541
1542
1543
1544
1545
1546 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1547
1548 if (spec->dyn_pcm_assign) {
1549 if (eld->eld_valid) {
1550 hdmi_attach_hda_pcm(spec, per_pin);
1551 hdmi_pcm_setup_pin(spec, per_pin);
1552 } else {
1553 hdmi_pcm_reset_pin(spec, per_pin);
1554 hdmi_detach_hda_pcm(spec, per_pin);
1555 }
1556 }
1557
1558
1559
1560 if (pcm_idx == -1)
1561 pcm_idx = per_pin->pcm_idx;
1562 if (!pcm_jack)
1563 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1564
1565 if (eld->eld_valid)
1566 snd_hdmi_show_eld(codec, &eld->info);
1567
1568 eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1569 eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1570 if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1571 if (pin_eld->eld_size != eld->eld_size ||
1572 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1573 eld->eld_size) != 0)
1574 eld_changed = true;
1575
1576 if (eld_changed) {
1577 pin_eld->monitor_present = eld->monitor_present;
1578 pin_eld->eld_valid = eld->eld_valid;
1579 pin_eld->eld_size = eld->eld_size;
1580 if (eld->eld_valid)
1581 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1582 eld->eld_size);
1583 pin_eld->info = eld->info;
1584 }
1585
1586
1587
1588
1589
1590
1591
1592 if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1593 pin_cvt_fixup(codec, per_pin, 0);
1594 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1595 }
1596
1597 if (eld_changed && pcm_idx >= 0)
1598 snd_ctl_notify(codec->card,
1599 SNDRV_CTL_EVENT_MASK_VALUE |
1600 SNDRV_CTL_EVENT_MASK_INFO,
1601 &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1602
1603 if (eld_changed && pcm_jack)
1604 snd_jack_report(pcm_jack,
1605 (eld->monitor_present && eld->eld_valid) ?
1606 SND_JACK_AVOUT : 0);
1607}
1608
1609
1610static void hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1611 int repoll)
1612{
1613 struct hda_codec *codec = per_pin->codec;
1614 struct hdmi_spec *spec = codec->spec;
1615 struct hdmi_eld *eld = &spec->temp_eld;
1616 hda_nid_t pin_nid = per_pin->pin_nid;
1617 int dev_id = per_pin->dev_id;
1618
1619
1620
1621
1622
1623
1624
1625
1626 int present;
1627 int ret;
1628
1629 ret = snd_hda_power_up_pm(codec);
1630 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec)))
1631 goto out;
1632
1633 present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1634
1635 mutex_lock(&per_pin->lock);
1636 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1637 if (eld->monitor_present)
1638 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1639 else
1640 eld->eld_valid = false;
1641
1642 codec_dbg(codec,
1643 "HDMI status: Codec=%d NID=0x%x Presence_Detect=%d ELD_Valid=%d\n",
1644 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1645
1646 if (eld->eld_valid) {
1647 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1648 eld->eld_buffer, &eld->eld_size) < 0)
1649 eld->eld_valid = false;
1650 }
1651
1652 update_eld(codec, per_pin, eld, repoll);
1653 mutex_unlock(&per_pin->lock);
1654 out:
1655 snd_hda_power_down_pm(codec);
1656}
1657
1658#define I915_SILENT_RATE 48000
1659#define I915_SILENT_CHANNELS 2
1660#define I915_SILENT_FORMAT SNDRV_PCM_FORMAT_S16_LE
1661#define I915_SILENT_FORMAT_BITS 16
1662#define I915_SILENT_FMT_MASK 0xf
1663
1664static void silent_stream_enable(struct hda_codec *codec,
1665 struct hdmi_spec_per_pin *per_pin)
1666{
1667 struct hdmi_spec *spec = codec->spec;
1668 struct hdmi_spec_per_cvt *per_cvt;
1669 int cvt_idx, pin_idx, err;
1670 unsigned int format;
1671
1672 mutex_lock(&per_pin->lock);
1673
1674 if (per_pin->setup) {
1675 codec_dbg(codec, "hdmi: PCM already open, no silent stream\n");
1676 goto unlock_out;
1677 }
1678
1679 pin_idx = pin_id_to_pin_index(codec, per_pin->pin_nid, per_pin->dev_id);
1680 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1681 if (err) {
1682 codec_err(codec, "hdmi: no free converter to enable silent mode\n");
1683 goto unlock_out;
1684 }
1685
1686 per_cvt = get_cvt(spec, cvt_idx);
1687 per_cvt->assigned = 1;
1688 per_pin->cvt_nid = per_cvt->cvt_nid;
1689 per_pin->silent_stream = true;
1690
1691 codec_dbg(codec, "hdmi: enabling silent stream pin-NID=0x%x cvt-NID=0x%x\n",
1692 per_pin->pin_nid, per_cvt->cvt_nid);
1693
1694 snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1695 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1696 AC_VERB_SET_CONNECT_SEL,
1697 per_pin->mux_idx);
1698
1699
1700 pin_cvt_fixup(codec, per_pin, 0);
1701
1702 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1703 per_pin->dev_id, I915_SILENT_RATE);
1704
1705
1706 format = snd_hdac_calc_stream_format(I915_SILENT_RATE, I915_SILENT_CHANNELS,
1707 I915_SILENT_FORMAT, I915_SILENT_FORMAT_BITS, 0);
1708 snd_hda_codec_setup_stream(codec, per_pin->cvt_nid,
1709 I915_SILENT_FMT_MASK, I915_SILENT_FMT_MASK, format);
1710 usleep_range(100, 200);
1711 snd_hda_codec_setup_stream(codec, per_pin->cvt_nid, I915_SILENT_FMT_MASK, 0, format);
1712
1713 per_pin->channels = I915_SILENT_CHANNELS;
1714 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1715
1716 unlock_out:
1717 mutex_unlock(&per_pin->lock);
1718}
1719
1720static void silent_stream_disable(struct hda_codec *codec,
1721 struct hdmi_spec_per_pin *per_pin)
1722{
1723 struct hdmi_spec *spec = codec->spec;
1724 struct hdmi_spec_per_cvt *per_cvt;
1725 int cvt_idx;
1726
1727 mutex_lock(&per_pin->lock);
1728 if (!per_pin->silent_stream)
1729 goto unlock_out;
1730
1731 codec_dbg(codec, "HDMI: disable silent stream on pin-NID=0x%x cvt-NID=0x%x\n",
1732 per_pin->pin_nid, per_pin->cvt_nid);
1733
1734 cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
1735 if (cvt_idx >= 0 && cvt_idx < spec->num_cvts) {
1736 per_cvt = get_cvt(spec, cvt_idx);
1737 per_cvt->assigned = 0;
1738 }
1739
1740 per_pin->cvt_nid = 0;
1741 per_pin->silent_stream = false;
1742
1743 unlock_out:
1744 mutex_unlock(&per_pin->lock);
1745}
1746
1747
1748static void sync_eld_via_acomp(struct hda_codec *codec,
1749 struct hdmi_spec_per_pin *per_pin)
1750{
1751 struct hdmi_spec *spec = codec->spec;
1752 struct hdmi_eld *eld = &spec->temp_eld;
1753 bool monitor_prev, monitor_next;
1754
1755 mutex_lock(&per_pin->lock);
1756 eld->monitor_present = false;
1757 monitor_prev = per_pin->sink_eld.monitor_present;
1758 eld->eld_size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1759 per_pin->dev_id, &eld->monitor_present,
1760 eld->eld_buffer, ELD_MAX_SIZE);
1761 eld->eld_valid = (eld->eld_size > 0);
1762 update_eld(codec, per_pin, eld, 0);
1763 monitor_next = per_pin->sink_eld.monitor_present;
1764 mutex_unlock(&per_pin->lock);
1765
1766
1767
1768
1769
1770
1771 if (spec->send_silent_stream) {
1772 int pm_ret;
1773
1774 if (!monitor_prev && monitor_next) {
1775 pm_ret = snd_hda_power_up_pm(codec);
1776 if (pm_ret < 0)
1777 codec_err(codec,
1778 "Monitor plugged-in, Failed to power up codec ret=[%d]\n",
1779 pm_ret);
1780 silent_stream_enable(codec, per_pin);
1781 } else if (monitor_prev && !monitor_next) {
1782 silent_stream_disable(codec, per_pin);
1783 pm_ret = snd_hda_power_down_pm(codec);
1784 if (pm_ret < 0)
1785 codec_err(codec,
1786 "Monitor plugged-out, Failed to power down codec ret=[%d]\n",
1787 pm_ret);
1788 }
1789 }
1790}
1791
1792static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1793{
1794 struct hda_codec *codec = per_pin->codec;
1795
1796 if (!codec_has_acomp(codec))
1797 hdmi_present_sense_via_verbs(per_pin, repoll);
1798 else
1799 sync_eld_via_acomp(codec, per_pin);
1800}
1801
1802static void hdmi_repoll_eld(struct work_struct *work)
1803{
1804 struct hdmi_spec_per_pin *per_pin =
1805 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1806 struct hda_codec *codec = per_pin->codec;
1807 struct hdmi_spec *spec = codec->spec;
1808 struct hda_jack_tbl *jack;
1809
1810 jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1811 per_pin->dev_id);
1812 if (jack)
1813 jack->jack_dirty = 1;
1814
1815 if (per_pin->repoll_count++ > 6)
1816 per_pin->repoll_count = 0;
1817
1818 mutex_lock(&spec->pcm_lock);
1819 hdmi_present_sense(per_pin, per_pin->repoll_count);
1820 mutex_unlock(&spec->pcm_lock);
1821}
1822
1823static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1824{
1825 struct hdmi_spec *spec = codec->spec;
1826 unsigned int caps, config;
1827 int pin_idx;
1828 struct hdmi_spec_per_pin *per_pin;
1829 int err;
1830 int dev_num, i;
1831
1832 caps = snd_hda_query_pin_caps(codec, pin_nid);
1833 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1834 return 0;
1835
1836
1837
1838
1839
1840 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1841 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE &&
1842 !spec->force_connect)
1843 return 0;
1844
1845
1846
1847
1848
1849 if (spec->intel_hsw_fixup) {
1850
1851
1852
1853
1854
1855
1856 dev_num = spec->dev_num;
1857 } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1858 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1859
1860
1861
1862
1863 spec->dev_num = (spec->dev_num > dev_num) ?
1864 spec->dev_num : dev_num;
1865 } else {
1866
1867
1868
1869
1870
1871 dev_num = 1;
1872 spec->dev_num = 1;
1873 }
1874
1875 for (i = 0; i < dev_num; i++) {
1876 pin_idx = spec->num_pins;
1877 per_pin = snd_array_new(&spec->pins);
1878
1879 if (!per_pin)
1880 return -ENOMEM;
1881
1882 if (spec->dyn_pcm_assign) {
1883 per_pin->pcm = NULL;
1884 per_pin->pcm_idx = -1;
1885 } else {
1886 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1887 per_pin->pcm_idx = pin_idx;
1888 }
1889 per_pin->pin_nid = pin_nid;
1890 per_pin->pin_nid_idx = spec->num_nids;
1891 per_pin->dev_id = i;
1892 per_pin->non_pcm = false;
1893 snd_hda_set_dev_select(codec, pin_nid, i);
1894 err = hdmi_read_pin_conn(codec, pin_idx);
1895 if (err < 0)
1896 return err;
1897 spec->num_pins++;
1898 }
1899 spec->num_nids++;
1900
1901 return 0;
1902}
1903
1904static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1905{
1906 struct hdmi_spec *spec = codec->spec;
1907 struct hdmi_spec_per_cvt *per_cvt;
1908 unsigned int chans;
1909 int err;
1910
1911 chans = get_wcaps(codec, cvt_nid);
1912 chans = get_wcaps_channels(chans);
1913
1914 per_cvt = snd_array_new(&spec->cvts);
1915 if (!per_cvt)
1916 return -ENOMEM;
1917
1918 per_cvt->cvt_nid = cvt_nid;
1919 per_cvt->channels_min = 2;
1920 if (chans <= 16) {
1921 per_cvt->channels_max = chans;
1922 if (chans > spec->chmap.channels_max)
1923 spec->chmap.channels_max = chans;
1924 }
1925
1926 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1927 &per_cvt->rates,
1928 &per_cvt->formats,
1929 &per_cvt->maxbps);
1930 if (err < 0)
1931 return err;
1932
1933 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1934 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1935 spec->num_cvts++;
1936
1937 return 0;
1938}
1939
1940static const struct snd_pci_quirk force_connect_list[] = {
1941 SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
1942 SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
1943 SND_PCI_QUIRK(0x1462, 0xec94, "MS-7C94", 1),
1944 SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", 1),
1945 {}
1946};
1947
1948static int hdmi_parse_codec(struct hda_codec *codec)
1949{
1950 struct hdmi_spec *spec = codec->spec;
1951 hda_nid_t start_nid;
1952 unsigned int caps;
1953 int i, nodes;
1954 const struct snd_pci_quirk *q;
1955
1956 nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &start_nid);
1957 if (!start_nid || nodes < 0) {
1958 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1959 return -EINVAL;
1960 }
1961
1962 q = snd_pci_quirk_lookup(codec->bus->pci, force_connect_list);
1963
1964 if (q && q->value)
1965 spec->force_connect = true;
1966
1967
1968
1969
1970
1971 for (i = 0; i < nodes; i++) {
1972 hda_nid_t nid = start_nid + i;
1973
1974 caps = get_wcaps(codec, nid);
1975
1976 if (!(caps & AC_WCAP_DIGITAL))
1977 continue;
1978
1979 if (get_wcaps_type(caps) == AC_WID_AUD_OUT)
1980 hdmi_add_cvt(codec, nid);
1981 }
1982
1983
1984 for (i = 0; i < nodes; i++) {
1985 hda_nid_t nid = start_nid + i;
1986
1987 caps = get_wcaps(codec, nid);
1988
1989 if (!(caps & AC_WCAP_DIGITAL))
1990 continue;
1991
1992 if (get_wcaps_type(caps) == AC_WID_PIN)
1993 hdmi_add_pin(codec, nid);
1994 }
1995
1996 return 0;
1997}
1998
1999
2000
2001static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2002{
2003 struct hda_spdif_out *spdif;
2004 bool non_pcm;
2005
2006 mutex_lock(&codec->spdif_mutex);
2007 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2008
2009
2010
2011 if (WARN_ON(spdif == NULL)) {
2012 mutex_unlock(&codec->spdif_mutex);
2013 return true;
2014 }
2015 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2016 mutex_unlock(&codec->spdif_mutex);
2017 return non_pcm;
2018}
2019
2020
2021
2022
2023
2024static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2025 struct hda_codec *codec,
2026 unsigned int stream_tag,
2027 unsigned int format,
2028 struct snd_pcm_substream *substream)
2029{
2030 hda_nid_t cvt_nid = hinfo->nid;
2031 struct hdmi_spec *spec = codec->spec;
2032 int pin_idx;
2033 struct hdmi_spec_per_pin *per_pin;
2034 struct snd_pcm_runtime *runtime = substream->runtime;
2035 bool non_pcm;
2036 int pinctl, stripe;
2037 int err = 0;
2038
2039 mutex_lock(&spec->pcm_lock);
2040 pin_idx = hinfo_to_pin_index(codec, hinfo);
2041 if (spec->dyn_pcm_assign && pin_idx < 0) {
2042
2043
2044
2045
2046 pin_cvt_fixup(codec, NULL, cvt_nid);
2047 snd_hda_codec_setup_stream(codec, cvt_nid,
2048 stream_tag, 0, format);
2049 goto unlock;
2050 }
2051
2052 if (snd_BUG_ON(pin_idx < 0)) {
2053 err = -EINVAL;
2054 goto unlock;
2055 }
2056 per_pin = get_pin(spec, pin_idx);
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066 pin_cvt_fixup(codec, per_pin, 0);
2067
2068
2069
2070 if (codec_has_acomp(codec))
2071 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
2072 per_pin->dev_id, runtime->rate);
2073
2074 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2075 mutex_lock(&per_pin->lock);
2076 per_pin->channels = substream->runtime->channels;
2077 per_pin->setup = true;
2078
2079 if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
2080 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
2081 substream);
2082 snd_hda_codec_write(codec, cvt_nid, 0,
2083 AC_VERB_SET_STRIPE_CONTROL,
2084 stripe);
2085 }
2086
2087 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2088 mutex_unlock(&per_pin->lock);
2089 if (spec->dyn_pin_out) {
2090 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2091 per_pin->dev_id);
2092 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2093 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2094 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2095 AC_VERB_SET_PIN_WIDGET_CONTROL,
2096 pinctl | PIN_OUT);
2097 }
2098
2099
2100 err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
2101 per_pin->dev_id, stream_tag, format);
2102 unlock:
2103 mutex_unlock(&spec->pcm_lock);
2104 return err;
2105}
2106
2107static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2108 struct hda_codec *codec,
2109 struct snd_pcm_substream *substream)
2110{
2111 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2112 return 0;
2113}
2114
2115static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2116 struct hda_codec *codec,
2117 struct snd_pcm_substream *substream)
2118{
2119 struct hdmi_spec *spec = codec->spec;
2120 int cvt_idx, pin_idx, pcm_idx;
2121 struct hdmi_spec_per_cvt *per_cvt;
2122 struct hdmi_spec_per_pin *per_pin;
2123 int pinctl;
2124 int err = 0;
2125
2126 mutex_lock(&spec->pcm_lock);
2127 if (hinfo->nid) {
2128 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2129 if (snd_BUG_ON(pcm_idx < 0)) {
2130 err = -EINVAL;
2131 goto unlock;
2132 }
2133 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2134 if (snd_BUG_ON(cvt_idx < 0)) {
2135 err = -EINVAL;
2136 goto unlock;
2137 }
2138 per_cvt = get_cvt(spec, cvt_idx);
2139 per_cvt->assigned = 0;
2140 hinfo->nid = 0;
2141
2142 azx_stream(get_azx_dev(substream))->stripe = 0;
2143
2144 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2145 clear_bit(pcm_idx, &spec->pcm_in_use);
2146 pin_idx = hinfo_to_pin_index(codec, hinfo);
2147 if (spec->dyn_pcm_assign && pin_idx < 0)
2148 goto unlock;
2149
2150 if (snd_BUG_ON(pin_idx < 0)) {
2151 err = -EINVAL;
2152 goto unlock;
2153 }
2154 per_pin = get_pin(spec, pin_idx);
2155
2156 if (spec->dyn_pin_out) {
2157 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2158 per_pin->dev_id);
2159 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2160 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2161 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2162 AC_VERB_SET_PIN_WIDGET_CONTROL,
2163 pinctl & ~PIN_OUT);
2164 }
2165
2166 mutex_lock(&per_pin->lock);
2167 per_pin->chmap_set = false;
2168 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2169
2170 per_pin->setup = false;
2171 per_pin->channels = 0;
2172 mutex_unlock(&per_pin->lock);
2173 }
2174
2175unlock:
2176 mutex_unlock(&spec->pcm_lock);
2177
2178 return err;
2179}
2180
2181static const struct hda_pcm_ops generic_ops = {
2182 .open = hdmi_pcm_open,
2183 .close = hdmi_pcm_close,
2184 .prepare = generic_hdmi_playback_pcm_prepare,
2185 .cleanup = generic_hdmi_playback_pcm_cleanup,
2186};
2187
2188static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2189{
2190 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2191 struct hdmi_spec *spec = codec->spec;
2192 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2193
2194 if (!per_pin)
2195 return 0;
2196
2197 return per_pin->sink_eld.info.spk_alloc;
2198}
2199
2200static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2201 unsigned char *chmap)
2202{
2203 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2204 struct hdmi_spec *spec = codec->spec;
2205 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2206
2207
2208 if (!per_pin)
2209 return;
2210
2211 memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2212}
2213
2214static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2215 unsigned char *chmap, int prepared)
2216{
2217 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2218 struct hdmi_spec *spec = codec->spec;
2219 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2220
2221 if (!per_pin)
2222 return;
2223 mutex_lock(&per_pin->lock);
2224 per_pin->chmap_set = true;
2225 memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2226 if (prepared)
2227 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2228 mutex_unlock(&per_pin->lock);
2229}
2230
2231static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2232{
2233 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2234 struct hdmi_spec *spec = codec->spec;
2235 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2236
2237 return per_pin ? true:false;
2238}
2239
2240static int generic_hdmi_build_pcms(struct hda_codec *codec)
2241{
2242 struct hdmi_spec *spec = codec->spec;
2243 int idx, pcm_num;
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253 if (codec->mst_no_extra_pcms)
2254 pcm_num = spec->num_nids;
2255 else
2256 pcm_num = spec->num_nids + spec->dev_num - 1;
2257
2258 codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2259
2260 for (idx = 0; idx < pcm_num; idx++) {
2261 struct hda_pcm *info;
2262 struct hda_pcm_stream *pstr;
2263
2264 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2265 if (!info)
2266 return -ENOMEM;
2267
2268 spec->pcm_rec[idx].pcm = info;
2269 spec->pcm_used++;
2270 info->pcm_type = HDA_PCM_TYPE_HDMI;
2271 info->own_chmap = true;
2272
2273 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2274 pstr->substreams = 1;
2275 pstr->ops = generic_ops;
2276
2277 if (spec->pcm_used >= 16)
2278 break;
2279
2280 }
2281
2282 return 0;
2283}
2284
2285static void free_hdmi_jack_priv(struct snd_jack *jack)
2286{
2287 struct hdmi_pcm *pcm = jack->private_data;
2288
2289 pcm->jack = NULL;
2290}
2291
2292static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2293{
2294 char hdmi_str[32] = "HDMI/DP";
2295 struct hdmi_spec *spec = codec->spec;
2296 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pcm_idx);
2297 struct snd_jack *jack;
2298 int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2299 int err;
2300
2301 if (pcmdev > 0)
2302 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2303 if (!spec->dyn_pcm_assign &&
2304 !is_jack_detectable(codec, per_pin->pin_nid))
2305 strncat(hdmi_str, " Phantom",
2306 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2307
2308 err = snd_jack_new(codec->card, hdmi_str, SND_JACK_AVOUT, &jack,
2309 true, false);
2310 if (err < 0)
2311 return err;
2312
2313 spec->pcm_rec[pcm_idx].jack = jack;
2314 jack->private_data = &spec->pcm_rec[pcm_idx];
2315 jack->private_free = free_hdmi_jack_priv;
2316 return 0;
2317}
2318
2319static int generic_hdmi_build_controls(struct hda_codec *codec)
2320{
2321 struct hdmi_spec *spec = codec->spec;
2322 int dev, err;
2323 int pin_idx, pcm_idx;
2324
2325 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2326 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2327
2328 set_bit(pcm_idx, &spec->pcm_bitmap);
2329 continue;
2330 }
2331
2332 err = generic_hdmi_build_jack(codec, pcm_idx);
2333 if (err < 0)
2334 return err;
2335
2336
2337
2338
2339 if (spec->dyn_pcm_assign)
2340 err = snd_hda_create_dig_out_ctls(codec,
2341 0, spec->cvt_nids[0],
2342 HDA_PCM_TYPE_HDMI);
2343 else {
2344 struct hdmi_spec_per_pin *per_pin =
2345 get_pin(spec, pcm_idx);
2346 err = snd_hda_create_dig_out_ctls(codec,
2347 per_pin->pin_nid,
2348 per_pin->mux_nids[0],
2349 HDA_PCM_TYPE_HDMI);
2350 }
2351 if (err < 0)
2352 return err;
2353 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2354
2355 dev = get_pcm_rec(spec, pcm_idx)->device;
2356 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2357
2358 err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2359 if (err < 0)
2360 return err;
2361 }
2362 }
2363
2364 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2365 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2366 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
2367
2368 pin_eld->eld_valid = false;
2369 hdmi_present_sense(per_pin, 0);
2370 }
2371
2372
2373 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2374 struct hda_pcm *pcm;
2375
2376 pcm = get_pcm_rec(spec, pcm_idx);
2377 if (!pcm || !pcm->pcm)
2378 break;
2379 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2380 if (err < 0)
2381 return err;
2382 }
2383
2384 return 0;
2385}
2386
2387static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2388{
2389 struct hdmi_spec *spec = codec->spec;
2390 int pin_idx;
2391
2392 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2393 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2394
2395 per_pin->codec = codec;
2396 mutex_init(&per_pin->lock);
2397 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2398 eld_proc_new(per_pin, pin_idx);
2399 }
2400 return 0;
2401}
2402
2403static int generic_hdmi_init(struct hda_codec *codec)
2404{
2405 struct hdmi_spec *spec = codec->spec;
2406 int pin_idx;
2407
2408 mutex_lock(&spec->bind_lock);
2409 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2410 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2411 hda_nid_t pin_nid = per_pin->pin_nid;
2412 int dev_id = per_pin->dev_id;
2413
2414 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2415 hdmi_init_pin(codec, pin_nid);
2416 if (codec_has_acomp(codec))
2417 continue;
2418 snd_hda_jack_detect_enable_callback_mst(codec, pin_nid, dev_id,
2419 jack_callback);
2420 }
2421 mutex_unlock(&spec->bind_lock);
2422 return 0;
2423}
2424
2425static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2426{
2427 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2428 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2429}
2430
2431static void hdmi_array_free(struct hdmi_spec *spec)
2432{
2433 snd_array_free(&spec->pins);
2434 snd_array_free(&spec->cvts);
2435}
2436
2437static void generic_spec_free(struct hda_codec *codec)
2438{
2439 struct hdmi_spec *spec = codec->spec;
2440
2441 if (spec) {
2442 hdmi_array_free(spec);
2443 kfree(spec);
2444 codec->spec = NULL;
2445 }
2446 codec->dp_mst = false;
2447}
2448
2449static void generic_hdmi_free(struct hda_codec *codec)
2450{
2451 struct hdmi_spec *spec = codec->spec;
2452 int pin_idx, pcm_idx;
2453
2454 if (spec->acomp_registered) {
2455 snd_hdac_acomp_exit(&codec->bus->core);
2456 } else if (codec_has_acomp(codec)) {
2457 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2458 }
2459 codec->relaxed_resume = 0;
2460
2461 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2462 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2463 cancel_delayed_work_sync(&per_pin->work);
2464 eld_proc_free(per_pin);
2465 }
2466
2467 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2468 if (spec->pcm_rec[pcm_idx].jack == NULL)
2469 continue;
2470 if (spec->dyn_pcm_assign)
2471 snd_device_free(codec->card,
2472 spec->pcm_rec[pcm_idx].jack);
2473 else
2474 spec->pcm_rec[pcm_idx].jack = NULL;
2475 }
2476
2477 generic_spec_free(codec);
2478}
2479
2480#ifdef CONFIG_PM
2481static int generic_hdmi_suspend(struct hda_codec *codec)
2482{
2483 struct hdmi_spec *spec = codec->spec;
2484 int pin_idx;
2485
2486 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2487 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2488 cancel_delayed_work_sync(&per_pin->work);
2489 }
2490 return 0;
2491}
2492
2493static int generic_hdmi_resume(struct hda_codec *codec)
2494{
2495 struct hdmi_spec *spec = codec->spec;
2496 int pin_idx;
2497
2498 codec->patch_ops.init(codec);
2499 snd_hda_regmap_sync(codec);
2500
2501 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2502 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2503 hdmi_present_sense(per_pin, 1);
2504 }
2505 return 0;
2506}
2507#endif
2508
2509static const struct hda_codec_ops generic_hdmi_patch_ops = {
2510 .init = generic_hdmi_init,
2511 .free = generic_hdmi_free,
2512 .build_pcms = generic_hdmi_build_pcms,
2513 .build_controls = generic_hdmi_build_controls,
2514 .unsol_event = hdmi_unsol_event,
2515#ifdef CONFIG_PM
2516 .suspend = generic_hdmi_suspend,
2517 .resume = generic_hdmi_resume,
2518#endif
2519};
2520
2521static const struct hdmi_ops generic_standard_hdmi_ops = {
2522 .pin_get_eld = hdmi_pin_get_eld,
2523 .pin_setup_infoframe = hdmi_pin_setup_infoframe,
2524 .pin_hbr_setup = hdmi_pin_hbr_setup,
2525 .setup_stream = hdmi_setup_stream,
2526};
2527
2528
2529static int alloc_generic_hdmi(struct hda_codec *codec)
2530{
2531 struct hdmi_spec *spec;
2532
2533 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2534 if (!spec)
2535 return -ENOMEM;
2536
2537 spec->codec = codec;
2538 spec->ops = generic_standard_hdmi_ops;
2539 spec->dev_num = 1;
2540 mutex_init(&spec->pcm_lock);
2541 mutex_init(&spec->bind_lock);
2542 snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2543
2544 spec->chmap.ops.get_chmap = hdmi_get_chmap;
2545 spec->chmap.ops.set_chmap = hdmi_set_chmap;
2546 spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2547 spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc;
2548
2549 codec->spec = spec;
2550 hdmi_array_init(spec, 4);
2551
2552 codec->patch_ops = generic_hdmi_patch_ops;
2553
2554 return 0;
2555}
2556
2557
2558static int patch_generic_hdmi(struct hda_codec *codec)
2559{
2560 int err;
2561
2562 err = alloc_generic_hdmi(codec);
2563 if (err < 0)
2564 return err;
2565
2566 err = hdmi_parse_codec(codec);
2567 if (err < 0) {
2568 generic_spec_free(codec);
2569 return err;
2570 }
2571
2572 generic_hdmi_init_per_pins(codec);
2573 return 0;
2574}
2575
2576
2577
2578
2579
2580
2581static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2582 int dev_id, bool use_acomp)
2583{
2584 struct hda_jack_tbl *tbl;
2585
2586 tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2587 if (tbl) {
2588
2589
2590
2591 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2592 snd_hda_codec_write_cache(codec, nid, 0,
2593 AC_VERB_SET_UNSOLICITED_ENABLE, val);
2594 }
2595}
2596
2597
2598static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2599 bool use_acomp)
2600{
2601 struct hdmi_spec *spec;
2602 int i;
2603
2604 spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2605 mutex_lock(&spec->bind_lock);
2606 spec->use_acomp_notifier = use_acomp;
2607 spec->codec->relaxed_resume = use_acomp;
2608 spec->codec->bus->keep_power = 0;
2609
2610 for (i = 0; i < spec->num_pins; i++)
2611 reprogram_jack_detect(spec->codec,
2612 get_pin(spec, i)->pin_nid,
2613 get_pin(spec, i)->dev_id,
2614 use_acomp);
2615 mutex_unlock(&spec->bind_lock);
2616}
2617
2618
2619static int generic_acomp_master_bind(struct device *dev,
2620 struct drm_audio_component *acomp)
2621{
2622 generic_acomp_notifier_set(acomp, true);
2623 return 0;
2624}
2625
2626static void generic_acomp_master_unbind(struct device *dev,
2627 struct drm_audio_component *acomp)
2628{
2629 generic_acomp_notifier_set(acomp, false);
2630}
2631
2632
2633static int match_bound_vga(struct device *dev, int subtype, void *data)
2634{
2635 struct hdac_bus *bus = data;
2636 struct pci_dev *pci, *master;
2637
2638 if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2639 return 0;
2640 master = to_pci_dev(bus->dev);
2641 pci = to_pci_dev(dev);
2642 return master->bus == pci->bus;
2643}
2644
2645
2646static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2647{
2648 struct hda_codec *codec = audio_ptr;
2649 struct hdmi_spec *spec = codec->spec;
2650 hda_nid_t pin_nid = spec->port2pin(codec, port);
2651
2652 if (!pin_nid)
2653 return;
2654 if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2655 return;
2656
2657
2658
2659 if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND)
2660 return;
2661
2662 if (snd_hdac_is_in_pm(&codec->core))
2663 return;
2664
2665 check_presence_and_report(codec, pin_nid, dev_id);
2666}
2667
2668
2669static void setup_drm_audio_ops(struct hda_codec *codec,
2670 const struct drm_audio_component_audio_ops *ops)
2671{
2672 struct hdmi_spec *spec = codec->spec;
2673
2674 spec->drm_audio_ops.audio_ptr = codec;
2675
2676
2677
2678
2679 wmb();
2680 spec->drm_audio_ops.pin2port = ops->pin2port;
2681 spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2682 spec->drm_audio_ops.master_bind = ops->master_bind;
2683 spec->drm_audio_ops.master_unbind = ops->master_unbind;
2684}
2685
2686
2687static void generic_acomp_init(struct hda_codec *codec,
2688 const struct drm_audio_component_audio_ops *ops,
2689 int (*port2pin)(struct hda_codec *, int))
2690{
2691 struct hdmi_spec *spec = codec->spec;
2692
2693 if (!enable_acomp) {
2694 codec_info(codec, "audio component disabled by module option\n");
2695 return;
2696 }
2697
2698 spec->port2pin = port2pin;
2699 setup_drm_audio_ops(codec, ops);
2700 if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2701 match_bound_vga, 0)) {
2702 spec->acomp_registered = true;
2703 }
2704}
2705
2706
2707
2708
2709
2710#define INTEL_GET_VENDOR_VERB 0xf81
2711#define INTEL_SET_VENDOR_VERB 0x781
2712#define INTEL_EN_DP12 0x02
2713#define INTEL_EN_ALL_PIN_CVTS 0x01
2714
2715static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2716 bool update_tree)
2717{
2718 unsigned int vendor_param;
2719 struct hdmi_spec *spec = codec->spec;
2720
2721 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2722 INTEL_GET_VENDOR_VERB, 0);
2723 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2724 return;
2725
2726 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2727 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2728 INTEL_SET_VENDOR_VERB, vendor_param);
2729 if (vendor_param == -1)
2730 return;
2731
2732 if (update_tree)
2733 snd_hda_codec_update_widgets(codec);
2734}
2735
2736static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2737{
2738 unsigned int vendor_param;
2739 struct hdmi_spec *spec = codec->spec;
2740
2741 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2742 INTEL_GET_VENDOR_VERB, 0);
2743 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2744 return;
2745
2746
2747 vendor_param |= INTEL_EN_DP12;
2748 snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2749 snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2750 INTEL_SET_VENDOR_VERB, vendor_param);
2751}
2752
2753
2754
2755
2756static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2757 unsigned int power_state)
2758{
2759 if (power_state == AC_PWRST_D0) {
2760 intel_haswell_enable_all_pins(codec, false);
2761 intel_haswell_fixup_enable_dp12(codec);
2762 }
2763
2764 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2765 snd_hda_codec_set_power_to_all(codec, fg, power_state);
2766}
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779static int intel_base_nid(struct hda_codec *codec)
2780{
2781 switch (codec->core.vendor_id) {
2782 case 0x80860054:
2783 case 0x80862804:
2784 case 0x80862882:
2785 return 4;
2786 default:
2787 return 5;
2788 }
2789}
2790
2791static int intel_pin2port(void *audio_ptr, int pin_nid)
2792{
2793 struct hda_codec *codec = audio_ptr;
2794 struct hdmi_spec *spec = codec->spec;
2795 int base_nid, i;
2796
2797 if (!spec->port_num) {
2798 base_nid = intel_base_nid(codec);
2799 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2800 return -1;
2801 return pin_nid - base_nid + 1;
2802 }
2803
2804
2805
2806
2807
2808 for (i = 0; i < spec->port_num; i++) {
2809 if (pin_nid == spec->port_map[i])
2810 return i;
2811 }
2812
2813 codec_info(codec, "Can't find the HDMI/DP port for pin NID 0x%x\n", pin_nid);
2814 return -1;
2815}
2816
2817static int intel_port2pin(struct hda_codec *codec, int port)
2818{
2819 struct hdmi_spec *spec = codec->spec;
2820
2821 if (!spec->port_num) {
2822
2823 if (port < 1 || port > 3)
2824 return 0;
2825 return port + intel_base_nid(codec) - 1;
2826 }
2827
2828 if (port < 0 || port >= spec->port_num)
2829 return 0;
2830 return spec->port_map[port];
2831}
2832
2833static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2834{
2835 struct hda_codec *codec = audio_ptr;
2836 int pin_nid;
2837 int dev_id = pipe;
2838
2839 pin_nid = intel_port2pin(codec, port);
2840 if (!pin_nid)
2841 return;
2842
2843
2844
2845 if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND)
2846 return;
2847
2848 if (snd_hdac_is_in_pm(&codec->core))
2849 return;
2850
2851 snd_hdac_i915_set_bclk(&codec->bus->core);
2852 check_presence_and_report(codec, pin_nid, dev_id);
2853}
2854
2855static const struct drm_audio_component_audio_ops intel_audio_ops = {
2856 .pin2port = intel_pin2port,
2857 .pin_eld_notify = intel_pin_eld_notify,
2858};
2859
2860
2861static void register_i915_notifier(struct hda_codec *codec)
2862{
2863 struct hdmi_spec *spec = codec->spec;
2864
2865 spec->use_acomp_notifier = true;
2866 spec->port2pin = intel_port2pin;
2867 setup_drm_audio_ops(codec, &intel_audio_ops);
2868 snd_hdac_acomp_register_notifier(&codec->bus->core,
2869 &spec->drm_audio_ops);
2870
2871 codec->relaxed_resume = 1;
2872}
2873
2874
2875static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2876 hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2877 int format)
2878{
2879 haswell_verify_D0(codec, cvt_nid, pin_nid);
2880 return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2881 stream_tag, format);
2882}
2883
2884
2885static void i915_pin_cvt_fixup(struct hda_codec *codec,
2886 struct hdmi_spec_per_pin *per_pin,
2887 hda_nid_t cvt_nid)
2888{
2889 if (per_pin) {
2890 haswell_verify_D0(codec, per_pin->cvt_nid, per_pin->pin_nid);
2891 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2892 per_pin->dev_id);
2893 intel_verify_pin_cvt_connect(codec, per_pin);
2894 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2895 per_pin->dev_id, per_pin->mux_idx);
2896 } else {
2897 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2898 }
2899}
2900
2901
2902static int alloc_intel_hdmi(struct hda_codec *codec)
2903{
2904 int err;
2905
2906
2907 if (!codec->bus->core.audio_component) {
2908 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2909
2910 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2911 return -ENODEV;
2912 }
2913
2914 err = alloc_generic_hdmi(codec);
2915 if (err < 0)
2916 return err;
2917
2918 codec->patch_ops.unsol_event = NULL;
2919 return 0;
2920}
2921
2922
2923static int parse_intel_hdmi(struct hda_codec *codec)
2924{
2925 int err, retries = 3;
2926
2927 do {
2928 err = hdmi_parse_codec(codec);
2929 } while (err < 0 && retries--);
2930
2931 if (err < 0) {
2932 generic_spec_free(codec);
2933 return err;
2934 }
2935
2936 generic_hdmi_init_per_pins(codec);
2937 register_i915_notifier(codec);
2938 return 0;
2939}
2940
2941
2942static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2943 const int *port_map, int port_num, int dev_num)
2944{
2945 struct hdmi_spec *spec;
2946 int err;
2947
2948 err = alloc_intel_hdmi(codec);
2949 if (err < 0)
2950 return err;
2951 spec = codec->spec;
2952 codec->dp_mst = true;
2953 spec->dyn_pcm_assign = true;
2954 spec->vendor_nid = vendor_nid;
2955 spec->port_map = port_map;
2956 spec->port_num = port_num;
2957 spec->intel_hsw_fixup = true;
2958 spec->dev_num = dev_num;
2959
2960 intel_haswell_enable_all_pins(codec, true);
2961 intel_haswell_fixup_enable_dp12(codec);
2962
2963 codec->display_power_control = 1;
2964
2965 codec->patch_ops.set_power_state = haswell_set_power_state;
2966 codec->depop_delay = 0;
2967 codec->auto_runtime_pm = 1;
2968
2969 spec->ops.setup_stream = i915_hsw_setup_stream;
2970 spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2971
2972
2973
2974
2975
2976 if (enable_silent_stream)
2977 spec->send_silent_stream = true;
2978
2979 return parse_intel_hdmi(codec);
2980}
2981
2982static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2983{
2984 return intel_hsw_common_init(codec, 0x08, NULL, 0, 3);
2985}
2986
2987static int patch_i915_glk_hdmi(struct hda_codec *codec)
2988{
2989 return intel_hsw_common_init(codec, 0x0b, NULL, 0, 3);
2990}
2991
2992static int patch_i915_icl_hdmi(struct hda_codec *codec)
2993{
2994
2995
2996
2997
2998 static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2999
3000 return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 3);
3001}
3002
3003static int patch_i915_tgl_hdmi(struct hda_codec *codec)
3004{
3005
3006
3007
3008
3009 static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
3010 int ret;
3011
3012 ret = intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 4);
3013 if (!ret) {
3014 struct hdmi_spec *spec = codec->spec;
3015
3016 spec->dyn_pcm_no_legacy = true;
3017 }
3018
3019 return ret;
3020}
3021
3022
3023static int patch_i915_byt_hdmi(struct hda_codec *codec)
3024{
3025 struct hdmi_spec *spec;
3026 int err;
3027
3028 err = alloc_intel_hdmi(codec);
3029 if (err < 0)
3030 return err;
3031 spec = codec->spec;
3032
3033
3034
3035
3036 codec->display_power_control = 1;
3037
3038 codec->depop_delay = 0;
3039 codec->auto_runtime_pm = 1;
3040
3041 spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
3042
3043 return parse_intel_hdmi(codec);
3044}
3045
3046
3047static int patch_i915_cpt_hdmi(struct hda_codec *codec)
3048{
3049 int err;
3050
3051 err = alloc_intel_hdmi(codec);
3052 if (err < 0)
3053 return err;
3054 return parse_intel_hdmi(codec);
3055}
3056
3057
3058
3059
3060
3061static int simple_playback_build_pcms(struct hda_codec *codec)
3062{
3063 struct hdmi_spec *spec = codec->spec;
3064 struct hda_pcm *info;
3065 unsigned int chans;
3066 struct hda_pcm_stream *pstr;
3067 struct hdmi_spec_per_cvt *per_cvt;
3068
3069 per_cvt = get_cvt(spec, 0);
3070 chans = get_wcaps(codec, per_cvt->cvt_nid);
3071 chans = get_wcaps_channels(chans);
3072
3073 info = snd_hda_codec_pcm_new(codec, "HDMI 0");
3074 if (!info)
3075 return -ENOMEM;
3076 spec->pcm_rec[0].pcm = info;
3077 info->pcm_type = HDA_PCM_TYPE_HDMI;
3078 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
3079 *pstr = spec->pcm_playback;
3080 pstr->nid = per_cvt->cvt_nid;
3081 if (pstr->channels_max <= 2 && chans && chans <= 16)
3082 pstr->channels_max = chans;
3083
3084 return 0;
3085}
3086
3087
3088static void simple_hdmi_unsol_event(struct hda_codec *codec,
3089 unsigned int res)
3090{
3091 snd_hda_jack_set_dirty_all(codec);
3092 snd_hda_jack_report_sync(codec);
3093}
3094
3095
3096
3097
3098#define simple_hdmi_build_jack generic_hdmi_build_jack
3099
3100static int simple_playback_build_controls(struct hda_codec *codec)
3101{
3102 struct hdmi_spec *spec = codec->spec;
3103 struct hdmi_spec_per_cvt *per_cvt;
3104 int err;
3105
3106 per_cvt = get_cvt(spec, 0);
3107 err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3108 per_cvt->cvt_nid,
3109 HDA_PCM_TYPE_HDMI);
3110 if (err < 0)
3111 return err;
3112 return simple_hdmi_build_jack(codec, 0);
3113}
3114
3115static int simple_playback_init(struct hda_codec *codec)
3116{
3117 struct hdmi_spec *spec = codec->spec;
3118 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3119 hda_nid_t pin = per_pin->pin_nid;
3120
3121 snd_hda_codec_write(codec, pin, 0,
3122 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3123
3124 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3125 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3126 AMP_OUT_UNMUTE);
3127 snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3128 return 0;
3129}
3130
3131static void simple_playback_free(struct hda_codec *codec)
3132{
3133 struct hdmi_spec *spec = codec->spec;
3134
3135 hdmi_array_free(spec);
3136 kfree(spec);
3137}
3138
3139
3140
3141
3142
3143#define Nv_VERB_SET_Channel_Allocation 0xF79
3144#define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
3145#define Nv_VERB_SET_Audio_Protection_On 0xF98
3146#define Nv_VERB_SET_Audio_Protection_Off 0xF99
3147
3148#define nvhdmi_master_con_nid_7x 0x04
3149#define nvhdmi_master_pin_nid_7x 0x05
3150
3151static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3152
3153 0x6, 0x8, 0xa, 0xc,
3154};
3155
3156static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3157
3158 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3159
3160 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3161 {}
3162};
3163
3164static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3165
3166 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3167
3168 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3169 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3170 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3171 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3172 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3173 {}
3174};
3175
3176#ifdef LIMITED_RATE_FMT_SUPPORT
3177
3178#define SUPPORTED_RATES SNDRV_PCM_RATE_48000
3179#define SUPPORTED_MAXBPS 16
3180#define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
3181#else
3182
3183#define SUPPORTED_RATES \
3184 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3185 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3186 SNDRV_PCM_RATE_192000)
3187#define SUPPORTED_MAXBPS 24
3188#define SUPPORTED_FORMATS \
3189 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3190#endif
3191
3192static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3193{
3194 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3195 return 0;
3196}
3197
3198static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3199{
3200 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3201 return 0;
3202}
3203
3204static const unsigned int channels_2_6_8[] = {
3205 2, 6, 8
3206};
3207
3208static const unsigned int channels_2_8[] = {
3209 2, 8
3210};
3211
3212static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3213 .count = ARRAY_SIZE(channels_2_6_8),
3214 .list = channels_2_6_8,
3215 .mask = 0,
3216};
3217
3218static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3219 .count = ARRAY_SIZE(channels_2_8),
3220 .list = channels_2_8,
3221 .mask = 0,
3222};
3223
3224static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3225 struct hda_codec *codec,
3226 struct snd_pcm_substream *substream)
3227{
3228 struct hdmi_spec *spec = codec->spec;
3229 const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3230
3231 switch (codec->preset->vendor_id) {
3232 case 0x10de0002:
3233 case 0x10de0003:
3234 case 0x10de0005:
3235 case 0x10de0006:
3236 hw_constraints_channels = &hw_constraints_2_8_channels;
3237 break;
3238 case 0x10de0007:
3239 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3240 break;
3241 default:
3242 break;
3243 }
3244
3245 if (hw_constraints_channels != NULL) {
3246 snd_pcm_hw_constraint_list(substream->runtime, 0,
3247 SNDRV_PCM_HW_PARAM_CHANNELS,
3248 hw_constraints_channels);
3249 } else {
3250 snd_pcm_hw_constraint_step(substream->runtime, 0,
3251 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3252 }
3253
3254 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3255}
3256
3257static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3258 struct hda_codec *codec,
3259 struct snd_pcm_substream *substream)
3260{
3261 struct hdmi_spec *spec = codec->spec;
3262 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3263}
3264
3265static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3266 struct hda_codec *codec,
3267 unsigned int stream_tag,
3268 unsigned int format,
3269 struct snd_pcm_substream *substream)
3270{
3271 struct hdmi_spec *spec = codec->spec;
3272 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3273 stream_tag, format, substream);
3274}
3275
3276static const struct hda_pcm_stream simple_pcm_playback = {
3277 .substreams = 1,
3278 .channels_min = 2,
3279 .channels_max = 2,
3280 .ops = {
3281 .open = simple_playback_pcm_open,
3282 .close = simple_playback_pcm_close,
3283 .prepare = simple_playback_pcm_prepare
3284 },
3285};
3286
3287static const struct hda_codec_ops simple_hdmi_patch_ops = {
3288 .build_controls = simple_playback_build_controls,
3289 .build_pcms = simple_playback_build_pcms,
3290 .init = simple_playback_init,
3291 .free = simple_playback_free,
3292 .unsol_event = simple_hdmi_unsol_event,
3293};
3294
3295static int patch_simple_hdmi(struct hda_codec *codec,
3296 hda_nid_t cvt_nid, hda_nid_t pin_nid)
3297{
3298 struct hdmi_spec *spec;
3299 struct hdmi_spec_per_cvt *per_cvt;
3300 struct hdmi_spec_per_pin *per_pin;
3301
3302 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3303 if (!spec)
3304 return -ENOMEM;
3305
3306 spec->codec = codec;
3307 codec->spec = spec;
3308 hdmi_array_init(spec, 1);
3309
3310 spec->multiout.num_dacs = 0;
3311 spec->multiout.max_channels = 2;
3312 spec->multiout.dig_out_nid = cvt_nid;
3313 spec->num_cvts = 1;
3314 spec->num_pins = 1;
3315 per_pin = snd_array_new(&spec->pins);
3316 per_cvt = snd_array_new(&spec->cvts);
3317 if (!per_pin || !per_cvt) {
3318 simple_playback_free(codec);
3319 return -ENOMEM;
3320 }
3321 per_cvt->cvt_nid = cvt_nid;
3322 per_pin->pin_nid = pin_nid;
3323 spec->pcm_playback = simple_pcm_playback;
3324
3325 codec->patch_ops = simple_hdmi_patch_ops;
3326
3327 return 0;
3328}
3329
3330static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3331 int channels)
3332{
3333 unsigned int chanmask;
3334 int chan = channels ? (channels - 1) : 1;
3335
3336 switch (channels) {
3337 default:
3338 case 0:
3339 case 2:
3340 chanmask = 0x00;
3341 break;
3342 case 4:
3343 chanmask = 0x08;
3344 break;
3345 case 6:
3346 chanmask = 0x0b;
3347 break;
3348 case 8:
3349 chanmask = 0x13;
3350 break;
3351 }
3352
3353
3354
3355 snd_hda_codec_write(codec, 0x1, 0,
3356 Nv_VERB_SET_Channel_Allocation, chanmask);
3357
3358 snd_hda_codec_write(codec, 0x1, 0,
3359 Nv_VERB_SET_Info_Frame_Checksum,
3360 (0x71 - chan - chanmask));
3361}
3362
3363static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3364 struct hda_codec *codec,
3365 struct snd_pcm_substream *substream)
3366{
3367 struct hdmi_spec *spec = codec->spec;
3368 int i;
3369
3370 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3371 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3372 for (i = 0; i < 4; i++) {
3373
3374 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3375 AC_VERB_SET_CHANNEL_STREAMID, 0);
3376
3377 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3378 AC_VERB_SET_STREAM_FORMAT, 0);
3379 }
3380
3381
3382
3383 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3384
3385 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3386}
3387
3388static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3389 struct hda_codec *codec,
3390 unsigned int stream_tag,
3391 unsigned int format,
3392 struct snd_pcm_substream *substream)
3393{
3394 int chs;
3395 unsigned int dataDCC2, channel_id;
3396 int i;
3397 struct hdmi_spec *spec = codec->spec;
3398 struct hda_spdif_out *spdif;
3399 struct hdmi_spec_per_cvt *per_cvt;
3400
3401 mutex_lock(&codec->spdif_mutex);
3402 per_cvt = get_cvt(spec, 0);
3403 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3404
3405 chs = substream->runtime->channels;
3406
3407 dataDCC2 = 0x2;
3408
3409
3410 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3411 snd_hda_codec_write(codec,
3412 nvhdmi_master_con_nid_7x,
3413 0,
3414 AC_VERB_SET_DIGI_CONVERT_1,
3415 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3416
3417
3418 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3419 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3420
3421
3422 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3423 AC_VERB_SET_STREAM_FORMAT, format);
3424
3425
3426
3427 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3428 snd_hda_codec_write(codec,
3429 nvhdmi_master_con_nid_7x,
3430 0,
3431 AC_VERB_SET_DIGI_CONVERT_1,
3432 spdif->ctls & 0xff);
3433 snd_hda_codec_write(codec,
3434 nvhdmi_master_con_nid_7x,
3435 0,
3436 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3437 }
3438
3439 for (i = 0; i < 4; i++) {
3440 if (chs == 2)
3441 channel_id = 0;
3442 else
3443 channel_id = i * 2;
3444
3445
3446
3447
3448 if (codec->spdif_status_reset &&
3449 (spdif->ctls & AC_DIG1_ENABLE))
3450 snd_hda_codec_write(codec,
3451 nvhdmi_con_nids_7x[i],
3452 0,
3453 AC_VERB_SET_DIGI_CONVERT_1,
3454 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3455
3456 snd_hda_codec_write(codec,
3457 nvhdmi_con_nids_7x[i],
3458 0,
3459 AC_VERB_SET_CHANNEL_STREAMID,
3460 (stream_tag << 4) | channel_id);
3461
3462 snd_hda_codec_write(codec,
3463 nvhdmi_con_nids_7x[i],
3464 0,
3465 AC_VERB_SET_STREAM_FORMAT,
3466 format);
3467
3468
3469 if (codec->spdif_status_reset &&
3470 (spdif->ctls & AC_DIG1_ENABLE)) {
3471 snd_hda_codec_write(codec,
3472 nvhdmi_con_nids_7x[i],
3473 0,
3474 AC_VERB_SET_DIGI_CONVERT_1,
3475 spdif->ctls & 0xff);
3476 snd_hda_codec_write(codec,
3477 nvhdmi_con_nids_7x[i],
3478 0,
3479 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3480 }
3481 }
3482
3483 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3484
3485 mutex_unlock(&codec->spdif_mutex);
3486 return 0;
3487}
3488
3489static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3490 .substreams = 1,
3491 .channels_min = 2,
3492 .channels_max = 8,
3493 .nid = nvhdmi_master_con_nid_7x,
3494 .rates = SUPPORTED_RATES,
3495 .maxbps = SUPPORTED_MAXBPS,
3496 .formats = SUPPORTED_FORMATS,
3497 .ops = {
3498 .open = simple_playback_pcm_open,
3499 .close = nvhdmi_8ch_7x_pcm_close,
3500 .prepare = nvhdmi_8ch_7x_pcm_prepare
3501 },
3502};
3503
3504static int patch_nvhdmi_2ch(struct hda_codec *codec)
3505{
3506 struct hdmi_spec *spec;
3507 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3508 nvhdmi_master_pin_nid_7x);
3509 if (err < 0)
3510 return err;
3511
3512 codec->patch_ops.init = nvhdmi_7x_init_2ch;
3513
3514 spec = codec->spec;
3515 spec->pcm_playback.rates = SUPPORTED_RATES;
3516 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3517 spec->pcm_playback.formats = SUPPORTED_FORMATS;
3518 return 0;
3519}
3520
3521static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3522{
3523 struct hdmi_spec *spec = codec->spec;
3524 int err = simple_playback_build_pcms(codec);
3525 if (!err) {
3526 struct hda_pcm *info = get_pcm_rec(spec, 0);
3527 info->own_chmap = true;
3528 }
3529 return err;
3530}
3531
3532static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3533{
3534 struct hdmi_spec *spec = codec->spec;
3535 struct hda_pcm *info;
3536 struct snd_pcm_chmap *chmap;
3537 int err;
3538
3539 err = simple_playback_build_controls(codec);
3540 if (err < 0)
3541 return err;
3542
3543
3544 info = get_pcm_rec(spec, 0);
3545 err = snd_pcm_add_chmap_ctls(info->pcm,
3546 SNDRV_PCM_STREAM_PLAYBACK,
3547 snd_pcm_alt_chmaps, 8, 0, &chmap);
3548 if (err < 0)
3549 return err;
3550 switch (codec->preset->vendor_id) {
3551 case 0x10de0002:
3552 case 0x10de0003:
3553 case 0x10de0005:
3554 case 0x10de0006:
3555 chmap->channel_mask = (1U << 2) | (1U << 8);
3556 break;
3557 case 0x10de0007:
3558 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3559 }
3560 return 0;
3561}
3562
3563static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3564{
3565 struct hdmi_spec *spec;
3566 int err = patch_nvhdmi_2ch(codec);
3567 if (err < 0)
3568 return err;
3569 spec = codec->spec;
3570 spec->multiout.max_channels = 8;
3571 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3572 codec->patch_ops.init = nvhdmi_7x_init_8ch;
3573 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3574 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3575
3576
3577
3578 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3579
3580 return 0;
3581}
3582
3583
3584
3585
3586
3587
3588static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3589 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3590{
3591 if (cap->ca_index == 0x00 && channels == 2)
3592 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3593
3594
3595 if (cap->channels != channels)
3596 return -1;
3597
3598
3599 return SNDRV_CTL_TLVT_CHMAP_VAR;
3600}
3601
3602static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3603 int ca, int chs, unsigned char *map)
3604{
3605 if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3606 return -EINVAL;
3607
3608 return 0;
3609}
3610
3611
3612
3613static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3614{
3615 return pin_nid - 4;
3616}
3617
3618
3619static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3620{
3621 return port + 4;
3622}
3623
3624static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3625 .pin2port = nvhdmi_pin2port,
3626 .pin_eld_notify = generic_acomp_pin_eld_notify,
3627 .master_bind = generic_acomp_master_bind,
3628 .master_unbind = generic_acomp_master_unbind,
3629};
3630
3631static int patch_nvhdmi(struct hda_codec *codec)
3632{
3633 struct hdmi_spec *spec;
3634 int err;
3635
3636 err = alloc_generic_hdmi(codec);
3637 if (err < 0)
3638 return err;
3639 codec->dp_mst = true;
3640
3641 spec = codec->spec;
3642 spec->dyn_pcm_assign = true;
3643
3644 err = hdmi_parse_codec(codec);
3645 if (err < 0) {
3646 generic_spec_free(codec);
3647 return err;
3648 }
3649
3650 generic_hdmi_init_per_pins(codec);
3651
3652 spec->dyn_pin_out = true;
3653
3654 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3655 nvhdmi_chmap_cea_alloc_validate_get_type;
3656 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3657
3658 codec->link_down_at_suspend = 1;
3659
3660 generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3661
3662 return 0;
3663}
3664
3665static int patch_nvhdmi_legacy(struct hda_codec *codec)
3666{
3667 struct hdmi_spec *spec;
3668 int err;
3669
3670 err = patch_generic_hdmi(codec);
3671 if (err)
3672 return err;
3673
3674 spec = codec->spec;
3675 spec->dyn_pin_out = true;
3676
3677 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3678 nvhdmi_chmap_cea_alloc_validate_get_type;
3679 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3680
3681 codec->link_down_at_suspend = 1;
3682
3683 return 0;
3684}
3685
3686
3687
3688
3689
3690
3691
3692
3693#define NVIDIA_AFG_NID 0x01
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710#define NVIDIA_GET_SCRATCH0 0xfa6
3711#define NVIDIA_SET_SCRATCH0_BYTE0 0xfa7
3712#define NVIDIA_SET_SCRATCH0_BYTE1 0xfa8
3713#define NVIDIA_SET_SCRATCH0_BYTE2 0xfa9
3714#define NVIDIA_SET_SCRATCH0_BYTE3 0xfaa
3715#define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3716#define NVIDIA_SCRATCH_VALID (1 << 6)
3717
3718#define NVIDIA_GET_SCRATCH1 0xfab
3719#define NVIDIA_SET_SCRATCH1_BYTE0 0xfac
3720#define NVIDIA_SET_SCRATCH1_BYTE1 0xfad
3721#define NVIDIA_SET_SCRATCH1_BYTE2 0xfae
3722#define NVIDIA_SET_SCRATCH1_BYTE3 0xfaf
3723
3724
3725
3726
3727
3728static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3729{
3730 unsigned int value;
3731
3732
3733 value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3734 NVIDIA_GET_SCRATCH0, 0);
3735 value = (value >> 24) & 0xff;
3736
3737
3738 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3739 NVIDIA_SET_SCRATCH0_BYTE0,
3740 (format >> 0) & 0xff);
3741 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3742 NVIDIA_SET_SCRATCH0_BYTE1,
3743 (format >> 8) & 0xff);
3744
3745
3746 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3747 NVIDIA_SET_SCRATCH0_BYTE2, 0);
3748
3749
3750
3751
3752
3753 if (format == 0)
3754 value &= ~NVIDIA_SCRATCH_VALID;
3755 else
3756 value |= NVIDIA_SCRATCH_VALID;
3757
3758
3759
3760
3761
3762
3763 value ^= NVIDIA_SCRATCH_TRIGGER;
3764
3765 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3766 NVIDIA_SET_SCRATCH0_BYTE3, value);
3767}
3768
3769static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3770 struct hda_codec *codec,
3771 unsigned int stream_tag,
3772 unsigned int format,
3773 struct snd_pcm_substream *substream)
3774{
3775 int err;
3776
3777 err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3778 format, substream);
3779 if (err < 0)
3780 return err;
3781
3782
3783 tegra_hdmi_set_format(codec, format);
3784
3785 return 0;
3786}
3787
3788static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3789 struct hda_codec *codec,
3790 struct snd_pcm_substream *substream)
3791{
3792
3793 tegra_hdmi_set_format(codec, 0);
3794
3795 return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3796}
3797
3798static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3799{
3800 struct hdmi_spec *spec = codec->spec;
3801 unsigned int i;
3802
3803 for (i = 0; i < spec->num_pins; i++) {
3804 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3805
3806 if (pcm->pcm_type == type)
3807 return pcm;
3808 }
3809
3810 return NULL;
3811}
3812
3813static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3814{
3815 struct hda_pcm_stream *stream;
3816 struct hda_pcm *pcm;
3817 int err;
3818
3819 err = generic_hdmi_build_pcms(codec);
3820 if (err < 0)
3821 return err;
3822
3823 pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3824 if (!pcm)
3825 return -ENODEV;
3826
3827
3828
3829
3830
3831 stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3832 stream->ops.prepare = tegra_hdmi_pcm_prepare;
3833 stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3834
3835 return 0;
3836}
3837
3838static int patch_tegra_hdmi(struct hda_codec *codec)
3839{
3840 struct hdmi_spec *spec;
3841 int err;
3842
3843 err = patch_generic_hdmi(codec);
3844 if (err)
3845 return err;
3846
3847 codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3848 spec = codec->spec;
3849 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3850 nvhdmi_chmap_cea_alloc_validate_get_type;
3851 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3852
3853 return 0;
3854}
3855
3856
3857
3858
3859
3860#define is_amdhdmi_rev3_or_later(codec) \
3861 ((codec)->core.vendor_id == 0x1002aa01 && \
3862 ((codec)->core.revision_id & 0xff00) >= 0x0300)
3863#define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3864
3865
3866#define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3867#define ATI_VERB_SET_DOWNMIX_INFO 0x772
3868#define ATI_VERB_SET_MULTICHANNEL_01 0x777
3869#define ATI_VERB_SET_MULTICHANNEL_23 0x778
3870#define ATI_VERB_SET_MULTICHANNEL_45 0x779
3871#define ATI_VERB_SET_MULTICHANNEL_67 0x77a
3872#define ATI_VERB_SET_HBR_CONTROL 0x77c
3873#define ATI_VERB_SET_MULTICHANNEL_1 0x785
3874#define ATI_VERB_SET_MULTICHANNEL_3 0x786
3875#define ATI_VERB_SET_MULTICHANNEL_5 0x787
3876#define ATI_VERB_SET_MULTICHANNEL_7 0x788
3877#define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
3878#define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3879#define ATI_VERB_GET_DOWNMIX_INFO 0xf72
3880#define ATI_VERB_GET_MULTICHANNEL_01 0xf77
3881#define ATI_VERB_GET_MULTICHANNEL_23 0xf78
3882#define ATI_VERB_GET_MULTICHANNEL_45 0xf79
3883#define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
3884#define ATI_VERB_GET_HBR_CONTROL 0xf7c
3885#define ATI_VERB_GET_MULTICHANNEL_1 0xf85
3886#define ATI_VERB_GET_MULTICHANNEL_3 0xf86
3887#define ATI_VERB_GET_MULTICHANNEL_5 0xf87
3888#define ATI_VERB_GET_MULTICHANNEL_7 0xf88
3889#define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
3890
3891
3892#define ATI_VERB_SET_RAMP_RATE 0x770
3893#define ATI_VERB_GET_RAMP_RATE 0xf70
3894
3895#define ATI_OUT_ENABLE 0x1
3896
3897#define ATI_MULTICHANNEL_MODE_PAIRED 0
3898#define ATI_MULTICHANNEL_MODE_SINGLE 1
3899
3900#define ATI_HBR_CAPABLE 0x01
3901#define ATI_HBR_ENABLE 0x10
3902
3903static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3904 int dev_id, unsigned char *buf, int *eld_size)
3905{
3906 WARN_ON(dev_id != 0);
3907
3908 return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3909 is_amdhdmi_rev3_or_later(codec));
3910}
3911
3912static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3913 hda_nid_t pin_nid, int dev_id, int ca,
3914 int active_channels, int conn_type)
3915{
3916 WARN_ON(dev_id != 0);
3917 snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3918}
3919
3920static int atihdmi_paired_swap_fc_lfe(int pos)
3921{
3922
3923
3924
3925
3926
3927 switch (pos) {
3928
3929 case 2: return 3;
3930 case 3: return 2;
3931 default: break;
3932 }
3933
3934 return pos;
3935}
3936
3937static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3938 int ca, int chs, unsigned char *map)
3939{
3940 struct hdac_cea_channel_speaker_allocation *cap;
3941 int i, j;
3942
3943
3944
3945 cap = snd_hdac_get_ch_alloc_from_ca(ca);
3946 for (i = 0; i < chs; ++i) {
3947 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3948 bool ok = false;
3949 bool companion_ok = false;
3950
3951 if (!mask)
3952 continue;
3953
3954 for (j = 0 + i % 2; j < 8; j += 2) {
3955 int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3956 if (cap->speakers[chan_idx] == mask) {
3957
3958 ok = true;
3959
3960 if (i % 2 == 0 && i + 1 < chs) {
3961
3962 int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3963 int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3964 int comp_mask_act = cap->speakers[comp_chan_idx];
3965
3966 if (comp_mask_req == comp_mask_act)
3967 companion_ok = true;
3968 else
3969 return -EINVAL;
3970 }
3971 break;
3972 }
3973 }
3974
3975 if (!ok)
3976 return -EINVAL;
3977
3978 if (companion_ok)
3979 i++;
3980 }
3981
3982 return 0;
3983}
3984
3985static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3986 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3987{
3988 struct hda_codec *codec = hdac_to_hda_codec(hdac);
3989 int verb;
3990 int ati_channel_setup = 0;
3991
3992 if (hdmi_slot > 7)
3993 return -EINVAL;
3994
3995 if (!has_amd_full_remap_support(codec)) {
3996 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3997
3998
3999
4000
4001
4002 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
4003 return 0;
4004
4005 hdmi_slot -= hdmi_slot % 2;
4006
4007 if (stream_channel != 0xf)
4008 stream_channel -= stream_channel % 2;
4009 }
4010
4011 verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
4012
4013
4014
4015 if (stream_channel != 0xf)
4016 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
4017
4018 return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
4019}
4020
4021static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
4022 hda_nid_t pin_nid, int asp_slot)
4023{
4024 struct hda_codec *codec = hdac_to_hda_codec(hdac);
4025 bool was_odd = false;
4026 int ati_asp_slot = asp_slot;
4027 int verb;
4028 int ati_channel_setup;
4029
4030 if (asp_slot > 7)
4031 return -EINVAL;
4032
4033 if (!has_amd_full_remap_support(codec)) {
4034 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
4035 if (ati_asp_slot % 2 != 0) {
4036 ati_asp_slot -= 1;
4037 was_odd = true;
4038 }
4039 }
4040
4041 verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
4042
4043 ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
4044
4045 if (!(ati_channel_setup & ATI_OUT_ENABLE))
4046 return 0xf;
4047
4048 return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
4049}
4050
4051static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
4052 struct hdac_chmap *chmap,
4053 struct hdac_cea_channel_speaker_allocation *cap,
4054 int channels)
4055{
4056 int c;
4057
4058
4059
4060
4061
4062
4063
4064 int chanpairs = 0;
4065
4066
4067 if ((channels % 2) != 0)
4068 return -1;
4069
4070 for (c = 0; c < 7; c += 2) {
4071 if (cap->speakers[c] || cap->speakers[c+1])
4072 chanpairs++;
4073 }
4074
4075 if (chanpairs * 2 != channels)
4076 return -1;
4077
4078 return SNDRV_CTL_TLVT_CHMAP_PAIRED;
4079}
4080
4081static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
4082 struct hdac_cea_channel_speaker_allocation *cap,
4083 unsigned int *chmap, int channels)
4084{
4085
4086 int count = 0;
4087 int c;
4088
4089 for (c = 7; c >= 0; c--) {
4090 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
4091 int spk = cap->speakers[chan];
4092 if (!spk) {
4093
4094 if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
4095 chmap[count++] = SNDRV_CHMAP_NA;
4096
4097 continue;
4098 }
4099
4100 chmap[count++] = snd_hdac_spk_to_chmap(spk);
4101 }
4102
4103 WARN_ON(count != channels);
4104}
4105
4106static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
4107 int dev_id, bool hbr)
4108{
4109 int hbr_ctl, hbr_ctl_new;
4110
4111 WARN_ON(dev_id != 0);
4112
4113 hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
4114 if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
4115 if (hbr)
4116 hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
4117 else
4118 hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
4119
4120 codec_dbg(codec,
4121 "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
4122 pin_nid,
4123 hbr_ctl == hbr_ctl_new ? "" : "new-",
4124 hbr_ctl_new);
4125
4126 if (hbr_ctl != hbr_ctl_new)
4127 snd_hda_codec_write(codec, pin_nid, 0,
4128 ATI_VERB_SET_HBR_CONTROL,
4129 hbr_ctl_new);
4130
4131 } else if (hbr)
4132 return -EINVAL;
4133
4134 return 0;
4135}
4136
4137static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
4138 hda_nid_t pin_nid, int dev_id,
4139 u32 stream_tag, int format)
4140{
4141 if (is_amdhdmi_rev3_or_later(codec)) {
4142 int ramp_rate = 180;
4143
4144 if (format & AC_FMT_TYPE_NON_PCM)
4145 ramp_rate = 0;
4146
4147 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
4148 }
4149
4150 return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
4151 stream_tag, format);
4152}
4153
4154
4155static int atihdmi_init(struct hda_codec *codec)
4156{
4157 struct hdmi_spec *spec = codec->spec;
4158 int pin_idx, err;
4159
4160 err = generic_hdmi_init(codec);
4161
4162 if (err)
4163 return err;
4164
4165 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4166 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4167
4168
4169 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4170
4171
4172 if (has_amd_full_remap_support(codec))
4173 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4174 ATI_VERB_SET_MULTICHANNEL_MODE,
4175 ATI_MULTICHANNEL_MODE_SINGLE);
4176 }
4177 codec->auto_runtime_pm = 1;
4178
4179 return 0;
4180}
4181
4182
4183
4184static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4185{
4186 return pin_nid / 2 - 1;
4187}
4188
4189
4190static int atihdmi_port2pin(struct hda_codec *codec, int port)
4191{
4192 return port * 2 + 3;
4193}
4194
4195static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4196 .pin2port = atihdmi_pin2port,
4197 .pin_eld_notify = generic_acomp_pin_eld_notify,
4198 .master_bind = generic_acomp_master_bind,
4199 .master_unbind = generic_acomp_master_unbind,
4200};
4201
4202static int patch_atihdmi(struct hda_codec *codec)
4203{
4204 struct hdmi_spec *spec;
4205 struct hdmi_spec_per_cvt *per_cvt;
4206 int err, cvt_idx;
4207
4208 err = patch_generic_hdmi(codec);
4209
4210 if (err)
4211 return err;
4212
4213 codec->patch_ops.init = atihdmi_init;
4214
4215 spec = codec->spec;
4216
4217 spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4218 spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4219 spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4220 spec->ops.setup_stream = atihdmi_setup_stream;
4221
4222 spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4223 spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4224
4225 if (!has_amd_full_remap_support(codec)) {
4226
4227 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4228 atihdmi_paired_chmap_cea_alloc_validate_get_type;
4229 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4230 atihdmi_paired_cea_alloc_to_tlv_chmap;
4231 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4232 }
4233
4234
4235 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4236 per_cvt = get_cvt(spec, cvt_idx);
4237 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4238 per_cvt->rates |= SUPPORTED_RATES;
4239 per_cvt->formats |= SUPPORTED_FORMATS;
4240 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4241 }
4242
4243 spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4244
4245
4246
4247
4248 codec->link_down_at_suspend = 1;
4249
4250 generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4251
4252 return 0;
4253}
4254
4255
4256#define VIAHDMI_CVT_NID 0x02
4257#define VIAHDMI_PIN_NID 0x03
4258
4259static int patch_via_hdmi(struct hda_codec *codec)
4260{
4261 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4262}
4263
4264
4265
4266
4267static const struct hda_device_id snd_hda_id_hdmi[] = {
4268HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi),
4269HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi),
4270HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi),
4271HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI", patch_atihdmi),
4272HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi),
4273HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi),
4274HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi),
4275HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI", patch_nvhdmi_2ch),
4276HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4277HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4278HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI", patch_nvhdmi_8ch_7x),
4279HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4280HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4281HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x),
4282HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP", patch_nvhdmi_legacy),
4283HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP", patch_nvhdmi_legacy),
4284HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi_legacy),
4285HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi_legacy),
4286HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi_legacy),
4287HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP", patch_nvhdmi_legacy),
4288HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP", patch_nvhdmi_legacy),
4289HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP", patch_nvhdmi_legacy),
4290HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP", patch_nvhdmi_legacy),
4291HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP", patch_nvhdmi_legacy),
4292HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP", patch_nvhdmi_legacy),
4293HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP", patch_nvhdmi_legacy),
4294HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP", patch_nvhdmi_legacy),
4295
4296HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP", patch_nvhdmi_legacy),
4297HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP", patch_nvhdmi_legacy),
4298HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP", patch_nvhdmi_legacy),
4299HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP", patch_nvhdmi_legacy),
4300HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP", patch_nvhdmi_legacy),
4301HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI", patch_tegra_hdmi),
4302HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI", patch_tegra_hdmi),
4303HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI", patch_tegra_hdmi),
4304HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4305HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4306HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4307HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4308HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4309HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP", patch_nvhdmi),
4310HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi),
4311HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi),
4312HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi),
4313HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi),
4314HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP", patch_nvhdmi),
4315HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP", patch_nvhdmi),
4316HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi),
4317HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP", patch_nvhdmi),
4318HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi),
4319HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP", patch_nvhdmi),
4320HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP", patch_nvhdmi),
4321HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch),
4322HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi),
4323HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi),
4324HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi),
4325HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP", patch_nvhdmi),
4326HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP", patch_nvhdmi),
4327HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP", patch_nvhdmi),
4328HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP", patch_nvhdmi),
4329HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP", patch_nvhdmi),
4330HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi),
4331HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP", patch_nvhdmi),
4332HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi),
4333HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP", patch_nvhdmi),
4334HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi),
4335HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi),
4336HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP", patch_nvhdmi),
4337HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP", patch_nvhdmi),
4338HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP", patch_nvhdmi),
4339HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP", patch_nvhdmi),
4340HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP", patch_nvhdmi),
4341HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP", patch_nvhdmi),
4342HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP", patch_nvhdmi),
4343HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP", patch_nvhdmi),
4344HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP", patch_nvhdmi),
4345HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP", patch_nvhdmi),
4346HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP", patch_nvhdmi),
4347HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP", patch_nvhdmi),
4348HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP", patch_nvhdmi),
4349HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP", patch_nvhdmi),
4350HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP", patch_nvhdmi),
4351HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch),
4352HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI", patch_nvhdmi_2ch),
4353HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi),
4354HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi),
4355HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi),
4356HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi),
4357HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi),
4358HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI", patch_i915_glk_hdmi),
4359HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi),
4360HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi),
4361HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi),
4362HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI", patch_i915_cpt_hdmi),
4363HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4364HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4365HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI", patch_i915_hsw_hdmi),
4366HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI", patch_i915_hsw_hdmi),
4367HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI", patch_i915_hsw_hdmi),
4368HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_i915_hsw_hdmi),
4369HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi),
4370HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI", patch_i915_glk_hdmi),
4371HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_glk_hdmi),
4372HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi),
4373HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI", patch_i915_tgl_hdmi),
4374HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
4375HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI", patch_i915_tgl_hdmi),
4376HDA_CODEC_ENTRY(0x8086281c, "Alderlake-P HDMI", patch_i915_tgl_hdmi),
4377HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI", patch_i915_tgl_hdmi),
4378HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI", patch_i915_icl_hdmi),
4379HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
4380HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi),
4381HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4382HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi),
4383HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_generic_hdmi),
4384
4385HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4386{}
4387};
4388MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4389
4390MODULE_LICENSE("GPL");
4391MODULE_DESCRIPTION("HDMI HD-audio codec");
4392MODULE_ALIAS("snd-hda-codec-intelhdmi");
4393MODULE_ALIAS("snd-hda-codec-nvhdmi");
4394MODULE_ALIAS("snd-hda-codec-atihdmi");
4395
4396static struct hda_codec_driver hdmi_driver = {
4397 .id = snd_hda_id_hdmi,
4398};
4399
4400module_hda_codec_driver(hdmi_driver);
4401