linux/sound/pci/rme9652/rme9652.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 *   ALSA driver for RME Digi9652 audio interfaces 
   4 *
   5 *      Copyright (c) 1999 IEM - Winfried Ritsch
   6 *      Copyright (c) 1999-2001  Paul Davis
   7 */
   8
   9#include <linux/delay.h>
  10#include <linux/init.h>
  11#include <linux/interrupt.h>
  12#include <linux/pci.h>
  13#include <linux/module.h>
  14#include <linux/io.h>
  15#include <linux/nospec.h>
  16
  17#include <sound/core.h>
  18#include <sound/control.h>
  19#include <sound/pcm.h>
  20#include <sound/info.h>
  21#include <sound/asoundef.h>
  22#include <sound/initval.h>
  23
  24#include <asm/current.h>
  25
  26static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  27static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  28static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  29static bool precise_ptr[SNDRV_CARDS];                   /* Enable precise pointer */
  30
  31module_param_array(index, int, NULL, 0444);
  32MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
  33module_param_array(id, charp, NULL, 0444);
  34MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
  35module_param_array(enable, bool, NULL, 0444);
  36MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
  37module_param_array(precise_ptr, bool, NULL, 0444);
  38MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
  39MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
  40MODULE_DESCRIPTION("RME Digi9652/Digi9636");
  41MODULE_LICENSE("GPL");
  42
  43/* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
  44   capture, one for playback. Both the ADAT and S/PDIF channels appear
  45   to the host CPU in the same block of memory. There is no functional
  46   difference between them in terms of access.
  47   
  48   The Hammerfall Light is identical to the Hammerfall, except that it
  49   has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
  50*/
  51
  52#define RME9652_NCHANNELS       26
  53#define RME9636_NCHANNELS       18
  54
  55/* Preferred sync source choices - used by "sync_pref" control switch */
  56
  57#define RME9652_SYNC_FROM_SPDIF 0
  58#define RME9652_SYNC_FROM_ADAT1 1
  59#define RME9652_SYNC_FROM_ADAT2 2
  60#define RME9652_SYNC_FROM_ADAT3 3
  61
  62/* Possible sources of S/PDIF input */
  63
  64#define RME9652_SPDIFIN_OPTICAL 0       /* optical (ADAT1) */
  65#define RME9652_SPDIFIN_COAXIAL 1       /* coaxial (RCA) */
  66#define RME9652_SPDIFIN_INTERN  2       /* internal (CDROM) */
  67
  68/* ------------- Status-Register bits --------------------- */
  69
  70#define RME9652_IRQ        (1<<0)       /* IRQ is High if not reset by irq_clear */
  71#define RME9652_lock_2     (1<<1)       /* ADAT 3-PLL: 1=locked, 0=unlocked */
  72#define RME9652_lock_1     (1<<2)       /* ADAT 2-PLL: 1=locked, 0=unlocked */
  73#define RME9652_lock_0     (1<<3)       /* ADAT 1-PLL: 1=locked, 0=unlocked */
  74#define RME9652_fs48       (1<<4)       /* sample rate is 0=44.1/88.2,1=48/96 Khz */
  75#define RME9652_wsel_rd    (1<<5)       /* if Word-Clock is used and valid then 1 */
  76                                        /* bits 6-15 encode h/w buffer pointer position */
  77#define RME9652_sync_2     (1<<16)      /* if ADAT-IN 3 in sync to system clock */
  78#define RME9652_sync_1     (1<<17)      /* if ADAT-IN 2 in sync to system clock */
  79#define RME9652_sync_0     (1<<18)      /* if ADAT-IN 1 in sync to system clock */
  80#define RME9652_DS_rd      (1<<19)      /* 1=Double Speed Mode, 0=Normal Speed */
  81#define RME9652_tc_busy    (1<<20)      /* 1=time-code copy in progress (960ms) */
  82#define RME9652_tc_out     (1<<21)      /* time-code out bit */
  83#define RME9652_F_0        (1<<22)      /* 000=64kHz, 100=88.2kHz, 011=96kHz  */
  84#define RME9652_F_1        (1<<23)      /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
  85#define RME9652_F_2        (1<<24)      /* external Crystal Chip if ERF=1 */
  86#define RME9652_ERF        (1<<25)      /* Error-Flag of SDPIF Receiver (1=No Lock) */
  87#define RME9652_buffer_id  (1<<26)      /* toggles by each interrupt on rec/play */
  88#define RME9652_tc_valid   (1<<27)      /* 1 = a signal is detected on time-code input */
  89#define RME9652_SPDIF_READ (1<<28)      /* byte available from Rev 1.5+ S/PDIF interface */
  90
  91#define RME9652_sync      (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
  92#define RME9652_lock      (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
  93#define RME9652_F         (RME9652_F_0|RME9652_F_1|RME9652_F_2)
  94#define rme9652_decode_spdif_rate(x) ((x)>>22)
  95
  96/* Bit 6..15 : h/w buffer pointer */
  97
  98#define RME9652_buf_pos   0x000FFC0
  99
 100/* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
 101   Rev G EEPROMS and Rev 1.5 cards or later.
 102*/ 
 103
 104#define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
 105
 106/* amount of io space we remap for register access. i'm not sure we
 107   even need this much, but 1K is nice round number :)
 108*/
 109
 110#define RME9652_IO_EXTENT     1024
 111
 112#define RME9652_init_buffer       0
 113#define RME9652_play_buffer       32    /* holds ptr to 26x64kBit host RAM */
 114#define RME9652_rec_buffer        36    /* holds ptr to 26x64kBit host RAM */
 115#define RME9652_control_register  64
 116#define RME9652_irq_clear         96
 117#define RME9652_time_code         100   /* useful if used with alesis adat */
 118#define RME9652_thru_base         128   /* 132...228 Thru for 26 channels */
 119
 120/* Read-only registers */
 121
 122/* Writing to any of the register locations writes to the status
 123   register. We'll use the first location as our point of access.
 124*/
 125
 126#define RME9652_status_register    0
 127
 128/* --------- Control-Register Bits ---------------- */
 129
 130
 131#define RME9652_start_bit          (1<<0)       /* start record/play */
 132                                                /* bits 1-3 encode buffersize/latency */
 133#define RME9652_Master             (1<<4)       /* Clock Mode Master=1,Slave/Auto=0 */
 134#define RME9652_IE                 (1<<5)       /* Interrupt Enable */
 135#define RME9652_freq               (1<<6)       /* samplerate 0=44.1/88.2, 1=48/96 kHz */
 136#define RME9652_freq1              (1<<7)       /* if 0, 32kHz, else always 1 */
 137#define RME9652_DS                 (1<<8)       /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
 138#define RME9652_PRO                (1<<9)       /* S/PDIF out: 0=consumer, 1=professional */
 139#define RME9652_EMP                (1<<10)      /*  Emphasis 0=None, 1=ON */
 140#define RME9652_Dolby              (1<<11)      /*  Non-audio bit 1=set, 0=unset */
 141#define RME9652_opt_out            (1<<12)      /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
 142#define RME9652_wsel               (1<<13)      /* use Wordclock as sync (overwrites master) */
 143#define RME9652_inp_0              (1<<14)      /* SPDIF-IN: 00=optical (ADAT1),     */
 144#define RME9652_inp_1              (1<<15)      /* 01=koaxial (Cinch), 10=Internal CDROM */
 145#define RME9652_SyncPref_ADAT2     (1<<16)
 146#define RME9652_SyncPref_ADAT3     (1<<17)
 147#define RME9652_SPDIF_RESET        (1<<18)      /* Rev 1.5+: h/w S/PDIF receiver */
 148#define RME9652_SPDIF_SELECT       (1<<19)
 149#define RME9652_SPDIF_CLOCK        (1<<20)
 150#define RME9652_SPDIF_WRITE        (1<<21)
 151#define RME9652_ADAT1_INTERNAL     (1<<22)      /* Rev 1.5+: if set, internal CD connector carries ADAT */
 152
 153/* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
 154
 155#define RME9652_latency            0x0e
 156#define rme9652_encode_latency(x)  (((x)&0x7)<<1)
 157#define rme9652_decode_latency(x)  (((x)>>1)&0x7)
 158#define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
 159#define RME9652_inp                (RME9652_inp_0|RME9652_inp_1)
 160#define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
 161#define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
 162
 163#define RME9652_SyncPref_Mask      (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 164#define RME9652_SyncPref_ADAT1     0
 165#define RME9652_SyncPref_SPDIF     (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 166
 167/* the size of a substream (1 mono data stream) */
 168
 169#define RME9652_CHANNEL_BUFFER_SAMPLES  (16*1024)
 170#define RME9652_CHANNEL_BUFFER_BYTES    (4*RME9652_CHANNEL_BUFFER_SAMPLES)
 171
 172/* the size of the area we need to allocate for DMA transfers. the
 173   size is the same regardless of the number of channels - the 
 174   9636 still uses the same memory area.
 175
 176   Note that we allocate 1 more channel than is apparently needed
 177   because the h/w seems to write 1 byte beyond the end of the last
 178   page. Sigh.
 179*/
 180
 181#define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
 182#define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
 183
 184struct snd_rme9652 {
 185        int dev;
 186
 187        spinlock_t lock;
 188        int irq;
 189        unsigned long port;
 190        void __iomem *iobase;
 191        
 192        int precise_ptr;
 193
 194        u32 control_register;   /* cached value */
 195        u32 thru_bits;          /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
 196
 197        u32 creg_spdif;
 198        u32 creg_spdif_stream;
 199
 200        char *card_name;                /* hammerfall or hammerfall light names */
 201
 202        size_t hw_offsetmask;           /* &-with status register to get real hw_offset */
 203        size_t prev_hw_offset;          /* previous hw offset */
 204        size_t max_jitter;              /* maximum jitter in frames for 
 205                                           hw pointer */
 206        size_t period_bytes;            /* guess what this is */
 207
 208        unsigned char ds_channels;
 209        unsigned char ss_channels;      /* different for hammerfall/hammerfall-light */
 210
 211        struct snd_dma_buffer playback_dma_buf;
 212        struct snd_dma_buffer capture_dma_buf;
 213
 214        unsigned char *capture_buffer;  /* suitably aligned address */
 215        unsigned char *playback_buffer; /* suitably aligned address */
 216
 217        pid_t capture_pid;
 218        pid_t playback_pid;
 219
 220        struct snd_pcm_substream *capture_substream;
 221        struct snd_pcm_substream *playback_substream;
 222        int running;
 223
 224        int passthru;                   /* non-zero if doing pass-thru */
 225        int hw_rev;                     /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
 226
 227        int last_spdif_sample_rate;     /* so that we can catch externally ... */
 228        int last_adat_sample_rate;      /* ... induced rate changes            */
 229
 230        const char *channel_map;
 231
 232        struct snd_card *card;
 233        struct snd_pcm *pcm;
 234        struct pci_dev *pci;
 235        struct snd_kcontrol *spdif_ctl;
 236
 237};
 238
 239/* These tables map the ALSA channels 1..N to the channels that we
 240   need to use in order to find the relevant channel buffer. RME
 241   refer to this kind of mapping as between "the ADAT channel and
 242   the DMA channel." We index it using the logical audio channel,
 243   and the value is the DMA channel (i.e. channel buffer number)
 244   where the data for that channel can be read/written from/to.
 245*/
 246
 247static const char channel_map_9652_ss[26] = {
 248        0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 249        18, 19, 20, 21, 22, 23, 24, 25
 250};
 251
 252static const char channel_map_9636_ss[26] = {
 253        0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 
 254        /* channels 16 and 17 are S/PDIF */
 255        24, 25,
 256        /* channels 18-25 don't exist */
 257        -1, -1, -1, -1, -1, -1, -1, -1
 258};
 259
 260static const char channel_map_9652_ds[26] = {
 261        /* ADAT channels are remapped */
 262        1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 263        /* channels 12 and 13 are S/PDIF */
 264        24, 25,
 265        /* others don't exist */
 266        -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 267};
 268
 269static const char channel_map_9636_ds[26] = {
 270        /* ADAT channels are remapped */
 271        1, 3, 5, 7, 9, 11, 13, 15,
 272        /* channels 8 and 9 are S/PDIF */
 273        24, 25,
 274        /* others don't exist */
 275        -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 276};
 277
 278static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 279{
 280        return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, size, dmab);
 281}
 282
 283static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 284{
 285        if (dmab->area)
 286                snd_dma_free_pages(dmab);
 287}
 288
 289
 290static const struct pci_device_id snd_rme9652_ids[] = {
 291        {
 292                .vendor    = 0x10ee,
 293                .device    = 0x3fc4,
 294                .subvendor = PCI_ANY_ID,
 295                .subdevice = PCI_ANY_ID,
 296        },      /* RME Digi9652 */
 297        { 0, },
 298};
 299
 300MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
 301
 302static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
 303{
 304        writel(val, rme9652->iobase + reg);
 305}
 306
 307static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
 308{
 309        return readl(rme9652->iobase + reg);
 310}
 311
 312static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
 313{
 314        unsigned long flags;
 315        int ret = 1;
 316
 317        spin_lock_irqsave(&rme9652->lock, flags);
 318        if ((rme9652->playback_pid != rme9652->capture_pid) &&
 319            (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
 320                ret = 0;
 321        }
 322        spin_unlock_irqrestore(&rme9652->lock, flags);
 323        return ret;
 324}
 325
 326static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
 327{
 328        if (rme9652_running_double_speed(rme9652)) {
 329                return (rme9652_read(rme9652, RME9652_status_register) &
 330                        RME9652_fs48) ? 96000 : 88200;
 331        } else {
 332                return (rme9652_read(rme9652, RME9652_status_register) &
 333                        RME9652_fs48) ? 48000 : 44100;
 334        }
 335}
 336
 337static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
 338{
 339        unsigned int i;
 340
 341        i = rme9652->control_register & RME9652_latency;
 342        rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
 343        rme9652->hw_offsetmask = 
 344                (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
 345        rme9652->max_jitter = 80;
 346}
 347
 348static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
 349{
 350        int status;
 351        unsigned int offset, frag;
 352        snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
 353        snd_pcm_sframes_t delta;
 354
 355        status = rme9652_read(rme9652, RME9652_status_register);
 356        if (!rme9652->precise_ptr)
 357                return (status & RME9652_buffer_id) ? period_size : 0;
 358        offset = status & RME9652_buf_pos;
 359
 360        /* The hardware may give a backward movement for up to 80 frames
 361           Martin Kirst <martin.kirst@freenet.de> knows the details.
 362        */
 363
 364        delta = rme9652->prev_hw_offset - offset;
 365        delta &= 0xffff;
 366        if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
 367                offset = rme9652->prev_hw_offset;
 368        else
 369                rme9652->prev_hw_offset = offset;
 370        offset &= rme9652->hw_offsetmask;
 371        offset /= 4;
 372        frag = status & RME9652_buffer_id;
 373
 374        if (offset < period_size) {
 375                if (offset > rme9652->max_jitter) {
 376                        if (frag)
 377                                dev_err(rme9652->card->dev,
 378                                        "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
 379                                        status, offset);
 380                } else if (!frag)
 381                        return 0;
 382                offset -= rme9652->max_jitter;
 383                if ((int)offset < 0)
 384                        offset += period_size * 2;
 385        } else {
 386                if (offset > period_size + rme9652->max_jitter) {
 387                        if (!frag)
 388                                dev_err(rme9652->card->dev,
 389                                        "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
 390                                        status, offset);
 391                } else if (frag)
 392                        return period_size;
 393                offset -= rme9652->max_jitter;
 394        }
 395
 396        return offset;
 397}
 398
 399static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
 400{
 401        int i;
 402
 403        /* reset the FIFO pointer to zero. We do this by writing to 8
 404           registers, each of which is a 32bit wide register, and set
 405           them all to zero. Note that s->iobase is a pointer to
 406           int32, not pointer to char.  
 407        */
 408
 409        for (i = 0; i < 8; i++) {
 410                rme9652_write(rme9652, i * 4, 0);
 411                udelay(10);
 412        }
 413        rme9652->prev_hw_offset = 0;
 414}
 415
 416static inline void rme9652_start(struct snd_rme9652 *s)
 417{
 418        s->control_register |= (RME9652_IE | RME9652_start_bit);
 419        rme9652_write(s, RME9652_control_register, s->control_register);
 420}
 421
 422static inline void rme9652_stop(struct snd_rme9652 *s)
 423{
 424        s->control_register &= ~(RME9652_start_bit | RME9652_IE);
 425        rme9652_write(s, RME9652_control_register, s->control_register);
 426}
 427
 428static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
 429                                          unsigned int frames)
 430{
 431        int restart = 0;
 432        int n;
 433
 434        spin_lock_irq(&s->lock);
 435
 436        restart = s->running;
 437        if (restart)
 438                rme9652_stop(s);
 439
 440        frames >>= 7;
 441        n = 0;
 442        while (frames) {
 443                n++;
 444                frames >>= 1;
 445        }
 446
 447        s->control_register &= ~RME9652_latency;
 448        s->control_register |= rme9652_encode_latency(n);
 449
 450        rme9652_write(s, RME9652_control_register, s->control_register);
 451
 452        rme9652_compute_period_size(s);
 453
 454        if (restart)
 455                rme9652_start(s);
 456
 457        spin_unlock_irq(&s->lock);
 458
 459        return 0;
 460}
 461
 462static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
 463{
 464        int restart;
 465        int reject_if_open = 0;
 466        int xrate;
 467
 468        if (!snd_rme9652_use_is_exclusive (rme9652)) {
 469                return -EBUSY;
 470        }
 471
 472        /* Changing from a "single speed" to a "double speed" rate is
 473           not allowed if any substreams are open. This is because
 474           such a change causes a shift in the location of 
 475           the DMA buffers and a reduction in the number of available
 476           buffers. 
 477
 478           Note that a similar but essentially insoluble problem
 479           exists for externally-driven rate changes. All we can do
 480           is to flag rate changes in the read/write routines.
 481         */
 482
 483        spin_lock_irq(&rme9652->lock);
 484        xrate = rme9652_adat_sample_rate(rme9652);
 485
 486        switch (rate) {
 487        case 44100:
 488                if (xrate > 48000) {
 489                        reject_if_open = 1;
 490                }
 491                rate = 0;
 492                break;
 493        case 48000:
 494                if (xrate > 48000) {
 495                        reject_if_open = 1;
 496                }
 497                rate = RME9652_freq;
 498                break;
 499        case 88200:
 500                if (xrate < 48000) {
 501                        reject_if_open = 1;
 502                }
 503                rate = RME9652_DS;
 504                break;
 505        case 96000:
 506                if (xrate < 48000) {
 507                        reject_if_open = 1;
 508                }
 509                rate = RME9652_DS | RME9652_freq;
 510                break;
 511        default:
 512                spin_unlock_irq(&rme9652->lock);
 513                return -EINVAL;
 514        }
 515
 516        if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
 517                spin_unlock_irq(&rme9652->lock);
 518                return -EBUSY;
 519        }
 520
 521        restart = rme9652->running;
 522        if (restart)
 523                rme9652_stop(rme9652);
 524        rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
 525        rme9652->control_register |= rate;
 526        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 527
 528        if (restart)
 529                rme9652_start(rme9652);
 530
 531        if (rate & RME9652_DS) {
 532                if (rme9652->ss_channels == RME9652_NCHANNELS) {
 533                        rme9652->channel_map = channel_map_9652_ds;
 534                } else {
 535                        rme9652->channel_map = channel_map_9636_ds;
 536                }
 537        } else {
 538                if (rme9652->ss_channels == RME9652_NCHANNELS) {
 539                        rme9652->channel_map = channel_map_9652_ss;
 540                } else {
 541                        rme9652->channel_map = channel_map_9636_ss;
 542                }
 543        }
 544
 545        spin_unlock_irq(&rme9652->lock);
 546        return 0;
 547}
 548
 549static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
 550{
 551        int i;
 552
 553        rme9652->passthru = 0;
 554
 555        if (channel < 0) {
 556
 557                /* set thru for all channels */
 558
 559                if (enable) {
 560                        for (i = 0; i < RME9652_NCHANNELS; i++) {
 561                                rme9652->thru_bits |= (1 << i);
 562                                rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
 563                        }
 564                } else {
 565                        for (i = 0; i < RME9652_NCHANNELS; i++) {
 566                                rme9652->thru_bits &= ~(1 << i);
 567                                rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
 568                        }
 569                }
 570
 571        } else {
 572                int mapped_channel;
 573
 574                mapped_channel = rme9652->channel_map[channel];
 575
 576                if (enable) {
 577                        rme9652->thru_bits |= (1 << mapped_channel);
 578                } else {
 579                        rme9652->thru_bits &= ~(1 << mapped_channel);
 580                }
 581
 582                rme9652_write(rme9652,
 583                               RME9652_thru_base + mapped_channel * 4,
 584                               enable ? 1 : 0);                        
 585        }
 586}
 587
 588static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
 589{
 590        if (onoff) {
 591                rme9652_set_thru(rme9652, -1, 1);
 592
 593                /* we don't want interrupts, so do a
 594                   custom version of rme9652_start().
 595                */
 596
 597                rme9652->control_register =
 598                        RME9652_inp_0 | 
 599                        rme9652_encode_latency(7) |
 600                        RME9652_start_bit;
 601
 602                rme9652_reset_hw_pointer(rme9652);
 603
 604                rme9652_write(rme9652, RME9652_control_register,
 605                              rme9652->control_register);
 606                rme9652->passthru = 1;
 607        } else {
 608                rme9652_set_thru(rme9652, -1, 0);
 609                rme9652_stop(rme9652);          
 610                rme9652->passthru = 0;
 611        }
 612
 613        return 0;
 614}
 615
 616static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
 617{
 618        if (onoff) 
 619                rme9652->control_register |= mask;
 620        else 
 621                rme9652->control_register &= ~mask;
 622                
 623        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 624}
 625
 626static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
 627{
 628        long mask;
 629        long i;
 630
 631        for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
 632                if (val & mask)
 633                        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
 634                else 
 635                        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
 636
 637                rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 638                rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 639        }
 640}
 641
 642static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
 643{
 644        long mask;
 645        long val;
 646        long i;
 647
 648        val = 0;
 649
 650        for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
 651                rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 652                if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
 653                        val |= mask;
 654                rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 655        }
 656
 657        return val;
 658}
 659
 660static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
 661{
 662        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 663        rme9652_spdif_write_byte (rme9652, 0x20);
 664        rme9652_spdif_write_byte (rme9652, address);
 665        rme9652_spdif_write_byte (rme9652, data);
 666        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 667}
 668
 669
 670static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
 671{
 672        int ret;
 673
 674        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 675        rme9652_spdif_write_byte (rme9652, 0x20);
 676        rme9652_spdif_write_byte (rme9652, address);
 677        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 678        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 679
 680        rme9652_spdif_write_byte (rme9652, 0x21);
 681        ret = rme9652_spdif_read_byte (rme9652);
 682        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 683
 684        return ret;
 685}
 686
 687static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
 688{
 689        /* XXX what unsets this ? */
 690
 691        rme9652->control_register |= RME9652_SPDIF_RESET;
 692
 693        rme9652_write_spdif_codec (rme9652, 4, 0x40);
 694        rme9652_write_spdif_codec (rme9652, 17, 0x13);
 695        rme9652_write_spdif_codec (rme9652, 6, 0x02);
 696}
 697
 698static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
 699{
 700        unsigned int rate_bits;
 701
 702        if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
 703                return -1;      /* error condition */
 704        }
 705        
 706        if (s->hw_rev == 15) {
 707
 708                int x, y, ret;
 709                
 710                x = rme9652_spdif_read_codec (s, 30);
 711
 712                if (x != 0) 
 713                        y = 48000 * 64 / x;
 714                else
 715                        y = 0;
 716
 717                if      (y > 30400 && y < 33600)  ret = 32000; 
 718                else if (y > 41900 && y < 46000)  ret = 44100;
 719                else if (y > 46000 && y < 50400)  ret = 48000;
 720                else if (y > 60800 && y < 67200)  ret = 64000;
 721                else if (y > 83700 && y < 92000)  ret = 88200;
 722                else if (y > 92000 && y < 100000) ret = 96000;
 723                else                              ret = 0;
 724                return ret;
 725        }
 726
 727        rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
 728
 729        switch (rme9652_decode_spdif_rate(rate_bits)) {
 730        case 0x7:
 731                return 32000;
 732
 733        case 0x6:
 734                return 44100;
 735
 736        case 0x5:
 737                return 48000;
 738
 739        case 0x4:
 740                return 88200;
 741
 742        case 0x3:
 743                return 96000;
 744
 745        case 0x0:
 746                return 64000;
 747
 748        default:
 749                dev_err(s->card->dev,
 750                        "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
 751                           s->card_name, rate_bits);
 752                return 0;
 753        }
 754}
 755
 756/*-----------------------------------------------------------------------------
 757  Control Interface
 758  ----------------------------------------------------------------------------*/
 759
 760static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
 761{
 762        u32 val = 0;
 763        val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
 764        val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
 765        if (val & RME9652_PRO)
 766                val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
 767        else
 768                val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
 769        return val;
 770}
 771
 772static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
 773{
 774        aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
 775                         ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
 776        if (val & RME9652_PRO)
 777                aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
 778        else
 779                aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
 780}
 781
 782static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 783{
 784        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 785        uinfo->count = 1;
 786        return 0;
 787}
 788
 789static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 790{
 791        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 792        
 793        snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
 794        return 0;
 795}
 796
 797static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 798{
 799        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 800        int change;
 801        u32 val;
 802        
 803        val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 804        spin_lock_irq(&rme9652->lock);
 805        change = val != rme9652->creg_spdif;
 806        rme9652->creg_spdif = val;
 807        spin_unlock_irq(&rme9652->lock);
 808        return change;
 809}
 810
 811static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 812{
 813        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 814        uinfo->count = 1;
 815        return 0;
 816}
 817
 818static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 819{
 820        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 821        
 822        snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
 823        return 0;
 824}
 825
 826static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 827{
 828        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 829        int change;
 830        u32 val;
 831        
 832        val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 833        spin_lock_irq(&rme9652->lock);
 834        change = val != rme9652->creg_spdif_stream;
 835        rme9652->creg_spdif_stream = val;
 836        rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
 837        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
 838        spin_unlock_irq(&rme9652->lock);
 839        return change;
 840}
 841
 842static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 843{
 844        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 845        uinfo->count = 1;
 846        return 0;
 847}
 848
 849static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 850{
 851        ucontrol->value.iec958.status[0] = kcontrol->private_value;
 852        return 0;
 853}
 854
 855#define RME9652_ADAT1_IN(xname, xindex) \
 856{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 857  .info = snd_rme9652_info_adat1_in, \
 858  .get = snd_rme9652_get_adat1_in, \
 859  .put = snd_rme9652_put_adat1_in }
 860
 861static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
 862{
 863        if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
 864                return 1; 
 865        return 0;
 866}
 867
 868static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
 869{
 870        int restart = 0;
 871
 872        if (internal) {
 873                rme9652->control_register |= RME9652_ADAT1_INTERNAL;
 874        } else {
 875                rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
 876        }
 877
 878        /* XXX do we actually need to stop the card when we do this ? */
 879
 880        restart = rme9652->running;
 881        if (restart)
 882                rme9652_stop(rme9652);
 883
 884        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 885
 886        if (restart)
 887                rme9652_start(rme9652);
 888
 889        return 0;
 890}
 891
 892static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 893{
 894        static const char * const texts[2] = {"ADAT1", "Internal"};
 895
 896        return snd_ctl_enum_info(uinfo, 1, 2, texts);
 897}
 898
 899static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 900{
 901        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 902        
 903        spin_lock_irq(&rme9652->lock);
 904        ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
 905        spin_unlock_irq(&rme9652->lock);
 906        return 0;
 907}
 908
 909static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 910{
 911        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 912        int change;
 913        unsigned int val;
 914        
 915        if (!snd_rme9652_use_is_exclusive(rme9652))
 916                return -EBUSY;
 917        val = ucontrol->value.enumerated.item[0] % 2;
 918        spin_lock_irq(&rme9652->lock);
 919        change = val != rme9652_adat1_in(rme9652);
 920        if (change)
 921                rme9652_set_adat1_input(rme9652, val);
 922        spin_unlock_irq(&rme9652->lock);
 923        return change;
 924}
 925
 926#define RME9652_SPDIF_IN(xname, xindex) \
 927{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 928  .info = snd_rme9652_info_spdif_in, \
 929  .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
 930
 931static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
 932{
 933        return rme9652_decode_spdif_in(rme9652->control_register &
 934                                       RME9652_inp);
 935}
 936
 937static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
 938{
 939        int restart = 0;
 940
 941        rme9652->control_register &= ~RME9652_inp;
 942        rme9652->control_register |= rme9652_encode_spdif_in(in);
 943
 944        restart = rme9652->running;
 945        if (restart)
 946                rme9652_stop(rme9652);
 947
 948        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 949
 950        if (restart)
 951                rme9652_start(rme9652);
 952
 953        return 0;
 954}
 955
 956static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 957{
 958        static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
 959
 960        return snd_ctl_enum_info(uinfo, 1, 3, texts);
 961}
 962
 963static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 964{
 965        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 966        
 967        spin_lock_irq(&rme9652->lock);
 968        ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
 969        spin_unlock_irq(&rme9652->lock);
 970        return 0;
 971}
 972
 973static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 974{
 975        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 976        int change;
 977        unsigned int val;
 978        
 979        if (!snd_rme9652_use_is_exclusive(rme9652))
 980                return -EBUSY;
 981        val = ucontrol->value.enumerated.item[0] % 3;
 982        spin_lock_irq(&rme9652->lock);
 983        change = val != rme9652_spdif_in(rme9652);
 984        if (change)
 985                rme9652_set_spdif_input(rme9652, val);
 986        spin_unlock_irq(&rme9652->lock);
 987        return change;
 988}
 989
 990#define RME9652_SPDIF_OUT(xname, xindex) \
 991{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 992  .info = snd_rme9652_info_spdif_out, \
 993  .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
 994
 995static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
 996{
 997        return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
 998}
 999
1000static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1001{
1002        int restart = 0;
1003
1004        if (out) {
1005                rme9652->control_register |= RME9652_opt_out;
1006        } else {
1007                rme9652->control_register &= ~RME9652_opt_out;
1008        }
1009
1010        restart = rme9652->running;
1011        if (restart)
1012                rme9652_stop(rme9652);
1013
1014        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1015
1016        if (restart)
1017                rme9652_start(rme9652);
1018
1019        return 0;
1020}
1021
1022#define snd_rme9652_info_spdif_out      snd_ctl_boolean_mono_info
1023
1024static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1025{
1026        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1027        
1028        spin_lock_irq(&rme9652->lock);
1029        ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1030        spin_unlock_irq(&rme9652->lock);
1031        return 0;
1032}
1033
1034static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1035{
1036        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1037        int change;
1038        unsigned int val;
1039        
1040        if (!snd_rme9652_use_is_exclusive(rme9652))
1041                return -EBUSY;
1042        val = ucontrol->value.integer.value[0] & 1;
1043        spin_lock_irq(&rme9652->lock);
1044        change = (int)val != rme9652_spdif_out(rme9652);
1045        rme9652_set_spdif_output(rme9652, val);
1046        spin_unlock_irq(&rme9652->lock);
1047        return change;
1048}
1049
1050#define RME9652_SYNC_MODE(xname, xindex) \
1051{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1052  .info = snd_rme9652_info_sync_mode, \
1053  .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1054
1055static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1056{
1057        if (rme9652->control_register & RME9652_wsel) {
1058                return 2;
1059        } else if (rme9652->control_register & RME9652_Master) {
1060                return 1;
1061        } else {
1062                return 0;
1063        }
1064}
1065
1066static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1067{
1068        int restart = 0;
1069
1070        switch (mode) {
1071        case 0:
1072                rme9652->control_register &=
1073                    ~(RME9652_Master | RME9652_wsel);
1074                break;
1075        case 1:
1076                rme9652->control_register =
1077                    (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1078                break;
1079        case 2:
1080                rme9652->control_register |=
1081                    (RME9652_Master | RME9652_wsel);
1082                break;
1083        }
1084
1085        restart = rme9652->running;
1086        if (restart)
1087                rme9652_stop(rme9652);
1088
1089        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1090
1091        if (restart)
1092                rme9652_start(rme9652);
1093
1094        return 0;
1095}
1096
1097static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1098{
1099        static const char * const texts[3] = {
1100                "AutoSync", "Master", "Word Clock"
1101        };
1102
1103        return snd_ctl_enum_info(uinfo, 1, 3, texts);
1104}
1105
1106static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1107{
1108        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1109        
1110        spin_lock_irq(&rme9652->lock);
1111        ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1112        spin_unlock_irq(&rme9652->lock);
1113        return 0;
1114}
1115
1116static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1117{
1118        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1119        int change;
1120        unsigned int val;
1121        
1122        val = ucontrol->value.enumerated.item[0] % 3;
1123        spin_lock_irq(&rme9652->lock);
1124        change = (int)val != rme9652_sync_mode(rme9652);
1125        rme9652_set_sync_mode(rme9652, val);
1126        spin_unlock_irq(&rme9652->lock);
1127        return change;
1128}
1129
1130#define RME9652_SYNC_PREF(xname, xindex) \
1131{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1132  .info = snd_rme9652_info_sync_pref, \
1133  .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1134
1135static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1136{
1137        switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1138        case RME9652_SyncPref_ADAT1:
1139                return RME9652_SYNC_FROM_ADAT1;
1140        case RME9652_SyncPref_ADAT2:
1141                return RME9652_SYNC_FROM_ADAT2;
1142        case RME9652_SyncPref_ADAT3:
1143                return RME9652_SYNC_FROM_ADAT3;
1144        case RME9652_SyncPref_SPDIF:
1145                return RME9652_SYNC_FROM_SPDIF;
1146        }
1147        /* Not reachable */
1148        return 0;
1149}
1150
1151static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1152{
1153        int restart;
1154
1155        rme9652->control_register &= ~RME9652_SyncPref_Mask;
1156        switch (pref) {
1157        case RME9652_SYNC_FROM_ADAT1:
1158                rme9652->control_register |= RME9652_SyncPref_ADAT1;
1159                break;
1160        case RME9652_SYNC_FROM_ADAT2:
1161                rme9652->control_register |= RME9652_SyncPref_ADAT2;
1162                break;
1163        case RME9652_SYNC_FROM_ADAT3:
1164                rme9652->control_register |= RME9652_SyncPref_ADAT3;
1165                break;
1166        case RME9652_SYNC_FROM_SPDIF:
1167                rme9652->control_register |= RME9652_SyncPref_SPDIF;
1168                break;
1169        }
1170
1171        restart = rme9652->running;
1172        if (restart)
1173                rme9652_stop(rme9652);
1174
1175        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1176
1177        if (restart)
1178                rme9652_start(rme9652);
1179
1180        return 0;
1181}
1182
1183static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1184{
1185        static const char * const texts[4] = {
1186                "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1187        };
1188        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1189
1190        return snd_ctl_enum_info(uinfo, 1,
1191                                 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1192                                 texts);
1193}
1194
1195static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1196{
1197        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1198        
1199        spin_lock_irq(&rme9652->lock);
1200        ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1201        spin_unlock_irq(&rme9652->lock);
1202        return 0;
1203}
1204
1205static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1206{
1207        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1208        int change, max;
1209        unsigned int val;
1210        
1211        if (!snd_rme9652_use_is_exclusive(rme9652))
1212                return -EBUSY;
1213        max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1214        val = ucontrol->value.enumerated.item[0] % max;
1215        spin_lock_irq(&rme9652->lock);
1216        change = (int)val != rme9652_sync_pref(rme9652);
1217        rme9652_set_sync_pref(rme9652, val);
1218        spin_unlock_irq(&rme9652->lock);
1219        return change;
1220}
1221
1222static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1223{
1224        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1225        uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1226        uinfo->count = rme9652->ss_channels;
1227        uinfo->value.integer.min = 0;
1228        uinfo->value.integer.max = 1;
1229        return 0;
1230}
1231
1232static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1233{
1234        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1235        unsigned int k;
1236        u32 thru_bits = rme9652->thru_bits;
1237
1238        for (k = 0; k < rme9652->ss_channels; ++k) {
1239                ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1240        }
1241        return 0;
1242}
1243
1244static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1245{
1246        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1247        int change;
1248        unsigned int chn;
1249        u32 thru_bits = 0;
1250
1251        if (!snd_rme9652_use_is_exclusive(rme9652))
1252                return -EBUSY;
1253
1254        for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1255                if (ucontrol->value.integer.value[chn])
1256                        thru_bits |= 1 << chn;
1257        }
1258        
1259        spin_lock_irq(&rme9652->lock);
1260        change = thru_bits ^ rme9652->thru_bits;
1261        if (change) {
1262                for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1263                        if (!(change & (1 << chn)))
1264                                continue;
1265                        rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1266                }
1267        }
1268        spin_unlock_irq(&rme9652->lock);
1269        return !!change;
1270}
1271
1272#define RME9652_PASSTHRU(xname, xindex) \
1273{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1274  .info = snd_rme9652_info_passthru, \
1275  .put = snd_rme9652_put_passthru, \
1276  .get = snd_rme9652_get_passthru }
1277
1278#define snd_rme9652_info_passthru       snd_ctl_boolean_mono_info
1279
1280static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1281{
1282        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1283
1284        spin_lock_irq(&rme9652->lock);
1285        ucontrol->value.integer.value[0] = rme9652->passthru;
1286        spin_unlock_irq(&rme9652->lock);
1287        return 0;
1288}
1289
1290static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1291{
1292        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1293        int change;
1294        unsigned int val;
1295        int err = 0;
1296
1297        if (!snd_rme9652_use_is_exclusive(rme9652))
1298                return -EBUSY;
1299
1300        val = ucontrol->value.integer.value[0] & 1;
1301        spin_lock_irq(&rme9652->lock);
1302        change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1303        if (change)
1304                err = rme9652_set_passthru(rme9652, val);
1305        spin_unlock_irq(&rme9652->lock);
1306        return err ? err : change;
1307}
1308
1309/* Read-only switches */
1310
1311#define RME9652_SPDIF_RATE(xname, xindex) \
1312{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1313  .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1314  .info = snd_rme9652_info_spdif_rate, \
1315  .get = snd_rme9652_get_spdif_rate }
1316
1317static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1318{
1319        uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1320        uinfo->count = 1;
1321        uinfo->value.integer.min = 0;
1322        uinfo->value.integer.max = 96000;
1323        return 0;
1324}
1325
1326static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1327{
1328        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1329        
1330        spin_lock_irq(&rme9652->lock);
1331        ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1332        spin_unlock_irq(&rme9652->lock);
1333        return 0;
1334}
1335
1336#define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1337{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1338  .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1339  .info = snd_rme9652_info_adat_sync, \
1340  .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1341
1342static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1343{
1344        static const char * const texts[4] = {
1345                "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1346        };
1347
1348        return snd_ctl_enum_info(uinfo, 1, 4, texts);
1349}
1350
1351static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1352{
1353        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1354        unsigned int mask1, mask2, val;
1355        
1356        switch (kcontrol->private_value) {
1357        case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;  
1358        case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;  
1359        case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;  
1360        default: return -EINVAL;
1361        }
1362        val = rme9652_read(rme9652, RME9652_status_register);
1363        ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1364        ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1365        return 0;
1366}
1367
1368#define RME9652_TC_VALID(xname, xindex) \
1369{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1370  .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1371  .info = snd_rme9652_info_tc_valid, \
1372  .get = snd_rme9652_get_tc_valid }
1373
1374#define snd_rme9652_info_tc_valid       snd_ctl_boolean_mono_info
1375
1376static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1377{
1378        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1379        
1380        ucontrol->value.integer.value[0] = 
1381                (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1382        return 0;
1383}
1384
1385#ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1386
1387/* FIXME: this routine needs a port to the new control API --jk */
1388
1389static int snd_rme9652_get_tc_value(void *private_data,
1390                                    snd_kswitch_t *kswitch,
1391                                    snd_switch_t *uswitch)
1392{
1393        struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1394        u32 value;
1395        int i;
1396
1397        uswitch->type = SNDRV_SW_TYPE_DWORD;
1398
1399        if ((rme9652_read(s, RME9652_status_register) &
1400             RME9652_tc_valid) == 0) {
1401                uswitch->value.data32[0] = 0;
1402                return 0;
1403        }
1404
1405        /* timecode request */
1406
1407        rme9652_write(s, RME9652_time_code, 0);
1408
1409        /* XXX bug alert: loop-based timing !!!! */
1410
1411        for (i = 0; i < 50; i++) {
1412                if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1413                        break;
1414        }
1415
1416        if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1417                return -EIO;
1418        }
1419
1420        value = 0;
1421
1422        for (i = 0; i < 32; i++) {
1423                value >>= 1;
1424
1425                if (rme9652_read(s, i * 4) & RME9652_tc_out)
1426                        value |= 0x80000000;
1427        }
1428
1429        if (value > 2 * 60 * 48000) {
1430                value -= 2 * 60 * 48000;
1431        } else {
1432                value = 0;
1433        }
1434
1435        uswitch->value.data32[0] = value;
1436
1437        return 0;
1438}
1439
1440#endif                          /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1441
1442static const struct snd_kcontrol_new snd_rme9652_controls[] = {
1443{
1444        .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1445        .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1446        .info =         snd_rme9652_control_spdif_info,
1447        .get =          snd_rme9652_control_spdif_get,
1448        .put =          snd_rme9652_control_spdif_put,
1449},
1450{
1451        .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1452        .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1453        .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1454        .info =         snd_rme9652_control_spdif_stream_info,
1455        .get =          snd_rme9652_control_spdif_stream_get,
1456        .put =          snd_rme9652_control_spdif_stream_put,
1457},
1458{
1459        .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1460        .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1461        .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1462        .info =         snd_rme9652_control_spdif_mask_info,
1463        .get =          snd_rme9652_control_spdif_mask_get,
1464        .private_value = IEC958_AES0_NONAUDIO |
1465                        IEC958_AES0_PROFESSIONAL |
1466                        IEC958_AES0_CON_EMPHASIS,                                                                                             
1467},
1468{
1469        .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1470        .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1471        .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1472        .info =         snd_rme9652_control_spdif_mask_info,
1473        .get =          snd_rme9652_control_spdif_mask_get,
1474        .private_value = IEC958_AES0_NONAUDIO |
1475                        IEC958_AES0_PROFESSIONAL |
1476                        IEC958_AES0_PRO_EMPHASIS,
1477},
1478RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1479RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1480RME9652_SYNC_MODE("Sync Mode", 0),
1481RME9652_SYNC_PREF("Preferred Sync Source", 0),
1482{
1483        .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1484        .name = "Channels Thru",
1485        .index = 0,
1486        .info = snd_rme9652_info_thru,
1487        .get = snd_rme9652_get_thru,
1488        .put = snd_rme9652_put_thru,
1489},
1490RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1491RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1492RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1493RME9652_TC_VALID("Timecode Valid", 0),
1494RME9652_PASSTHRU("Passthru", 0)
1495};
1496
1497static const struct snd_kcontrol_new snd_rme9652_adat3_check =
1498RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1499
1500static const struct snd_kcontrol_new snd_rme9652_adat1_input =
1501RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1502
1503static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1504{
1505        unsigned int idx;
1506        int err;
1507        struct snd_kcontrol *kctl;
1508
1509        for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1510                kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652);
1511                err = snd_ctl_add(card, kctl);
1512                if (err < 0)
1513                        return err;
1514                if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1515                        rme9652->spdif_ctl = kctl;
1516        }
1517
1518        if (rme9652->ss_channels == RME9652_NCHANNELS) {
1519                kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652);
1520                err = snd_ctl_add(card, kctl);
1521                if (err < 0)
1522                        return err;
1523        }
1524
1525        if (rme9652->hw_rev >= 15) {
1526                kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652);
1527                err = snd_ctl_add(card, kctl);
1528                if (err < 0)
1529                        return err;
1530        }
1531
1532        return 0;
1533}
1534
1535/*------------------------------------------------------------
1536   /proc interface 
1537 ------------------------------------------------------------*/
1538
1539static void
1540snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1541{
1542        struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1543        u32 thru_bits = rme9652->thru_bits;
1544        int show_auto_sync_source = 0;
1545        int i;
1546        unsigned int status;
1547        int x;
1548
1549        status = rme9652_read(rme9652, RME9652_status_register);
1550
1551        snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1552        snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1553                    rme9652->capture_buffer, rme9652->playback_buffer);
1554        snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1555                    rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1556        snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1557
1558        snd_iprintf(buffer, "\n");
1559
1560        x = 1 << (6 + rme9652_decode_latency(rme9652->control_register & 
1561                                             RME9652_latency));
1562
1563        snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n", 
1564                    x, (unsigned long) rme9652->period_bytes);
1565        snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1566                    rme9652_hw_pointer(rme9652));
1567        snd_iprintf(buffer, "Passthru: %s\n",
1568                    rme9652->passthru ? "yes" : "no");
1569
1570        if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1571                snd_iprintf(buffer, "Clock mode: autosync\n");
1572                show_auto_sync_source = 1;
1573        } else if (rme9652->control_register & RME9652_wsel) {
1574                if (status & RME9652_wsel_rd) {
1575                        snd_iprintf(buffer, "Clock mode: word clock\n");
1576                } else {
1577                        snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1578                }
1579        } else {
1580                snd_iprintf(buffer, "Clock mode: master\n");
1581        }
1582
1583        if (show_auto_sync_source) {
1584                switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1585                case RME9652_SyncPref_ADAT1:
1586                        snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1587                        break;
1588                case RME9652_SyncPref_ADAT2:
1589                        snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1590                        break;
1591                case RME9652_SyncPref_ADAT3:
1592                        snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1593                        break;
1594                case RME9652_SyncPref_SPDIF:
1595                        snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1596                        break;
1597                default:
1598                        snd_iprintf(buffer, "Pref. sync source: ???\n");
1599                }
1600        }
1601
1602        if (rme9652->hw_rev >= 15)
1603                snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1604                            (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1605                            "Internal" : "ADAT1 optical");
1606
1607        snd_iprintf(buffer, "\n");
1608
1609        switch (rme9652_decode_spdif_in(rme9652->control_register & 
1610                                        RME9652_inp)) {
1611        case RME9652_SPDIFIN_OPTICAL:
1612                snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1613                break;
1614        case RME9652_SPDIFIN_COAXIAL:
1615                snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1616                break;
1617        case RME9652_SPDIFIN_INTERN:
1618                snd_iprintf(buffer, "IEC958 input: Internal\n");
1619                break;
1620        default:
1621                snd_iprintf(buffer, "IEC958 input: ???\n");
1622                break;
1623        }
1624
1625        if (rme9652->control_register & RME9652_opt_out) {
1626                snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1627        } else {
1628                snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1629        }
1630
1631        if (rme9652->control_register & RME9652_PRO) {
1632                snd_iprintf(buffer, "IEC958 quality: Professional\n");
1633        } else {
1634                snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1635        }
1636
1637        if (rme9652->control_register & RME9652_EMP) {
1638                snd_iprintf(buffer, "IEC958 emphasis: on\n");
1639        } else {
1640                snd_iprintf(buffer, "IEC958 emphasis: off\n");
1641        }
1642
1643        if (rme9652->control_register & RME9652_Dolby) {
1644                snd_iprintf(buffer, "IEC958 Dolby: on\n");
1645        } else {
1646                snd_iprintf(buffer, "IEC958 Dolby: off\n");
1647        }
1648
1649        i = rme9652_spdif_sample_rate(rme9652);
1650
1651        if (i < 0) {
1652                snd_iprintf(buffer,
1653                            "IEC958 sample rate: error flag set\n");
1654        } else if (i == 0) {
1655                snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1656        } else {
1657                snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1658        }
1659
1660        snd_iprintf(buffer, "\n");
1661
1662        snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1663                    rme9652_adat_sample_rate(rme9652));
1664
1665        /* Sync Check */
1666
1667        x = status & RME9652_sync_0;
1668        if (status & RME9652_lock_0) {
1669                snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1670        } else {
1671                snd_iprintf(buffer, "ADAT1: No Lock\n");
1672        }
1673
1674        x = status & RME9652_sync_1;
1675        if (status & RME9652_lock_1) {
1676                snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1677        } else {
1678                snd_iprintf(buffer, "ADAT2: No Lock\n");
1679        }
1680
1681        x = status & RME9652_sync_2;
1682        if (status & RME9652_lock_2) {
1683                snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1684        } else {
1685                snd_iprintf(buffer, "ADAT3: No Lock\n");
1686        }
1687
1688        snd_iprintf(buffer, "\n");
1689
1690        snd_iprintf(buffer, "Timecode signal: %s\n",
1691                    (status & RME9652_tc_valid) ? "yes" : "no");
1692
1693        /* thru modes */
1694
1695        snd_iprintf(buffer, "Punch Status:\n\n");
1696
1697        for (i = 0; i < rme9652->ss_channels; i++) {
1698                if (thru_bits & (1 << i)) {
1699                        snd_iprintf(buffer, "%2d:  on ", i + 1);
1700                } else {
1701                        snd_iprintf(buffer, "%2d: off ", i + 1);
1702                }
1703
1704                if (((i + 1) % 8) == 0) {
1705                        snd_iprintf(buffer, "\n");
1706                }
1707        }
1708
1709        snd_iprintf(buffer, "\n");
1710}
1711
1712static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1713{
1714        snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652,
1715                             snd_rme9652_proc_read);
1716}
1717
1718static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1719{
1720        snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1721        snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1722}
1723
1724static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1725{
1726        if (rme9652->irq >= 0)
1727                rme9652_stop(rme9652);
1728        snd_rme9652_free_buffers(rme9652);
1729
1730        if (rme9652->irq >= 0)
1731                free_irq(rme9652->irq, (void *)rme9652);
1732        iounmap(rme9652->iobase);
1733        if (rme9652->port)
1734                pci_release_regions(rme9652->pci);
1735
1736        if (pci_is_enabled(rme9652->pci))
1737                pci_disable_device(rme9652->pci);
1738        return 0;
1739}
1740
1741static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1742{
1743        unsigned long pb_bus, cb_bus;
1744
1745        if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1746            snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1747                if (rme9652->capture_dma_buf.area)
1748                        snd_dma_free_pages(&rme9652->capture_dma_buf);
1749                dev_err(rme9652->card->dev,
1750                        "%s: no buffers available\n", rme9652->card_name);
1751                return -ENOMEM;
1752        }
1753
1754        /* Align to bus-space 64K boundary */
1755
1756        cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1757        pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1758
1759        /* Tell the card where it is */
1760
1761        rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1762        rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1763
1764        rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1765        rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1766
1767        return 0;
1768}
1769
1770static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1771{
1772        unsigned int k;
1773
1774        /* ASSUMPTION: rme9652->lock is either held, or
1775           there is no need to hold it (e.g. during module
1776           initialization).
1777         */
1778
1779        /* set defaults:
1780
1781           SPDIF Input via Coax 
1782           autosync clock mode
1783           maximum latency (7 = 8192 samples, 64Kbyte buffer,
1784           which implies 2 4096 sample, 32Kbyte periods).
1785           
1786           if rev 1.5, initialize the S/PDIF receiver.
1787
1788         */
1789
1790        rme9652->control_register =
1791            RME9652_inp_0 | rme9652_encode_latency(7);
1792
1793        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1794
1795        rme9652_reset_hw_pointer(rme9652);
1796        rme9652_compute_period_size(rme9652);
1797
1798        /* default: thru off for all channels */
1799
1800        for (k = 0; k < RME9652_NCHANNELS; ++k)
1801                rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1802
1803        rme9652->thru_bits = 0;
1804        rme9652->passthru = 0;
1805
1806        /* set a default rate so that the channel map is set up */
1807
1808        rme9652_set_rate(rme9652, 48000);
1809}
1810
1811static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1812{
1813        struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1814
1815        if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1816                return IRQ_NONE;
1817        }
1818
1819        rme9652_write(rme9652, RME9652_irq_clear, 0);
1820
1821        if (rme9652->capture_substream) {
1822                snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1823        }
1824
1825        if (rme9652->playback_substream) {
1826                snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1827        }
1828        return IRQ_HANDLED;
1829}
1830
1831static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1832{
1833        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1834        return rme9652_hw_pointer(rme9652);
1835}
1836
1837static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1838                                             int stream,
1839                                             int channel)
1840
1841{
1842        int mapped_channel;
1843
1844        if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1845                return NULL;
1846        
1847        mapped_channel = rme9652->channel_map[channel];
1848        if (mapped_channel < 0)
1849                return NULL;
1850        
1851        if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1852                return rme9652->capture_buffer +
1853                        (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1854        } else {
1855                return rme9652->playback_buffer +
1856                        (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1857        }
1858}
1859
1860static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1861                                     int channel, unsigned long pos,
1862                                     void __user *src, unsigned long count)
1863{
1864        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1865        char *channel_buf;
1866
1867        if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1868                return -EINVAL;
1869
1870        channel_buf = rme9652_channel_buffer_location (rme9652,
1871                                                       substream->pstr->stream,
1872                                                       channel);
1873        if (snd_BUG_ON(!channel_buf))
1874                return -EIO;
1875        if (copy_from_user(channel_buf + pos, src, count))
1876                return -EFAULT;
1877        return 0;
1878}
1879
1880static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1881                                            int channel, unsigned long pos,
1882                                            void *src, unsigned long count)
1883{
1884        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1885        char *channel_buf;
1886
1887        channel_buf = rme9652_channel_buffer_location(rme9652,
1888                                                      substream->pstr->stream,
1889                                                      channel);
1890        if (snd_BUG_ON(!channel_buf))
1891                return -EIO;
1892        memcpy(channel_buf + pos, src, count);
1893        return 0;
1894}
1895
1896static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1897                                    int channel, unsigned long pos,
1898                                    void __user *dst, unsigned long count)
1899{
1900        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1901        char *channel_buf;
1902
1903        if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1904                return -EINVAL;
1905
1906        channel_buf = rme9652_channel_buffer_location (rme9652,
1907                                                       substream->pstr->stream,
1908                                                       channel);
1909        if (snd_BUG_ON(!channel_buf))
1910                return -EIO;
1911        if (copy_to_user(dst, channel_buf + pos, count))
1912                return -EFAULT;
1913        return 0;
1914}
1915
1916static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1917                                           int channel, unsigned long pos,
1918                                           void *dst, unsigned long count)
1919{
1920        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1921        char *channel_buf;
1922
1923        channel_buf = rme9652_channel_buffer_location(rme9652,
1924                                                      substream->pstr->stream,
1925                                                      channel);
1926        if (snd_BUG_ON(!channel_buf))
1927                return -EIO;
1928        memcpy(dst, channel_buf + pos, count);
1929        return 0;
1930}
1931
1932static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1933                                  int channel, unsigned long pos,
1934                                  unsigned long count)
1935{
1936        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1937        char *channel_buf;
1938
1939        channel_buf = rme9652_channel_buffer_location (rme9652,
1940                                                       substream->pstr->stream,
1941                                                       channel);
1942        if (snd_BUG_ON(!channel_buf))
1943                return -EIO;
1944        memset(channel_buf + pos, 0, count);
1945        return 0;
1946}
1947
1948static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1949{
1950        struct snd_pcm_runtime *runtime = substream->runtime;
1951        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1952        struct snd_pcm_substream *other;
1953        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1954                other = rme9652->capture_substream;
1955        else
1956                other = rme9652->playback_substream;
1957        if (rme9652->running)
1958                runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1959        else
1960                runtime->status->hw_ptr = 0;
1961        if (other) {
1962                struct snd_pcm_substream *s;
1963                struct snd_pcm_runtime *oruntime = other->runtime;
1964                snd_pcm_group_for_each_entry(s, substream) {
1965                        if (s == other) {
1966                                oruntime->status->hw_ptr = runtime->status->hw_ptr;
1967                                break;
1968                        }
1969                }
1970        }
1971        return 0;
1972}
1973
1974static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1975                                 struct snd_pcm_hw_params *params)
1976{
1977        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1978        int err;
1979        pid_t this_pid;
1980        pid_t other_pid;
1981
1982        spin_lock_irq(&rme9652->lock);
1983
1984        if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1985                rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1986                rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1987                this_pid = rme9652->playback_pid;
1988                other_pid = rme9652->capture_pid;
1989        } else {
1990                this_pid = rme9652->capture_pid;
1991                other_pid = rme9652->playback_pid;
1992        }
1993
1994        if ((other_pid > 0) && (this_pid != other_pid)) {
1995
1996                /* The other stream is open, and not by the same
1997                   task as this one. Make sure that the parameters
1998                   that matter are the same.
1999                 */
2000
2001                if ((int)params_rate(params) !=
2002                    rme9652_adat_sample_rate(rme9652)) {
2003                        spin_unlock_irq(&rme9652->lock);
2004                        _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2005                        return -EBUSY;
2006                }
2007
2008                if (params_period_size(params) != rme9652->period_bytes / 4) {
2009                        spin_unlock_irq(&rme9652->lock);
2010                        _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2011                        return -EBUSY;
2012                }
2013
2014                /* We're fine. */
2015
2016                spin_unlock_irq(&rme9652->lock);
2017                return 0;
2018
2019        } else {
2020                spin_unlock_irq(&rme9652->lock);
2021        }
2022
2023        /* how to make sure that the rate matches an externally-set one ?
2024         */
2025
2026        err = rme9652_set_rate(rme9652, params_rate(params));
2027        if (err < 0) {
2028                _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2029                return err;
2030        }
2031
2032        err = rme9652_set_interrupt_interval(rme9652, params_period_size(params));
2033        if (err < 0) {
2034                _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2035                return err;
2036        }
2037
2038        return 0;
2039}
2040
2041static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2042                                    struct snd_pcm_channel_info *info)
2043{
2044        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2045        int chn;
2046
2047        if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2048                return -EINVAL;
2049
2050        chn = rme9652->channel_map[array_index_nospec(info->channel,
2051                                                      RME9652_NCHANNELS)];
2052        if (chn < 0)
2053                return -EINVAL;
2054
2055        info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2056        info->first = 0;
2057        info->step = 32;
2058        return 0;
2059}
2060
2061static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2062                             unsigned int cmd, void *arg)
2063{
2064        switch (cmd) {
2065        case SNDRV_PCM_IOCTL1_RESET:
2066        {
2067                return snd_rme9652_reset(substream);
2068        }
2069        case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2070        {
2071                struct snd_pcm_channel_info *info = arg;
2072                return snd_rme9652_channel_info(substream, info);
2073        }
2074        default:
2075                break;
2076        }
2077
2078        return snd_pcm_lib_ioctl(substream, cmd, arg);
2079}
2080
2081static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2082{
2083        memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2084}
2085
2086static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2087                               int cmd)
2088{
2089        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2090        struct snd_pcm_substream *other;
2091        int running;
2092        spin_lock(&rme9652->lock);
2093        running = rme9652->running;
2094        switch (cmd) {
2095        case SNDRV_PCM_TRIGGER_START:
2096                running |= 1 << substream->stream;
2097                break;
2098        case SNDRV_PCM_TRIGGER_STOP:
2099                running &= ~(1 << substream->stream);
2100                break;
2101        default:
2102                snd_BUG();
2103                spin_unlock(&rme9652->lock);
2104                return -EINVAL;
2105        }
2106        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2107                other = rme9652->capture_substream;
2108        else
2109                other = rme9652->playback_substream;
2110
2111        if (other) {
2112                struct snd_pcm_substream *s;
2113                snd_pcm_group_for_each_entry(s, substream) {
2114                        if (s == other) {
2115                                snd_pcm_trigger_done(s, substream);
2116                                if (cmd == SNDRV_PCM_TRIGGER_START)
2117                                        running |= 1 << s->stream;
2118                                else
2119                                        running &= ~(1 << s->stream);
2120                                goto _ok;
2121                        }
2122                }
2123                if (cmd == SNDRV_PCM_TRIGGER_START) {
2124                        if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2125                            substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2126                                rme9652_silence_playback(rme9652);
2127                } else {
2128                        if (running &&
2129                            substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2130                                rme9652_silence_playback(rme9652);
2131                }
2132        } else {
2133                if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 
2134                        rme9652_silence_playback(rme9652);
2135        }
2136 _ok:
2137        snd_pcm_trigger_done(substream, substream);
2138        if (!rme9652->running && running)
2139                rme9652_start(rme9652);
2140        else if (rme9652->running && !running)
2141                rme9652_stop(rme9652);
2142        rme9652->running = running;
2143        spin_unlock(&rme9652->lock);
2144
2145        return 0;
2146}
2147
2148static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2149{
2150        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2151        unsigned long flags;
2152
2153        spin_lock_irqsave(&rme9652->lock, flags);
2154        if (!rme9652->running)
2155                rme9652_reset_hw_pointer(rme9652);
2156        spin_unlock_irqrestore(&rme9652->lock, flags);
2157        return 0;
2158}
2159
2160static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2161{
2162        .info =                 (SNDRV_PCM_INFO_MMAP |
2163                                 SNDRV_PCM_INFO_MMAP_VALID |
2164                                 SNDRV_PCM_INFO_NONINTERLEAVED |
2165                                 SNDRV_PCM_INFO_SYNC_START |
2166                                 SNDRV_PCM_INFO_DOUBLE),
2167        .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2168        .rates =                (SNDRV_PCM_RATE_44100 | 
2169                                 SNDRV_PCM_RATE_48000 | 
2170                                 SNDRV_PCM_RATE_88200 | 
2171                                 SNDRV_PCM_RATE_96000),
2172        .rate_min =             44100,
2173        .rate_max =             96000,
2174        .channels_min =         10,
2175        .channels_max =         26,
2176        .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES * 26,
2177        .period_bytes_min =     (64 * 4) * 10,
2178        .period_bytes_max =     (8192 * 4) * 26,
2179        .periods_min =          2,
2180        .periods_max =          2,
2181        .fifo_size =            0,
2182};
2183
2184static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2185{
2186        .info =                 (SNDRV_PCM_INFO_MMAP |
2187                                 SNDRV_PCM_INFO_MMAP_VALID |
2188                                 SNDRV_PCM_INFO_NONINTERLEAVED |
2189                                 SNDRV_PCM_INFO_SYNC_START),
2190        .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2191        .rates =                (SNDRV_PCM_RATE_44100 | 
2192                                 SNDRV_PCM_RATE_48000 | 
2193                                 SNDRV_PCM_RATE_88200 | 
2194                                 SNDRV_PCM_RATE_96000),
2195        .rate_min =             44100,
2196        .rate_max =             96000,
2197        .channels_min =         10,
2198        .channels_max =         26,
2199        .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES *26,
2200        .period_bytes_min =     (64 * 4) * 10,
2201        .period_bytes_max =     (8192 * 4) * 26,
2202        .periods_min =          2,
2203        .periods_max =          2,
2204        .fifo_size =            0,
2205};
2206
2207static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2208
2209static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2210        .count = ARRAY_SIZE(period_sizes),
2211        .list = period_sizes,
2212        .mask = 0
2213};
2214
2215static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2216                                        struct snd_pcm_hw_rule *rule)
2217{
2218        struct snd_rme9652 *rme9652 = rule->private;
2219        struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2220        unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2221        return snd_interval_list(c, 2, list, 0);
2222}
2223
2224static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2225                                             struct snd_pcm_hw_rule *rule)
2226{
2227        struct snd_rme9652 *rme9652 = rule->private;
2228        struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2229        struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2230        if (r->min > 48000) {
2231                struct snd_interval t = {
2232                        .min = rme9652->ds_channels,
2233                        .max = rme9652->ds_channels,
2234                        .integer = 1,
2235                };
2236                return snd_interval_refine(c, &t);
2237        } else if (r->max < 88200) {
2238                struct snd_interval t = {
2239                        .min = rme9652->ss_channels,
2240                        .max = rme9652->ss_channels,
2241                        .integer = 1,
2242                };
2243                return snd_interval_refine(c, &t);
2244        }
2245        return 0;
2246}
2247
2248static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2249                                             struct snd_pcm_hw_rule *rule)
2250{
2251        struct snd_rme9652 *rme9652 = rule->private;
2252        struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2253        struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2254        if (c->min >= rme9652->ss_channels) {
2255                struct snd_interval t = {
2256                        .min = 44100,
2257                        .max = 48000,
2258                        .integer = 1,
2259                };
2260                return snd_interval_refine(r, &t);
2261        } else if (c->max <= rme9652->ds_channels) {
2262                struct snd_interval t = {
2263                        .min = 88200,
2264                        .max = 96000,
2265                        .integer = 1,
2266                };
2267                return snd_interval_refine(r, &t);
2268        }
2269        return 0;
2270}
2271
2272static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2273{
2274        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2275        struct snd_pcm_runtime *runtime = substream->runtime;
2276
2277        spin_lock_irq(&rme9652->lock);
2278
2279        snd_pcm_set_sync(substream);
2280
2281        runtime->hw = snd_rme9652_playback_subinfo;
2282        runtime->dma_area = rme9652->playback_buffer;
2283        runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2284
2285        if (rme9652->capture_substream == NULL) {
2286                rme9652_stop(rme9652);
2287                rme9652_set_thru(rme9652, -1, 0);
2288        }
2289
2290        rme9652->playback_pid = current->pid;
2291        rme9652->playback_substream = substream;
2292
2293        spin_unlock_irq(&rme9652->lock);
2294
2295        snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2296        snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2297        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2298                             snd_rme9652_hw_rule_channels, rme9652,
2299                             SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2300        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2301                             snd_rme9652_hw_rule_channels_rate, rme9652,
2302                             SNDRV_PCM_HW_PARAM_RATE, -1);
2303        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2304                             snd_rme9652_hw_rule_rate_channels, rme9652,
2305                             SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2306
2307        rme9652->creg_spdif_stream = rme9652->creg_spdif;
2308        rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2309        snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2310                       SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2311        return 0;
2312}
2313
2314static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2315{
2316        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2317
2318        spin_lock_irq(&rme9652->lock);
2319
2320        rme9652->playback_pid = -1;
2321        rme9652->playback_substream = NULL;
2322
2323        spin_unlock_irq(&rme9652->lock);
2324
2325        rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2326        snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2327                       SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2328        return 0;
2329}
2330
2331
2332static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2333{
2334        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2335        struct snd_pcm_runtime *runtime = substream->runtime;
2336
2337        spin_lock_irq(&rme9652->lock);
2338
2339        snd_pcm_set_sync(substream);
2340
2341        runtime->hw = snd_rme9652_capture_subinfo;
2342        runtime->dma_area = rme9652->capture_buffer;
2343        runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2344
2345        if (rme9652->playback_substream == NULL) {
2346                rme9652_stop(rme9652);
2347                rme9652_set_thru(rme9652, -1, 0);
2348        }
2349
2350        rme9652->capture_pid = current->pid;
2351        rme9652->capture_substream = substream;
2352
2353        spin_unlock_irq(&rme9652->lock);
2354
2355        snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2356        snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2357        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2358                             snd_rme9652_hw_rule_channels, rme9652,
2359                             SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2360        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2361                             snd_rme9652_hw_rule_channels_rate, rme9652,
2362                             SNDRV_PCM_HW_PARAM_RATE, -1);
2363        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2364                             snd_rme9652_hw_rule_rate_channels, rme9652,
2365                             SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2366        return 0;
2367}
2368
2369static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2370{
2371        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2372
2373        spin_lock_irq(&rme9652->lock);
2374
2375        rme9652->capture_pid = -1;
2376        rme9652->capture_substream = NULL;
2377
2378        spin_unlock_irq(&rme9652->lock);
2379        return 0;
2380}
2381
2382static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2383        .open =         snd_rme9652_playback_open,
2384        .close =        snd_rme9652_playback_release,
2385        .ioctl =        snd_rme9652_ioctl,
2386        .hw_params =    snd_rme9652_hw_params,
2387        .prepare =      snd_rme9652_prepare,
2388        .trigger =      snd_rme9652_trigger,
2389        .pointer =      snd_rme9652_hw_pointer,
2390        .copy_user =    snd_rme9652_playback_copy,
2391        .copy_kernel =  snd_rme9652_playback_copy_kernel,
2392        .fill_silence = snd_rme9652_hw_silence,
2393};
2394
2395static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2396        .open =         snd_rme9652_capture_open,
2397        .close =        snd_rme9652_capture_release,
2398        .ioctl =        snd_rme9652_ioctl,
2399        .hw_params =    snd_rme9652_hw_params,
2400        .prepare =      snd_rme9652_prepare,
2401        .trigger =      snd_rme9652_trigger,
2402        .pointer =      snd_rme9652_hw_pointer,
2403        .copy_user =    snd_rme9652_capture_copy,
2404        .copy_kernel =  snd_rme9652_capture_copy_kernel,
2405};
2406
2407static int snd_rme9652_create_pcm(struct snd_card *card,
2408                                  struct snd_rme9652 *rme9652)
2409{
2410        struct snd_pcm *pcm;
2411        int err;
2412
2413        err = snd_pcm_new(card, rme9652->card_name, 0, 1, 1, &pcm);
2414        if (err < 0)
2415                return err;
2416
2417        rme9652->pcm = pcm;
2418        pcm->private_data = rme9652;
2419        strcpy(pcm->name, rme9652->card_name);
2420
2421        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2422        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2423
2424        pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2425
2426        return 0;
2427}
2428
2429static int snd_rme9652_create(struct snd_card *card,
2430                              struct snd_rme9652 *rme9652,
2431                              int precise_ptr)
2432{
2433        struct pci_dev *pci = rme9652->pci;
2434        int err;
2435        int status;
2436        unsigned short rev;
2437
2438        rme9652->irq = -1;
2439        rme9652->card = card;
2440
2441        pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2442
2443        switch (rev & 0xff) {
2444        case 3:
2445        case 4:
2446        case 8:
2447        case 9:
2448                break;
2449
2450        default:
2451                /* who knows? */
2452                return -ENODEV;
2453        }
2454
2455        err = pci_enable_device(pci);
2456        if (err < 0)
2457                return err;
2458
2459        spin_lock_init(&rme9652->lock);
2460
2461        err = pci_request_regions(pci, "rme9652");
2462        if (err < 0)
2463                return err;
2464        rme9652->port = pci_resource_start(pci, 0);
2465        rme9652->iobase = ioremap(rme9652->port, RME9652_IO_EXTENT);
2466        if (rme9652->iobase == NULL) {
2467                dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2468                        rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2469                return -EBUSY;
2470        }
2471        
2472        if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2473                        KBUILD_MODNAME, rme9652)) {
2474                dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2475                return -EBUSY;
2476        }
2477        rme9652->irq = pci->irq;
2478        card->sync_irq = rme9652->irq;
2479        rme9652->precise_ptr = precise_ptr;
2480
2481        /* Determine the h/w rev level of the card. This seems like
2482           a particularly kludgy way to encode it, but its what RME
2483           chose to do, so we follow them ...
2484        */
2485
2486        status = rme9652_read(rme9652, RME9652_status_register);
2487        if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2488                rme9652->hw_rev = 15;
2489        } else {
2490                rme9652->hw_rev = 11;
2491        }
2492
2493        /* Differentiate between the standard Hammerfall, and the
2494           "Light", which does not have the expansion board. This
2495           method comes from information received from Mathhias
2496           Clausen at RME. Display the EEPROM and h/w revID where
2497           relevant.  
2498        */
2499
2500        switch (rev) {
2501        case 8: /* original eprom */
2502                strcpy(card->driver, "RME9636");
2503                if (rme9652->hw_rev == 15) {
2504                        rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2505                } else {
2506                        rme9652->card_name = "RME Digi9636";
2507                }
2508                rme9652->ss_channels = RME9636_NCHANNELS;
2509                break;
2510        case 9: /* W36_G EPROM */
2511                strcpy(card->driver, "RME9636");
2512                rme9652->card_name = "RME Digi9636 (Rev G)";
2513                rme9652->ss_channels = RME9636_NCHANNELS;
2514                break;
2515        case 4: /* W52_G EPROM */
2516                strcpy(card->driver, "RME9652");
2517                rme9652->card_name = "RME Digi9652 (Rev G)";
2518                rme9652->ss_channels = RME9652_NCHANNELS;
2519                break;
2520        case 3: /* original eprom */
2521                strcpy(card->driver, "RME9652");
2522                if (rme9652->hw_rev == 15) {
2523                        rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2524                } else {
2525                        rme9652->card_name = "RME Digi9652";
2526                }
2527                rme9652->ss_channels = RME9652_NCHANNELS;
2528                break;
2529        }
2530
2531        rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2532
2533        pci_set_master(rme9652->pci);
2534
2535        err = snd_rme9652_initialize_memory(rme9652);
2536        if (err < 0)
2537                return err;
2538
2539        err = snd_rme9652_create_pcm(card, rme9652);
2540        if (err < 0)
2541                return err;
2542
2543        err = snd_rme9652_create_controls(card, rme9652);
2544        if (err < 0)
2545                return err;
2546
2547        snd_rme9652_proc_init(rme9652);
2548
2549        rme9652->last_spdif_sample_rate = -1;
2550        rme9652->last_adat_sample_rate = -1;
2551        rme9652->playback_pid = -1;
2552        rme9652->capture_pid = -1;
2553        rme9652->capture_substream = NULL;
2554        rme9652->playback_substream = NULL;
2555
2556        snd_rme9652_set_defaults(rme9652);
2557
2558        if (rme9652->hw_rev == 15) {
2559                rme9652_initialize_spdif_receiver (rme9652);
2560        }
2561
2562        return 0;
2563}
2564
2565static void snd_rme9652_card_free(struct snd_card *card)
2566{
2567        struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2568
2569        if (rme9652)
2570                snd_rme9652_free(rme9652);
2571}
2572
2573static int snd_rme9652_probe(struct pci_dev *pci,
2574                             const struct pci_device_id *pci_id)
2575{
2576        static int dev;
2577        struct snd_rme9652 *rme9652;
2578        struct snd_card *card;
2579        int err;
2580
2581        if (dev >= SNDRV_CARDS)
2582                return -ENODEV;
2583        if (!enable[dev]) {
2584                dev++;
2585                return -ENOENT;
2586        }
2587
2588        err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2589                           sizeof(struct snd_rme9652), &card);
2590
2591        if (err < 0)
2592                return err;
2593
2594        rme9652 = (struct snd_rme9652 *) card->private_data;
2595        card->private_free = snd_rme9652_card_free;
2596        rme9652->dev = dev;
2597        rme9652->pci = pci;
2598        err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2599        if (err)
2600                goto free_card;
2601
2602        strcpy(card->shortname, rme9652->card_name);
2603
2604        sprintf(card->longname, "%s at 0x%lx, irq %d",
2605                card->shortname, rme9652->port, rme9652->irq);
2606        err = snd_card_register(card);
2607        if (err) {
2608free_card:
2609                snd_card_free(card);
2610                return err;
2611        }
2612        pci_set_drvdata(pci, card);
2613        dev++;
2614        return 0;
2615}
2616
2617static void snd_rme9652_remove(struct pci_dev *pci)
2618{
2619        snd_card_free(pci_get_drvdata(pci));
2620}
2621
2622static struct pci_driver rme9652_driver = {
2623        .name     = KBUILD_MODNAME,
2624        .id_table = snd_rme9652_ids,
2625        .probe    = snd_rme9652_probe,
2626        .remove   = snd_rme9652_remove,
2627};
2628
2629module_pci_driver(rme9652_driver);
2630