linux/sound/soc/sof/intel/pci-tng.c
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   1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
   2//
   3// This file is provided under a dual BSD/GPLv2 license.  When using or
   4// redistributing this file, you may do so under either license.
   5//
   6// Copyright(c) 2018-2021 Intel Corporation. All rights reserved.
   7//
   8// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
   9//
  10
  11#include <linux/module.h>
  12#include <linux/pci.h>
  13#include <sound/soc-acpi.h>
  14#include <sound/soc-acpi-intel-match.h>
  15#include <sound/sof.h>
  16#include "../ops.h"
  17#include "atom.h"
  18#include "shim.h"
  19#include "../sof-pci-dev.h"
  20#include "../sof-audio.h"
  21
  22/* platform specific devices */
  23#include "shim.h"
  24
  25static struct snd_soc_acpi_mach sof_tng_machines[] = {
  26        {
  27                .id = "INT343A",
  28                .drv_name = "edison",
  29                .sof_fw_filename = "sof-byt.ri",
  30                .sof_tplg_filename = "sof-byt.tplg",
  31        },
  32        {}
  33};
  34
  35static const struct snd_sof_debugfs_map tng_debugfs[] = {
  36        {"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
  37         SOF_DEBUGFS_ACCESS_ALWAYS},
  38        {"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE,
  39         SOF_DEBUGFS_ACCESS_ALWAYS},
  40        {"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE,
  41         SOF_DEBUGFS_ACCESS_ALWAYS},
  42        {"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE,
  43         SOF_DEBUGFS_ACCESS_ALWAYS},
  44        {"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE,
  45         SOF_DEBUGFS_ACCESS_ALWAYS},
  46        {"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
  47         SOF_DEBUGFS_ACCESS_D0_ONLY},
  48        {"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
  49         SOF_DEBUGFS_ACCESS_D0_ONLY},
  50        {"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_BYT,
  51         SOF_DEBUGFS_ACCESS_ALWAYS},
  52};
  53
  54static int tangier_pci_probe(struct snd_sof_dev *sdev)
  55{
  56        struct snd_sof_pdata *pdata = sdev->pdata;
  57        const struct sof_dev_desc *desc = pdata->desc;
  58        struct pci_dev *pci = to_pci_dev(sdev->dev);
  59        u32 base, size;
  60        int ret;
  61
  62        /* DSP DMA can only access low 31 bits of host memory */
  63        ret = dma_coerce_mask_and_coherent(&pci->dev, DMA_BIT_MASK(31));
  64        if (ret < 0) {
  65                dev_err(sdev->dev, "error: failed to set DMA mask %d\n", ret);
  66                return ret;
  67        }
  68
  69        /* LPE base */
  70        base = pci_resource_start(pci, desc->resindex_lpe_base) - IRAM_OFFSET;
  71        size = PCI_BAR_SIZE;
  72
  73        dev_dbg(sdev->dev, "LPE PHY base at 0x%x size 0x%x", base, size);
  74        sdev->bar[DSP_BAR] = devm_ioremap(sdev->dev, base, size);
  75        if (!sdev->bar[DSP_BAR]) {
  76                dev_err(sdev->dev, "error: failed to ioremap LPE base 0x%x size 0x%x\n",
  77                        base, size);
  78                return -ENODEV;
  79        }
  80        dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[DSP_BAR]);
  81
  82        /* IMR base - optional */
  83        if (desc->resindex_imr_base == -1)
  84                goto irq;
  85
  86        base = pci_resource_start(pci, desc->resindex_imr_base);
  87        size = pci_resource_len(pci, desc->resindex_imr_base);
  88
  89        /* some BIOSes don't map IMR */
  90        if (base == 0x55aa55aa || base == 0x0) {
  91                dev_info(sdev->dev, "IMR not set by BIOS. Ignoring\n");
  92                goto irq;
  93        }
  94
  95        dev_dbg(sdev->dev, "IMR base at 0x%x size 0x%x", base, size);
  96        sdev->bar[IMR_BAR] = devm_ioremap(sdev->dev, base, size);
  97        if (!sdev->bar[IMR_BAR]) {
  98                dev_err(sdev->dev, "error: failed to ioremap IMR base 0x%x size 0x%x\n",
  99                        base, size);
 100                return -ENODEV;
 101        }
 102        dev_dbg(sdev->dev, "IMR VADDR %p\n", sdev->bar[IMR_BAR]);
 103
 104irq:
 105        /* register our IRQ */
 106        sdev->ipc_irq = pci->irq;
 107        dev_dbg(sdev->dev, "using IRQ %d\n", sdev->ipc_irq);
 108        ret = devm_request_threaded_irq(sdev->dev, sdev->ipc_irq,
 109                                        atom_irq_handler, atom_irq_thread,
 110                                        0, "AudioDSP", sdev);
 111        if (ret < 0) {
 112                dev_err(sdev->dev, "error: failed to register IRQ %d\n",
 113                        sdev->ipc_irq);
 114                return ret;
 115        }
 116
 117        /* enable BUSY and disable DONE Interrupt by default */
 118        snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX,
 119                                  SHIM_IMRX_BUSY | SHIM_IMRX_DONE,
 120                                  SHIM_IMRX_DONE);
 121
 122        /* set default mailbox offset for FW ready message */
 123        sdev->dsp_box.offset = MBOX_OFFSET;
 124
 125        return ret;
 126}
 127
 128const struct snd_sof_dsp_ops sof_tng_ops = {
 129        /* device init */
 130        .probe          = tangier_pci_probe,
 131
 132        /* DSP core boot / reset */
 133        .run            = atom_run,
 134        .reset          = atom_reset,
 135
 136        /* Register IO */
 137        .write          = sof_io_write,
 138        .read           = sof_io_read,
 139        .write64        = sof_io_write64,
 140        .read64         = sof_io_read64,
 141
 142        /* Block IO */
 143        .block_read     = sof_block_read,
 144        .block_write    = sof_block_write,
 145
 146        /* doorbell */
 147        .irq_handler    = atom_irq_handler,
 148        .irq_thread     = atom_irq_thread,
 149
 150        /* ipc */
 151        .send_msg       = atom_send_msg,
 152        .fw_ready       = sof_fw_ready,
 153        .get_mailbox_offset = atom_get_mailbox_offset,
 154        .get_window_offset = atom_get_window_offset,
 155
 156        .ipc_msg_data   = intel_ipc_msg_data,
 157        .ipc_pcm_params = intel_ipc_pcm_params,
 158
 159        /* machine driver */
 160        .machine_select = atom_machine_select,
 161        .machine_register = sof_machine_register,
 162        .machine_unregister = sof_machine_unregister,
 163        .set_mach_params = atom_set_mach_params,
 164
 165        /* debug */
 166        .debug_map      = tng_debugfs,
 167        .debug_map_count        = ARRAY_SIZE(tng_debugfs),
 168        .dbg_dump       = atom_dump,
 169
 170        /* stream callbacks */
 171        .pcm_open       = intel_pcm_open,
 172        .pcm_close      = intel_pcm_close,
 173
 174        /* module loading */
 175        .load_module    = snd_sof_parse_module_memcpy,
 176
 177        /*Firmware loading */
 178        .load_firmware  = snd_sof_load_firmware_memcpy,
 179
 180        /* DAI drivers */
 181        .drv = atom_dai,
 182        .num_drv = 3, /* we have only 3 SSPs on byt*/
 183
 184        /* ALSA HW info flags */
 185        .hw_info =      SNDRV_PCM_INFO_MMAP |
 186                        SNDRV_PCM_INFO_MMAP_VALID |
 187                        SNDRV_PCM_INFO_INTERLEAVED |
 188                        SNDRV_PCM_INFO_PAUSE |
 189                        SNDRV_PCM_INFO_BATCH,
 190
 191        .arch_ops = &sof_xtensa_arch_ops,
 192};
 193
 194const struct sof_intel_dsp_desc tng_chip_info = {
 195        .cores_num = 1,
 196        .host_managed_cores_mask = 1,
 197};
 198
 199static const struct sof_dev_desc tng_desc = {
 200        .machines               = sof_tng_machines,
 201        .resindex_lpe_base      = 3,    /* IRAM, but subtract IRAM offset */
 202        .resindex_pcicfg_base   = -1,
 203        .resindex_imr_base      = 0,
 204        .irqindex_host_ipc      = -1,
 205        .resindex_dma_base      = -1,
 206        .chip_info = &tng_chip_info,
 207        .default_fw_path = "intel/sof",
 208        .default_tplg_path = "intel/sof-tplg",
 209        .default_fw_filename = "sof-byt.ri",
 210        .nocodec_tplg_filename = "sof-byt.tplg",
 211        .ops = &sof_tng_ops,
 212};
 213
 214/* PCI IDs */
 215static const struct pci_device_id sof_pci_ids[] = {
 216        { PCI_DEVICE(0x8086, 0x119a),
 217                .driver_data = (unsigned long)&tng_desc},
 218        { 0, }
 219};
 220MODULE_DEVICE_TABLE(pci, sof_pci_ids);
 221
 222/* pci_driver definition */
 223static struct pci_driver snd_sof_pci_intel_tng_driver = {
 224        .name = "sof-audio-pci-intel-tng",
 225        .id_table = sof_pci_ids,
 226        .probe = sof_pci_probe,
 227        .remove = sof_pci_remove,
 228        .shutdown = sof_pci_shutdown,
 229        .driver = {
 230                .pm = &sof_pci_pm,
 231        },
 232};
 233module_pci_driver(snd_sof_pci_intel_tng_driver);
 234
 235MODULE_LICENSE("Dual BSD/GPL");
 236MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HIFI_EP_IPC);
 237MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA);
 238MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);
 239MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_ATOM_HIFI_EP);
 240