1
2#ifndef __KVM_X86_VMX_VMCS_H
3#define __KVM_X86_VMX_VMCS_H
4
5#include <linux/ktime.h>
6#include <linux/list.h>
7#include <linux/nospec.h>
8
9#include <asm/kvm.h>
10#include <asm/vmx.h>
11
12#include "capabilities.h"
13
14#define ROL16(val, n) ((u16)(((u16)(val) << (n)) | ((u16)(val) >> (16 - (n)))))
15
16struct vmcs_hdr {
17 u32 revision_id:31;
18 u32 shadow_vmcs:1;
19};
20
21struct vmcs {
22 struct vmcs_hdr hdr;
23 u32 abort;
24 char data[];
25};
26
27DECLARE_PER_CPU(struct vmcs *, current_vmcs);
28
29
30
31
32
33
34struct vmcs_host_state {
35 unsigned long cr3;
36 unsigned long cr4;
37 unsigned long gs_base;
38 unsigned long fs_base;
39 unsigned long rsp;
40
41 u16 fs_sel, gs_sel, ldt_sel;
42#ifdef CONFIG_X86_64
43 u16 ds_sel, es_sel;
44#endif
45};
46
47struct vmcs_controls_shadow {
48 u32 vm_entry;
49 u32 vm_exit;
50 u32 pin;
51 u32 exec;
52 u32 secondary_exec;
53};
54
55
56
57
58
59
60struct loaded_vmcs {
61 struct vmcs *vmcs;
62 struct vmcs *shadow_vmcs;
63 int cpu;
64 bool launched;
65 bool nmi_known_unmasked;
66 bool hv_timer_soft_disabled;
67
68 int soft_vnmi_blocked;
69 ktime_t entry_time;
70 s64 vnmi_blocked_time;
71 unsigned long *msr_bitmap;
72 struct list_head loaded_vmcss_on_cpu_link;
73 struct vmcs_host_state host_state;
74 struct vmcs_controls_shadow controls_shadow;
75};
76
77static inline bool is_intr_type(u32 intr_info, u32 type)
78{
79 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK;
80
81 return (intr_info & mask) == (INTR_INFO_VALID_MASK | type);
82}
83
84static inline bool is_intr_type_n(u32 intr_info, u32 type, u8 vector)
85{
86 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK |
87 INTR_INFO_VECTOR_MASK;
88
89 return (intr_info & mask) == (INTR_INFO_VALID_MASK | type | vector);
90}
91
92static inline bool is_exception_n(u32 intr_info, u8 vector)
93{
94 return is_intr_type_n(intr_info, INTR_TYPE_HARD_EXCEPTION, vector);
95}
96
97static inline bool is_debug(u32 intr_info)
98{
99 return is_exception_n(intr_info, DB_VECTOR);
100}
101
102static inline bool is_breakpoint(u32 intr_info)
103{
104 return is_exception_n(intr_info, BP_VECTOR);
105}
106
107static inline bool is_page_fault(u32 intr_info)
108{
109 return is_exception_n(intr_info, PF_VECTOR);
110}
111
112static inline bool is_invalid_opcode(u32 intr_info)
113{
114 return is_exception_n(intr_info, UD_VECTOR);
115}
116
117static inline bool is_gp_fault(u32 intr_info)
118{
119 return is_exception_n(intr_info, GP_VECTOR);
120}
121
122static inline bool is_alignment_check(u32 intr_info)
123{
124 return is_exception_n(intr_info, AC_VECTOR);
125}
126
127static inline bool is_machine_check(u32 intr_info)
128{
129 return is_exception_n(intr_info, MC_VECTOR);
130}
131
132
133static inline bool is_icebp(u32 intr_info)
134{
135 return is_intr_type(intr_info, INTR_TYPE_PRIV_SW_EXCEPTION);
136}
137
138static inline bool is_nmi(u32 intr_info)
139{
140 return is_intr_type(intr_info, INTR_TYPE_NMI_INTR);
141}
142
143static inline bool is_external_intr(u32 intr_info)
144{
145 return is_intr_type(intr_info, INTR_TYPE_EXT_INTR);
146}
147
148static inline bool is_exception_with_error_code(u32 intr_info)
149{
150 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_DELIVER_CODE_MASK;
151
152 return (intr_info & mask) == mask;
153}
154
155enum vmcs_field_width {
156 VMCS_FIELD_WIDTH_U16 = 0,
157 VMCS_FIELD_WIDTH_U64 = 1,
158 VMCS_FIELD_WIDTH_U32 = 2,
159 VMCS_FIELD_WIDTH_NATURAL_WIDTH = 3
160};
161
162static inline int vmcs_field_width(unsigned long field)
163{
164 if (0x1 & field)
165 return VMCS_FIELD_WIDTH_U32;
166 return (field >> 13) & 0x3;
167}
168
169static inline int vmcs_field_readonly(unsigned long field)
170{
171 return (((field >> 10) & 0x3) == 1);
172}
173
174#define VMCS_FIELD_INDEX_SHIFT (1)
175#define VMCS_FIELD_INDEX_MASK GENMASK(9, 1)
176
177static inline unsigned int vmcs_field_index(unsigned long field)
178{
179 return (field & VMCS_FIELD_INDEX_MASK) >> VMCS_FIELD_INDEX_SHIFT;
180}
181
182#endif
183