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15#include <linux/clk.h>
16#include <linux/device.h>
17#include <linux/dma-mapping.h>
18#include <linux/io.h>
19#include <linux/module.h>
20#include <linux/of_platform.h>
21#include <linux/platform_device.h>
22#include <linux/pm_runtime.h>
23#include <linux/reset.h>
24
25#include <drm/drm_drv.h>
26#include <drm/drm_fb_cma_helper.h>
27#include <drm/drm_fb_helper.h>
28#include <drm/drm_managed.h>
29#include <uapi/drm/v3d_drm.h>
30
31#include "v3d_drv.h"
32#include "v3d_regs.h"
33
34#define DRIVER_NAME "v3d"
35#define DRIVER_DESC "Broadcom V3D graphics"
36#define DRIVER_DATE "20180419"
37#define DRIVER_MAJOR 1
38#define DRIVER_MINOR 0
39#define DRIVER_PATCHLEVEL 0
40
41static int v3d_get_param_ioctl(struct drm_device *dev, void *data,
42 struct drm_file *file_priv)
43{
44 struct v3d_dev *v3d = to_v3d_dev(dev);
45 struct drm_v3d_get_param *args = data;
46 int ret;
47 static const u32 reg_map[] = {
48 [DRM_V3D_PARAM_V3D_UIFCFG] = V3D_HUB_UIFCFG,
49 [DRM_V3D_PARAM_V3D_HUB_IDENT1] = V3D_HUB_IDENT1,
50 [DRM_V3D_PARAM_V3D_HUB_IDENT2] = V3D_HUB_IDENT2,
51 [DRM_V3D_PARAM_V3D_HUB_IDENT3] = V3D_HUB_IDENT3,
52 [DRM_V3D_PARAM_V3D_CORE0_IDENT0] = V3D_CTL_IDENT0,
53 [DRM_V3D_PARAM_V3D_CORE0_IDENT1] = V3D_CTL_IDENT1,
54 [DRM_V3D_PARAM_V3D_CORE0_IDENT2] = V3D_CTL_IDENT2,
55 };
56
57 if (args->pad != 0)
58 return -EINVAL;
59
60
61
62
63
64 if (args->param < ARRAY_SIZE(reg_map) &&
65 (reg_map[args->param] ||
66 args->param == DRM_V3D_PARAM_V3D_CORE0_IDENT0)) {
67 u32 offset = reg_map[args->param];
68
69 if (args->value != 0)
70 return -EINVAL;
71
72 ret = pm_runtime_get_sync(v3d->drm.dev);
73 if (ret < 0)
74 return ret;
75 if (args->param >= DRM_V3D_PARAM_V3D_CORE0_IDENT0 &&
76 args->param <= DRM_V3D_PARAM_V3D_CORE0_IDENT2) {
77 args->value = V3D_CORE_READ(0, offset);
78 } else {
79 args->value = V3D_READ(offset);
80 }
81 pm_runtime_mark_last_busy(v3d->drm.dev);
82 pm_runtime_put_autosuspend(v3d->drm.dev);
83 return 0;
84 }
85
86
87 switch (args->param) {
88 case DRM_V3D_PARAM_SUPPORTS_TFU:
89 args->value = 1;
90 return 0;
91 case DRM_V3D_PARAM_SUPPORTS_CSD:
92 args->value = v3d_has_csd(v3d);
93 return 0;
94 case DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH:
95 args->value = 1;
96 return 0;
97 case DRM_V3D_PARAM_SUPPORTS_PERFMON:
98 args->value = (v3d->ver >= 40);
99 return 0;
100 default:
101 DRM_DEBUG("Unknown parameter %d\n", args->param);
102 return -EINVAL;
103 }
104}
105
106static int
107v3d_open(struct drm_device *dev, struct drm_file *file)
108{
109 struct v3d_dev *v3d = to_v3d_dev(dev);
110 struct v3d_file_priv *v3d_priv;
111 struct drm_gpu_scheduler *sched;
112 int i;
113
114 v3d_priv = kzalloc(sizeof(*v3d_priv), GFP_KERNEL);
115 if (!v3d_priv)
116 return -ENOMEM;
117
118 v3d_priv->v3d = v3d;
119
120 for (i = 0; i < V3D_MAX_QUEUES; i++) {
121 sched = &v3d->queue[i].sched;
122 drm_sched_entity_init(&v3d_priv->sched_entity[i],
123 DRM_SCHED_PRIORITY_NORMAL, &sched,
124 1, NULL);
125 }
126
127 v3d_perfmon_open_file(v3d_priv);
128 file->driver_priv = v3d_priv;
129
130 return 0;
131}
132
133static void
134v3d_postclose(struct drm_device *dev, struct drm_file *file)
135{
136 struct v3d_file_priv *v3d_priv = file->driver_priv;
137 enum v3d_queue q;
138
139 for (q = 0; q < V3D_MAX_QUEUES; q++) {
140 drm_sched_entity_destroy(&v3d_priv->sched_entity[q]);
141 }
142
143 v3d_perfmon_close_file(v3d_priv);
144 kfree(v3d_priv);
145}
146
147DEFINE_DRM_GEM_FOPS(v3d_drm_fops);
148
149
150
151
152
153
154
155static const struct drm_ioctl_desc v3d_drm_ioctls[] = {
156 DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CL, v3d_submit_cl_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
157 DRM_IOCTL_DEF_DRV(V3D_WAIT_BO, v3d_wait_bo_ioctl, DRM_RENDER_ALLOW),
158 DRM_IOCTL_DEF_DRV(V3D_CREATE_BO, v3d_create_bo_ioctl, DRM_RENDER_ALLOW),
159 DRM_IOCTL_DEF_DRV(V3D_MMAP_BO, v3d_mmap_bo_ioctl, DRM_RENDER_ALLOW),
160 DRM_IOCTL_DEF_DRV(V3D_GET_PARAM, v3d_get_param_ioctl, DRM_RENDER_ALLOW),
161 DRM_IOCTL_DEF_DRV(V3D_GET_BO_OFFSET, v3d_get_bo_offset_ioctl, DRM_RENDER_ALLOW),
162 DRM_IOCTL_DEF_DRV(V3D_SUBMIT_TFU, v3d_submit_tfu_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
163 DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CSD, v3d_submit_csd_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
164 DRM_IOCTL_DEF_DRV(V3D_PERFMON_CREATE, v3d_perfmon_create_ioctl, DRM_RENDER_ALLOW),
165 DRM_IOCTL_DEF_DRV(V3D_PERFMON_DESTROY, v3d_perfmon_destroy_ioctl, DRM_RENDER_ALLOW),
166 DRM_IOCTL_DEF_DRV(V3D_PERFMON_GET_VALUES, v3d_perfmon_get_values_ioctl, DRM_RENDER_ALLOW),
167};
168
169static const struct drm_driver v3d_drm_driver = {
170 .driver_features = (DRIVER_GEM |
171 DRIVER_RENDER |
172 DRIVER_SYNCOBJ),
173
174 .open = v3d_open,
175 .postclose = v3d_postclose,
176
177#if defined(CONFIG_DEBUG_FS)
178 .debugfs_init = v3d_debugfs_init,
179#endif
180
181 .gem_create_object = v3d_create_object,
182 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
183 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
184 .gem_prime_import_sg_table = v3d_prime_import_sg_table,
185 .gem_prime_mmap = drm_gem_prime_mmap,
186
187 .ioctls = v3d_drm_ioctls,
188 .num_ioctls = ARRAY_SIZE(v3d_drm_ioctls),
189 .fops = &v3d_drm_fops,
190
191 .name = DRIVER_NAME,
192 .desc = DRIVER_DESC,
193 .date = DRIVER_DATE,
194 .major = DRIVER_MAJOR,
195 .minor = DRIVER_MINOR,
196 .patchlevel = DRIVER_PATCHLEVEL,
197};
198
199static const struct of_device_id v3d_of_match[] = {
200 { .compatible = "brcm,7268-v3d" },
201 { .compatible = "brcm,7278-v3d" },
202 {},
203};
204MODULE_DEVICE_TABLE(of, v3d_of_match);
205
206static int
207map_regs(struct v3d_dev *v3d, void __iomem **regs, const char *name)
208{
209 struct resource *res =
210 platform_get_resource_byname(v3d_to_pdev(v3d), IORESOURCE_MEM, name);
211
212 *regs = devm_ioremap_resource(v3d->drm.dev, res);
213 return PTR_ERR_OR_ZERO(*regs);
214}
215
216static int v3d_platform_drm_probe(struct platform_device *pdev)
217{
218 struct device *dev = &pdev->dev;
219 struct drm_device *drm;
220 struct v3d_dev *v3d;
221 int ret;
222 u32 mmu_debug;
223 u32 ident1;
224
225
226 v3d = devm_drm_dev_alloc(dev, &v3d_drm_driver, struct v3d_dev, drm);
227 if (IS_ERR(v3d))
228 return PTR_ERR(v3d);
229
230 drm = &v3d->drm;
231
232 platform_set_drvdata(pdev, drm);
233
234 ret = map_regs(v3d, &v3d->hub_regs, "hub");
235 if (ret)
236 return ret;
237
238 ret = map_regs(v3d, &v3d->core_regs[0], "core0");
239 if (ret)
240 return ret;
241
242 mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO);
243 dma_set_mask_and_coherent(dev,
244 DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH)));
245 v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH);
246
247 ident1 = V3D_READ(V3D_HUB_IDENT1);
248 v3d->ver = (V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_TVER) * 10 +
249 V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_REV));
250 v3d->cores = V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_NCORES);
251 WARN_ON(v3d->cores > 1);
252
253 v3d->reset = devm_reset_control_get_exclusive(dev, NULL);
254 if (IS_ERR(v3d->reset)) {
255 ret = PTR_ERR(v3d->reset);
256
257 if (ret == -EPROBE_DEFER)
258 return ret;
259
260 v3d->reset = NULL;
261 ret = map_regs(v3d, &v3d->bridge_regs, "bridge");
262 if (ret) {
263 dev_err(dev,
264 "Failed to get reset control or bridge regs\n");
265 return ret;
266 }
267 }
268
269 if (v3d->ver < 41) {
270 ret = map_regs(v3d, &v3d->gca_regs, "gca");
271 if (ret)
272 return ret;
273 }
274
275 v3d->mmu_scratch = dma_alloc_wc(dev, 4096, &v3d->mmu_scratch_paddr,
276 GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
277 if (!v3d->mmu_scratch) {
278 dev_err(dev, "Failed to allocate MMU scratch page\n");
279 return -ENOMEM;
280 }
281
282 pm_runtime_use_autosuspend(dev);
283 pm_runtime_set_autosuspend_delay(dev, 50);
284 pm_runtime_enable(dev);
285
286 ret = v3d_gem_init(drm);
287 if (ret)
288 goto dma_free;
289
290 ret = v3d_irq_init(v3d);
291 if (ret)
292 goto gem_destroy;
293
294 ret = drm_dev_register(drm, 0);
295 if (ret)
296 goto irq_disable;
297
298 return 0;
299
300irq_disable:
301 v3d_irq_disable(v3d);
302gem_destroy:
303 v3d_gem_destroy(drm);
304dma_free:
305 dma_free_wc(dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
306 return ret;
307}
308
309static int v3d_platform_drm_remove(struct platform_device *pdev)
310{
311 struct drm_device *drm = platform_get_drvdata(pdev);
312 struct v3d_dev *v3d = to_v3d_dev(drm);
313
314 drm_dev_unregister(drm);
315
316 v3d_gem_destroy(drm);
317
318 dma_free_wc(v3d->drm.dev, 4096, v3d->mmu_scratch,
319 v3d->mmu_scratch_paddr);
320
321 return 0;
322}
323
324static struct platform_driver v3d_platform_driver = {
325 .probe = v3d_platform_drm_probe,
326 .remove = v3d_platform_drm_remove,
327 .driver = {
328 .name = "v3d",
329 .of_match_table = v3d_of_match,
330 },
331};
332
333module_platform_driver(v3d_platform_driver);
334
335MODULE_ALIAS("platform:v3d-drm");
336MODULE_DESCRIPTION("Broadcom V3D DRM Driver");
337MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
338MODULE_LICENSE("GPL v2");
339
