linux/sound/pci/rme9652/rme9652.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 *   ALSA driver for RME Digi9652 audio interfaces 
   4 *
   5 *      Copyright (c) 1999 IEM - Winfried Ritsch
   6 *      Copyright (c) 1999-2001  Paul Davis
   7 */
   8
   9#include <linux/delay.h>
  10#include <linux/init.h>
  11#include <linux/interrupt.h>
  12#include <linux/pci.h>
  13#include <linux/module.h>
  14#include <linux/io.h>
  15#include <linux/nospec.h>
  16
  17#include <sound/core.h>
  18#include <sound/control.h>
  19#include <sound/pcm.h>
  20#include <sound/info.h>
  21#include <sound/asoundef.h>
  22#include <sound/initval.h>
  23
  24#include <asm/current.h>
  25
  26static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  27static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  28static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  29static bool precise_ptr[SNDRV_CARDS];                   /* Enable precise pointer */
  30
  31module_param_array(index, int, NULL, 0444);
  32MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
  33module_param_array(id, charp, NULL, 0444);
  34MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
  35module_param_array(enable, bool, NULL, 0444);
  36MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
  37module_param_array(precise_ptr, bool, NULL, 0444);
  38MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
  39MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
  40MODULE_DESCRIPTION("RME Digi9652/Digi9636");
  41MODULE_LICENSE("GPL");
  42
  43/* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
  44   capture, one for playback. Both the ADAT and S/PDIF channels appear
  45   to the host CPU in the same block of memory. There is no functional
  46   difference between them in terms of access.
  47   
  48   The Hammerfall Light is identical to the Hammerfall, except that it
  49   has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
  50*/
  51
  52#define RME9652_NCHANNELS       26
  53#define RME9636_NCHANNELS       18
  54
  55/* Preferred sync source choices - used by "sync_pref" control switch */
  56
  57#define RME9652_SYNC_FROM_SPDIF 0
  58#define RME9652_SYNC_FROM_ADAT1 1
  59#define RME9652_SYNC_FROM_ADAT2 2
  60#define RME9652_SYNC_FROM_ADAT3 3
  61
  62/* Possible sources of S/PDIF input */
  63
  64#define RME9652_SPDIFIN_OPTICAL 0       /* optical (ADAT1) */
  65#define RME9652_SPDIFIN_COAXIAL 1       /* coaxial (RCA) */
  66#define RME9652_SPDIFIN_INTERN  2       /* internal (CDROM) */
  67
  68/* ------------- Status-Register bits --------------------- */
  69
  70#define RME9652_IRQ        (1<<0)       /* IRQ is High if not reset by irq_clear */
  71#define RME9652_lock_2     (1<<1)       /* ADAT 3-PLL: 1=locked, 0=unlocked */
  72#define RME9652_lock_1     (1<<2)       /* ADAT 2-PLL: 1=locked, 0=unlocked */
  73#define RME9652_lock_0     (1<<3)       /* ADAT 1-PLL: 1=locked, 0=unlocked */
  74#define RME9652_fs48       (1<<4)       /* sample rate is 0=44.1/88.2,1=48/96 Khz */
  75#define RME9652_wsel_rd    (1<<5)       /* if Word-Clock is used and valid then 1 */
  76                                        /* bits 6-15 encode h/w buffer pointer position */
  77#define RME9652_sync_2     (1<<16)      /* if ADAT-IN 3 in sync to system clock */
  78#define RME9652_sync_1     (1<<17)      /* if ADAT-IN 2 in sync to system clock */
  79#define RME9652_sync_0     (1<<18)      /* if ADAT-IN 1 in sync to system clock */
  80#define RME9652_DS_rd      (1<<19)      /* 1=Double Speed Mode, 0=Normal Speed */
  81#define RME9652_tc_busy    (1<<20)      /* 1=time-code copy in progress (960ms) */
  82#define RME9652_tc_out     (1<<21)      /* time-code out bit */
  83#define RME9652_F_0        (1<<22)      /* 000=64kHz, 100=88.2kHz, 011=96kHz  */
  84#define RME9652_F_1        (1<<23)      /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
  85#define RME9652_F_2        (1<<24)      /* external Crystal Chip if ERF=1 */
  86#define RME9652_ERF        (1<<25)      /* Error-Flag of SDPIF Receiver (1=No Lock) */
  87#define RME9652_buffer_id  (1<<26)      /* toggles by each interrupt on rec/play */
  88#define RME9652_tc_valid   (1<<27)      /* 1 = a signal is detected on time-code input */
  89#define RME9652_SPDIF_READ (1<<28)      /* byte available from Rev 1.5+ S/PDIF interface */
  90
  91#define RME9652_sync      (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
  92#define RME9652_lock      (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
  93#define RME9652_F         (RME9652_F_0|RME9652_F_1|RME9652_F_2)
  94#define rme9652_decode_spdif_rate(x) ((x)>>22)
  95
  96/* Bit 6..15 : h/w buffer pointer */
  97
  98#define RME9652_buf_pos   0x000FFC0
  99
 100/* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
 101   Rev G EEPROMS and Rev 1.5 cards or later.
 102*/ 
 103
 104#define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
 105
 106/* amount of io space we remap for register access. i'm not sure we
 107   even need this much, but 1K is nice round number :)
 108*/
 109
 110#define RME9652_IO_EXTENT     1024
 111
 112#define RME9652_init_buffer       0
 113#define RME9652_play_buffer       32    /* holds ptr to 26x64kBit host RAM */
 114#define RME9652_rec_buffer        36    /* holds ptr to 26x64kBit host RAM */
 115#define RME9652_control_register  64
 116#define RME9652_irq_clear         96
 117#define RME9652_time_code         100   /* useful if used with alesis adat */
 118#define RME9652_thru_base         128   /* 132...228 Thru for 26 channels */
 119
 120/* Read-only registers */
 121
 122/* Writing to any of the register locations writes to the status
 123   register. We'll use the first location as our point of access.
 124*/
 125
 126#define RME9652_status_register    0
 127
 128/* --------- Control-Register Bits ---------------- */
 129
 130
 131#define RME9652_start_bit          (1<<0)       /* start record/play */
 132                                                /* bits 1-3 encode buffersize/latency */
 133#define RME9652_Master             (1<<4)       /* Clock Mode Master=1,Slave/Auto=0 */
 134#define RME9652_IE                 (1<<5)       /* Interrupt Enable */
 135#define RME9652_freq               (1<<6)       /* samplerate 0=44.1/88.2, 1=48/96 kHz */
 136#define RME9652_freq1              (1<<7)       /* if 0, 32kHz, else always 1 */
 137#define RME9652_DS                 (1<<8)       /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
 138#define RME9652_PRO                (1<<9)       /* S/PDIF out: 0=consumer, 1=professional */
 139#define RME9652_EMP                (1<<10)      /*  Emphasis 0=None, 1=ON */
 140#define RME9652_Dolby              (1<<11)      /*  Non-audio bit 1=set, 0=unset */
 141#define RME9652_opt_out            (1<<12)      /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
 142#define RME9652_wsel               (1<<13)      /* use Wordclock as sync (overwrites master) */
 143#define RME9652_inp_0              (1<<14)      /* SPDIF-IN: 00=optical (ADAT1),     */
 144#define RME9652_inp_1              (1<<15)      /* 01=koaxial (Cinch), 10=Internal CDROM */
 145#define RME9652_SyncPref_ADAT2     (1<<16)
 146#define RME9652_SyncPref_ADAT3     (1<<17)
 147#define RME9652_SPDIF_RESET        (1<<18)      /* Rev 1.5+: h/w S/PDIF receiver */
 148#define RME9652_SPDIF_SELECT       (1<<19)
 149#define RME9652_SPDIF_CLOCK        (1<<20)
 150#define RME9652_SPDIF_WRITE        (1<<21)
 151#define RME9652_ADAT1_INTERNAL     (1<<22)      /* Rev 1.5+: if set, internal CD connector carries ADAT */
 152
 153/* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
 154
 155#define RME9652_latency            0x0e
 156#define rme9652_encode_latency(x)  (((x)&0x7)<<1)
 157#define rme9652_decode_latency(x)  (((x)>>1)&0x7)
 158#define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
 159#define RME9652_inp                (RME9652_inp_0|RME9652_inp_1)
 160#define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
 161#define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
 162
 163#define RME9652_SyncPref_Mask      (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 164#define RME9652_SyncPref_ADAT1     0
 165#define RME9652_SyncPref_SPDIF     (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 166
 167/* the size of a substream (1 mono data stream) */
 168
 169#define RME9652_CHANNEL_BUFFER_SAMPLES  (16*1024)
 170#define RME9652_CHANNEL_BUFFER_BYTES    (4*RME9652_CHANNEL_BUFFER_SAMPLES)
 171
 172/* the size of the area we need to allocate for DMA transfers. the
 173   size is the same regardless of the number of channels - the 
 174   9636 still uses the same memory area.
 175
 176   Note that we allocate 1 more channel than is apparently needed
 177   because the h/w seems to write 1 byte beyond the end of the last
 178   page. Sigh.
 179*/
 180
 181#define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
 182#define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
 183
 184struct snd_rme9652 {
 185        int dev;
 186
 187        spinlock_t lock;
 188        int irq;
 189        unsigned long port;
 190        void __iomem *iobase;
 191        
 192        int precise_ptr;
 193
 194        u32 control_register;   /* cached value */
 195        u32 thru_bits;          /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
 196
 197        u32 creg_spdif;
 198        u32 creg_spdif_stream;
 199
 200        char *card_name;                /* hammerfall or hammerfall light names */
 201
 202        size_t hw_offsetmask;           /* &-with status register to get real hw_offset */
 203        size_t prev_hw_offset;          /* previous hw offset */
 204        size_t max_jitter;              /* maximum jitter in frames for 
 205                                           hw pointer */
 206        size_t period_bytes;            /* guess what this is */
 207
 208        unsigned char ds_channels;
 209        unsigned char ss_channels;      /* different for hammerfall/hammerfall-light */
 210
 211        struct snd_dma_buffer *playback_dma_buf;
 212        struct snd_dma_buffer *capture_dma_buf;
 213
 214        unsigned char *capture_buffer;  /* suitably aligned address */
 215        unsigned char *playback_buffer; /* suitably aligned address */
 216
 217        pid_t capture_pid;
 218        pid_t playback_pid;
 219
 220        struct snd_pcm_substream *capture_substream;
 221        struct snd_pcm_substream *playback_substream;
 222        int running;
 223
 224        int passthru;                   /* non-zero if doing pass-thru */
 225        int hw_rev;                     /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
 226
 227        int last_spdif_sample_rate;     /* so that we can catch externally ... */
 228        int last_adat_sample_rate;      /* ... induced rate changes            */
 229
 230        const char *channel_map;
 231
 232        struct snd_card *card;
 233        struct snd_pcm *pcm;
 234        struct pci_dev *pci;
 235        struct snd_kcontrol *spdif_ctl;
 236
 237};
 238
 239/* These tables map the ALSA channels 1..N to the channels that we
 240   need to use in order to find the relevant channel buffer. RME
 241   refer to this kind of mapping as between "the ADAT channel and
 242   the DMA channel." We index it using the logical audio channel,
 243   and the value is the DMA channel (i.e. channel buffer number)
 244   where the data for that channel can be read/written from/to.
 245*/
 246
 247static const char channel_map_9652_ss[26] = {
 248        0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 249        18, 19, 20, 21, 22, 23, 24, 25
 250};
 251
 252static const char channel_map_9636_ss[26] = {
 253        0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 
 254        /* channels 16 and 17 are S/PDIF */
 255        24, 25,
 256        /* channels 18-25 don't exist */
 257        -1, -1, -1, -1, -1, -1, -1, -1
 258};
 259
 260static const char channel_map_9652_ds[26] = {
 261        /* ADAT channels are remapped */
 262        1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 263        /* channels 12 and 13 are S/PDIF */
 264        24, 25,
 265        /* others don't exist */
 266        -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 267};
 268
 269static const char channel_map_9636_ds[26] = {
 270        /* ADAT channels are remapped */
 271        1, 3, 5, 7, 9, 11, 13, 15,
 272        /* channels 8 and 9 are S/PDIF */
 273        24, 25,
 274        /* others don't exist */
 275        -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 276};
 277
 278static struct snd_dma_buffer *
 279snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size)
 280{
 281        return snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV, size);
 282}
 283
 284static const struct pci_device_id snd_rme9652_ids[] = {
 285        {
 286                .vendor    = 0x10ee,
 287                .device    = 0x3fc4,
 288                .subvendor = PCI_ANY_ID,
 289                .subdevice = PCI_ANY_ID,
 290        },      /* RME Digi9652 */
 291        { 0, },
 292};
 293
 294MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
 295
 296static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
 297{
 298        writel(val, rme9652->iobase + reg);
 299}
 300
 301static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
 302{
 303        return readl(rme9652->iobase + reg);
 304}
 305
 306static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
 307{
 308        unsigned long flags;
 309        int ret = 1;
 310
 311        spin_lock_irqsave(&rme9652->lock, flags);
 312        if ((rme9652->playback_pid != rme9652->capture_pid) &&
 313            (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
 314                ret = 0;
 315        }
 316        spin_unlock_irqrestore(&rme9652->lock, flags);
 317        return ret;
 318}
 319
 320static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
 321{
 322        if (rme9652_running_double_speed(rme9652)) {
 323                return (rme9652_read(rme9652, RME9652_status_register) &
 324                        RME9652_fs48) ? 96000 : 88200;
 325        } else {
 326                return (rme9652_read(rme9652, RME9652_status_register) &
 327                        RME9652_fs48) ? 48000 : 44100;
 328        }
 329}
 330
 331static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
 332{
 333        unsigned int i;
 334
 335        i = rme9652->control_register & RME9652_latency;
 336        rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
 337        rme9652->hw_offsetmask = 
 338                (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
 339        rme9652->max_jitter = 80;
 340}
 341
 342static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
 343{
 344        int status;
 345        unsigned int offset, frag;
 346        snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
 347        snd_pcm_sframes_t delta;
 348
 349        status = rme9652_read(rme9652, RME9652_status_register);
 350        if (!rme9652->precise_ptr)
 351                return (status & RME9652_buffer_id) ? period_size : 0;
 352        offset = status & RME9652_buf_pos;
 353
 354        /* The hardware may give a backward movement for up to 80 frames
 355           Martin Kirst <martin.kirst@freenet.de> knows the details.
 356        */
 357
 358        delta = rme9652->prev_hw_offset - offset;
 359        delta &= 0xffff;
 360        if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
 361                offset = rme9652->prev_hw_offset;
 362        else
 363                rme9652->prev_hw_offset = offset;
 364        offset &= rme9652->hw_offsetmask;
 365        offset /= 4;
 366        frag = status & RME9652_buffer_id;
 367
 368        if (offset < period_size) {
 369                if (offset > rme9652->max_jitter) {
 370                        if (frag)
 371                                dev_err(rme9652->card->dev,
 372                                        "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
 373                                        status, offset);
 374                } else if (!frag)
 375                        return 0;
 376                offset -= rme9652->max_jitter;
 377                if ((int)offset < 0)
 378                        offset += period_size * 2;
 379        } else {
 380                if (offset > period_size + rme9652->max_jitter) {
 381                        if (!frag)
 382                                dev_err(rme9652->card->dev,
 383                                        "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
 384                                        status, offset);
 385                } else if (frag)
 386                        return period_size;
 387                offset -= rme9652->max_jitter;
 388        }
 389
 390        return offset;
 391}
 392
 393static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
 394{
 395        int i;
 396
 397        /* reset the FIFO pointer to zero. We do this by writing to 8
 398           registers, each of which is a 32bit wide register, and set
 399           them all to zero. Note that s->iobase is a pointer to
 400           int32, not pointer to char.  
 401        */
 402
 403        for (i = 0; i < 8; i++) {
 404                rme9652_write(rme9652, i * 4, 0);
 405                udelay(10);
 406        }
 407        rme9652->prev_hw_offset = 0;
 408}
 409
 410static inline void rme9652_start(struct snd_rme9652 *s)
 411{
 412        s->control_register |= (RME9652_IE | RME9652_start_bit);
 413        rme9652_write(s, RME9652_control_register, s->control_register);
 414}
 415
 416static inline void rme9652_stop(struct snd_rme9652 *s)
 417{
 418        s->control_register &= ~(RME9652_start_bit | RME9652_IE);
 419        rme9652_write(s, RME9652_control_register, s->control_register);
 420}
 421
 422static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
 423                                          unsigned int frames)
 424{
 425        int restart = 0;
 426        int n;
 427
 428        spin_lock_irq(&s->lock);
 429
 430        restart = s->running;
 431        if (restart)
 432                rme9652_stop(s);
 433
 434        frames >>= 7;
 435        n = 0;
 436        while (frames) {
 437                n++;
 438                frames >>= 1;
 439        }
 440
 441        s->control_register &= ~RME9652_latency;
 442        s->control_register |= rme9652_encode_latency(n);
 443
 444        rme9652_write(s, RME9652_control_register, s->control_register);
 445
 446        rme9652_compute_period_size(s);
 447
 448        if (restart)
 449                rme9652_start(s);
 450
 451        spin_unlock_irq(&s->lock);
 452
 453        return 0;
 454}
 455
 456static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
 457{
 458        int restart;
 459        int reject_if_open = 0;
 460        int xrate;
 461
 462        if (!snd_rme9652_use_is_exclusive (rme9652)) {
 463                return -EBUSY;
 464        }
 465
 466        /* Changing from a "single speed" to a "double speed" rate is
 467           not allowed if any substreams are open. This is because
 468           such a change causes a shift in the location of 
 469           the DMA buffers and a reduction in the number of available
 470           buffers. 
 471
 472           Note that a similar but essentially insoluble problem
 473           exists for externally-driven rate changes. All we can do
 474           is to flag rate changes in the read/write routines.
 475         */
 476
 477        spin_lock_irq(&rme9652->lock);
 478        xrate = rme9652_adat_sample_rate(rme9652);
 479
 480        switch (rate) {
 481        case 44100:
 482                if (xrate > 48000) {
 483                        reject_if_open = 1;
 484                }
 485                rate = 0;
 486                break;
 487        case 48000:
 488                if (xrate > 48000) {
 489                        reject_if_open = 1;
 490                }
 491                rate = RME9652_freq;
 492                break;
 493        case 88200:
 494                if (xrate < 48000) {
 495                        reject_if_open = 1;
 496                }
 497                rate = RME9652_DS;
 498                break;
 499        case 96000:
 500                if (xrate < 48000) {
 501                        reject_if_open = 1;
 502                }
 503                rate = RME9652_DS | RME9652_freq;
 504                break;
 505        default:
 506                spin_unlock_irq(&rme9652->lock);
 507                return -EINVAL;
 508        }
 509
 510        if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
 511                spin_unlock_irq(&rme9652->lock);
 512                return -EBUSY;
 513        }
 514
 515        restart = rme9652->running;
 516        if (restart)
 517                rme9652_stop(rme9652);
 518        rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
 519        rme9652->control_register |= rate;
 520        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 521
 522        if (restart)
 523                rme9652_start(rme9652);
 524
 525        if (rate & RME9652_DS) {
 526                if (rme9652->ss_channels == RME9652_NCHANNELS) {
 527                        rme9652->channel_map = channel_map_9652_ds;
 528                } else {
 529                        rme9652->channel_map = channel_map_9636_ds;
 530                }
 531        } else {
 532                if (rme9652->ss_channels == RME9652_NCHANNELS) {
 533                        rme9652->channel_map = channel_map_9652_ss;
 534                } else {
 535                        rme9652->channel_map = channel_map_9636_ss;
 536                }
 537        }
 538
 539        spin_unlock_irq(&rme9652->lock);
 540        return 0;
 541}
 542
 543static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
 544{
 545        int i;
 546
 547        rme9652->passthru = 0;
 548
 549        if (channel < 0) {
 550
 551                /* set thru for all channels */
 552
 553                if (enable) {
 554                        for (i = 0; i < RME9652_NCHANNELS; i++) {
 555                                rme9652->thru_bits |= (1 << i);
 556                                rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
 557                        }
 558                } else {
 559                        for (i = 0; i < RME9652_NCHANNELS; i++) {
 560                                rme9652->thru_bits &= ~(1 << i);
 561                                rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
 562                        }
 563                }
 564
 565        } else {
 566                int mapped_channel;
 567
 568                mapped_channel = rme9652->channel_map[channel];
 569
 570                if (enable) {
 571                        rme9652->thru_bits |= (1 << mapped_channel);
 572                } else {
 573                        rme9652->thru_bits &= ~(1 << mapped_channel);
 574                }
 575
 576                rme9652_write(rme9652,
 577                               RME9652_thru_base + mapped_channel * 4,
 578                               enable ? 1 : 0);                        
 579        }
 580}
 581
 582static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
 583{
 584        if (onoff) {
 585                rme9652_set_thru(rme9652, -1, 1);
 586
 587                /* we don't want interrupts, so do a
 588                   custom version of rme9652_start().
 589                */
 590
 591                rme9652->control_register =
 592                        RME9652_inp_0 | 
 593                        rme9652_encode_latency(7) |
 594                        RME9652_start_bit;
 595
 596                rme9652_reset_hw_pointer(rme9652);
 597
 598                rme9652_write(rme9652, RME9652_control_register,
 599                              rme9652->control_register);
 600                rme9652->passthru = 1;
 601        } else {
 602                rme9652_set_thru(rme9652, -1, 0);
 603                rme9652_stop(rme9652);          
 604                rme9652->passthru = 0;
 605        }
 606
 607        return 0;
 608}
 609
 610static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
 611{
 612        if (onoff) 
 613                rme9652->control_register |= mask;
 614        else 
 615                rme9652->control_register &= ~mask;
 616                
 617        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 618}
 619
 620static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
 621{
 622        long mask;
 623        long i;
 624
 625        for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
 626                if (val & mask)
 627                        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
 628                else 
 629                        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
 630
 631                rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 632                rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 633        }
 634}
 635
 636static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
 637{
 638        long mask;
 639        long val;
 640        long i;
 641
 642        val = 0;
 643
 644        for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
 645                rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 646                if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
 647                        val |= mask;
 648                rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 649        }
 650
 651        return val;
 652}
 653
 654static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
 655{
 656        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 657        rme9652_spdif_write_byte (rme9652, 0x20);
 658        rme9652_spdif_write_byte (rme9652, address);
 659        rme9652_spdif_write_byte (rme9652, data);
 660        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 661}
 662
 663
 664static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
 665{
 666        int ret;
 667
 668        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 669        rme9652_spdif_write_byte (rme9652, 0x20);
 670        rme9652_spdif_write_byte (rme9652, address);
 671        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 672        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 673
 674        rme9652_spdif_write_byte (rme9652, 0x21);
 675        ret = rme9652_spdif_read_byte (rme9652);
 676        rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 677
 678        return ret;
 679}
 680
 681static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
 682{
 683        /* XXX what unsets this ? */
 684
 685        rme9652->control_register |= RME9652_SPDIF_RESET;
 686
 687        rme9652_write_spdif_codec (rme9652, 4, 0x40);
 688        rme9652_write_spdif_codec (rme9652, 17, 0x13);
 689        rme9652_write_spdif_codec (rme9652, 6, 0x02);
 690}
 691
 692static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
 693{
 694        unsigned int rate_bits;
 695
 696        if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
 697                return -1;      /* error condition */
 698        }
 699        
 700        if (s->hw_rev == 15) {
 701
 702                int x, y, ret;
 703                
 704                x = rme9652_spdif_read_codec (s, 30);
 705
 706                if (x != 0) 
 707                        y = 48000 * 64 / x;
 708                else
 709                        y = 0;
 710
 711                if      (y > 30400 && y < 33600)  ret = 32000; 
 712                else if (y > 41900 && y < 46000)  ret = 44100;
 713                else if (y > 46000 && y < 50400)  ret = 48000;
 714                else if (y > 60800 && y < 67200)  ret = 64000;
 715                else if (y > 83700 && y < 92000)  ret = 88200;
 716                else if (y > 92000 && y < 100000) ret = 96000;
 717                else                              ret = 0;
 718                return ret;
 719        }
 720
 721        rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
 722
 723        switch (rme9652_decode_spdif_rate(rate_bits)) {
 724        case 0x7:
 725                return 32000;
 726
 727        case 0x6:
 728                return 44100;
 729
 730        case 0x5:
 731                return 48000;
 732
 733        case 0x4:
 734                return 88200;
 735
 736        case 0x3:
 737                return 96000;
 738
 739        case 0x0:
 740                return 64000;
 741
 742        default:
 743                dev_err(s->card->dev,
 744                        "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
 745                           s->card_name, rate_bits);
 746                return 0;
 747        }
 748}
 749
 750/*-----------------------------------------------------------------------------
 751  Control Interface
 752  ----------------------------------------------------------------------------*/
 753
 754static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
 755{
 756        u32 val = 0;
 757        val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
 758        val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
 759        if (val & RME9652_PRO)
 760                val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
 761        else
 762                val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
 763        return val;
 764}
 765
 766static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
 767{
 768        aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
 769                         ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
 770        if (val & RME9652_PRO)
 771                aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
 772        else
 773                aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
 774}
 775
 776static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 777{
 778        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 779        uinfo->count = 1;
 780        return 0;
 781}
 782
 783static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 784{
 785        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 786        
 787        snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
 788        return 0;
 789}
 790
 791static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 792{
 793        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 794        int change;
 795        u32 val;
 796        
 797        val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 798        spin_lock_irq(&rme9652->lock);
 799        change = val != rme9652->creg_spdif;
 800        rme9652->creg_spdif = val;
 801        spin_unlock_irq(&rme9652->lock);
 802        return change;
 803}
 804
 805static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 806{
 807        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 808        uinfo->count = 1;
 809        return 0;
 810}
 811
 812static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 813{
 814        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 815        
 816        snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
 817        return 0;
 818}
 819
 820static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 821{
 822        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 823        int change;
 824        u32 val;
 825        
 826        val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 827        spin_lock_irq(&rme9652->lock);
 828        change = val != rme9652->creg_spdif_stream;
 829        rme9652->creg_spdif_stream = val;
 830        rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
 831        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
 832        spin_unlock_irq(&rme9652->lock);
 833        return change;
 834}
 835
 836static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 837{
 838        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 839        uinfo->count = 1;
 840        return 0;
 841}
 842
 843static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 844{
 845        ucontrol->value.iec958.status[0] = kcontrol->private_value;
 846        return 0;
 847}
 848
 849#define RME9652_ADAT1_IN(xname, xindex) \
 850{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 851  .info = snd_rme9652_info_adat1_in, \
 852  .get = snd_rme9652_get_adat1_in, \
 853  .put = snd_rme9652_put_adat1_in }
 854
 855static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
 856{
 857        if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
 858                return 1; 
 859        return 0;
 860}
 861
 862static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
 863{
 864        int restart = 0;
 865
 866        if (internal) {
 867                rme9652->control_register |= RME9652_ADAT1_INTERNAL;
 868        } else {
 869                rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
 870        }
 871
 872        /* XXX do we actually need to stop the card when we do this ? */
 873
 874        restart = rme9652->running;
 875        if (restart)
 876                rme9652_stop(rme9652);
 877
 878        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 879
 880        if (restart)
 881                rme9652_start(rme9652);
 882
 883        return 0;
 884}
 885
 886static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 887{
 888        static const char * const texts[2] = {"ADAT1", "Internal"};
 889
 890        return snd_ctl_enum_info(uinfo, 1, 2, texts);
 891}
 892
 893static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 894{
 895        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 896        
 897        spin_lock_irq(&rme9652->lock);
 898        ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
 899        spin_unlock_irq(&rme9652->lock);
 900        return 0;
 901}
 902
 903static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 904{
 905        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 906        int change;
 907        unsigned int val;
 908        
 909        if (!snd_rme9652_use_is_exclusive(rme9652))
 910                return -EBUSY;
 911        val = ucontrol->value.enumerated.item[0] % 2;
 912        spin_lock_irq(&rme9652->lock);
 913        change = val != rme9652_adat1_in(rme9652);
 914        if (change)
 915                rme9652_set_adat1_input(rme9652, val);
 916        spin_unlock_irq(&rme9652->lock);
 917        return change;
 918}
 919
 920#define RME9652_SPDIF_IN(xname, xindex) \
 921{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 922  .info = snd_rme9652_info_spdif_in, \
 923  .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
 924
 925static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
 926{
 927        return rme9652_decode_spdif_in(rme9652->control_register &
 928                                       RME9652_inp);
 929}
 930
 931static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
 932{
 933        int restart = 0;
 934
 935        rme9652->control_register &= ~RME9652_inp;
 936        rme9652->control_register |= rme9652_encode_spdif_in(in);
 937
 938        restart = rme9652->running;
 939        if (restart)
 940                rme9652_stop(rme9652);
 941
 942        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 943
 944        if (restart)
 945                rme9652_start(rme9652);
 946
 947        return 0;
 948}
 949
 950static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 951{
 952        static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
 953
 954        return snd_ctl_enum_info(uinfo, 1, 3, texts);
 955}
 956
 957static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 958{
 959        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 960        
 961        spin_lock_irq(&rme9652->lock);
 962        ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
 963        spin_unlock_irq(&rme9652->lock);
 964        return 0;
 965}
 966
 967static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 968{
 969        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 970        int change;
 971        unsigned int val;
 972        
 973        if (!snd_rme9652_use_is_exclusive(rme9652))
 974                return -EBUSY;
 975        val = ucontrol->value.enumerated.item[0] % 3;
 976        spin_lock_irq(&rme9652->lock);
 977        change = val != rme9652_spdif_in(rme9652);
 978        if (change)
 979                rme9652_set_spdif_input(rme9652, val);
 980        spin_unlock_irq(&rme9652->lock);
 981        return change;
 982}
 983
 984#define RME9652_SPDIF_OUT(xname, xindex) \
 985{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 986  .info = snd_rme9652_info_spdif_out, \
 987  .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
 988
 989static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
 990{
 991        return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
 992}
 993
 994static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
 995{
 996        int restart = 0;
 997
 998        if (out) {
 999                rme9652->control_register |= RME9652_opt_out;
1000        } else {
1001                rme9652->control_register &= ~RME9652_opt_out;
1002        }
1003
1004        restart = rme9652->running;
1005        if (restart)
1006                rme9652_stop(rme9652);
1007
1008        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1009
1010        if (restart)
1011                rme9652_start(rme9652);
1012
1013        return 0;
1014}
1015
1016#define snd_rme9652_info_spdif_out      snd_ctl_boolean_mono_info
1017
1018static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1019{
1020        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1021        
1022        spin_lock_irq(&rme9652->lock);
1023        ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1024        spin_unlock_irq(&rme9652->lock);
1025        return 0;
1026}
1027
1028static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1029{
1030        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1031        int change;
1032        unsigned int val;
1033        
1034        if (!snd_rme9652_use_is_exclusive(rme9652))
1035                return -EBUSY;
1036        val = ucontrol->value.integer.value[0] & 1;
1037        spin_lock_irq(&rme9652->lock);
1038        change = (int)val != rme9652_spdif_out(rme9652);
1039        rme9652_set_spdif_output(rme9652, val);
1040        spin_unlock_irq(&rme9652->lock);
1041        return change;
1042}
1043
1044#define RME9652_SYNC_MODE(xname, xindex) \
1045{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1046  .info = snd_rme9652_info_sync_mode, \
1047  .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1048
1049static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1050{
1051        if (rme9652->control_register & RME9652_wsel) {
1052                return 2;
1053        } else if (rme9652->control_register & RME9652_Master) {
1054                return 1;
1055        } else {
1056                return 0;
1057        }
1058}
1059
1060static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1061{
1062        int restart = 0;
1063
1064        switch (mode) {
1065        case 0:
1066                rme9652->control_register &=
1067                    ~(RME9652_Master | RME9652_wsel);
1068                break;
1069        case 1:
1070                rme9652->control_register =
1071                    (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1072                break;
1073        case 2:
1074                rme9652->control_register |=
1075                    (RME9652_Master | RME9652_wsel);
1076                break;
1077        }
1078
1079        restart = rme9652->running;
1080        if (restart)
1081                rme9652_stop(rme9652);
1082
1083        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1084
1085        if (restart)
1086                rme9652_start(rme9652);
1087
1088        return 0;
1089}
1090
1091static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1092{
1093        static const char * const texts[3] = {
1094                "AutoSync", "Master", "Word Clock"
1095        };
1096
1097        return snd_ctl_enum_info(uinfo, 1, 3, texts);
1098}
1099
1100static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1101{
1102        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1103        
1104        spin_lock_irq(&rme9652->lock);
1105        ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1106        spin_unlock_irq(&rme9652->lock);
1107        return 0;
1108}
1109
1110static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1111{
1112        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1113        int change;
1114        unsigned int val;
1115        
1116        val = ucontrol->value.enumerated.item[0] % 3;
1117        spin_lock_irq(&rme9652->lock);
1118        change = (int)val != rme9652_sync_mode(rme9652);
1119        rme9652_set_sync_mode(rme9652, val);
1120        spin_unlock_irq(&rme9652->lock);
1121        return change;
1122}
1123
1124#define RME9652_SYNC_PREF(xname, xindex) \
1125{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1126  .info = snd_rme9652_info_sync_pref, \
1127  .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1128
1129static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1130{
1131        switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1132        case RME9652_SyncPref_ADAT1:
1133                return RME9652_SYNC_FROM_ADAT1;
1134        case RME9652_SyncPref_ADAT2:
1135                return RME9652_SYNC_FROM_ADAT2;
1136        case RME9652_SyncPref_ADAT3:
1137                return RME9652_SYNC_FROM_ADAT3;
1138        case RME9652_SyncPref_SPDIF:
1139                return RME9652_SYNC_FROM_SPDIF;
1140        }
1141        /* Not reachable */
1142        return 0;
1143}
1144
1145static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1146{
1147        int restart;
1148
1149        rme9652->control_register &= ~RME9652_SyncPref_Mask;
1150        switch (pref) {
1151        case RME9652_SYNC_FROM_ADAT1:
1152                rme9652->control_register |= RME9652_SyncPref_ADAT1;
1153                break;
1154        case RME9652_SYNC_FROM_ADAT2:
1155                rme9652->control_register |= RME9652_SyncPref_ADAT2;
1156                break;
1157        case RME9652_SYNC_FROM_ADAT3:
1158                rme9652->control_register |= RME9652_SyncPref_ADAT3;
1159                break;
1160        case RME9652_SYNC_FROM_SPDIF:
1161                rme9652->control_register |= RME9652_SyncPref_SPDIF;
1162                break;
1163        }
1164
1165        restart = rme9652->running;
1166        if (restart)
1167                rme9652_stop(rme9652);
1168
1169        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1170
1171        if (restart)
1172                rme9652_start(rme9652);
1173
1174        return 0;
1175}
1176
1177static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1178{
1179        static const char * const texts[4] = {
1180                "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1181        };
1182        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1183
1184        return snd_ctl_enum_info(uinfo, 1,
1185                                 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1186                                 texts);
1187}
1188
1189static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1190{
1191        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1192        
1193        spin_lock_irq(&rme9652->lock);
1194        ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1195        spin_unlock_irq(&rme9652->lock);
1196        return 0;
1197}
1198
1199static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1200{
1201        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1202        int change, max;
1203        unsigned int val;
1204        
1205        if (!snd_rme9652_use_is_exclusive(rme9652))
1206                return -EBUSY;
1207        max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1208        val = ucontrol->value.enumerated.item[0] % max;
1209        spin_lock_irq(&rme9652->lock);
1210        change = (int)val != rme9652_sync_pref(rme9652);
1211        rme9652_set_sync_pref(rme9652, val);
1212        spin_unlock_irq(&rme9652->lock);
1213        return change;
1214}
1215
1216static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1217{
1218        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1219        uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1220        uinfo->count = rme9652->ss_channels;
1221        uinfo->value.integer.min = 0;
1222        uinfo->value.integer.max = 1;
1223        return 0;
1224}
1225
1226static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1227{
1228        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1229        unsigned int k;
1230        u32 thru_bits = rme9652->thru_bits;
1231
1232        for (k = 0; k < rme9652->ss_channels; ++k) {
1233                ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1234        }
1235        return 0;
1236}
1237
1238static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1239{
1240        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1241        int change;
1242        unsigned int chn;
1243        u32 thru_bits = 0;
1244
1245        if (!snd_rme9652_use_is_exclusive(rme9652))
1246                return -EBUSY;
1247
1248        for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1249                if (ucontrol->value.integer.value[chn])
1250                        thru_bits |= 1 << chn;
1251        }
1252        
1253        spin_lock_irq(&rme9652->lock);
1254        change = thru_bits ^ rme9652->thru_bits;
1255        if (change) {
1256                for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1257                        if (!(change & (1 << chn)))
1258                                continue;
1259                        rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1260                }
1261        }
1262        spin_unlock_irq(&rme9652->lock);
1263        return !!change;
1264}
1265
1266#define RME9652_PASSTHRU(xname, xindex) \
1267{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1268  .info = snd_rme9652_info_passthru, \
1269  .put = snd_rme9652_put_passthru, \
1270  .get = snd_rme9652_get_passthru }
1271
1272#define snd_rme9652_info_passthru       snd_ctl_boolean_mono_info
1273
1274static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1275{
1276        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1277
1278        spin_lock_irq(&rme9652->lock);
1279        ucontrol->value.integer.value[0] = rme9652->passthru;
1280        spin_unlock_irq(&rme9652->lock);
1281        return 0;
1282}
1283
1284static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1285{
1286        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1287        int change;
1288        unsigned int val;
1289        int err = 0;
1290
1291        if (!snd_rme9652_use_is_exclusive(rme9652))
1292                return -EBUSY;
1293
1294        val = ucontrol->value.integer.value[0] & 1;
1295        spin_lock_irq(&rme9652->lock);
1296        change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1297        if (change)
1298                err = rme9652_set_passthru(rme9652, val);
1299        spin_unlock_irq(&rme9652->lock);
1300        return err ? err : change;
1301}
1302
1303/* Read-only switches */
1304
1305#define RME9652_SPDIF_RATE(xname, xindex) \
1306{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1307  .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1308  .info = snd_rme9652_info_spdif_rate, \
1309  .get = snd_rme9652_get_spdif_rate }
1310
1311static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1312{
1313        uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1314        uinfo->count = 1;
1315        uinfo->value.integer.min = 0;
1316        uinfo->value.integer.max = 96000;
1317        return 0;
1318}
1319
1320static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1321{
1322        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1323        
1324        spin_lock_irq(&rme9652->lock);
1325        ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1326        spin_unlock_irq(&rme9652->lock);
1327        return 0;
1328}
1329
1330#define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1331{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1332  .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1333  .info = snd_rme9652_info_adat_sync, \
1334  .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1335
1336static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1337{
1338        static const char * const texts[4] = {
1339                "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1340        };
1341
1342        return snd_ctl_enum_info(uinfo, 1, 4, texts);
1343}
1344
1345static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1346{
1347        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1348        unsigned int mask1, mask2, val;
1349        
1350        switch (kcontrol->private_value) {
1351        case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;  
1352        case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;  
1353        case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;  
1354        default: return -EINVAL;
1355        }
1356        val = rme9652_read(rme9652, RME9652_status_register);
1357        ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1358        ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1359        return 0;
1360}
1361
1362#define RME9652_TC_VALID(xname, xindex) \
1363{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1364  .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1365  .info = snd_rme9652_info_tc_valid, \
1366  .get = snd_rme9652_get_tc_valid }
1367
1368#define snd_rme9652_info_tc_valid       snd_ctl_boolean_mono_info
1369
1370static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1371{
1372        struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1373        
1374        ucontrol->value.integer.value[0] = 
1375                (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1376        return 0;
1377}
1378
1379#ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1380
1381/* FIXME: this routine needs a port to the new control API --jk */
1382
1383static int snd_rme9652_get_tc_value(void *private_data,
1384                                    snd_kswitch_t *kswitch,
1385                                    snd_switch_t *uswitch)
1386{
1387        struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1388        u32 value;
1389        int i;
1390
1391        uswitch->type = SNDRV_SW_TYPE_DWORD;
1392
1393        if ((rme9652_read(s, RME9652_status_register) &
1394             RME9652_tc_valid) == 0) {
1395                uswitch->value.data32[0] = 0;
1396                return 0;
1397        }
1398
1399        /* timecode request */
1400
1401        rme9652_write(s, RME9652_time_code, 0);
1402
1403        /* XXX bug alert: loop-based timing !!!! */
1404
1405        for (i = 0; i < 50; i++) {
1406                if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1407                        break;
1408        }
1409
1410        if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1411                return -EIO;
1412        }
1413
1414        value = 0;
1415
1416        for (i = 0; i < 32; i++) {
1417                value >>= 1;
1418
1419                if (rme9652_read(s, i * 4) & RME9652_tc_out)
1420                        value |= 0x80000000;
1421        }
1422
1423        if (value > 2 * 60 * 48000) {
1424                value -= 2 * 60 * 48000;
1425        } else {
1426                value = 0;
1427        }
1428
1429        uswitch->value.data32[0] = value;
1430
1431        return 0;
1432}
1433
1434#endif                          /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1435
1436static const struct snd_kcontrol_new snd_rme9652_controls[] = {
1437{
1438        .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1439        .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1440        .info =         snd_rme9652_control_spdif_info,
1441        .get =          snd_rme9652_control_spdif_get,
1442        .put =          snd_rme9652_control_spdif_put,
1443},
1444{
1445        .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1446        .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1447        .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1448        .info =         snd_rme9652_control_spdif_stream_info,
1449        .get =          snd_rme9652_control_spdif_stream_get,
1450        .put =          snd_rme9652_control_spdif_stream_put,
1451},
1452{
1453        .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1454        .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1455        .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1456        .info =         snd_rme9652_control_spdif_mask_info,
1457        .get =          snd_rme9652_control_spdif_mask_get,
1458        .private_value = IEC958_AES0_NONAUDIO |
1459                        IEC958_AES0_PROFESSIONAL |
1460                        IEC958_AES0_CON_EMPHASIS,                                                                                             
1461},
1462{
1463        .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1464        .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1465        .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1466        .info =         snd_rme9652_control_spdif_mask_info,
1467        .get =          snd_rme9652_control_spdif_mask_get,
1468        .private_value = IEC958_AES0_NONAUDIO |
1469                        IEC958_AES0_PROFESSIONAL |
1470                        IEC958_AES0_PRO_EMPHASIS,
1471},
1472RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1473RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1474RME9652_SYNC_MODE("Sync Mode", 0),
1475RME9652_SYNC_PREF("Preferred Sync Source", 0),
1476{
1477        .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1478        .name = "Channels Thru",
1479        .index = 0,
1480        .info = snd_rme9652_info_thru,
1481        .get = snd_rme9652_get_thru,
1482        .put = snd_rme9652_put_thru,
1483},
1484RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1485RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1486RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1487RME9652_TC_VALID("Timecode Valid", 0),
1488RME9652_PASSTHRU("Passthru", 0)
1489};
1490
1491static const struct snd_kcontrol_new snd_rme9652_adat3_check =
1492RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1493
1494static const struct snd_kcontrol_new snd_rme9652_adat1_input =
1495RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1496
1497static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1498{
1499        unsigned int idx;
1500        int err;
1501        struct snd_kcontrol *kctl;
1502
1503        for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1504                kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652);
1505                err = snd_ctl_add(card, kctl);
1506                if (err < 0)
1507                        return err;
1508                if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1509                        rme9652->spdif_ctl = kctl;
1510        }
1511
1512        if (rme9652->ss_channels == RME9652_NCHANNELS) {
1513                kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652);
1514                err = snd_ctl_add(card, kctl);
1515                if (err < 0)
1516                        return err;
1517        }
1518
1519        if (rme9652->hw_rev >= 15) {
1520                kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652);
1521                err = snd_ctl_add(card, kctl);
1522                if (err < 0)
1523                        return err;
1524        }
1525
1526        return 0;
1527}
1528
1529/*------------------------------------------------------------
1530   /proc interface 
1531 ------------------------------------------------------------*/
1532
1533static void
1534snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1535{
1536        struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1537        u32 thru_bits = rme9652->thru_bits;
1538        int show_auto_sync_source = 0;
1539        int i;
1540        unsigned int status;
1541        int x;
1542
1543        status = rme9652_read(rme9652, RME9652_status_register);
1544
1545        snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1546        snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1547                    rme9652->capture_buffer, rme9652->playback_buffer);
1548        snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1549                    rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1550        snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1551
1552        snd_iprintf(buffer, "\n");
1553
1554        x = 1 << (6 + rme9652_decode_latency(rme9652->control_register & 
1555                                             RME9652_latency));
1556
1557        snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n", 
1558                    x, (unsigned long) rme9652->period_bytes);
1559        snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1560                    rme9652_hw_pointer(rme9652));
1561        snd_iprintf(buffer, "Passthru: %s\n",
1562                    rme9652->passthru ? "yes" : "no");
1563
1564        if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1565                snd_iprintf(buffer, "Clock mode: autosync\n");
1566                show_auto_sync_source = 1;
1567        } else if (rme9652->control_register & RME9652_wsel) {
1568                if (status & RME9652_wsel_rd) {
1569                        snd_iprintf(buffer, "Clock mode: word clock\n");
1570                } else {
1571                        snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1572                }
1573        } else {
1574                snd_iprintf(buffer, "Clock mode: master\n");
1575        }
1576
1577        if (show_auto_sync_source) {
1578                switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1579                case RME9652_SyncPref_ADAT1:
1580                        snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1581                        break;
1582                case RME9652_SyncPref_ADAT2:
1583                        snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1584                        break;
1585                case RME9652_SyncPref_ADAT3:
1586                        snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1587                        break;
1588                case RME9652_SyncPref_SPDIF:
1589                        snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1590                        break;
1591                default:
1592                        snd_iprintf(buffer, "Pref. sync source: ???\n");
1593                }
1594        }
1595
1596        if (rme9652->hw_rev >= 15)
1597                snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1598                            (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1599                            "Internal" : "ADAT1 optical");
1600
1601        snd_iprintf(buffer, "\n");
1602
1603        switch (rme9652_decode_spdif_in(rme9652->control_register & 
1604                                        RME9652_inp)) {
1605        case RME9652_SPDIFIN_OPTICAL:
1606                snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1607                break;
1608        case RME9652_SPDIFIN_COAXIAL:
1609                snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1610                break;
1611        case RME9652_SPDIFIN_INTERN:
1612                snd_iprintf(buffer, "IEC958 input: Internal\n");
1613                break;
1614        default:
1615                snd_iprintf(buffer, "IEC958 input: ???\n");
1616                break;
1617        }
1618
1619        if (rme9652->control_register & RME9652_opt_out) {
1620                snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1621        } else {
1622                snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1623        }
1624
1625        if (rme9652->control_register & RME9652_PRO) {
1626                snd_iprintf(buffer, "IEC958 quality: Professional\n");
1627        } else {
1628                snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1629        }
1630
1631        if (rme9652->control_register & RME9652_EMP) {
1632                snd_iprintf(buffer, "IEC958 emphasis: on\n");
1633        } else {
1634                snd_iprintf(buffer, "IEC958 emphasis: off\n");
1635        }
1636
1637        if (rme9652->control_register & RME9652_Dolby) {
1638                snd_iprintf(buffer, "IEC958 Dolby: on\n");
1639        } else {
1640                snd_iprintf(buffer, "IEC958 Dolby: off\n");
1641        }
1642
1643        i = rme9652_spdif_sample_rate(rme9652);
1644
1645        if (i < 0) {
1646                snd_iprintf(buffer,
1647                            "IEC958 sample rate: error flag set\n");
1648        } else if (i == 0) {
1649                snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1650        } else {
1651                snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1652        }
1653
1654        snd_iprintf(buffer, "\n");
1655
1656        snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1657                    rme9652_adat_sample_rate(rme9652));
1658
1659        /* Sync Check */
1660
1661        x = status & RME9652_sync_0;
1662        if (status & RME9652_lock_0) {
1663                snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1664        } else {
1665                snd_iprintf(buffer, "ADAT1: No Lock\n");
1666        }
1667
1668        x = status & RME9652_sync_1;
1669        if (status & RME9652_lock_1) {
1670                snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1671        } else {
1672                snd_iprintf(buffer, "ADAT2: No Lock\n");
1673        }
1674
1675        x = status & RME9652_sync_2;
1676        if (status & RME9652_lock_2) {
1677                snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1678        } else {
1679                snd_iprintf(buffer, "ADAT3: No Lock\n");
1680        }
1681
1682        snd_iprintf(buffer, "\n");
1683
1684        snd_iprintf(buffer, "Timecode signal: %s\n",
1685                    (status & RME9652_tc_valid) ? "yes" : "no");
1686
1687        /* thru modes */
1688
1689        snd_iprintf(buffer, "Punch Status:\n\n");
1690
1691        for (i = 0; i < rme9652->ss_channels; i++) {
1692                if (thru_bits & (1 << i)) {
1693                        snd_iprintf(buffer, "%2d:  on ", i + 1);
1694                } else {
1695                        snd_iprintf(buffer, "%2d: off ", i + 1);
1696                }
1697
1698                if (((i + 1) % 8) == 0) {
1699                        snd_iprintf(buffer, "\n");
1700                }
1701        }
1702
1703        snd_iprintf(buffer, "\n");
1704}
1705
1706static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1707{
1708        snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652,
1709                             snd_rme9652_proc_read);
1710}
1711
1712static void snd_rme9652_card_free(struct snd_card *card)
1713{
1714        struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
1715
1716        if (rme9652->irq >= 0)
1717                rme9652_stop(rme9652);
1718}
1719
1720static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1721{
1722        unsigned long pb_bus, cb_bus;
1723
1724        rme9652->capture_dma_buf =
1725                snd_hammerfall_get_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES);
1726        rme9652->playback_dma_buf =
1727                snd_hammerfall_get_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES);
1728        if (!rme9652->capture_dma_buf || !rme9652->playback_dma_buf) {
1729                dev_err(rme9652->card->dev,
1730                        "%s: no buffers available\n", rme9652->card_name);
1731                return -ENOMEM;
1732        }
1733
1734        /* Align to bus-space 64K boundary */
1735
1736        cb_bus = ALIGN(rme9652->capture_dma_buf->addr, 0x10000ul);
1737        pb_bus = ALIGN(rme9652->playback_dma_buf->addr, 0x10000ul);
1738
1739        /* Tell the card where it is */
1740
1741        rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1742        rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1743
1744        rme9652->capture_buffer = rme9652->capture_dma_buf->area + (cb_bus - rme9652->capture_dma_buf->addr);
1745        rme9652->playback_buffer = rme9652->playback_dma_buf->area + (pb_bus - rme9652->playback_dma_buf->addr);
1746
1747        return 0;
1748}
1749
1750static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1751{
1752        unsigned int k;
1753
1754        /* ASSUMPTION: rme9652->lock is either held, or
1755           there is no need to hold it (e.g. during module
1756           initialization).
1757         */
1758
1759        /* set defaults:
1760
1761           SPDIF Input via Coax 
1762           autosync clock mode
1763           maximum latency (7 = 8192 samples, 64Kbyte buffer,
1764           which implies 2 4096 sample, 32Kbyte periods).
1765           
1766           if rev 1.5, initialize the S/PDIF receiver.
1767
1768         */
1769
1770        rme9652->control_register =
1771            RME9652_inp_0 | rme9652_encode_latency(7);
1772
1773        rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1774
1775        rme9652_reset_hw_pointer(rme9652);
1776        rme9652_compute_period_size(rme9652);
1777
1778        /* default: thru off for all channels */
1779
1780        for (k = 0; k < RME9652_NCHANNELS; ++k)
1781                rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1782
1783        rme9652->thru_bits = 0;
1784        rme9652->passthru = 0;
1785
1786        /* set a default rate so that the channel map is set up */
1787
1788        rme9652_set_rate(rme9652, 48000);
1789}
1790
1791static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1792{
1793        struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1794
1795        if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1796                return IRQ_NONE;
1797        }
1798
1799        rme9652_write(rme9652, RME9652_irq_clear, 0);
1800
1801        if (rme9652->capture_substream) {
1802                snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1803        }
1804
1805        if (rme9652->playback_substream) {
1806                snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1807        }
1808        return IRQ_HANDLED;
1809}
1810
1811static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1812{
1813        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1814        return rme9652_hw_pointer(rme9652);
1815}
1816
1817static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1818                                             int stream,
1819                                             int channel)
1820
1821{
1822        int mapped_channel;
1823
1824        if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1825                return NULL;
1826        
1827        mapped_channel = rme9652->channel_map[channel];
1828        if (mapped_channel < 0)
1829                return NULL;
1830        
1831        if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1832                return rme9652->capture_buffer +
1833                        (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1834        } else {
1835                return rme9652->playback_buffer +
1836                        (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1837        }
1838}
1839
1840static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1841                                     int channel, unsigned long pos,
1842                                     void __user *src, unsigned long count)
1843{
1844        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1845        char *channel_buf;
1846
1847        if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1848                return -EINVAL;
1849
1850        channel_buf = rme9652_channel_buffer_location (rme9652,
1851                                                       substream->pstr->stream,
1852                                                       channel);
1853        if (snd_BUG_ON(!channel_buf))
1854                return -EIO;
1855        if (copy_from_user(channel_buf + pos, src, count))
1856                return -EFAULT;
1857        return 0;
1858}
1859
1860static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1861                                            int channel, unsigned long pos,
1862                                            void *src, unsigned long count)
1863{
1864        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1865        char *channel_buf;
1866
1867        channel_buf = rme9652_channel_buffer_location(rme9652,
1868                                                      substream->pstr->stream,
1869                                                      channel);
1870        if (snd_BUG_ON(!channel_buf))
1871                return -EIO;
1872        memcpy(channel_buf + pos, src, count);
1873        return 0;
1874}
1875
1876static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1877                                    int channel, unsigned long pos,
1878                                    void __user *dst, unsigned long count)
1879{
1880        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1881        char *channel_buf;
1882
1883        if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1884                return -EINVAL;
1885
1886        channel_buf = rme9652_channel_buffer_location (rme9652,
1887                                                       substream->pstr->stream,
1888                                                       channel);
1889        if (snd_BUG_ON(!channel_buf))
1890                return -EIO;
1891        if (copy_to_user(dst, channel_buf + pos, count))
1892                return -EFAULT;
1893        return 0;
1894}
1895
1896static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1897                                           int channel, unsigned long pos,
1898                                           void *dst, unsigned long count)
1899{
1900        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1901        char *channel_buf;
1902
1903        channel_buf = rme9652_channel_buffer_location(rme9652,
1904                                                      substream->pstr->stream,
1905                                                      channel);
1906        if (snd_BUG_ON(!channel_buf))
1907                return -EIO;
1908        memcpy(dst, channel_buf + pos, count);
1909        return 0;
1910}
1911
1912static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1913                                  int channel, unsigned long pos,
1914                                  unsigned long count)
1915{
1916        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1917        char *channel_buf;
1918
1919        channel_buf = rme9652_channel_buffer_location (rme9652,
1920                                                       substream->pstr->stream,
1921                                                       channel);
1922        if (snd_BUG_ON(!channel_buf))
1923                return -EIO;
1924        memset(channel_buf + pos, 0, count);
1925        return 0;
1926}
1927
1928static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1929{
1930        struct snd_pcm_runtime *runtime = substream->runtime;
1931        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1932        struct snd_pcm_substream *other;
1933        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1934                other = rme9652->capture_substream;
1935        else
1936                other = rme9652->playback_substream;
1937        if (rme9652->running)
1938                runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1939        else
1940                runtime->status->hw_ptr = 0;
1941        if (other) {
1942                struct snd_pcm_substream *s;
1943                struct snd_pcm_runtime *oruntime = other->runtime;
1944                snd_pcm_group_for_each_entry(s, substream) {
1945                        if (s == other) {
1946                                oruntime->status->hw_ptr = runtime->status->hw_ptr;
1947                                break;
1948                        }
1949                }
1950        }
1951        return 0;
1952}
1953
1954static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1955                                 struct snd_pcm_hw_params *params)
1956{
1957        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1958        int err;
1959        pid_t this_pid;
1960        pid_t other_pid;
1961
1962        spin_lock_irq(&rme9652->lock);
1963
1964        if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1965                rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1966                rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1967                this_pid = rme9652->playback_pid;
1968                other_pid = rme9652->capture_pid;
1969        } else {
1970                this_pid = rme9652->capture_pid;
1971                other_pid = rme9652->playback_pid;
1972        }
1973
1974        if ((other_pid > 0) && (this_pid != other_pid)) {
1975
1976                /* The other stream is open, and not by the same
1977                   task as this one. Make sure that the parameters
1978                   that matter are the same.
1979                 */
1980
1981                if ((int)params_rate(params) !=
1982                    rme9652_adat_sample_rate(rme9652)) {
1983                        spin_unlock_irq(&rme9652->lock);
1984                        _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
1985                        return -EBUSY;
1986                }
1987
1988                if (params_period_size(params) != rme9652->period_bytes / 4) {
1989                        spin_unlock_irq(&rme9652->lock);
1990                        _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
1991                        return -EBUSY;
1992                }
1993
1994                /* We're fine. */
1995
1996                spin_unlock_irq(&rme9652->lock);
1997                return 0;
1998
1999        } else {
2000                spin_unlock_irq(&rme9652->lock);
2001        }
2002
2003        /* how to make sure that the rate matches an externally-set one ?
2004         */
2005
2006        err = rme9652_set_rate(rme9652, params_rate(params));
2007        if (err < 0) {
2008                _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2009                return err;
2010        }
2011
2012        err = rme9652_set_interrupt_interval(rme9652, params_period_size(params));
2013        if (err < 0) {
2014                _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2015                return err;
2016        }
2017
2018        return 0;
2019}
2020
2021static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2022                                    struct snd_pcm_channel_info *info)
2023{
2024        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2025        int chn;
2026
2027        if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2028                return -EINVAL;
2029
2030        chn = rme9652->channel_map[array_index_nospec(info->channel,
2031                                                      RME9652_NCHANNELS)];
2032        if (chn < 0)
2033                return -EINVAL;
2034
2035        info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2036        info->first = 0;
2037        info->step = 32;
2038        return 0;
2039}
2040
2041static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2042                             unsigned int cmd, void *arg)
2043{
2044        switch (cmd) {
2045        case SNDRV_PCM_IOCTL1_RESET:
2046        {
2047                return snd_rme9652_reset(substream);
2048        }
2049        case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2050        {
2051                struct snd_pcm_channel_info *info = arg;
2052                return snd_rme9652_channel_info(substream, info);
2053        }
2054        default:
2055                break;
2056        }
2057
2058        return snd_pcm_lib_ioctl(substream, cmd, arg);
2059}
2060
2061static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2062{
2063        memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2064}
2065
2066static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2067                               int cmd)
2068{
2069        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2070        struct snd_pcm_substream *other;
2071        int running;
2072        spin_lock(&rme9652->lock);
2073        running = rme9652->running;
2074        switch (cmd) {
2075        case SNDRV_PCM_TRIGGER_START:
2076                running |= 1 << substream->stream;
2077                break;
2078        case SNDRV_PCM_TRIGGER_STOP:
2079                running &= ~(1 << substream->stream);
2080                break;
2081        default:
2082                snd_BUG();
2083                spin_unlock(&rme9652->lock);
2084                return -EINVAL;
2085        }
2086        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2087                other = rme9652->capture_substream;
2088        else
2089                other = rme9652->playback_substream;
2090
2091        if (other) {
2092                struct snd_pcm_substream *s;
2093                snd_pcm_group_for_each_entry(s, substream) {
2094                        if (s == other) {
2095                                snd_pcm_trigger_done(s, substream);
2096                                if (cmd == SNDRV_PCM_TRIGGER_START)
2097                                        running |= 1 << s->stream;
2098                                else
2099                                        running &= ~(1 << s->stream);
2100                                goto _ok;
2101                        }
2102                }
2103                if (cmd == SNDRV_PCM_TRIGGER_START) {
2104                        if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2105                            substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2106                                rme9652_silence_playback(rme9652);
2107                } else {
2108                        if (running &&
2109                            substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2110                                rme9652_silence_playback(rme9652);
2111                }
2112        } else {
2113                if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 
2114                        rme9652_silence_playback(rme9652);
2115        }
2116 _ok:
2117        snd_pcm_trigger_done(substream, substream);
2118        if (!rme9652->running && running)
2119                rme9652_start(rme9652);
2120        else if (rme9652->running && !running)
2121                rme9652_stop(rme9652);
2122        rme9652->running = running;
2123        spin_unlock(&rme9652->lock);
2124
2125        return 0;
2126}
2127
2128static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2129{
2130        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2131        unsigned long flags;
2132
2133        spin_lock_irqsave(&rme9652->lock, flags);
2134        if (!rme9652->running)
2135                rme9652_reset_hw_pointer(rme9652);
2136        spin_unlock_irqrestore(&rme9652->lock, flags);
2137        return 0;
2138}
2139
2140static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2141{
2142        .info =                 (SNDRV_PCM_INFO_MMAP |
2143                                 SNDRV_PCM_INFO_MMAP_VALID |
2144                                 SNDRV_PCM_INFO_NONINTERLEAVED |
2145                                 SNDRV_PCM_INFO_SYNC_START |
2146                                 SNDRV_PCM_INFO_DOUBLE),
2147        .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2148        .rates =                (SNDRV_PCM_RATE_44100 | 
2149                                 SNDRV_PCM_RATE_48000 | 
2150                                 SNDRV_PCM_RATE_88200 | 
2151                                 SNDRV_PCM_RATE_96000),
2152        .rate_min =             44100,
2153        .rate_max =             96000,
2154        .channels_min =         10,
2155        .channels_max =         26,
2156        .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES * 26,
2157        .period_bytes_min =     (64 * 4) * 10,
2158        .period_bytes_max =     (8192 * 4) * 26,
2159        .periods_min =          2,
2160        .periods_max =          2,
2161        .fifo_size =            0,
2162};
2163
2164static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2165{
2166        .info =                 (SNDRV_PCM_INFO_MMAP |
2167                                 SNDRV_PCM_INFO_MMAP_VALID |
2168                                 SNDRV_PCM_INFO_NONINTERLEAVED |
2169                                 SNDRV_PCM_INFO_SYNC_START),
2170        .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2171        .rates =                (SNDRV_PCM_RATE_44100 | 
2172                                 SNDRV_PCM_RATE_48000 | 
2173                                 SNDRV_PCM_RATE_88200 | 
2174                                 SNDRV_PCM_RATE_96000),
2175        .rate_min =             44100,
2176        .rate_max =             96000,
2177        .channels_min =         10,
2178        .channels_max =         26,
2179        .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES *26,
2180        .period_bytes_min =     (64 * 4) * 10,
2181        .period_bytes_max =     (8192 * 4) * 26,
2182        .periods_min =          2,
2183        .periods_max =          2,
2184        .fifo_size =            0,
2185};
2186
2187static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2188
2189static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2190        .count = ARRAY_SIZE(period_sizes),
2191        .list = period_sizes,
2192        .mask = 0
2193};
2194
2195static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2196                                        struct snd_pcm_hw_rule *rule)
2197{
2198        struct snd_rme9652 *rme9652 = rule->private;
2199        struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2200        unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2201        return snd_interval_list(c, 2, list, 0);
2202}
2203
2204static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2205                                             struct snd_pcm_hw_rule *rule)
2206{
2207        struct snd_rme9652 *rme9652 = rule->private;
2208        struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2209        struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2210        if (r->min > 48000) {
2211                struct snd_interval t = {
2212                        .min = rme9652->ds_channels,
2213                        .max = rme9652->ds_channels,
2214                        .integer = 1,
2215                };
2216                return snd_interval_refine(c, &t);
2217        } else if (r->max < 88200) {
2218                struct snd_interval t = {
2219                        .min = rme9652->ss_channels,
2220                        .max = rme9652->ss_channels,
2221                        .integer = 1,
2222                };
2223                return snd_interval_refine(c, &t);
2224        }
2225        return 0;
2226}
2227
2228static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2229                                             struct snd_pcm_hw_rule *rule)
2230{
2231        struct snd_rme9652 *rme9652 = rule->private;
2232        struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2233        struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2234        if (c->min >= rme9652->ss_channels) {
2235                struct snd_interval t = {
2236                        .min = 44100,
2237                        .max = 48000,
2238                        .integer = 1,
2239                };
2240                return snd_interval_refine(r, &t);
2241        } else if (c->max <= rme9652->ds_channels) {
2242                struct snd_interval t = {
2243                        .min = 88200,
2244                        .max = 96000,
2245                        .integer = 1,
2246                };
2247                return snd_interval_refine(r, &t);
2248        }
2249        return 0;
2250}
2251
2252static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2253{
2254        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2255        struct snd_pcm_runtime *runtime = substream->runtime;
2256
2257        spin_lock_irq(&rme9652->lock);
2258
2259        snd_pcm_set_sync(substream);
2260
2261        runtime->hw = snd_rme9652_playback_subinfo;
2262        snd_pcm_set_runtime_buffer(substream, rme9652->playback_dma_buf);
2263
2264        if (rme9652->capture_substream == NULL) {
2265                rme9652_stop(rme9652);
2266                rme9652_set_thru(rme9652, -1, 0);
2267        }
2268
2269        rme9652->playback_pid = current->pid;
2270        rme9652->playback_substream = substream;
2271
2272        spin_unlock_irq(&rme9652->lock);
2273
2274        snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2275        snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2276        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2277                             snd_rme9652_hw_rule_channels, rme9652,
2278                             SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2279        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2280                             snd_rme9652_hw_rule_channels_rate, rme9652,
2281                             SNDRV_PCM_HW_PARAM_RATE, -1);
2282        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2283                             snd_rme9652_hw_rule_rate_channels, rme9652,
2284                             SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2285
2286        rme9652->creg_spdif_stream = rme9652->creg_spdif;
2287        rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2288        snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2289                       SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2290        return 0;
2291}
2292
2293static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2294{
2295        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2296
2297        spin_lock_irq(&rme9652->lock);
2298
2299        rme9652->playback_pid = -1;
2300        rme9652->playback_substream = NULL;
2301
2302        spin_unlock_irq(&rme9652->lock);
2303
2304        rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2305        snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2306                       SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2307        return 0;
2308}
2309
2310
2311static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2312{
2313        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2314        struct snd_pcm_runtime *runtime = substream->runtime;
2315
2316        spin_lock_irq(&rme9652->lock);
2317
2318        snd_pcm_set_sync(substream);
2319
2320        runtime->hw = snd_rme9652_capture_subinfo;
2321        snd_pcm_set_runtime_buffer(substream, rme9652->capture_dma_buf);
2322
2323        if (rme9652->playback_substream == NULL) {
2324                rme9652_stop(rme9652);
2325                rme9652_set_thru(rme9652, -1, 0);
2326        }
2327
2328        rme9652->capture_pid = current->pid;
2329        rme9652->capture_substream = substream;
2330
2331        spin_unlock_irq(&rme9652->lock);
2332
2333        snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2334        snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2335        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2336                             snd_rme9652_hw_rule_channels, rme9652,
2337                             SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2338        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2339                             snd_rme9652_hw_rule_channels_rate, rme9652,
2340                             SNDRV_PCM_HW_PARAM_RATE, -1);
2341        snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2342                             snd_rme9652_hw_rule_rate_channels, rme9652,
2343                             SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2344        return 0;
2345}
2346
2347static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2348{
2349        struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2350
2351        spin_lock_irq(&rme9652->lock);
2352
2353        rme9652->capture_pid = -1;
2354        rme9652->capture_substream = NULL;
2355
2356        spin_unlock_irq(&rme9652->lock);
2357        return 0;
2358}
2359
2360static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2361        .open =         snd_rme9652_playback_open,
2362        .close =        snd_rme9652_playback_release,
2363        .ioctl =        snd_rme9652_ioctl,
2364        .hw_params =    snd_rme9652_hw_params,
2365        .prepare =      snd_rme9652_prepare,
2366        .trigger =      snd_rme9652_trigger,
2367        .pointer =      snd_rme9652_hw_pointer,
2368        .copy_user =    snd_rme9652_playback_copy,
2369        .copy_kernel =  snd_rme9652_playback_copy_kernel,
2370        .fill_silence = snd_rme9652_hw_silence,
2371};
2372
2373static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2374        .open =         snd_rme9652_capture_open,
2375        .close =        snd_rme9652_capture_release,
2376        .ioctl =        snd_rme9652_ioctl,
2377        .hw_params =    snd_rme9652_hw_params,
2378        .prepare =      snd_rme9652_prepare,
2379        .trigger =      snd_rme9652_trigger,
2380        .pointer =      snd_rme9652_hw_pointer,
2381        .copy_user =    snd_rme9652_capture_copy,
2382        .copy_kernel =  snd_rme9652_capture_copy_kernel,
2383};
2384
2385static int snd_rme9652_create_pcm(struct snd_card *card,
2386                                  struct snd_rme9652 *rme9652)
2387{
2388        struct snd_pcm *pcm;
2389        int err;
2390
2391        err = snd_pcm_new(card, rme9652->card_name, 0, 1, 1, &pcm);
2392        if (err < 0)
2393                return err;
2394
2395        rme9652->pcm = pcm;
2396        pcm->private_data = rme9652;
2397        strcpy(pcm->name, rme9652->card_name);
2398
2399        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2400        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2401
2402        pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2403
2404        return 0;
2405}
2406
2407static int snd_rme9652_create(struct snd_card *card,
2408                              struct snd_rme9652 *rme9652,
2409                              int precise_ptr)
2410{
2411        struct pci_dev *pci = rme9652->pci;
2412        int err;
2413        int status;
2414        unsigned short rev;
2415
2416        rme9652->irq = -1;
2417        rme9652->card = card;
2418
2419        pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2420
2421        switch (rev & 0xff) {
2422        case 3:
2423        case 4:
2424        case 8:
2425        case 9:
2426                break;
2427
2428        default:
2429                /* who knows? */
2430                return -ENODEV;
2431        }
2432
2433        err = pcim_enable_device(pci);
2434        if (err < 0)
2435                return err;
2436
2437        spin_lock_init(&rme9652->lock);
2438
2439        err = pci_request_regions(pci, "rme9652");
2440        if (err < 0)
2441                return err;
2442        rme9652->port = pci_resource_start(pci, 0);
2443        rme9652->iobase = devm_ioremap(&pci->dev, rme9652->port, RME9652_IO_EXTENT);
2444        if (rme9652->iobase == NULL) {
2445                dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2446                        rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2447                return -EBUSY;
2448        }
2449        
2450        if (devm_request_irq(&pci->dev, pci->irq, snd_rme9652_interrupt,
2451                             IRQF_SHARED, KBUILD_MODNAME, rme9652)) {
2452                dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2453                return -EBUSY;
2454        }
2455        rme9652->irq = pci->irq;
2456        card->sync_irq = rme9652->irq;
2457        rme9652->precise_ptr = precise_ptr;
2458
2459        /* Determine the h/w rev level of the card. This seems like
2460           a particularly kludgy way to encode it, but its what RME
2461           chose to do, so we follow them ...
2462        */
2463
2464        status = rme9652_read(rme9652, RME9652_status_register);
2465        if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2466                rme9652->hw_rev = 15;
2467        } else {
2468                rme9652->hw_rev = 11;
2469        }
2470
2471        /* Differentiate between the standard Hammerfall, and the
2472           "Light", which does not have the expansion board. This
2473           method comes from information received from Mathhias
2474           Clausen at RME. Display the EEPROM and h/w revID where
2475           relevant.  
2476        */
2477
2478        switch (rev) {
2479        case 8: /* original eprom */
2480                strcpy(card->driver, "RME9636");
2481                if (rme9652->hw_rev == 15) {
2482                        rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2483                } else {
2484                        rme9652->card_name = "RME Digi9636";
2485                }
2486                rme9652->ss_channels = RME9636_NCHANNELS;
2487                break;
2488        case 9: /* W36_G EPROM */
2489                strcpy(card->driver, "RME9636");
2490                rme9652->card_name = "RME Digi9636 (Rev G)";
2491                rme9652->ss_channels = RME9636_NCHANNELS;
2492                break;
2493        case 4: /* W52_G EPROM */
2494                strcpy(card->driver, "RME9652");
2495                rme9652->card_name = "RME Digi9652 (Rev G)";
2496                rme9652->ss_channels = RME9652_NCHANNELS;
2497                break;
2498        case 3: /* original eprom */
2499                strcpy(card->driver, "RME9652");
2500                if (rme9652->hw_rev == 15) {
2501                        rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2502                } else {
2503                        rme9652->card_name = "RME Digi9652";
2504                }
2505                rme9652->ss_channels = RME9652_NCHANNELS;
2506                break;
2507        }
2508
2509        rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2510
2511        pci_set_master(rme9652->pci);
2512
2513        err = snd_rme9652_initialize_memory(rme9652);
2514        if (err < 0)
2515                return err;
2516
2517        err = snd_rme9652_create_pcm(card, rme9652);
2518        if (err < 0)
2519                return err;
2520
2521        err = snd_rme9652_create_controls(card, rme9652);
2522        if (err < 0)
2523                return err;
2524
2525        snd_rme9652_proc_init(rme9652);
2526
2527        rme9652->last_spdif_sample_rate = -1;
2528        rme9652->last_adat_sample_rate = -1;
2529        rme9652->playback_pid = -1;
2530        rme9652->capture_pid = -1;
2531        rme9652->capture_substream = NULL;
2532        rme9652->playback_substream = NULL;
2533
2534        snd_rme9652_set_defaults(rme9652);
2535
2536        if (rme9652->hw_rev == 15) {
2537                rme9652_initialize_spdif_receiver (rme9652);
2538        }
2539
2540        return 0;
2541}
2542
2543static int snd_rme9652_probe(struct pci_dev *pci,
2544                             const struct pci_device_id *pci_id)
2545{
2546        static int dev;
2547        struct snd_rme9652 *rme9652;
2548        struct snd_card *card;
2549        int err;
2550
2551        if (dev >= SNDRV_CARDS)
2552                return -ENODEV;
2553        if (!enable[dev]) {
2554                dev++;
2555                return -ENOENT;
2556        }
2557
2558        err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2559                                sizeof(struct snd_rme9652), &card);
2560
2561        if (err < 0)
2562                return err;
2563
2564        rme9652 = (struct snd_rme9652 *) card->private_data;
2565        card->private_free = snd_rme9652_card_free;
2566        rme9652->dev = dev;
2567        rme9652->pci = pci;
2568        err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2569        if (err)
2570                return err;
2571
2572        strcpy(card->shortname, rme9652->card_name);
2573
2574        sprintf(card->longname, "%s at 0x%lx, irq %d",
2575                card->shortname, rme9652->port, rme9652->irq);
2576        err = snd_card_register(card);
2577        if (err)
2578                return err;
2579        pci_set_drvdata(pci, card);
2580        dev++;
2581        return 0;
2582}
2583
2584static struct pci_driver rme9652_driver = {
2585        .name     = KBUILD_MODNAME,
2586        .id_table = snd_rme9652_ids,
2587        .probe    = snd_rme9652_probe,
2588};
2589
2590module_pci_driver(rme9652_driver);
2591