LXR linux/arch/arc/include/asm/ptrace.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   4 *
   5 * Amit Bhor, Sameer Dhavale: Codito Technologies 2004
   6 */
   7#ifndef __ASM_ARC_PTRACE_H
   8#define __ASM_ARC_PTRACE_H
   9
  10#include <uapi/asm/ptrace.h>
  11
  12#ifndef __ASSEMBLY__
  13
  14/* THE pt_regs: Defines how regs are saved during entry into kernel */
  15
  16#ifdef CONFIG_ISA_ARCOMPACT
  17struct pt_regs {
  18
  19        /* Real registers */
  20        unsigned long bta;      /* bta_l1, bta_l2, erbta */
  21
  22        unsigned long lp_start, lp_end, lp_count;
  23
  24        unsigned long status32; /* status32_l1, status32_l2, erstatus */
  25        unsigned long ret;      /* ilink1, ilink2 or eret */
  26        unsigned long blink;
  27        unsigned long fp;
  28        unsigned long r26;      /* gp */
  29
  30        unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
  31
  32        unsigned long sp;       /* User/Kernel depending on where we came from */
  33        unsigned long orig_r0;
  34
  35        /*
  36         * To distinguish bet excp, syscall, irq
  37         * For traps and exceptions, Exception Cause Register.
  38         *      ECR: <00> <VV> <CC> <PP>
  39         *      Last word used by Linux for extra state mgmt (syscall-restart)
  40         * For interrupts, use artificial ECR values to note current prio-level
  41         */
  42        union {
  43                struct {
  44#ifdef CONFIG_CPU_BIG_ENDIAN
  45                        unsigned long state:8, ecr_vec:8,
  46                                      ecr_cause:8, ecr_param:8;
  47#else
  48                        unsigned long ecr_param:8, ecr_cause:8,
  49                                      ecr_vec:8, state:8;
  50#endif
  51                };
  52                unsigned long event;
  53        };
  54
  55        unsigned long user_r25;
  56};
  57#else
  58
  59struct pt_regs {
  60
  61        unsigned long orig_r0;
  62
  63        union {
  64                struct {
  65#ifdef CONFIG_CPU_BIG_ENDIAN
  66                        unsigned long state:8, ecr_vec:8,
  67                                      ecr_cause:8, ecr_param:8;
  68#else
  69                        unsigned long ecr_param:8, ecr_cause:8,
  70                                      ecr_vec:8, state:8;
  71#endif
  72                };
  73                unsigned long event;
  74        };
  75
  76        unsigned long bta;      /* bta_l1, bta_l2, erbta */
  77
  78        unsigned long user_r25;
  79
  80        unsigned long r26;      /* gp */
  81        unsigned long fp;
  82        unsigned long sp;       /* user/kernel sp depending on where we came from  */
  83
  84        unsigned long r12, r30;
  85
  86#ifdef CONFIG_ARC_HAS_ACCL_REGS
  87        unsigned long r58, r59; /* ACCL/ACCH used by FPU / DSP MPY */
  88#endif
  89#ifdef CONFIG_ARC_DSP_SAVE_RESTORE_REGS
  90        unsigned long DSP_CTRL;
  91#endif
  92
  93        /*------- Below list auto saved by h/w -----------*/
  94        unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;
  95
  96        unsigned long blink;
  97        unsigned long lp_end, lp_start, lp_count;
  98
  99        unsigned long ei, ldi, jli;
 100
 101        unsigned long ret;
 102        unsigned long status32;
 103};
 104
 105#endif
 106
 107/* Callee saved registers - need to be saved only when you are scheduled out */
 108
 109struct callee_regs {
 110        unsigned long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;
 111};
 112
 113#define instruction_pointer(regs)       ((regs)->ret)
 114#define profile_pc(regs)                instruction_pointer(regs)
 115
 116/* return 1 if user mode or 0 if kernel mode */
 117#define user_mode(regs) (regs->status32 & STATUS_U_MASK)
 118
 119#define user_stack_pointer(regs)\
 120({  unsigned int sp;            \
 121        if (user_mode(regs))    \
 122                sp = (regs)->sp;\
 123        else                    \
 124                sp = -1;        \
 125        sp;                     \
 126})
 127
 128/* return 1 if PC in delay slot */
 129#define delay_mode(regs) ((regs->status32 & STATUS_DE_MASK) == STATUS_DE_MASK)
 130
 131#define in_syscall(regs)    ((regs->ecr_vec == ECR_V_TRAP) && !regs->ecr_param)
 132#define in_brkpt_trap(regs) ((regs->ecr_vec == ECR_V_TRAP) && regs->ecr_param)
 133
 134#define STATE_SCALL_RESTARTED   0x01
 135
 136#define syscall_wont_restart(reg) (reg->state |= STATE_SCALL_RESTARTED)
 137#define syscall_restartable(reg) !(reg->state &  STATE_SCALL_RESTARTED)
 138
 139#define current_pt_regs()                                       \
 140({                                                              \
 141        /* open-coded current_thread_info() */                  \
 142        register unsigned long sp asm ("sp");                   \
 143        unsigned long pg_start = (sp & ~(THREAD_SIZE - 1));     \
 144        (struct pt_regs *)(pg_start + THREAD_SIZE) - 1; \
 145})
 146
 147static inline long regs_return_value(struct pt_regs *regs)
 148{
 149        return (long)regs->r0;
 150}
 151
 152static inline void instruction_pointer_set(struct pt_regs *regs,
 153                                           unsigned long val)
 154{
 155        instruction_pointer(regs) = val;
 156}
 157#endif /* !__ASSEMBLY__ */
 158
 159#endif /* __ASM_PTRACE_H */
 160