LXR linux/arch/arm/mach-s3c/include/mach/io-s3c24xx.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * arch/arm/mach-s3c2410/include/mach/io.h
   4 *  from arch/arm/mach-rpc/include/mach/io.h
   5 *
   6 * Copyright (C) 1997 Russell King
   7 *           (C) 2003 Simtec Electronics
   8*/
   9
  10#ifndef __ASM_ARM_ARCH_IO_S3C24XX_H
  11#define __ASM_ARM_ARCH_IO_S3C24XX_H
  12
  13#include <mach/map-base.h>
  14
  15/*
  16 * ISA style IO, for each machine to sort out mappings for,
  17 * if it implements it. We reserve two 16M regions for ISA,
  18 * so the PC/104 can use separate addresses for 8-bit and
  19 * 16-bit port I/O.
  20 */
  21#define PCIO_BASE               S3C_ADDR(0x02000000)
  22#define IO_SPACE_LIMIT          0x00ffffff
  23#define S3C24XX_VA_ISA_WORD     (PCIO_BASE)
  24#define S3C24XX_VA_ISA_BYTE     (PCIO_BASE + 0x01000000)
  25
  26#ifdef CONFIG_ISA
  27
  28#define inb(p)          readb(S3C24XX_VA_ISA_BYTE + (p))
  29#define inw(p)          readw(S3C24XX_VA_ISA_WORD + (p))
  30#define inl(p)          readl(S3C24XX_VA_ISA_WORD + (p))
  31
  32#define outb(v,p)       writeb((v), S3C24XX_VA_ISA_BYTE + (p))
  33#define outw(v,p)       writew((v), S3C24XX_VA_ISA_WORD + (p))
  34#define outl(v,p)       writel((v), S3C24XX_VA_ISA_WORD + (p))
  35
  36#define insb(p,d,l)     readsb(S3C24XX_VA_ISA_BYTE + (p),d,l)
  37#define insw(p,d,l)     readsw(S3C24XX_VA_ISA_WORD + (p),d,l)
  38#define insl(p,d,l)     readsl(S3C24XX_VA_ISA_WORD + (p),d,l)
  39
  40#define outsb(p,d,l)    writesb(S3C24XX_VA_ISA_BYTE + (p),d,l)
  41#define outsw(p,d,l)    writesw(S3C24XX_VA_ISA_WORD + (p),d,l)
  42#define outsl(p,d,l)    writesl(S3C24XX_VA_ISA_WORD + (p),d,l)
  43
  44#else
  45
  46#define __io(x) (PCIO_BASE + (x))
  47
  48#endif
  49
  50#endif
  51