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14#include <linux/kvm_host.h>
15#include <linux/err.h>
16#include <linux/export.h>
17#include <linux/slab.h>
18#include <linux/module.h>
19#include <linux/miscdevice.h>
20#include <linux/gfp.h>
21#include <linux/sched.h>
22#include <linux/vmalloc.h>
23#include <linux/highmem.h>
24
25#include <asm/reg.h>
26#include <asm/cputable.h>
27#include <asm/cacheflush.h>
28#include <linux/uaccess.h>
29#include <asm/io.h>
30#include <asm/kvm_ppc.h>
31#include <asm/kvm_book3s.h>
32#include <asm/mmu_context.h>
33#include <asm/page.h>
34#include <asm/xive.h>
35
36#include "book3s.h"
37#include "trace.h"
38
39
40
41const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
42 KVM_GENERIC_VM_STATS(),
43 STATS_DESC_ICOUNTER(VM, num_2M_pages),
44 STATS_DESC_ICOUNTER(VM, num_1G_pages)
45};
46
47const struct kvm_stats_header kvm_vm_stats_header = {
48 .name_size = KVM_STATS_NAME_SIZE,
49 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
50 .id_offset = sizeof(struct kvm_stats_header),
51 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
52 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
53 sizeof(kvm_vm_stats_desc),
54};
55
56const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
57 KVM_GENERIC_VCPU_STATS(),
58 STATS_DESC_COUNTER(VCPU, sum_exits),
59 STATS_DESC_COUNTER(VCPU, mmio_exits),
60 STATS_DESC_COUNTER(VCPU, signal_exits),
61 STATS_DESC_COUNTER(VCPU, light_exits),
62 STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits),
63 STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits),
64 STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits),
65 STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits),
66 STATS_DESC_COUNTER(VCPU, syscall_exits),
67 STATS_DESC_COUNTER(VCPU, isi_exits),
68 STATS_DESC_COUNTER(VCPU, dsi_exits),
69 STATS_DESC_COUNTER(VCPU, emulated_inst_exits),
70 STATS_DESC_COUNTER(VCPU, dec_exits),
71 STATS_DESC_COUNTER(VCPU, ext_intr_exits),
72 STATS_DESC_COUNTER(VCPU, halt_successful_wait),
73 STATS_DESC_COUNTER(VCPU, dbell_exits),
74 STATS_DESC_COUNTER(VCPU, gdbell_exits),
75 STATS_DESC_COUNTER(VCPU, ld),
76 STATS_DESC_COUNTER(VCPU, st),
77 STATS_DESC_COUNTER(VCPU, pf_storage),
78 STATS_DESC_COUNTER(VCPU, pf_instruc),
79 STATS_DESC_COUNTER(VCPU, sp_storage),
80 STATS_DESC_COUNTER(VCPU, sp_instruc),
81 STATS_DESC_COUNTER(VCPU, queue_intr),
82 STATS_DESC_COUNTER(VCPU, ld_slow),
83 STATS_DESC_COUNTER(VCPU, st_slow),
84 STATS_DESC_COUNTER(VCPU, pthru_all),
85 STATS_DESC_COUNTER(VCPU, pthru_host),
86 STATS_DESC_COUNTER(VCPU, pthru_bad_aff)
87};
88
89const struct kvm_stats_header kvm_vcpu_stats_header = {
90 .name_size = KVM_STATS_NAME_SIZE,
91 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
92 .id_offset = sizeof(struct kvm_stats_header),
93 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
94 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
95 sizeof(kvm_vcpu_stats_desc),
96};
97
98static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
99 unsigned long pending_now, unsigned long old_pending)
100{
101 if (is_kvmppc_hv_enabled(vcpu->kvm))
102 return;
103 if (pending_now)
104 kvmppc_set_int_pending(vcpu, 1);
105 else if (old_pending)
106 kvmppc_set_int_pending(vcpu, 0);
107}
108
109static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
110{
111 ulong crit_raw;
112 ulong crit_r1;
113 bool crit;
114
115 if (is_kvmppc_hv_enabled(vcpu->kvm))
116 return false;
117
118 crit_raw = kvmppc_get_critical(vcpu);
119 crit_r1 = kvmppc_get_gpr(vcpu, 1);
120
121
122 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
123 crit_raw &= 0xffffffff;
124 crit_r1 &= 0xffffffff;
125 }
126
127
128 crit = (crit_raw == crit_r1);
129
130 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
131
132 return crit;
133}
134
135void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
136{
137 vcpu->kvm->arch.kvm_ops->inject_interrupt(vcpu, vec, flags);
138}
139
140static int kvmppc_book3s_vec2irqprio(unsigned int vec)
141{
142 unsigned int prio;
143
144 switch (vec) {
145 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
146 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
147 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
148 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
149 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
150 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
151 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
152 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
153 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
154 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
155 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
156 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
157 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
158 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
159 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
160 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
161 default: prio = BOOK3S_IRQPRIO_MAX; break;
162 }
163
164 return prio;
165}
166
167void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
168 unsigned int vec)
169{
170 unsigned long old_pending = vcpu->arch.pending_exceptions;
171
172 clear_bit(kvmppc_book3s_vec2irqprio(vec),
173 &vcpu->arch.pending_exceptions);
174
175 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
176 old_pending);
177}
178
179void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
180{
181 vcpu->stat.queue_intr++;
182
183 set_bit(kvmppc_book3s_vec2irqprio(vec),
184 &vcpu->arch.pending_exceptions);
185#ifdef EXIT_DEBUG
186 printk(KERN_INFO "Queueing interrupt %x\n", vec);
187#endif
188}
189EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
190
191void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags)
192{
193
194 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags);
195}
196EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check);
197
198void kvmppc_core_queue_syscall(struct kvm_vcpu *vcpu)
199{
200 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_SYSCALL, 0);
201}
202EXPORT_SYMBOL(kvmppc_core_queue_syscall);
203
204void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
205{
206
207 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
208}
209EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
210
211void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
212{
213
214 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
215}
216
217void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
218{
219
220 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
221}
222
223void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
224{
225
226 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
227}
228
229void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
230{
231 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
232}
233EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
234
235int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
236{
237 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
238}
239EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
240
241void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
242{
243 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
244}
245EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
246
247void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
248 struct kvm_interrupt *irq)
249{
250
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268
269
270 if (irq->irq == KVM_INTERRUPT_SET)
271 vcpu->arch.external_oneshot = 1;
272
273 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
274}
275
276void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
277{
278 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
279}
280
281void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
282 ulong flags)
283{
284 kvmppc_set_dar(vcpu, dar);
285 kvmppc_set_dsisr(vcpu, flags);
286 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
287}
288EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
289
290void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
291{
292 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
293}
294EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
295
296static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
297 unsigned int priority)
298{
299 int deliver = 1;
300 int vec = 0;
301 bool crit = kvmppc_critical_section(vcpu);
302
303 switch (priority) {
304 case BOOK3S_IRQPRIO_DECREMENTER:
305 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
306 vec = BOOK3S_INTERRUPT_DECREMENTER;
307 break;
308 case BOOK3S_IRQPRIO_EXTERNAL:
309 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
310 vec = BOOK3S_INTERRUPT_EXTERNAL;
311 break;
312 case BOOK3S_IRQPRIO_SYSTEM_RESET:
313 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
314 break;
315 case BOOK3S_IRQPRIO_MACHINE_CHECK:
316 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
317 break;
318 case BOOK3S_IRQPRIO_DATA_STORAGE:
319 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
320 break;
321 case BOOK3S_IRQPRIO_INST_STORAGE:
322 vec = BOOK3S_INTERRUPT_INST_STORAGE;
323 break;
324 case BOOK3S_IRQPRIO_DATA_SEGMENT:
325 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
326 break;
327 case BOOK3S_IRQPRIO_INST_SEGMENT:
328 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
329 break;
330 case BOOK3S_IRQPRIO_ALIGNMENT:
331 vec = BOOK3S_INTERRUPT_ALIGNMENT;
332 break;
333 case BOOK3S_IRQPRIO_PROGRAM:
334 vec = BOOK3S_INTERRUPT_PROGRAM;
335 break;
336 case BOOK3S_IRQPRIO_VSX:
337 vec = BOOK3S_INTERRUPT_VSX;
338 break;
339 case BOOK3S_IRQPRIO_ALTIVEC:
340 vec = BOOK3S_INTERRUPT_ALTIVEC;
341 break;
342 case BOOK3S_IRQPRIO_FP_UNAVAIL:
343 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
344 break;
345 case BOOK3S_IRQPRIO_SYSCALL:
346 vec = BOOK3S_INTERRUPT_SYSCALL;
347 break;
348 case BOOK3S_IRQPRIO_DEBUG:
349 vec = BOOK3S_INTERRUPT_TRACE;
350 break;
351 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
352 vec = BOOK3S_INTERRUPT_PERFMON;
353 break;
354 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
355 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
356 break;
357 default:
358 deliver = 0;
359 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
360 break;
361 }
362
363#if 0
364 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
365#endif
366
367 if (deliver)
368 kvmppc_inject_interrupt(vcpu, vec, 0);
369
370 return deliver;
371}
372
373
374
375
376static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
377{
378 switch (priority) {
379 case BOOK3S_IRQPRIO_DECREMENTER:
380
381 return false;
382 case BOOK3S_IRQPRIO_EXTERNAL:
383
384
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386
387
388 if (vcpu->arch.external_oneshot) {
389 vcpu->arch.external_oneshot = 0;
390 return true;
391 }
392 return false;
393 }
394
395 return true;
396}
397
398int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
399{
400 unsigned long *pending = &vcpu->arch.pending_exceptions;
401 unsigned long old_pending = vcpu->arch.pending_exceptions;
402 unsigned int priority;
403
404#ifdef EXIT_DEBUG
405 if (vcpu->arch.pending_exceptions)
406 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
407#endif
408 priority = __ffs(*pending);
409 while (priority < BOOK3S_IRQPRIO_MAX) {
410 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
411 clear_irqprio(vcpu, priority)) {
412 clear_bit(priority, &vcpu->arch.pending_exceptions);
413 break;
414 }
415
416 priority = find_next_bit(pending,
417 BITS_PER_BYTE * sizeof(*pending),
418 priority + 1);
419 }
420
421
422 kvmppc_update_int_pending(vcpu, *pending, old_pending);
423
424 return 0;
425}
426EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
427
428kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
429 bool *writable)
430{
431 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
432 gfn_t gfn = gpa >> PAGE_SHIFT;
433
434 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
435 mp_pa = (uint32_t)mp_pa;
436
437
438 gpa &= ~0xFFFULL;
439 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
440 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
441 kvm_pfn_t pfn;
442
443 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
444 get_page(pfn_to_page(pfn));
445 if (writable)
446 *writable = true;
447 return pfn;
448 }
449
450 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
451}
452EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
453
454int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
455 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
456{
457 bool data = (xlid == XLATE_DATA);
458 bool iswrite = (xlrw == XLATE_WRITE);
459 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
460 int r;
461
462 if (relocated) {
463 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
464 } else {
465 pte->eaddr = eaddr;
466 pte->raddr = eaddr & KVM_PAM;
467 pte->vpage = VSID_REAL | eaddr >> 12;
468 pte->may_read = true;
469 pte->may_write = true;
470 pte->may_execute = true;
471 r = 0;
472
473 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
474 !data) {
475 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
476 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
477 pte->raddr &= ~SPLIT_HACK_MASK;
478 }
479 }
480
481 return r;
482}
483
484int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
485 enum instruction_fetch_type type, u32 *inst)
486{
487 ulong pc = kvmppc_get_pc(vcpu);
488 int r;
489
490 if (type == INST_SC)
491 pc -= 4;
492
493 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
494 if (r == EMULATE_DONE)
495 return r;
496 else
497 return EMULATE_AGAIN;
498}
499EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
500
501int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
502{
503 return 0;
504}
505
506void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
507{
508}
509
510int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
511 struct kvm_sregs *sregs)
512{
513 int ret;
514
515 vcpu_load(vcpu);
516 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
517 vcpu_put(vcpu);
518
519 return ret;
520}
521
522int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
523 struct kvm_sregs *sregs)
524{
525 int ret;
526
527 vcpu_load(vcpu);
528 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
529 vcpu_put(vcpu);
530
531 return ret;
532}
533
534int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
535{
536 int i;
537
538 regs->pc = kvmppc_get_pc(vcpu);
539 regs->cr = kvmppc_get_cr(vcpu);
540 regs->ctr = kvmppc_get_ctr(vcpu);
541 regs->lr = kvmppc_get_lr(vcpu);
542 regs->xer = kvmppc_get_xer(vcpu);
543 regs->msr = kvmppc_get_msr(vcpu);
544 regs->srr0 = kvmppc_get_srr0(vcpu);
545 regs->srr1 = kvmppc_get_srr1(vcpu);
546 regs->pid = vcpu->arch.pid;
547 regs->sprg0 = kvmppc_get_sprg0(vcpu);
548 regs->sprg1 = kvmppc_get_sprg1(vcpu);
549 regs->sprg2 = kvmppc_get_sprg2(vcpu);
550 regs->sprg3 = kvmppc_get_sprg3(vcpu);
551 regs->sprg4 = kvmppc_get_sprg4(vcpu);
552 regs->sprg5 = kvmppc_get_sprg5(vcpu);
553 regs->sprg6 = kvmppc_get_sprg6(vcpu);
554 regs->sprg7 = kvmppc_get_sprg7(vcpu);
555
556 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
557 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
558
559 return 0;
560}
561
562int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
563{
564 int i;
565
566 kvmppc_set_pc(vcpu, regs->pc);
567 kvmppc_set_cr(vcpu, regs->cr);
568 kvmppc_set_ctr(vcpu, regs->ctr);
569 kvmppc_set_lr(vcpu, regs->lr);
570 kvmppc_set_xer(vcpu, regs->xer);
571 kvmppc_set_msr(vcpu, regs->msr);
572 kvmppc_set_srr0(vcpu, regs->srr0);
573 kvmppc_set_srr1(vcpu, regs->srr1);
574 kvmppc_set_sprg0(vcpu, regs->sprg0);
575 kvmppc_set_sprg1(vcpu, regs->sprg1);
576 kvmppc_set_sprg2(vcpu, regs->sprg2);
577 kvmppc_set_sprg3(vcpu, regs->sprg3);
578 kvmppc_set_sprg4(vcpu, regs->sprg4);
579 kvmppc_set_sprg5(vcpu, regs->sprg5);
580 kvmppc_set_sprg6(vcpu, regs->sprg6);
581 kvmppc_set_sprg7(vcpu, regs->sprg7);
582
583 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
584 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
585
586 return 0;
587}
588
589int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
590{
591 return -EOPNOTSUPP;
592}
593
594int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
595{
596 return -EOPNOTSUPP;
597}
598
599int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
600 union kvmppc_one_reg *val)
601{
602 int r = 0;
603 long int i;
604
605 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
606 if (r == -EINVAL) {
607 r = 0;
608 switch (id) {
609 case KVM_REG_PPC_DAR:
610 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
611 break;
612 case KVM_REG_PPC_DSISR:
613 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
614 break;
615 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
616 i = id - KVM_REG_PPC_FPR0;
617 *val = get_reg_val(id, VCPU_FPR(vcpu, i));
618 break;
619 case KVM_REG_PPC_FPSCR:
620 *val = get_reg_val(id, vcpu->arch.fp.fpscr);
621 break;
622#ifdef CONFIG_VSX
623 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
624 if (cpu_has_feature(CPU_FTR_VSX)) {
625 i = id - KVM_REG_PPC_VSR0;
626 val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
627 val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
628 } else {
629 r = -ENXIO;
630 }
631 break;
632#endif
633 case KVM_REG_PPC_DEBUG_INST:
634 *val = get_reg_val(id, INS_TW);
635 break;
636#ifdef CONFIG_KVM_XICS
637 case KVM_REG_PPC_ICP_STATE:
638 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
639 r = -ENXIO;
640 break;
641 }
642 if (xics_on_xive())
643 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
644 else
645 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
646 break;
647#endif
648#ifdef CONFIG_KVM_XIVE
649 case KVM_REG_PPC_VP_STATE:
650 if (!vcpu->arch.xive_vcpu) {
651 r = -ENXIO;
652 break;
653 }
654 if (xive_enabled())
655 r = kvmppc_xive_native_get_vp(vcpu, val);
656 else
657 r = -ENXIO;
658 break;
659#endif
660 case KVM_REG_PPC_FSCR:
661 *val = get_reg_val(id, vcpu->arch.fscr);
662 break;
663 case KVM_REG_PPC_TAR:
664 *val = get_reg_val(id, vcpu->arch.tar);
665 break;
666 case KVM_REG_PPC_EBBHR:
667 *val = get_reg_val(id, vcpu->arch.ebbhr);
668 break;
669 case KVM_REG_PPC_EBBRR:
670 *val = get_reg_val(id, vcpu->arch.ebbrr);
671 break;
672 case KVM_REG_PPC_BESCR:
673 *val = get_reg_val(id, vcpu->arch.bescr);
674 break;
675 case KVM_REG_PPC_IC:
676 *val = get_reg_val(id, vcpu->arch.ic);
677 break;
678 default:
679 r = -EINVAL;
680 break;
681 }
682 }
683
684 return r;
685}
686
687int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
688 union kvmppc_one_reg *val)
689{
690 int r = 0;
691 long int i;
692
693 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
694 if (r == -EINVAL) {
695 r = 0;
696 switch (id) {
697 case KVM_REG_PPC_DAR:
698 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
699 break;
700 case KVM_REG_PPC_DSISR:
701 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
702 break;
703 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
704 i = id - KVM_REG_PPC_FPR0;
705 VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
706 break;
707 case KVM_REG_PPC_FPSCR:
708 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
709 break;
710#ifdef CONFIG_VSX
711 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
712 if (cpu_has_feature(CPU_FTR_VSX)) {
713 i = id - KVM_REG_PPC_VSR0;
714 vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
715 vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
716 } else {
717 r = -ENXIO;
718 }
719 break;
720#endif
721#ifdef CONFIG_KVM_XICS
722 case KVM_REG_PPC_ICP_STATE:
723 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
724 r = -ENXIO;
725 break;
726 }
727 if (xics_on_xive())
728 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
729 else
730 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
731 break;
732#endif
733#ifdef CONFIG_KVM_XIVE
734 case KVM_REG_PPC_VP_STATE:
735 if (!vcpu->arch.xive_vcpu) {
736 r = -ENXIO;
737 break;
738 }
739 if (xive_enabled())
740 r = kvmppc_xive_native_set_vp(vcpu, val);
741 else
742 r = -ENXIO;
743 break;
744#endif
745 case KVM_REG_PPC_FSCR:
746 vcpu->arch.fscr = set_reg_val(id, *val);
747 break;
748 case KVM_REG_PPC_TAR:
749 vcpu->arch.tar = set_reg_val(id, *val);
750 break;
751 case KVM_REG_PPC_EBBHR:
752 vcpu->arch.ebbhr = set_reg_val(id, *val);
753 break;
754 case KVM_REG_PPC_EBBRR:
755 vcpu->arch.ebbrr = set_reg_val(id, *val);
756 break;
757 case KVM_REG_PPC_BESCR:
758 vcpu->arch.bescr = set_reg_val(id, *val);
759 break;
760 case KVM_REG_PPC_IC:
761 vcpu->arch.ic = set_reg_val(id, *val);
762 break;
763 default:
764 r = -EINVAL;
765 break;
766 }
767 }
768
769 return r;
770}
771
772void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
773{
774 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
775}
776
777void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
778{
779 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
780}
781
782void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
783{
784 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
785}
786EXPORT_SYMBOL_GPL(kvmppc_set_msr);
787
788int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
789{
790 return vcpu->kvm->arch.kvm_ops->vcpu_run(vcpu);
791}
792
793int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
794 struct kvm_translation *tr)
795{
796 return 0;
797}
798
799int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
800 struct kvm_guest_debug *dbg)
801{
802 vcpu_load(vcpu);
803 vcpu->guest_debug = dbg->control;
804 vcpu_put(vcpu);
805 return 0;
806}
807
808void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
809{
810 kvmppc_core_queue_dec(vcpu);
811 kvm_vcpu_kick(vcpu);
812}
813
814int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
815{
816 return vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
817}
818
819void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
820{
821 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
822}
823
824int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
825{
826 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
827}
828
829void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
830{
831
832}
833
834int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
835{
836 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
837}
838
839void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
840{
841 kvm->arch.kvm_ops->free_memslot(slot);
842}
843
844void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
845{
846 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
847}
848
849int kvmppc_core_prepare_memory_region(struct kvm *kvm,
850 struct kvm_memory_slot *memslot,
851 const struct kvm_userspace_memory_region *mem,
852 enum kvm_mr_change change)
853{
854 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem,
855 change);
856}
857
858void kvmppc_core_commit_memory_region(struct kvm *kvm,
859 const struct kvm_userspace_memory_region *mem,
860 const struct kvm_memory_slot *old,
861 const struct kvm_memory_slot *new,
862 enum kvm_mr_change change)
863{
864 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change);
865}
866
867bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
868{
869 return kvm->arch.kvm_ops->unmap_gfn_range(kvm, range);
870}
871
872bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
873{
874 return kvm->arch.kvm_ops->age_gfn(kvm, range);
875}
876
877bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
878{
879 return kvm->arch.kvm_ops->test_age_gfn(kvm, range);
880}
881
882bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
883{
884 return kvm->arch.kvm_ops->set_spte_gfn(kvm, range);
885}
886
887int kvmppc_core_init_vm(struct kvm *kvm)
888{
889
890#ifdef CONFIG_PPC64
891 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
892 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
893 mutex_init(&kvm->arch.rtas_token_lock);
894#endif
895
896 return kvm->arch.kvm_ops->init_vm(kvm);
897}
898
899void kvmppc_core_destroy_vm(struct kvm *kvm)
900{
901 kvm->arch.kvm_ops->destroy_vm(kvm);
902
903#ifdef CONFIG_PPC64
904 kvmppc_rtas_tokens_free(kvm);
905 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
906#endif
907
908#ifdef CONFIG_KVM_XICS
909
910
911
912
913 kfree(kvm->arch.xive_devices.native);
914 kvm->arch.xive_devices.native = NULL;
915 kfree(kvm->arch.xive_devices.xics_on_xive);
916 kvm->arch.xive_devices.xics_on_xive = NULL;
917 kfree(kvm->arch.xics_device);
918 kvm->arch.xics_device = NULL;
919#endif
920}
921
922int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
923{
924 unsigned long size = kvmppc_get_gpr(vcpu, 4);
925 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
926 u64 buf;
927 int srcu_idx;
928 int ret;
929
930 if (!is_power_of_2(size) || (size > sizeof(buf)))
931 return H_TOO_HARD;
932
933 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
934 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
935 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
936 if (ret != 0)
937 return H_TOO_HARD;
938
939 switch (size) {
940 case 1:
941 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
942 break;
943
944 case 2:
945 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
946 break;
947
948 case 4:
949 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
950 break;
951
952 case 8:
953 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
954 break;
955
956 default:
957 BUG();
958 }
959
960 return H_SUCCESS;
961}
962EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
963
964int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
965{
966 unsigned long size = kvmppc_get_gpr(vcpu, 4);
967 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
968 unsigned long val = kvmppc_get_gpr(vcpu, 6);
969 u64 buf;
970 int srcu_idx;
971 int ret;
972
973 switch (size) {
974 case 1:
975 *(u8 *)&buf = val;
976 break;
977
978 case 2:
979 *(__be16 *)&buf = cpu_to_be16(val);
980 break;
981
982 case 4:
983 *(__be32 *)&buf = cpu_to_be32(val);
984 break;
985
986 case 8:
987 *(__be64 *)&buf = cpu_to_be64(val);
988 break;
989
990 default:
991 return H_TOO_HARD;
992 }
993
994 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
995 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
996 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
997 if (ret != 0)
998 return H_TOO_HARD;
999
1000 return H_SUCCESS;
1001}
1002EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
1003
1004int kvmppc_core_check_processor_compat(void)
1005{
1006
1007
1008
1009
1010
1011 return 0;
1012}
1013
1014int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
1015{
1016 return kvm->arch.kvm_ops->hcall_implemented(hcall);
1017}
1018
1019#ifdef CONFIG_KVM_XICS
1020int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
1021 bool line_status)
1022{
1023 if (xics_on_xive())
1024 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
1025 line_status);
1026 else
1027 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
1028 line_status);
1029}
1030
1031int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
1032 struct kvm *kvm, int irq_source_id,
1033 int level, bool line_status)
1034{
1035 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
1036 level, line_status);
1037}
1038static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
1039 struct kvm *kvm, int irq_source_id, int level,
1040 bool line_status)
1041{
1042 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
1043}
1044
1045int kvm_irq_map_gsi(struct kvm *kvm,
1046 struct kvm_kernel_irq_routing_entry *entries, int gsi)
1047{
1048 entries->gsi = gsi;
1049 entries->type = KVM_IRQ_ROUTING_IRQCHIP;
1050 entries->set = kvmppc_book3s_set_irq;
1051 entries->irqchip.irqchip = 0;
1052 entries->irqchip.pin = gsi;
1053 return 1;
1054}
1055
1056int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
1057{
1058 return pin;
1059}
1060
1061#endif
1062
1063static int kvmppc_book3s_init(void)
1064{
1065 int r;
1066
1067 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1068 if (r)
1069 return r;
1070#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1071 r = kvmppc_book3s_init_pr();
1072#endif
1073
1074#ifdef CONFIG_KVM_XICS
1075#ifdef CONFIG_KVM_XIVE
1076 if (xics_on_xive()) {
1077 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
1078 if (kvmppc_xive_native_supported())
1079 kvm_register_device_ops(&kvm_xive_native_ops,
1080 KVM_DEV_TYPE_XIVE);
1081 } else
1082#endif
1083 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1084#endif
1085 return r;
1086}
1087
1088static void kvmppc_book3s_exit(void)
1089{
1090#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1091 kvmppc_book3s_exit_pr();
1092#endif
1093 kvm_exit();
1094}
1095
1096module_init(kvmppc_book3s_init);
1097module_exit(kvmppc_book3s_exit);
1098
1099
1100#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1101MODULE_ALIAS_MISCDEV(KVM_MINOR);
1102MODULE_ALIAS("devname:kvm");
1103#endif
1104
