LXR linux/arch/xtensa/include/asm/processor.h

   1/*
   2 * This file is subject to the terms and conditions of the GNU General Public
   3 * License.  See the file "COPYING" in the main directory of this archive
   4 * for more details.
   5 *
   6 * Copyright (C) 2001 - 2008 Tensilica Inc.
   7 * Copyright (C) 2015 Cadence Design Systems Inc.
   8 */
   9
  10#ifndef _XTENSA_PROCESSOR_H
  11#define _XTENSA_PROCESSOR_H
  12
  13#include <asm/core.h>
  14
  15#include <linux/compiler.h>
  16#include <linux/stringify.h>
  17#include <asm/ptrace.h>
  18#include <asm/types.h>
  19#include <asm/regs.h>
  20
  21/* Xtensa ABI requires stack alignment to be at least 16 */
  22
  23#define STACK_ALIGN (XCHAL_DATA_WIDTH > 16 ? XCHAL_DATA_WIDTH : 16)
  24
  25#define ARCH_SLAB_MINALIGN STACK_ALIGN
  26
  27/*
  28 * User space process size: 1 GB.
  29 * Windowed call ABI requires caller and callee to be located within the same
  30 * 1 GB region. The C compiler places trampoline code on the stack for sources
  31 * that take the address of a nested C function (a feature used by glibc), so
  32 * the 1 GB requirement applies to the stack as well.
  33 */
  34
  35#ifdef CONFIG_MMU
  36#define TASK_SIZE       __XTENSA_UL_CONST(0x40000000)
  37#else
  38#define TASK_SIZE       __XTENSA_UL_CONST(0xffffffff)
  39#endif
  40
  41#define STACK_TOP       TASK_SIZE
  42#define STACK_TOP_MAX   STACK_TOP
  43
  44/*
  45 * General exception cause assigned to fake NMI. Fake NMI needs to be handled
  46 * differently from other interrupts, but it uses common kernel entry/exit
  47 * code.
  48 */
  49
  50#define EXCCAUSE_MAPPED_NMI     62
  51
  52/*
  53 * General exception cause assigned to debug exceptions. Debug exceptions go
  54 * to their own vector, rather than the general exception vectors (user,
  55 * kernel, double); and their specific causes are reported via DEBUGCAUSE
  56 * rather than EXCCAUSE.  However it is sometimes convenient to redirect debug
  57 * exceptions to the general exception mechanism.  To do this, an otherwise
  58 * unused EXCCAUSE value was assigned to debug exceptions for this purpose.
  59 */
  60
  61#define EXCCAUSE_MAPPED_DEBUG   63
  62
  63/*
  64 * We use DEPC also as a flag to distinguish between double and regular
  65 * exceptions. For performance reasons, DEPC might contain the value of
  66 * EXCCAUSE for regular exceptions, so we use this definition to mark a
  67 * valid double exception address.
  68 * (Note: We use it in bgeui, so it should be 64, 128, or 256)
  69 */
  70
  71#define VALID_DOUBLE_EXCEPTION_ADDRESS  64
  72
  73#define XTENSA_INT_LEVEL(intno) _XTENSA_INT_LEVEL(intno)
  74#define _XTENSA_INT_LEVEL(intno) XCHAL_INT##intno##_LEVEL
  75
  76#define XTENSA_INTLEVEL_MASK(level) _XTENSA_INTLEVEL_MASK(level)
  77#define _XTENSA_INTLEVEL_MASK(level) (XCHAL_INTLEVEL##level##_MASK)
  78
  79#define XTENSA_INTLEVEL_ANDBELOW_MASK(l) _XTENSA_INTLEVEL_ANDBELOW_MASK(l)
  80#define _XTENSA_INTLEVEL_ANDBELOW_MASK(l) (XCHAL_INTLEVEL##l##_ANDBELOW_MASK)
  81
  82#define PROFILING_INTLEVEL XTENSA_INT_LEVEL(XCHAL_PROFILING_INTERRUPT)
  83
  84/* LOCKLEVEL defines the interrupt level that masks all
  85 * general-purpose interrupts.
  86 */
  87#if defined(CONFIG_XTENSA_FAKE_NMI) && defined(XCHAL_PROFILING_INTERRUPT)
  88#define LOCKLEVEL (PROFILING_INTLEVEL - 1)
  89#else
  90#define LOCKLEVEL XCHAL_EXCM_LEVEL
  91#endif
  92
  93#define TOPLEVEL XCHAL_EXCM_LEVEL
  94#define XTENSA_FAKE_NMI (LOCKLEVEL < TOPLEVEL)
  95
  96/* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE
  97 * registers
  98 */
  99#define WSBITS  (XCHAL_NUM_AREGS / 4)      /* width of WINDOWSTART in bits */
 100#define WBBITS  (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */
 101
 102#if defined(__XTENSA_WINDOWED_ABI__)
 103#define KERNEL_PS_WOE_MASK PS_WOE_MASK
 104#elif defined(__XTENSA_CALL0_ABI__)
 105#define KERNEL_PS_WOE_MASK 0
 106#else
 107#error Unsupported xtensa ABI
 108#endif
 109
 110#ifndef __ASSEMBLY__
 111
 112#if defined(__XTENSA_WINDOWED_ABI__)
 113
 114/* Build a valid return address for the specified call winsize.
 115 * winsize must be 1 (call4), 2 (call8), or 3 (call12)
 116 */
 117#define MAKE_RA_FOR_CALL(ra,ws)   (((ra) & 0x3fffffff) | (ws) << 30)
 118
 119/* Convert return address to a valid pc
 120 * Note: We assume that the stack pointer is in the same 1GB ranges as the ra
 121 */
 122#define MAKE_PC_FROM_RA(ra,sp)    (((ra) & 0x3fffffff) | ((sp) & 0xc0000000))
 123
 124#elif defined(__XTENSA_CALL0_ABI__)
 125
 126/* Build a valid return address for the specified call winsize.
 127 * winsize must be 1 (call4), 2 (call8), or 3 (call12)
 128 */
 129#define MAKE_RA_FOR_CALL(ra, ws)   (ra)
 130
 131/* Convert return address to a valid pc
 132 * Note: We assume that the stack pointer is in the same 1GB ranges as the ra
 133 */
 134#define MAKE_PC_FROM_RA(ra, sp)    (ra)
 135
 136#else
 137#error Unsupported Xtensa ABI
 138#endif
 139
 140/* Spill slot location for the register reg in the spill area under the stack
 141 * pointer sp. reg must be in the range [0..4).
 142 */
 143#define SPILL_SLOT(sp, reg) (*(((unsigned long *)(sp)) - 4 + (reg)))
 144
 145/* Spill slot location for the register reg in the spill area under the stack
 146 * pointer sp for the call8. reg must be in the range [4..8).
 147 */
 148#define SPILL_SLOT_CALL8(sp, reg) (*(((unsigned long *)(sp)) - 12 + (reg)))
 149
 150/* Spill slot location for the register reg in the spill area under the stack
 151 * pointer sp for the call12. reg must be in the range [4..12).
 152 */
 153#define SPILL_SLOT_CALL12(sp, reg) (*(((unsigned long *)(sp)) - 16 + (reg)))
 154
 155typedef struct {
 156        unsigned long seg;
 157} mm_segment_t;
 158
 159struct thread_struct {
 160
 161        /* kernel's return address and stack pointer for context switching */
 162        unsigned long ra; /* kernel's a0: return address and window call size */
 163        unsigned long sp; /* kernel's a1: stack pointer */
 164
 165        mm_segment_t current_ds;    /* see uaccess.h for example uses */
 166
 167        /* struct xtensa_cpuinfo info; */
 168
 169        unsigned long bad_vaddr; /* last user fault */
 170        unsigned long bad_uaddr; /* last kernel fault accessing user space */
 171        unsigned long error_code;
 172#ifdef CONFIG_HAVE_HW_BREAKPOINT
 173        struct perf_event *ptrace_bp[XCHAL_NUM_IBREAK];
 174        struct perf_event *ptrace_wp[XCHAL_NUM_DBREAK];
 175#endif
 176        /* Make structure 16 bytes aligned. */
 177        int align[0] __attribute__ ((aligned(16)));
 178};
 179
 180/* This decides where the kernel will search for a free chunk of vm
 181 * space during mmap's.
 182 */
 183#define TASK_UNMAPPED_BASE      (TASK_SIZE / 2)
 184
 185#define INIT_THREAD  \
 186{                                                                       \
 187        ra:             0,                                              \
 188        sp:             sizeof(init_stack) + (long) &init_stack,        \
 189        current_ds:     {0},                                            \
 190        /*info:         {0}, */                                         \
 191        bad_vaddr:      0,                                              \
 192        bad_uaddr:      0,                                              \
 193        error_code:     0,                                              \
 194}
 195
 196
 197/*
 198 * Do necessary setup to start up a newly executed thread.
 199 * Note: When windowed ABI is used for userspace we set-up ps
 200 *       as if we did a call4 to the new pc.
 201 *       set_thread_state in signal.c depends on it.
 202 */
 203#if IS_ENABLED(CONFIG_USER_ABI_CALL0)
 204#define USER_PS_VALUE ((USER_RING << PS_RING_SHIFT) |                   \
 205                       (1 << PS_UM_BIT) |                               \
 206                       (1 << PS_EXCM_BIT))
 207#else
 208#define USER_PS_VALUE (PS_WOE_MASK |                                    \
 209                       (1 << PS_CALLINC_SHIFT) |                        \
 210                       (USER_RING << PS_RING_SHIFT) |                   \
 211                       (1 << PS_UM_BIT) |                               \
 212                       (1 << PS_EXCM_BIT))
 213#endif
 214
 215/* Clearing a0 terminates the backtrace. */
 216#define start_thread(regs, new_pc, new_sp) \
 217        do { \
 218                unsigned long syscall = (regs)->syscall; \
 219                memset((regs), 0, sizeof(*(regs))); \
 220                (regs)->pc = (new_pc); \
 221                (regs)->ps = USER_PS_VALUE; \
 222                (regs)->areg[1] = (new_sp); \
 223                (regs)->areg[0] = 0; \
 224                (regs)->wmask = 1; \
 225                (regs)->depc = 0; \
 226                (regs)->windowbase = 0; \
 227                (regs)->windowstart = 1; \
 228                (regs)->syscall = syscall; \
 229        } while (0)
 230
 231/* Forward declaration */
 232struct task_struct;
 233struct mm_struct;
 234
 235/* Free all resources held by a thread. */
 236#define release_thread(thread) do { } while(0)
 237
 238extern unsigned long __get_wchan(struct task_struct *p);
 239
 240#define KSTK_EIP(tsk)           (task_pt_regs(tsk)->pc)
 241#define KSTK_ESP(tsk)           (task_pt_regs(tsk)->areg[1])
 242
 243#define cpu_relax()  barrier()
 244
 245/* Special register access. */
 246
 247#define xtensa_set_sr(x, sr) \
 248        ({ \
 249         unsigned int v = (unsigned int)(x); \
 250         __asm__ __volatile__ ("wsr %0, "__stringify(sr) :: "a"(v)); \
 251         })
 252
 253#define xtensa_get_sr(sr) \
 254        ({ \
 255         unsigned int v; \
 256         __asm__ __volatile__ ("rsr %0, "__stringify(sr) : "=a"(v)); \
 257         v; \
 258         })
 259
 260#if XCHAL_HAVE_EXTERN_REGS
 261
 262static inline void set_er(unsigned long value, unsigned long addr)
 263{
 264        asm volatile ("wer %0, %1" : : "a" (value), "a" (addr) : "memory");
 265}
 266
 267static inline unsigned long get_er(unsigned long addr)
 268{
 269        register unsigned long value;
 270        asm volatile ("rer %0, %1" : "=a" (value) : "a" (addr) : "memory");
 271        return value;
 272}
 273
 274#endif /* XCHAL_HAVE_EXTERN_REGS */
 275
 276#endif  /* __ASSEMBLY__ */
 277#endif  /* _XTENSA_PROCESSOR_H */
 278