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11#include <linux/clk.h>
12#include <linux/kernel.h>
13#include <linux/gfp.h>
14#include <linux/module.h>
15#include <linux/pm.h>
16#include <linux/interrupt.h>
17#include <linux/device.h>
18#include <linux/platform_device.h>
19#include <linux/libata.h>
20#include <linux/ahci_platform.h>
21#include <linux/phy/phy.h>
22#include <linux/pm_runtime.h>
23#include <linux/of_platform.h>
24#include <linux/reset.h>
25#include "ahci.h"
26
27static void ahci_host_stop(struct ata_host *host);
28
29struct ata_port_operations ahci_platform_ops = {
30 .inherits = &ahci_ops,
31 .host_stop = ahci_host_stop,
32};
33EXPORT_SYMBOL_GPL(ahci_platform_ops);
34
35
36
37
38
39
40
41
42
43
44
45
46int ahci_platform_enable_phys(struct ahci_host_priv *hpriv)
47{
48 int rc, i;
49
50 for (i = 0; i < hpriv->nports; i++) {
51 rc = phy_init(hpriv->phys[i]);
52 if (rc)
53 goto disable_phys;
54
55 rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA);
56 if (rc) {
57 phy_exit(hpriv->phys[i]);
58 goto disable_phys;
59 }
60
61 rc = phy_power_on(hpriv->phys[i]);
62 if (rc && !(rc == -EOPNOTSUPP && (hpriv->flags & AHCI_HFLAG_IGN_NOTSUPP_POWER_ON))) {
63 phy_exit(hpriv->phys[i]);
64 goto disable_phys;
65 }
66 }
67
68 return 0;
69
70disable_phys:
71 while (--i >= 0) {
72 phy_power_off(hpriv->phys[i]);
73 phy_exit(hpriv->phys[i]);
74 }
75 return rc;
76}
77EXPORT_SYMBOL_GPL(ahci_platform_enable_phys);
78
79
80
81
82
83
84
85void ahci_platform_disable_phys(struct ahci_host_priv *hpriv)
86{
87 int i;
88
89 for (i = 0; i < hpriv->nports; i++) {
90 phy_power_off(hpriv->phys[i]);
91 phy_exit(hpriv->phys[i]);
92 }
93}
94EXPORT_SYMBOL_GPL(ahci_platform_disable_phys);
95
96
97
98
99
100
101
102
103
104
105
106
107int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
108{
109 int c, rc;
110
111 for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
112 rc = clk_prepare_enable(hpriv->clks[c]);
113 if (rc)
114 goto disable_unprepare_clk;
115 }
116 return 0;
117
118disable_unprepare_clk:
119 while (--c >= 0)
120 clk_disable_unprepare(hpriv->clks[c]);
121 return rc;
122}
123EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
124
125
126
127
128
129
130
131
132void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
133{
134 int c;
135
136 for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
137 if (hpriv->clks[c])
138 clk_disable_unprepare(hpriv->clks[c]);
139}
140EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
141
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151
152
153
154int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv)
155{
156 int rc, i;
157
158 rc = regulator_enable(hpriv->ahci_regulator);
159 if (rc)
160 return rc;
161
162 rc = regulator_enable(hpriv->phy_regulator);
163 if (rc)
164 goto disable_ahci_pwrs;
165
166 for (i = 0; i < hpriv->nports; i++) {
167 if (!hpriv->target_pwrs[i])
168 continue;
169
170 rc = regulator_enable(hpriv->target_pwrs[i]);
171 if (rc)
172 goto disable_target_pwrs;
173 }
174
175 return 0;
176
177disable_target_pwrs:
178 while (--i >= 0)
179 if (hpriv->target_pwrs[i])
180 regulator_disable(hpriv->target_pwrs[i]);
181
182 regulator_disable(hpriv->phy_regulator);
183disable_ahci_pwrs:
184 regulator_disable(hpriv->ahci_regulator);
185 return rc;
186}
187EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
188
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191
192
193
194
195
196void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv)
197{
198 int i;
199
200 for (i = 0; i < hpriv->nports; i++) {
201 if (!hpriv->target_pwrs[i])
202 continue;
203 regulator_disable(hpriv->target_pwrs[i]);
204 }
205
206 regulator_disable(hpriv->ahci_regulator);
207 regulator_disable(hpriv->phy_regulator);
208}
209EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
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226
227int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
228{
229 int rc;
230
231 rc = ahci_platform_enable_regulators(hpriv);
232 if (rc)
233 return rc;
234
235 rc = ahci_platform_enable_clks(hpriv);
236 if (rc)
237 goto disable_regulator;
238
239 rc = reset_control_deassert(hpriv->rsts);
240 if (rc)
241 goto disable_clks;
242
243 rc = ahci_platform_enable_phys(hpriv);
244 if (rc)
245 goto disable_resets;
246
247 return 0;
248
249disable_resets:
250 reset_control_assert(hpriv->rsts);
251
252disable_clks:
253 ahci_platform_disable_clks(hpriv);
254
255disable_regulator:
256 ahci_platform_disable_regulators(hpriv);
257
258 return rc;
259}
260EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
261
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263
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265
266
267
268
269
270
271
272
273void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
274{
275 ahci_platform_disable_phys(hpriv);
276
277 reset_control_assert(hpriv->rsts);
278
279 ahci_platform_disable_clks(hpriv);
280
281 ahci_platform_disable_regulators(hpriv);
282}
283EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
284
285static void ahci_platform_put_resources(struct device *dev, void *res)
286{
287 struct ahci_host_priv *hpriv = res;
288 int c;
289
290 if (hpriv->got_runtime_pm) {
291 pm_runtime_put_sync(dev);
292 pm_runtime_disable(dev);
293 }
294
295 for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
296 clk_put(hpriv->clks[c]);
297
298
299
300
301
302 for (c = 0; c < hpriv->nports; c++)
303 if (hpriv->target_pwrs && hpriv->target_pwrs[c])
304 regulator_put(hpriv->target_pwrs[c]);
305
306 kfree(hpriv->target_pwrs);
307}
308
309static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port,
310 struct device *dev, struct device_node *node)
311{
312 int rc;
313
314 hpriv->phys[port] = devm_of_phy_get(dev, node, NULL);
315
316 if (!IS_ERR(hpriv->phys[port]))
317 return 0;
318
319 rc = PTR_ERR(hpriv->phys[port]);
320 switch (rc) {
321 case -ENOSYS:
322
323 if (of_find_property(node, "phys", NULL)) {
324 dev_err(dev,
325 "couldn't get PHY in node %pOFn: ENOSYS\n",
326 node);
327 break;
328 }
329 fallthrough;
330 case -ENODEV:
331
332 hpriv->phys[port] = NULL;
333 rc = 0;
334 break;
335 case -EPROBE_DEFER:
336
337 break;
338
339 default:
340 dev_err(dev,
341 "couldn't get PHY in node %pOFn: %d\n",
342 node, rc);
343
344 break;
345 }
346
347 return rc;
348}
349
350static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
351 struct device *dev)
352{
353 struct regulator *target_pwr;
354 int rc = 0;
355
356 target_pwr = regulator_get(dev, "target");
357
358 if (!IS_ERR(target_pwr))
359 hpriv->target_pwrs[port] = target_pwr;
360 else
361 rc = PTR_ERR(target_pwr);
362
363 return rc;
364}
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384
385struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
386 unsigned int flags)
387{
388 struct device *dev = &pdev->dev;
389 struct ahci_host_priv *hpriv;
390 struct clk *clk;
391 struct device_node *child;
392 int i, enabled_ports = 0, rc = -ENOMEM, child_nodes;
393 u32 mask_port_map = 0;
394
395 if (!devres_open_group(dev, NULL, GFP_KERNEL))
396 return ERR_PTR(-ENOMEM);
397
398 hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
399 GFP_KERNEL);
400 if (!hpriv)
401 goto err_out;
402
403 devres_add(dev, hpriv);
404
405 hpriv->mmio = devm_ioremap_resource(dev,
406 platform_get_resource(pdev, IORESOURCE_MEM, 0));
407 if (IS_ERR(hpriv->mmio)) {
408 rc = PTR_ERR(hpriv->mmio);
409 goto err_out;
410 }
411
412 for (i = 0; i < AHCI_MAX_CLKS; i++) {
413
414
415
416
417
418
419 if (i == 0)
420 clk = clk_get(dev, NULL);
421 else
422 clk = of_clk_get(dev->of_node, i);
423
424 if (IS_ERR(clk)) {
425 rc = PTR_ERR(clk);
426 if (rc == -EPROBE_DEFER)
427 goto err_out;
428 break;
429 }
430 hpriv->clks[i] = clk;
431 }
432
433 hpriv->ahci_regulator = devm_regulator_get(dev, "ahci");
434 if (IS_ERR(hpriv->ahci_regulator)) {
435 rc = PTR_ERR(hpriv->ahci_regulator);
436 if (rc != 0)
437 goto err_out;
438 }
439
440 hpriv->phy_regulator = devm_regulator_get(dev, "phy");
441 if (IS_ERR(hpriv->phy_regulator)) {
442 rc = PTR_ERR(hpriv->phy_regulator);
443 goto err_out;
444 }
445
446 if (flags & AHCI_PLATFORM_GET_RESETS) {
447 hpriv->rsts = devm_reset_control_array_get_optional_shared(dev);
448 if (IS_ERR(hpriv->rsts)) {
449 rc = PTR_ERR(hpriv->rsts);
450 goto err_out;
451 }
452 }
453
454 hpriv->nports = child_nodes = of_get_child_count(dev->of_node);
455
456
457
458
459
460
461 if (!child_nodes)
462 hpriv->nports = 1;
463
464 hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL);
465 if (!hpriv->phys) {
466 rc = -ENOMEM;
467 goto err_out;
468 }
469
470
471
472
473 hpriv->target_pwrs = kcalloc(hpriv->nports, sizeof(*hpriv->target_pwrs), GFP_KERNEL);
474 if (!hpriv->target_pwrs) {
475 rc = -ENOMEM;
476 goto err_out;
477 }
478
479 if (child_nodes) {
480 for_each_child_of_node(dev->of_node, child) {
481 u32 port;
482 struct platform_device *port_dev __maybe_unused;
483
484 if (!of_device_is_available(child))
485 continue;
486
487 if (of_property_read_u32(child, "reg", &port)) {
488 rc = -EINVAL;
489 of_node_put(child);
490 goto err_out;
491 }
492
493 if (port >= hpriv->nports) {
494 dev_warn(dev, "invalid port number %d\n", port);
495 continue;
496 }
497 mask_port_map |= BIT(port);
498
499#ifdef CONFIG_OF_ADDRESS
500 of_platform_device_create(child, NULL, NULL);
501
502 port_dev = of_find_device_by_node(child);
503
504 if (port_dev) {
505 rc = ahci_platform_get_regulator(hpriv, port,
506 &port_dev->dev);
507 if (rc == -EPROBE_DEFER) {
508 of_node_put(child);
509 goto err_out;
510 }
511 }
512#endif
513
514 rc = ahci_platform_get_phy(hpriv, port, dev, child);
515 if (rc) {
516 of_node_put(child);
517 goto err_out;
518 }
519
520 enabled_ports++;
521 }
522 if (!enabled_ports) {
523 dev_warn(dev, "No port enabled\n");
524 rc = -ENODEV;
525 goto err_out;
526 }
527
528 if (!hpriv->mask_port_map)
529 hpriv->mask_port_map = mask_port_map;
530 } else {
531
532
533
534
535 rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node);
536 if (rc)
537 goto err_out;
538
539 rc = ahci_platform_get_regulator(hpriv, 0, dev);
540 if (rc == -EPROBE_DEFER)
541 goto err_out;
542 }
543 pm_runtime_enable(dev);
544 pm_runtime_get_sync(dev);
545 hpriv->got_runtime_pm = true;
546
547 devres_remove_group(dev, NULL);
548 return hpriv;
549
550err_out:
551 devres_release_group(dev, NULL);
552 return ERR_PTR(rc);
553}
554EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
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569
570int ahci_platform_init_host(struct platform_device *pdev,
571 struct ahci_host_priv *hpriv,
572 const struct ata_port_info *pi_template,
573 struct scsi_host_template *sht)
574{
575 struct device *dev = &pdev->dev;
576 struct ata_port_info pi = *pi_template;
577 const struct ata_port_info *ppi[] = { &pi, NULL };
578 struct ata_host *host;
579 int i, irq, n_ports, rc;
580
581 irq = platform_get_irq(pdev, 0);
582 if (irq < 0) {
583 if (irq != -EPROBE_DEFER)
584 dev_err(dev, "no irq\n");
585 return irq;
586 }
587 if (!irq)
588 return -EINVAL;
589
590 hpriv->irq = irq;
591
592
593 pi.private_data = (void *)(unsigned long)hpriv->flags;
594
595 ahci_save_initial_config(dev, hpriv);
596
597 if (hpriv->cap & HOST_CAP_NCQ)
598 pi.flags |= ATA_FLAG_NCQ;
599
600 if (hpriv->cap & HOST_CAP_PMP)
601 pi.flags |= ATA_FLAG_PMP;
602
603 ahci_set_em_messages(hpriv, &pi);
604
605
606
607
608
609
610 n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
611
612 host = ata_host_alloc_pinfo(dev, ppi, n_ports);
613 if (!host)
614 return -ENOMEM;
615
616 host->private_data = hpriv;
617
618 if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
619 host->flags |= ATA_HOST_PARALLEL_SCAN;
620 else
621 dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
622
623 if (pi.flags & ATA_FLAG_EM)
624 ahci_reset_em(host);
625
626 for (i = 0; i < host->n_ports; i++) {
627 struct ata_port *ap = host->ports[i];
628
629 ata_port_desc(ap, "mmio %pR",
630 platform_get_resource(pdev, IORESOURCE_MEM, 0));
631 ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
632
633
634 if (ap->flags & ATA_FLAG_EM)
635 ap->em_message_type = hpriv->em_msg_type;
636
637
638 if (!(hpriv->port_map & (1 << i)))
639 ap->ops = &ata_dummy_port_ops;
640 }
641
642 if (hpriv->cap & HOST_CAP_64) {
643 rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
644 if (rc) {
645 rc = dma_coerce_mask_and_coherent(dev,
646 DMA_BIT_MASK(32));
647 if (rc) {
648 dev_err(dev, "Failed to enable 64-bit DMA.\n");
649 return rc;
650 }
651 dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n");
652 }
653 }
654
655 rc = ahci_reset_controller(host);
656 if (rc)
657 return rc;
658
659 ahci_init_controller(host);
660 ahci_print_info(host, "platform");
661
662 return ahci_host_activate(host, sht);
663}
664EXPORT_SYMBOL_GPL(ahci_platform_init_host);
665
666static void ahci_host_stop(struct ata_host *host)
667{
668 struct ahci_host_priv *hpriv = host->private_data;
669
670 ahci_platform_disable_resources(hpriv);
671}
672
673
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679
680
681void ahci_platform_shutdown(struct platform_device *pdev)
682{
683 struct ata_host *host = platform_get_drvdata(pdev);
684 struct ahci_host_priv *hpriv = host->private_data;
685 void __iomem *mmio = hpriv->mmio;
686 int i;
687
688 for (i = 0; i < host->n_ports; i++) {
689 struct ata_port *ap = host->ports[i];
690
691
692 if (ap->ops->freeze)
693 ap->ops->freeze(ap);
694
695
696 if (ap->ops->port_stop)
697 ap->ops->port_stop(ap);
698 }
699
700
701 writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL);
702 readl(mmio + HOST_CTL);
703 writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT);
704}
705EXPORT_SYMBOL_GPL(ahci_platform_shutdown);
706
707#ifdef CONFIG_PM_SLEEP
708
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717
718
719int ahci_platform_suspend_host(struct device *dev)
720{
721 struct ata_host *host = dev_get_drvdata(dev);
722 struct ahci_host_priv *hpriv = host->private_data;
723 void __iomem *mmio = hpriv->mmio;
724 u32 ctl;
725
726 if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
727 dev_err(dev, "firmware update required for suspend/resume\n");
728 return -EIO;
729 }
730
731
732
733
734
735
736 ctl = readl(mmio + HOST_CTL);
737 ctl &= ~HOST_IRQ_EN;
738 writel(ctl, mmio + HOST_CTL);
739 readl(mmio + HOST_CTL);
740
741 if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
742 ahci_platform_disable_phys(hpriv);
743
744 return ata_host_suspend(host, PMSG_SUSPEND);
745}
746EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
747
748
749
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751
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756
757
758
759int ahci_platform_resume_host(struct device *dev)
760{
761 struct ata_host *host = dev_get_drvdata(dev);
762 struct ahci_host_priv *hpriv = host->private_data;
763 int rc;
764
765 if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
766 rc = ahci_reset_controller(host);
767 if (rc)
768 return rc;
769
770 ahci_init_controller(host);
771 }
772
773 if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
774 ahci_platform_enable_phys(hpriv);
775
776 ata_host_resume(host);
777
778 return 0;
779}
780EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
781
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786
787
788
789
790
791
792int ahci_platform_suspend(struct device *dev)
793{
794 struct ata_host *host = dev_get_drvdata(dev);
795 struct ahci_host_priv *hpriv = host->private_data;
796 int rc;
797
798 rc = ahci_platform_suspend_host(dev);
799 if (rc)
800 return rc;
801
802 ahci_platform_disable_resources(hpriv);
803
804 return 0;
805}
806EXPORT_SYMBOL_GPL(ahci_platform_suspend);
807
808
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811
812
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815
816
817
818int ahci_platform_resume(struct device *dev)
819{
820 struct ata_host *host = dev_get_drvdata(dev);
821 struct ahci_host_priv *hpriv = host->private_data;
822 int rc;
823
824 rc = ahci_platform_enable_resources(hpriv);
825 if (rc)
826 return rc;
827
828 rc = ahci_platform_resume_host(dev);
829 if (rc)
830 goto disable_resources;
831
832
833 pm_runtime_disable(dev);
834 pm_runtime_set_active(dev);
835 pm_runtime_enable(dev);
836
837 return 0;
838
839disable_resources:
840 ahci_platform_disable_resources(hpriv);
841
842 return rc;
843}
844EXPORT_SYMBOL_GPL(ahci_platform_resume);
845#endif
846
847MODULE_DESCRIPTION("AHCI SATA platform library");
848MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
849MODULE_LICENSE("GPL");
850