LXR linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk

   1/*
   2 * Copyright 2012-16 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26
  27#ifndef _DCE_CLK_MGR_H_
  28#define _DCE_CLK_MGR_H_
  29
  30#include "dc.h"
  31
  32/* functions shared by other dce clk mgrs */
  33int dce_adjust_dp_ref_freq_for_ss(struct clk_mgr_internal *clk_mgr_dce, int dp_ref_clk_khz);
  34int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base);
  35enum dm_pp_clocks_state dce_get_required_clocks_state(
  36        struct clk_mgr *clk_mgr_base,
  37        struct dc_state *context);
  38
  39uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context);
  40
  41
  42void dce_clk_mgr_construct(
  43                struct dc_context *ctx,
  44                struct clk_mgr_internal *clk_mgr_dce);
  45
  46void dce_clock_read_ss_info(struct clk_mgr_internal *dccg_dce);
  47
  48int dce12_get_dp_ref_freq_khz(struct clk_mgr *dccg);
  49
  50int dce_set_clock(
  51        struct clk_mgr *clk_mgr_base,
  52        int requested_clk_khz);
  53
  54
  55void dce_clk_mgr_destroy(struct clk_mgr **clk_mgr);
  56
  57int dentist_get_divider_from_did(int did);
  58
  59#endif /* _DCE_CLK_MGR_H_ */
  60