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26#ifndef __DAL_HW_SHARED_H__
27#define __DAL_HW_SHARED_H__
28
29#include "os_types.h"
30#include "fixed31_32.h"
31#include "dc_hw_types.h"
32
33
34
35
36
37#define MAX_AUDIOS 7
38#define MAX_PIPES 6
39#define MAX_DIG_LINK_ENCODERS 7
40#define MAX_DWB_PIPES 1
41#if defined(CONFIG_DRM_AMD_DC_DCN)
42#define MAX_HPO_DP2_ENCODERS 4
43#define MAX_HPO_DP2_LINK_ENCODERS 2
44#endif
45
46struct gamma_curve {
47 uint32_t offset;
48 uint32_t segments_num;
49};
50
51struct curve_points {
52 struct fixed31_32 x;
53 struct fixed31_32 y;
54 struct fixed31_32 offset;
55 struct fixed31_32 slope;
56
57 uint32_t custom_float_x;
58 uint32_t custom_float_y;
59 uint32_t custom_float_offset;
60 uint32_t custom_float_slope;
61};
62
63struct curve_points3 {
64 struct curve_points red;
65 struct curve_points green;
66 struct curve_points blue;
67};
68
69struct pwl_result_data {
70 struct fixed31_32 red;
71 struct fixed31_32 green;
72 struct fixed31_32 blue;
73
74 struct fixed31_32 delta_red;
75 struct fixed31_32 delta_green;
76 struct fixed31_32 delta_blue;
77
78 uint32_t red_reg;
79 uint32_t green_reg;
80 uint32_t blue_reg;
81
82 uint32_t delta_red_reg;
83 uint32_t delta_green_reg;
84 uint32_t delta_blue_reg;
85};
86
87struct dc_rgb {
88 uint32_t red;
89 uint32_t green;
90 uint32_t blue;
91};
92
93struct tetrahedral_17x17x17 {
94 struct dc_rgb lut0[1229];
95 struct dc_rgb lut1[1228];
96 struct dc_rgb lut2[1228];
97 struct dc_rgb lut3[1228];
98};
99struct tetrahedral_9x9x9 {
100 struct dc_rgb lut0[183];
101 struct dc_rgb lut1[182];
102 struct dc_rgb lut2[182];
103 struct dc_rgb lut3[182];
104};
105
106struct tetrahedral_params {
107 union {
108 struct tetrahedral_17x17x17 tetrahedral_17;
109 struct tetrahedral_9x9x9 tetrahedral_9;
110 };
111 bool use_tetrahedral_9;
112 bool use_12bits;
113
114};
115
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119
120
121struct pwl_params {
122 struct gamma_curve arr_curve_points[34];
123 union {
124 struct curve_points arr_points[2];
125 struct curve_points3 corner_points[2];
126 };
127 struct pwl_result_data rgb_resulted[256 + 3];
128 uint32_t hw_points_num;
129};
130
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134
135
136
137enum lb_pixel_depth {
138
139 LB_PIXEL_DEPTH_18BPP = 1,
140 LB_PIXEL_DEPTH_24BPP = 2,
141 LB_PIXEL_DEPTH_30BPP = 4,
142 LB_PIXEL_DEPTH_36BPP = 8
143};
144
145enum graphics_csc_adjust_type {
146 GRAPHICS_CSC_ADJUST_TYPE_BYPASS = 0,
147 GRAPHICS_CSC_ADJUST_TYPE_HW,
148 GRAPHICS_CSC_ADJUST_TYPE_SW
149};
150
151enum ipp_degamma_mode {
152 IPP_DEGAMMA_MODE_BYPASS,
153 IPP_DEGAMMA_MODE_HW_sRGB,
154 IPP_DEGAMMA_MODE_HW_xvYCC,
155 IPP_DEGAMMA_MODE_USER_PWL
156};
157
158enum gamcor_mode {
159 GAMCOR_MODE_BYPASS,
160 GAMCOR_MODE_RESERVED_1,
161 GAMCOR_MODE_USER_PWL,
162 GAMCOR_MODE_RESERVED_3
163};
164
165enum ipp_output_format {
166 IPP_OUTPUT_FORMAT_12_BIT_FIX,
167 IPP_OUTPUT_FORMAT_16_BIT_BYPASS,
168 IPP_OUTPUT_FORMAT_FLOAT
169};
170
171enum expansion_mode {
172 EXPANSION_MODE_DYNAMIC,
173 EXPANSION_MODE_ZERO
174};
175
176struct default_adjustment {
177 enum lb_pixel_depth lb_color_depth;
178 enum dc_color_space out_color_space;
179 enum dc_color_space in_color_space;
180 enum dc_color_depth color_depth;
181 enum pixel_format surface_pixel_format;
182 enum graphics_csc_adjust_type csc_adjust_type;
183 bool force_hw_default;
184};
185
186
187struct out_csc_color_matrix {
188 enum dc_color_space color_space;
189 uint16_t regval[12];
190};
191
192enum gamut_remap_select {
193 GAMUT_REMAP_BYPASS = 0,
194 GAMUT_REMAP_COEFF,
195 GAMUT_REMAP_COMA_COEFF,
196 GAMUT_REMAP_COMB_COEFF
197};
198
199enum opp_regamma {
200 OPP_REGAMMA_BYPASS = 0,
201 OPP_REGAMMA_SRGB,
202 OPP_REGAMMA_XVYCC,
203 OPP_REGAMMA_USER
204};
205
206enum optc_dsc_mode {
207 OPTC_DSC_DISABLED = 0,
208 OPTC_DSC_ENABLED_444 = 1,
209 OPTC_DSC_ENABLED_NATIVE_SUBSAMPLED = 2
210};
211
212struct dc_bias_and_scale {
213 uint16_t scale_red;
214 uint16_t bias_red;
215 uint16_t scale_green;
216 uint16_t bias_green;
217 uint16_t scale_blue;
218 uint16_t bias_blue;
219};
220
221enum test_pattern_dyn_range {
222 TEST_PATTERN_DYN_RANGE_VESA = 0,
223 TEST_PATTERN_DYN_RANGE_CEA
224};
225
226enum test_pattern_mode {
227 TEST_PATTERN_MODE_COLORSQUARES_RGB = 0,
228 TEST_PATTERN_MODE_COLORSQUARES_YCBCR601,
229 TEST_PATTERN_MODE_COLORSQUARES_YCBCR709,
230 TEST_PATTERN_MODE_VERTICALBARS,
231 TEST_PATTERN_MODE_HORIZONTALBARS,
232 TEST_PATTERN_MODE_SINGLERAMP_RGB,
233 TEST_PATTERN_MODE_DUALRAMP_RGB,
234 TEST_PATTERN_MODE_XR_BIAS_RGB
235};
236
237enum test_pattern_color_format {
238 TEST_PATTERN_COLOR_FORMAT_BPC_6 = 0,
239 TEST_PATTERN_COLOR_FORMAT_BPC_8,
240 TEST_PATTERN_COLOR_FORMAT_BPC_10,
241 TEST_PATTERN_COLOR_FORMAT_BPC_12
242};
243
244enum controller_dp_test_pattern {
245 CONTROLLER_DP_TEST_PATTERN_D102 = 0,
246 CONTROLLER_DP_TEST_PATTERN_SYMBOLERROR,
247 CONTROLLER_DP_TEST_PATTERN_PRBS7,
248 CONTROLLER_DP_TEST_PATTERN_COLORSQUARES,
249 CONTROLLER_DP_TEST_PATTERN_VERTICALBARS,
250 CONTROLLER_DP_TEST_PATTERN_HORIZONTALBARS,
251 CONTROLLER_DP_TEST_PATTERN_COLORRAMP,
252 CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
253 CONTROLLER_DP_TEST_PATTERN_RESERVED_8,
254 CONTROLLER_DP_TEST_PATTERN_RESERVED_9,
255 CONTROLLER_DP_TEST_PATTERN_RESERVED_A,
256 CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA,
257 CONTROLLER_DP_TEST_PATTERN_SOLID_COLOR
258};
259
260enum controller_dp_color_space {
261 CONTROLLER_DP_COLOR_SPACE_RGB,
262 CONTROLLER_DP_COLOR_SPACE_YCBCR601,
263 CONTROLLER_DP_COLOR_SPACE_YCBCR709,
264 CONTROLLER_DP_COLOR_SPACE_UDEFINED
265};
266
267enum dc_lut_mode {
268 LUT_BYPASS,
269 LUT_RAM_A,
270 LUT_RAM_B
271};
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342union audio_cea_channels {
343 uint8_t all;
344 struct audio_cea_channels_bits {
345 uint32_t FL:1;
346 uint32_t FR:1;
347 uint32_t LFE:1;
348 uint32_t FC:1;
349 uint32_t RL_RC:1;
350 uint32_t RR:1;
351 uint32_t RC_RLC_FLC:1;
352 uint32_t RRC_FRC:1;
353 } channels;
354};
355
356#endif
357
