linux/drivers/gpu/drm/gma500/psb_intel_sdvo.c
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   1/*
   2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3 * Copyright © 2006-2007 Intel Corporation
   4 *   Jesse Barnes <jesse.barnes@intel.com>
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a
   7 * copy of this software and associated documentation files (the "Software"),
   8 * to deal in the Software without restriction, including without limitation
   9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10 * and/or sell copies of the Software, and to permit persons to whom the
  11 * Software is furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice (including the next
  14 * paragraph) shall be included in all copies or substantial portions of the
  15 * Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23 * DEALINGS IN THE SOFTWARE.
  24 *
  25 * Authors:
  26 *      Eric Anholt <eric@anholt.net>
  27 */
  28
  29#include <linux/delay.h>
  30#include <linux/i2c.h>
  31#include <linux/kernel.h>
  32#include <linux/module.h>
  33#include <linux/slab.h>
  34
  35#include <drm/drm_crtc.h>
  36#include <drm/drm_edid.h>
  37
  38#include "psb_drv.h"
  39#include "psb_intel_drv.h"
  40#include "psb_intel_reg.h"
  41#include "psb_intel_sdvo_regs.h"
  42
  43#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  44#define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  45#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  46#define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
  47
  48#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  49                         SDVO_TV_MASK)
  50
  51#define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  52#define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  53#define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  54#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  55
  56
  57static const char *tv_format_names[] = {
  58        "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  59        "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  60        "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  61        "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  62        "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  63        "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  64        "SECAM_60"
  65};
  66
  67struct psb_intel_sdvo {
  68        struct gma_encoder base;
  69
  70        struct i2c_adapter *i2c;
  71        u8 slave_addr;
  72
  73        struct i2c_adapter ddc;
  74
  75        /* Register for the SDVO device: SDVOB or SDVOC */
  76        int sdvo_reg;
  77
  78        /* Active outputs controlled by this SDVO output */
  79        uint16_t controlled_output;
  80
  81        /*
  82         * Capabilities of the SDVO device returned by
  83         * i830_sdvo_get_capabilities()
  84         */
  85        struct psb_intel_sdvo_caps caps;
  86
  87        /* Pixel clock limitations reported by the SDVO device, in kHz */
  88        int pixel_clock_min, pixel_clock_max;
  89
  90        /*
  91        * For multiple function SDVO device,
  92        * this is for current attached outputs.
  93        */
  94        uint16_t attached_output;
  95
  96        /**
  97         * This is used to select the color range of RBG outputs in HDMI mode.
  98         * It is only valid when using TMDS encoding and 8 bit per color mode.
  99         */
 100        uint32_t color_range;
 101
 102        /**
 103         * This is set if we're going to treat the device as TV-out.
 104         *
 105         * While we have these nice friendly flags for output types that ought
 106         * to decide this for us, the S-Video output on our HDMI+S-Video card
 107         * shows up as RGB1 (VGA).
 108         */
 109        bool is_tv;
 110
 111        /* This is for current tv format name */
 112        int tv_format_index;
 113
 114        /**
 115         * This is set if we treat the device as HDMI, instead of DVI.
 116         */
 117        bool is_hdmi;
 118        bool has_hdmi_monitor;
 119        bool has_hdmi_audio;
 120
 121        /**
 122         * This is set if we detect output of sdvo device as LVDS and
 123         * have a valid fixed mode to use with the panel.
 124         */
 125        bool is_lvds;
 126
 127        /**
 128         * This is sdvo fixed panel mode pointer
 129         */
 130        struct drm_display_mode *sdvo_lvds_fixed_mode;
 131
 132        /* DDC bus used by this SDVO encoder */
 133        uint8_t ddc_bus;
 134
 135        u8 pixel_multiplier;
 136
 137        /* Input timings for adjusted_mode */
 138        struct psb_intel_sdvo_dtd input_dtd;
 139
 140        /* Saved SDVO output states */
 141        uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */
 142};
 143
 144struct psb_intel_sdvo_connector {
 145        struct gma_connector base;
 146
 147        /* Mark the type of connector */
 148        uint16_t output_flag;
 149
 150        int force_audio;
 151
 152        /* This contains all current supported TV format */
 153        u8 tv_format_supported[ARRAY_SIZE(tv_format_names)];
 154        int   format_supported_num;
 155        struct drm_property *tv_format;
 156
 157        /* add the property for the SDVO-TV */
 158        struct drm_property *left;
 159        struct drm_property *right;
 160        struct drm_property *top;
 161        struct drm_property *bottom;
 162        struct drm_property *hpos;
 163        struct drm_property *vpos;
 164        struct drm_property *contrast;
 165        struct drm_property *saturation;
 166        struct drm_property *hue;
 167        struct drm_property *sharpness;
 168        struct drm_property *flicker_filter;
 169        struct drm_property *flicker_filter_adaptive;
 170        struct drm_property *flicker_filter_2d;
 171        struct drm_property *tv_chroma_filter;
 172        struct drm_property *tv_luma_filter;
 173        struct drm_property *dot_crawl;
 174
 175        /* add the property for the SDVO-TV/LVDS */
 176        struct drm_property *brightness;
 177
 178        /* Add variable to record current setting for the above property */
 179        u32     left_margin, right_margin, top_margin, bottom_margin;
 180
 181        /* this is to get the range of margin.*/
 182        u32     max_hscan,  max_vscan;
 183        u32     max_hpos, cur_hpos;
 184        u32     max_vpos, cur_vpos;
 185        u32     cur_brightness, max_brightness;
 186        u32     cur_contrast,   max_contrast;
 187        u32     cur_saturation, max_saturation;
 188        u32     cur_hue,        max_hue;
 189        u32     cur_sharpness,  max_sharpness;
 190        u32     cur_flicker_filter,             max_flicker_filter;
 191        u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 192        u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 193        u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 194        u32     cur_tv_luma_filter,     max_tv_luma_filter;
 195        u32     cur_dot_crawl,  max_dot_crawl;
 196};
 197
 198static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder)
 199{
 200        return container_of(encoder, struct psb_intel_sdvo, base.base);
 201}
 202
 203static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 204{
 205        return container_of(gma_attached_encoder(connector),
 206                            struct psb_intel_sdvo, base);
 207}
 208
 209static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector)
 210{
 211        return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base);
 212}
 213
 214static bool
 215psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags);
 216static bool
 217psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
 218                              struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
 219                              int type);
 220static bool
 221psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
 222                                   struct psb_intel_sdvo_connector *psb_intel_sdvo_connector);
 223
 224/*
 225 * Writes the SDVOB or SDVOC with the given value, but always writes both
 226 * SDVOB and SDVOC to work around apparent hardware issues (according to
 227 * comments in the BIOS).
 228 */
 229static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val)
 230{
 231        struct drm_device *dev = psb_intel_sdvo->base.base.dev;
 232        u32 bval = val, cval = val;
 233        int i, j;
 234        int need_aux = IS_MRST(dev) ? 1 : 0;
 235
 236        for (j = 0; j <= need_aux; j++) {
 237                if (psb_intel_sdvo->sdvo_reg == SDVOB)
 238                        cval = REG_READ_WITH_AUX(SDVOC, j);
 239                else
 240                        bval = REG_READ_WITH_AUX(SDVOB, j);
 241
 242                /*
 243                * Write the registers twice for luck. Sometimes,
 244                * writing them only once doesn't appear to 'stick'.
 245                * The BIOS does this too. Yay, magic
 246                */
 247                for (i = 0; i < 2; i++) {
 248                        REG_WRITE_WITH_AUX(SDVOB, bval, j);
 249                        REG_READ_WITH_AUX(SDVOB, j);
 250                        REG_WRITE_WITH_AUX(SDVOC, cval, j);
 251                        REG_READ_WITH_AUX(SDVOC, j);
 252                }
 253        }
 254}
 255
 256static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch)
 257{
 258        struct i2c_msg msgs[] = {
 259                {
 260                        .addr = psb_intel_sdvo->slave_addr,
 261                        .flags = 0,
 262                        .len = 1,
 263                        .buf = &addr,
 264                },
 265                {
 266                        .addr = psb_intel_sdvo->slave_addr,
 267                        .flags = I2C_M_RD,
 268                        .len = 1,
 269                        .buf = ch,
 270                }
 271        };
 272        int ret;
 273
 274        if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2)
 275                return true;
 276
 277        DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 278        return false;
 279}
 280
 281#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 282/** Mapping of command numbers to names, for debug output */
 283static const struct _sdvo_cmd_name {
 284        u8 cmd;
 285        const char *name;
 286} sdvo_cmd_names[] = {
 287    SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 288    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 289    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 290    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 291    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 292    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 293    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 294    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 295    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 296    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 297    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 298    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 299    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 300    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 301    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 302    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 303    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 304    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 305    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 306    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 307    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 308    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 309    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 310    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 311    SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 312    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 313    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 314    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 315    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 316    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 317    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 318    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 319    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 320    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 321    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 322    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 323    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 324    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 325    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 326    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 327    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 328    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 329    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 330
 331    /* Add the op code for SDVO enhancements */
 332    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 333    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 334    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 335    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 336    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 337    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 338    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 339    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 340    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 341    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 342    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 343    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 344    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 345    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 346    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 347    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 348    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 349    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 350    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 351    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 352    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 353    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 354    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 355    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 356    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 357    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 358    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 359    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 360    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 361    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 362    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 363    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 364    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 365    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 366    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 367    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 368    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 369    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 370    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 371    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 372    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 373    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 374    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 375    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 376
 377    /* HDMI op code */
 378    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 379    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 380    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 381    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 382    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 383    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 384    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 385    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 386    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 387    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 388    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 389    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 390    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 391    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 392    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 393    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 394    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 395    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 396    SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 397    SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 398};
 399
 400#define IS_SDVOB(reg)   (reg == SDVOB)
 401#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
 402
 403static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
 404                                   const void *args, int args_len)
 405{
 406        int i;
 407
 408        DRM_DEBUG_KMS("%s: W: %02X ",
 409                                SDVO_NAME(psb_intel_sdvo), cmd);
 410        for (i = 0; i < args_len; i++)
 411                DRM_DEBUG_KMS("%02X ", ((u8 *)args)[i]);
 412        for (; i < 8; i++)
 413                DRM_DEBUG_KMS("   ");
 414        for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 415                if (cmd == sdvo_cmd_names[i].cmd) {
 416                        DRM_DEBUG_KMS("(%s)", sdvo_cmd_names[i].name);
 417                        break;
 418                }
 419        }
 420        if (i == ARRAY_SIZE(sdvo_cmd_names))
 421                DRM_DEBUG_KMS("(%02X)", cmd);
 422        DRM_DEBUG_KMS("\n");
 423}
 424
 425static const char *cmd_status_names[] = {
 426        "Power on",
 427        "Success",
 428        "Not supported",
 429        "Invalid arg",
 430        "Pending",
 431        "Target not specified",
 432        "Scaling not supported"
 433};
 434
 435#define MAX_ARG_LEN 32
 436
 437static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
 438                                 const void *args, int args_len)
 439{
 440        u8 buf[MAX_ARG_LEN*2 + 2], status;
 441        struct i2c_msg msgs[MAX_ARG_LEN + 3];
 442        int i, ret;
 443
 444        if (args_len > MAX_ARG_LEN) {
 445                DRM_ERROR("Need to increase arg length\n");
 446                return false;
 447        }
 448
 449        psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len);
 450
 451        for (i = 0; i < args_len; i++) {
 452                msgs[i].addr = psb_intel_sdvo->slave_addr;
 453                msgs[i].flags = 0;
 454                msgs[i].len = 2;
 455                msgs[i].buf = buf + 2 *i;
 456                buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 457                buf[2*i + 1] = ((u8*)args)[i];
 458        }
 459        msgs[i].addr = psb_intel_sdvo->slave_addr;
 460        msgs[i].flags = 0;
 461        msgs[i].len = 2;
 462        msgs[i].buf = buf + 2*i;
 463        buf[2*i + 0] = SDVO_I2C_OPCODE;
 464        buf[2*i + 1] = cmd;
 465
 466        /* the following two are to read the response */
 467        status = SDVO_I2C_CMD_STATUS;
 468        msgs[i+1].addr = psb_intel_sdvo->slave_addr;
 469        msgs[i+1].flags = 0;
 470        msgs[i+1].len = 1;
 471        msgs[i+1].buf = &status;
 472
 473        msgs[i+2].addr = psb_intel_sdvo->slave_addr;
 474        msgs[i+2].flags = I2C_M_RD;
 475        msgs[i+2].len = 1;
 476        msgs[i+2].buf = &status;
 477
 478        ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3);
 479        if (ret < 0) {
 480                DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 481                return false;
 482        }
 483        if (ret != i+3) {
 484                /* failure in I2C transfer */
 485                DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 486                return false;
 487        }
 488
 489        return true;
 490}
 491
 492static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo,
 493                                     void *response, int response_len)
 494{
 495        u8 retry = 5;
 496        u8 status;
 497        int i;
 498
 499        DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(psb_intel_sdvo));
 500
 501        /*
 502         * The documentation states that all commands will be
 503         * processed within 15µs, and that we need only poll
 504         * the status byte a maximum of 3 times in order for the
 505         * command to be complete.
 506         *
 507         * Check 5 times in case the hardware failed to read the docs.
 508         */
 509        if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
 510                                  SDVO_I2C_CMD_STATUS,
 511                                  &status))
 512                goto log_fail;
 513
 514        while ((status == SDVO_CMD_STATUS_PENDING ||
 515                status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && retry--) {
 516                udelay(15);
 517                if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
 518                                          SDVO_I2C_CMD_STATUS,
 519                                          &status))
 520                        goto log_fail;
 521        }
 522
 523        if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 524                DRM_DEBUG_KMS("(%s)", cmd_status_names[status]);
 525        else
 526                DRM_DEBUG_KMS("(??? %d)", status);
 527
 528        if (status != SDVO_CMD_STATUS_SUCCESS)
 529                goto log_fail;
 530
 531        /* Read the command response */
 532        for (i = 0; i < response_len; i++) {
 533                if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
 534                                          SDVO_I2C_RETURN_0 + i,
 535                                          &((u8 *)response)[i]))
 536                        goto log_fail;
 537                DRM_DEBUG_KMS(" %02X", ((u8 *)response)[i]);
 538        }
 539        DRM_DEBUG_KMS("\n");
 540        return true;
 541
 542log_fail:
 543        DRM_DEBUG_KMS("... failed\n");
 544        return false;
 545}
 546
 547static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 548{
 549        if (mode->clock >= 100000)
 550                return 1;
 551        else if (mode->clock >= 50000)
 552                return 2;
 553        else
 554                return 4;
 555}
 556
 557static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo,
 558                                              u8 ddc_bus)
 559{
 560        /* This must be the immediately preceding write before the i2c xfer */
 561        return psb_intel_sdvo_write_cmd(psb_intel_sdvo,
 562                                    SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 563                                    &ddc_bus, 1);
 564}
 565
 566static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len)
 567{
 568        if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len))
 569                return false;
 570
 571        return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0);
 572}
 573
 574static bool
 575psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len)
 576{
 577        if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0))
 578                return false;
 579
 580        return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len);
 581}
 582
 583static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo)
 584{
 585        struct psb_intel_sdvo_set_target_input_args targets = {0};
 586        return psb_intel_sdvo_set_value(psb_intel_sdvo,
 587                                    SDVO_CMD_SET_TARGET_INPUT,
 588                                    &targets, sizeof(targets));
 589}
 590
 591/*
 592 * Return whether each input is trained.
 593 *
 594 * This function is making an assumption about the layout of the response,
 595 * which should be checked against the docs.
 596 */
 597static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2)
 598{
 599        struct psb_intel_sdvo_get_trained_inputs_response response;
 600
 601        BUILD_BUG_ON(sizeof(response) != 1);
 602        if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 603                                  &response, sizeof(response)))
 604                return false;
 605
 606        *input_1 = response.input0_trained;
 607        *input_2 = response.input1_trained;
 608        return true;
 609}
 610
 611static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo,
 612                                          u16 outputs)
 613{
 614        return psb_intel_sdvo_set_value(psb_intel_sdvo,
 615                                    SDVO_CMD_SET_ACTIVE_OUTPUTS,
 616                                    &outputs, sizeof(outputs));
 617}
 618
 619static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo,
 620                                               int mode)
 621{
 622        u8 state = SDVO_ENCODER_STATE_ON;
 623
 624        switch (mode) {
 625        case DRM_MODE_DPMS_ON:
 626                state = SDVO_ENCODER_STATE_ON;
 627                break;
 628        case DRM_MODE_DPMS_STANDBY:
 629                state = SDVO_ENCODER_STATE_STANDBY;
 630                break;
 631        case DRM_MODE_DPMS_SUSPEND:
 632                state = SDVO_ENCODER_STATE_SUSPEND;
 633                break;
 634        case DRM_MODE_DPMS_OFF:
 635                state = SDVO_ENCODER_STATE_OFF;
 636                break;
 637        }
 638
 639        return psb_intel_sdvo_set_value(psb_intel_sdvo,
 640                                    SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 641}
 642
 643static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo,
 644                                                   int *clock_min,
 645                                                   int *clock_max)
 646{
 647        struct psb_intel_sdvo_pixel_clock_range clocks;
 648
 649        BUILD_BUG_ON(sizeof(clocks) != 4);
 650        if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
 651                                  SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 652                                  &clocks, sizeof(clocks)))
 653                return false;
 654
 655        /* Convert the values from units of 10 kHz to kHz. */
 656        *clock_min = clocks.min * 10;
 657        *clock_max = clocks.max * 10;
 658        return true;
 659}
 660
 661static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo,
 662                                         u16 outputs)
 663{
 664        return psb_intel_sdvo_set_value(psb_intel_sdvo,
 665                                    SDVO_CMD_SET_TARGET_OUTPUT,
 666                                    &outputs, sizeof(outputs));
 667}
 668
 669static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
 670                                  struct psb_intel_sdvo_dtd *dtd)
 671{
 672        return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 673                psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 674}
 675
 676static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 677                                         struct psb_intel_sdvo_dtd *dtd)
 678{
 679        return psb_intel_sdvo_set_timing(psb_intel_sdvo,
 680                                     SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 681}
 682
 683static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 684                                         struct psb_intel_sdvo_dtd *dtd)
 685{
 686        return psb_intel_sdvo_set_timing(psb_intel_sdvo,
 687                                     SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 688}
 689
 690static bool
 691psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 692                                         uint16_t clock,
 693                                         uint16_t width,
 694                                         uint16_t height)
 695{
 696        struct psb_intel_sdvo_preferred_input_timing_args args;
 697
 698        memset(&args, 0, sizeof(args));
 699        args.clock = clock;
 700        args.width = width;
 701        args.height = height;
 702        args.interlace = 0;
 703
 704        if (psb_intel_sdvo->is_lvds &&
 705           (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 706            psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 707                args.scaled = 1;
 708
 709        return psb_intel_sdvo_set_value(psb_intel_sdvo,
 710                                    SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 711                                    &args, sizeof(args));
 712}
 713
 714static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 715                                                  struct psb_intel_sdvo_dtd *dtd)
 716{
 717        BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 718        BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 719        return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 720                                    &dtd->part1, sizeof(dtd->part1)) &&
 721                psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 722                                     &dtd->part2, sizeof(dtd->part2));
 723}
 724
 725static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val)
 726{
 727        return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 728}
 729
 730static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd,
 731                                         const struct drm_display_mode *mode)
 732{
 733        uint16_t width, height;
 734        uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 735        uint16_t h_sync_offset, v_sync_offset;
 736
 737        width = mode->crtc_hdisplay;
 738        height = mode->crtc_vdisplay;
 739
 740        /* do some mode translations */
 741        h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
 742        h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
 743
 744        v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
 745        v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
 746
 747        h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
 748        v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
 749
 750        dtd->part1.clock = mode->clock / 10;
 751        dtd->part1.h_active = width & 0xff;
 752        dtd->part1.h_blank = h_blank_len & 0xff;
 753        dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 754                ((h_blank_len >> 8) & 0xf);
 755        dtd->part1.v_active = height & 0xff;
 756        dtd->part1.v_blank = v_blank_len & 0xff;
 757        dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 758                ((v_blank_len >> 8) & 0xf);
 759
 760        dtd->part2.h_sync_off = h_sync_offset & 0xff;
 761        dtd->part2.h_sync_width = h_sync_len & 0xff;
 762        dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 763                (v_sync_len & 0xf);
 764        dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 765                ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 766                ((v_sync_len & 0x30) >> 4);
 767
 768        dtd->part2.dtd_flags = 0x18;
 769        if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 770                dtd->part2.dtd_flags |= 0x2;
 771        if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 772                dtd->part2.dtd_flags |= 0x4;
 773
 774        dtd->part2.sdvo_flags = 0;
 775        dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 776        dtd->part2.reserved = 0;
 777}
 778
 779static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 780                                         const struct psb_intel_sdvo_dtd *dtd)
 781{
 782        mode->hdisplay = dtd->part1.h_active;
 783        mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 784        mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 785        mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 786        mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 787        mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 788        mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 789        mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 790
 791        mode->vdisplay = dtd->part1.v_active;
 792        mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 793        mode->vsync_start = mode->vdisplay;
 794        mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 795        mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 796        mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 797        mode->vsync_end = mode->vsync_start +
 798                (dtd->part2.v_sync_off_width & 0xf);
 799        mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 800        mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 801        mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 802
 803        mode->clock = dtd->part1.clock * 10;
 804
 805        mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 806        if (dtd->part2.dtd_flags & 0x2)
 807                mode->flags |= DRM_MODE_FLAG_PHSYNC;
 808        if (dtd->part2.dtd_flags & 0x4)
 809                mode->flags |= DRM_MODE_FLAG_PVSYNC;
 810}
 811
 812static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo)
 813{
 814        struct psb_intel_sdvo_encode encode;
 815
 816        BUILD_BUG_ON(sizeof(encode) != 2);
 817        return psb_intel_sdvo_get_value(psb_intel_sdvo,
 818                                  SDVO_CMD_GET_SUPP_ENCODE,
 819                                  &encode, sizeof(encode));
 820}
 821
 822static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo,
 823                                  uint8_t mode)
 824{
 825        return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 826}
 827
 828static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo,
 829                                       uint8_t mode)
 830{
 831        return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 832}
 833
 834#if 0
 835static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo)
 836{
 837        int i, j;
 838        uint8_t set_buf_index[2];
 839        uint8_t av_split;
 840        uint8_t buf_size;
 841        uint8_t buf[48];
 842        uint8_t *pos;
 843
 844        psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 845
 846        for (i = 0; i <= av_split; i++) {
 847                set_buf_index[0] = i; set_buf_index[1] = 0;
 848                psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 849                                     set_buf_index, 2);
 850                psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 851                psb_intel_sdvo_read_response(encoder, &buf_size, 1);
 852
 853                pos = buf;
 854                for (j = 0; j <= buf_size; j += 8) {
 855                        psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 856                                             NULL, 0);
 857                        psb_intel_sdvo_read_response(encoder, pos, 8);
 858                        pos += 8;
 859                }
 860        }
 861}
 862#endif
 863
 864static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo)
 865{
 866        DRM_INFO("HDMI is not supported yet");
 867
 868        return false;
 869}
 870
 871static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo)
 872{
 873        struct psb_intel_sdvo_tv_format format;
 874        uint32_t format_map;
 875
 876        format_map = 1 << psb_intel_sdvo->tv_format_index;
 877        memset(&format, 0, sizeof(format));
 878        memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 879
 880        BUILD_BUG_ON(sizeof(format) != 6);
 881        return psb_intel_sdvo_set_value(psb_intel_sdvo,
 882                                    SDVO_CMD_SET_TV_FORMAT,
 883                                    &format, sizeof(format));
 884}
 885
 886static bool
 887psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo,
 888                                        const struct drm_display_mode *mode)
 889{
 890        struct psb_intel_sdvo_dtd output_dtd;
 891
 892        if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
 893                                          psb_intel_sdvo->attached_output))
 894                return false;
 895
 896        psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
 897        if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd))
 898                return false;
 899
 900        return true;
 901}
 902
 903static bool
 904psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
 905                                        const struct drm_display_mode *mode,
 906                                        struct drm_display_mode *adjusted_mode)
 907{
 908        /* Reset the input timing to the screen. Assume always input 0. */
 909        if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
 910                return false;
 911
 912        if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo,
 913                                                      mode->clock / 10,
 914                                                      mode->hdisplay,
 915                                                      mode->vdisplay))
 916                return false;
 917
 918        if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo,
 919                                                   &psb_intel_sdvo->input_dtd))
 920                return false;
 921
 922        psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd);
 923
 924        drm_mode_set_crtcinfo(adjusted_mode, 0);
 925        return true;
 926}
 927
 928static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder,
 929                                  const struct drm_display_mode *mode,
 930                                  struct drm_display_mode *adjusted_mode)
 931{
 932        struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
 933
 934        /* We need to construct preferred input timings based on our
 935         * output timings.  To do that, we have to set the output
 936         * timings, even though this isn't really the right place in
 937         * the sequence to do it. Oh well.
 938         */
 939        if (psb_intel_sdvo->is_tv) {
 940                if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode))
 941                        return false;
 942
 943                (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
 944                                                             mode,
 945                                                             adjusted_mode);
 946        } else if (psb_intel_sdvo->is_lvds) {
 947                if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo,
 948                                                             psb_intel_sdvo->sdvo_lvds_fixed_mode))
 949                        return false;
 950
 951                (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
 952                                                             mode,
 953                                                             adjusted_mode);
 954        }
 955
 956        /* Make the CRTC code factor in the SDVO pixel multiplier.  The
 957         * SDVO device will factor out the multiplier during mode_set.
 958         */
 959        psb_intel_sdvo->pixel_multiplier =
 960                psb_intel_sdvo_get_pixel_multiplier(adjusted_mode);
 961        adjusted_mode->clock *= psb_intel_sdvo->pixel_multiplier;
 962
 963        return true;
 964}
 965
 966static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
 967                                struct drm_display_mode *mode,
 968                                struct drm_display_mode *adjusted_mode)
 969{
 970        struct drm_device *dev = encoder->dev;
 971        struct drm_crtc *crtc = encoder->crtc;
 972        struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
 973        struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
 974        u32 sdvox;
 975        struct psb_intel_sdvo_in_out_map in_out;
 976        struct psb_intel_sdvo_dtd input_dtd;
 977        int rate;
 978        int need_aux = IS_MRST(dev) ? 1 : 0;
 979
 980        if (!mode)
 981                return;
 982
 983        /* First, set the input mapping for the first input to our controlled
 984         * output. This is only correct if we're a single-input device, in
 985         * which case the first input is the output from the appropriate SDVO
 986         * channel on the motherboard.  In a two-input device, the first input
 987         * will be SDVOB and the second SDVOC.
 988         */
 989        in_out.in0 = psb_intel_sdvo->attached_output;
 990        in_out.in1 = 0;
 991
 992        psb_intel_sdvo_set_value(psb_intel_sdvo,
 993                             SDVO_CMD_SET_IN_OUT_MAP,
 994                             &in_out, sizeof(in_out));
 995
 996        /* Set the output timings to the screen */
 997        if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
 998                                          psb_intel_sdvo->attached_output))
 999                return;
1000
1001        /* We have tried to get input timing in mode_fixup, and filled into
1002         * adjusted_mode.
1003         */
1004        if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) {
1005                input_dtd = psb_intel_sdvo->input_dtd;
1006        } else {
1007                /* Set the output timing to the screen */
1008                if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1009                                                  psb_intel_sdvo->attached_output))
1010                        return;
1011
1012                psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1013                (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd);
1014        }
1015
1016        /* Set the input timing to the screen. Assume always input 0. */
1017        if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
1018                return;
1019
1020        if (psb_intel_sdvo->has_hdmi_monitor) {
1021                psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI);
1022                psb_intel_sdvo_set_colorimetry(psb_intel_sdvo,
1023                                           SDVO_COLORIMETRY_RGB256);
1024                psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo);
1025        } else
1026                psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI);
1027
1028        if (psb_intel_sdvo->is_tv &&
1029            !psb_intel_sdvo_set_tv_format(psb_intel_sdvo))
1030                return;
1031
1032        (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd);
1033
1034        switch (psb_intel_sdvo->pixel_multiplier) {
1035        default:
1036        case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1037        case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1038        case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1039        }
1040        if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate))
1041                return;
1042
1043        /* Set the SDVO control regs. */
1044        if (need_aux)
1045                sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1046        else
1047                sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
1048
1049        switch (psb_intel_sdvo->sdvo_reg) {
1050        case SDVOB:
1051                sdvox &= SDVOB_PRESERVE_MASK;
1052                break;
1053        case SDVOC:
1054                sdvox &= SDVOC_PRESERVE_MASK;
1055                break;
1056        }
1057        sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1058
1059        if (gma_crtc->pipe == 1)
1060                sdvox |= SDVO_PIPE_B_SELECT;
1061        if (psb_intel_sdvo->has_hdmi_audio)
1062                sdvox |= SDVO_AUDIO_ENABLE;
1063
1064        /* FIXME: Check if this is needed for PSB
1065        sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1066        */
1067
1068        if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1069                sdvox |= SDVO_STALL_SELECT;
1070        psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox);
1071}
1072
1073static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1074{
1075        struct drm_device *dev = encoder->dev;
1076        struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1077        u32 temp;
1078        int i;
1079        int need_aux = IS_MRST(dev) ? 1 : 0;
1080
1081        switch (mode) {
1082        case DRM_MODE_DPMS_ON:
1083                DRM_DEBUG("DPMS_ON");
1084                break;
1085        case DRM_MODE_DPMS_OFF:
1086                DRM_DEBUG("DPMS_OFF");
1087                break;
1088        default:
1089                DRM_DEBUG("DPMS: %d", mode);
1090        }
1091
1092        if (mode != DRM_MODE_DPMS_ON) {
1093                psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0);
1094                if (0)
1095                        psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1096
1097                if (mode == DRM_MODE_DPMS_OFF) {
1098                        if (need_aux)
1099                                temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1100                        else
1101                                temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1102
1103                        if ((temp & SDVO_ENABLE) != 0) {
1104                                psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE);
1105                        }
1106                }
1107        } else {
1108                bool input1, input2;
1109                u8 status;
1110
1111                if (need_aux)
1112                        temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1113                else
1114                        temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1115
1116                if ((temp & SDVO_ENABLE) == 0)
1117                        psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
1118
1119                for (i = 0; i < 2; i++)
1120                        gma_wait_for_vblank(dev);
1121
1122                status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
1123                /* Warn if the device reported failure to sync.
1124                 * A lot of SDVO devices fail to notify of sync, but it's
1125                 * a given it the status is a success, we succeeded.
1126                 */
1127                if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1128                        DRM_DEBUG_KMS("First %s output reported failure to "
1129                                        "sync\n", SDVO_NAME(psb_intel_sdvo));
1130                }
1131
1132                if (0)
1133                        psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1134                psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output);
1135        }
1136        return;
1137}
1138
1139static enum drm_mode_status psb_intel_sdvo_mode_valid(struct drm_connector *connector,
1140                                 struct drm_display_mode *mode)
1141{
1142        struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1143
1144        if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1145                return MODE_NO_DBLESCAN;
1146
1147        if (psb_intel_sdvo->pixel_clock_min > mode->clock)
1148                return MODE_CLOCK_LOW;
1149
1150        if (psb_intel_sdvo->pixel_clock_max < mode->clock)
1151                return MODE_CLOCK_HIGH;
1152
1153        if (psb_intel_sdvo->is_lvds) {
1154                if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1155                        return MODE_PANEL;
1156
1157                if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1158                        return MODE_PANEL;
1159        }
1160
1161        return MODE_OK;
1162}
1163
1164static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps)
1165{
1166        BUILD_BUG_ON(sizeof(*caps) != 8);
1167        if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
1168                                  SDVO_CMD_GET_DEVICE_CAPS,
1169                                  caps, sizeof(*caps)))
1170                return false;
1171
1172        DRM_DEBUG_KMS("SDVO capabilities:\n"
1173                      "  vendor_id: %d\n"
1174                      "  device_id: %d\n"
1175                      "  device_rev_id: %d\n"
1176                      "  sdvo_version_major: %d\n"
1177                      "  sdvo_version_minor: %d\n"
1178                      "  sdvo_inputs_mask: %d\n"
1179                      "  smooth_scaling: %d\n"
1180                      "  sharp_scaling: %d\n"
1181                      "  up_scaling: %d\n"
1182                      "  down_scaling: %d\n"
1183                      "  stall_support: %d\n"
1184                      "  output_flags: %d\n",
1185                      caps->vendor_id,
1186                      caps->device_id,
1187                      caps->device_rev_id,
1188                      caps->sdvo_version_major,
1189                      caps->sdvo_version_minor,
1190                      caps->sdvo_inputs_mask,
1191                      caps->smooth_scaling,
1192                      caps->sharp_scaling,
1193                      caps->up_scaling,
1194                      caps->down_scaling,
1195                      caps->stall_support,
1196                      caps->output_flags);
1197
1198        return true;
1199}
1200
1201static bool
1202psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo)
1203{
1204        /* Is there more than one type of output? */
1205        int caps = psb_intel_sdvo->caps.output_flags & 0xf;
1206        return caps & -caps;
1207}
1208
1209static struct edid *
1210psb_intel_sdvo_get_edid(struct drm_connector *connector)
1211{
1212        struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector);
1213        return drm_get_edid(connector, &sdvo->ddc);
1214}
1215
1216/* Mac mini hack -- use the same DDC as the analog connector */
1217static struct edid *
1218psb_intel_sdvo_get_analog_edid(struct drm_connector *connector)
1219{
1220        struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1221
1222        return drm_get_edid(connector,
1223                            &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1224}
1225
1226static enum drm_connector_status
1227psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1228{
1229        struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1230        enum drm_connector_status status;
1231        struct edid *edid;
1232
1233        edid = psb_intel_sdvo_get_edid(connector);
1234
1235        if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) {
1236                u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus;
1237
1238                /*
1239                 * Don't use the 1 as the argument of DDC bus switch to get
1240                 * the EDID. It is used for SDVO SPD ROM.
1241                 */
1242                for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1243                        psb_intel_sdvo->ddc_bus = ddc;
1244                        edid = psb_intel_sdvo_get_edid(connector);
1245                        if (edid)
1246                                break;
1247                }
1248                /*
1249                 * If we found the EDID on the other bus,
1250                 * assume that is the correct DDC bus.
1251                 */
1252                if (edid == NULL)
1253                        psb_intel_sdvo->ddc_bus = saved_ddc;
1254        }
1255
1256        /*
1257         * When there is no edid and no monitor is connected with VGA
1258         * port, try to use the CRT ddc to read the EDID for DVI-connector.
1259         */
1260        if (edid == NULL)
1261                edid = psb_intel_sdvo_get_analog_edid(connector);
1262
1263        status = connector_status_unknown;
1264        if (edid != NULL) {
1265                /* DDC bus is shared, match EDID to connector type */
1266                if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1267                        status = connector_status_connected;
1268                        if (psb_intel_sdvo->is_hdmi) {
1269                                psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1270                                psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1271                        }
1272                } else
1273                        status = connector_status_disconnected;
1274                kfree(edid);
1275        }
1276
1277        if (status == connector_status_connected) {
1278                struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1279                if (psb_intel_sdvo_connector->force_audio)
1280                        psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0;
1281        }
1282
1283        return status;
1284}
1285
1286static enum drm_connector_status
1287psb_intel_sdvo_detect(struct drm_connector *connector, bool force)
1288{
1289        uint16_t response;
1290        struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1291        struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1292        enum drm_connector_status ret;
1293
1294        if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1295                                  SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1296                return connector_status_unknown;
1297
1298        /* add 30ms delay when the output type might be TV */
1299        if (psb_intel_sdvo->caps.output_flags &
1300            (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1301                mdelay(30);
1302
1303        if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2))
1304                return connector_status_unknown;
1305
1306        DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1307                      response & 0xff, response >> 8,
1308                      psb_intel_sdvo_connector->output_flag);
1309
1310        if (response == 0)
1311                return connector_status_disconnected;
1312
1313        psb_intel_sdvo->attached_output = response;
1314
1315        psb_intel_sdvo->has_hdmi_monitor = false;
1316        psb_intel_sdvo->has_hdmi_audio = false;
1317
1318        if ((psb_intel_sdvo_connector->output_flag & response) == 0)
1319                ret = connector_status_disconnected;
1320        else if (IS_TMDS(psb_intel_sdvo_connector))
1321                ret = psb_intel_sdvo_hdmi_sink_detect(connector);
1322        else {
1323                struct edid *edid;
1324
1325                /* if we have an edid check it matches the connection */
1326                edid = psb_intel_sdvo_get_edid(connector);
1327                if (edid == NULL)
1328                        edid = psb_intel_sdvo_get_analog_edid(connector);
1329                if (edid != NULL) {
1330                        if (edid->input & DRM_EDID_INPUT_DIGITAL)
1331                                ret = connector_status_disconnected;
1332                        else
1333                                ret = connector_status_connected;
1334                        kfree(edid);
1335                } else
1336                        ret = connector_status_connected;
1337        }
1338
1339        /* May update encoder flag for like clock for SDVO TV, etc.*/
1340        if (ret == connector_status_connected) {
1341                psb_intel_sdvo->is_tv = false;
1342                psb_intel_sdvo->is_lvds = false;
1343                psb_intel_sdvo->base.needs_tv_clock = false;
1344
1345                if (response & SDVO_TV_MASK) {
1346                        psb_intel_sdvo->is_tv = true;
1347                        psb_intel_sdvo->base.needs_tv_clock = true;
1348                }
1349                if (response & SDVO_LVDS_MASK)
1350                        psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1351        }
1352
1353        return ret;
1354}
1355
1356static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1357{
1358        struct edid *edid;
1359
1360        /* set the bus switch and get the modes */
1361        edid = psb_intel_sdvo_get_edid(connector);
1362
1363        /*
1364         * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1365         * link between analog and digital outputs. So, if the regular SDVO
1366         * DDC fails, check to see if the analog output is disconnected, in
1367         * which case we'll look there for the digital DDC data.
1368         */
1369        if (edid == NULL)
1370                edid = psb_intel_sdvo_get_analog_edid(connector);
1371
1372        if (edid != NULL) {
1373                struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1374                bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1375                bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector);
1376
1377                if (connector_is_digital == monitor_is_digital) {
1378                        drm_connector_update_edid_property(connector, edid);
1379                        drm_add_edid_modes(connector, edid);
1380                }
1381
1382                kfree(edid);
1383        }
1384}
1385
1386/*
1387 * Set of SDVO TV modes.
1388 * Note!  This is in reply order (see loop in get_tv_modes).
1389 * XXX: all 60Hz refresh?
1390 */
1391static const struct drm_display_mode sdvo_tv_modes[] = {
1392        { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1393                   416, 0, 200, 201, 232, 233, 0,
1394                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1395        { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1396                   416, 0, 240, 241, 272, 273, 0,
1397                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1398        { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1399                   496, 0, 300, 301, 332, 333, 0,
1400                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1401        { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1402                   736, 0, 350, 351, 382, 383, 0,
1403                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1404        { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1405                   736, 0, 400, 401, 432, 433, 0,
1406                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1407        { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1408                   736, 0, 480, 481, 512, 513, 0,
1409                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1410        { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1411                   800, 0, 480, 481, 512, 513, 0,
1412                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1413        { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1414                   800, 0, 576, 577, 608, 609, 0,
1415                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1416        { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1417                   816, 0, 350, 351, 382, 383, 0,
1418                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1419        { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1420                   816, 0, 400, 401, 432, 433, 0,
1421                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1422        { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1423                   816, 0, 480, 481, 512, 513, 0,
1424                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1425        { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1426                   816, 0, 540, 541, 572, 573, 0,
1427                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1428        { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1429                   816, 0, 576, 577, 608, 609, 0,
1430                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1431        { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1432                   864, 0, 576, 577, 608, 609, 0,
1433                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1434        { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1435                   896, 0, 600, 601, 632, 633, 0,
1436                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1437        { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1438                   928, 0, 624, 625, 656, 657, 0,
1439                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1440        { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1441                   1016, 0, 766, 767, 798, 799, 0,
1442                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1443        { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1444                   1120, 0, 768, 769, 800, 801, 0,
1445                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1446        { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1447                   1376, 0, 1024, 1025, 1056, 1057, 0,
1448                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1449};
1450
1451static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector)
1452{
1453        struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1454        struct psb_intel_sdvo_sdtv_resolution_request tv_res;
1455        uint32_t reply = 0, format_map = 0;
1456        int i;
1457
1458        /* Read the list of supported input resolutions for the selected TV
1459         * format.
1460         */
1461        format_map = 1 << psb_intel_sdvo->tv_format_index;
1462        memcpy(&tv_res, &format_map,
1463               min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request)));
1464
1465        if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output))
1466                return;
1467
1468        BUILD_BUG_ON(sizeof(tv_res) != 3);
1469        if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1470                                  SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1471                                  &tv_res, sizeof(tv_res)))
1472                return;
1473        if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3))
1474                return;
1475
1476        for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1477                if (reply & (1 << i)) {
1478                        struct drm_display_mode *nmode;
1479                        nmode = drm_mode_duplicate(connector->dev,
1480                                                   &sdvo_tv_modes[i]);
1481                        if (nmode)
1482                                drm_mode_probed_add(connector, nmode);
1483                }
1484}
1485
1486static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1487{
1488        struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1489        struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1490        struct drm_display_mode *newmode;
1491
1492        /*
1493         * Attempt to get the mode list from DDC.
1494         * Assume that the preferred modes are
1495         * arranged in priority order.
1496         */
1497        psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c);
1498        if (list_empty(&connector->probed_modes) == false)
1499                goto end;
1500
1501        /* Fetch modes from VBT */
1502        if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1503                newmode = drm_mode_duplicate(connector->dev,
1504                                             dev_priv->sdvo_lvds_vbt_mode);
1505                if (newmode != NULL) {
1506                        /* Guarantee the mode is preferred */
1507                        newmode->type = (DRM_MODE_TYPE_PREFERRED |
1508                                         DRM_MODE_TYPE_DRIVER);
1509                        drm_mode_probed_add(connector, newmode);
1510                }
1511        }
1512
1513end:
1514        list_for_each_entry(newmode, &connector->probed_modes, head) {
1515                if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1516                        psb_intel_sdvo->sdvo_lvds_fixed_mode =
1517                                drm_mode_duplicate(connector->dev, newmode);
1518
1519                        drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode,
1520                                              0);
1521
1522                        psb_intel_sdvo->is_lvds = true;
1523                        break;
1524                }
1525        }
1526
1527}
1528
1529static int psb_intel_sdvo_get_modes(struct drm_connector *connector)
1530{
1531        struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1532
1533        if (IS_TV(psb_intel_sdvo_connector))
1534                psb_intel_sdvo_get_tv_modes(connector);
1535        else if (IS_LVDS(psb_intel_sdvo_connector))
1536                psb_intel_sdvo_get_lvds_modes(connector);
1537        else
1538                psb_intel_sdvo_get_ddc_modes(connector);
1539
1540        return !list_empty(&connector->probed_modes);
1541}
1542
1543static void psb_intel_sdvo_destroy(struct drm_connector *connector)
1544{
1545        drm_connector_unregister(connector);
1546        drm_connector_cleanup(connector);
1547        kfree(connector);
1548}
1549
1550static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1551{
1552        struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1553        struct edid *edid;
1554        bool has_audio = false;
1555
1556        if (!psb_intel_sdvo->is_hdmi)
1557                return false;
1558
1559        edid = psb_intel_sdvo_get_edid(connector);
1560        if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1561                has_audio = drm_detect_monitor_audio(edid);
1562
1563        return has_audio;
1564}
1565
1566static int
1567psb_intel_sdvo_set_property(struct drm_connector *connector,
1568                        struct drm_property *property,
1569                        uint64_t val)
1570{
1571        struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1572        struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1573        struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1574        uint16_t temp_value;
1575        uint8_t cmd;
1576        int ret;
1577
1578        ret = drm_object_property_set_value(&connector->base, property, val);
1579        if (ret)
1580                return ret;
1581
1582        if (property == dev_priv->force_audio_property) {
1583                int i = val;
1584                bool has_audio;
1585
1586                if (i == psb_intel_sdvo_connector->force_audio)
1587                        return 0;
1588
1589                psb_intel_sdvo_connector->force_audio = i;
1590
1591                if (i == 0)
1592                        has_audio = psb_intel_sdvo_detect_hdmi_audio(connector);
1593                else
1594                        has_audio = i > 0;
1595
1596                if (has_audio == psb_intel_sdvo->has_hdmi_audio)
1597                        return 0;
1598
1599                psb_intel_sdvo->has_hdmi_audio = has_audio;
1600                goto done;
1601        }
1602
1603        if (property == dev_priv->broadcast_rgb_property) {
1604                if (val == !!psb_intel_sdvo->color_range)
1605                        return 0;
1606
1607                psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1608                goto done;
1609        }
1610
1611#define CHECK_PROPERTY(name, NAME) \
1612        if (psb_intel_sdvo_connector->name == property) { \
1613                if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \
1614                if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1615                cmd = SDVO_CMD_SET_##NAME; \
1616                psb_intel_sdvo_connector->cur_##name = temp_value; \
1617                goto set_value; \
1618        }
1619
1620        if (property == psb_intel_sdvo_connector->tv_format) {
1621                if (val >= ARRAY_SIZE(tv_format_names))
1622                        return -EINVAL;
1623
1624                if (psb_intel_sdvo->tv_format_index ==
1625                    psb_intel_sdvo_connector->tv_format_supported[val])
1626                        return 0;
1627
1628                psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val];
1629                goto done;
1630        } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) {
1631                temp_value = val;
1632                if (psb_intel_sdvo_connector->left == property) {
1633                        drm_object_property_set_value(&connector->base,
1634                                                         psb_intel_sdvo_connector->right, val);
1635                        if (psb_intel_sdvo_connector->left_margin == temp_value)
1636                                return 0;
1637
1638                        psb_intel_sdvo_connector->left_margin = temp_value;
1639                        psb_intel_sdvo_connector->right_margin = temp_value;
1640                        temp_value = psb_intel_sdvo_connector->max_hscan -
1641                                psb_intel_sdvo_connector->left_margin;
1642                        cmd = SDVO_CMD_SET_OVERSCAN_H;
1643                        goto set_value;
1644                } else if (psb_intel_sdvo_connector->right == property) {
1645                        drm_object_property_set_value(&connector->base,
1646                                                         psb_intel_sdvo_connector->left, val);
1647                        if (psb_intel_sdvo_connector->right_margin == temp_value)
1648                                return 0;
1649
1650                        psb_intel_sdvo_connector->left_margin = temp_value;
1651                        psb_intel_sdvo_connector->right_margin = temp_value;
1652                        temp_value = psb_intel_sdvo_connector->max_hscan -
1653                                psb_intel_sdvo_connector->left_margin;
1654                        cmd = SDVO_CMD_SET_OVERSCAN_H;
1655                        goto set_value;
1656                } else if (psb_intel_sdvo_connector->top == property) {
1657                        drm_object_property_set_value(&connector->base,
1658                                                         psb_intel_sdvo_connector->bottom, val);
1659                        if (psb_intel_sdvo_connector->top_margin == temp_value)
1660                                return 0;
1661
1662                        psb_intel_sdvo_connector->top_margin = temp_value;
1663                        psb_intel_sdvo_connector->bottom_margin = temp_value;
1664                        temp_value = psb_intel_sdvo_connector->max_vscan -
1665                                psb_intel_sdvo_connector->top_margin;
1666                        cmd = SDVO_CMD_SET_OVERSCAN_V;
1667                        goto set_value;
1668                } else if (psb_intel_sdvo_connector->bottom == property) {
1669                        drm_object_property_set_value(&connector->base,
1670                                                         psb_intel_sdvo_connector->top, val);
1671                        if (psb_intel_sdvo_connector->bottom_margin == temp_value)
1672                                return 0;
1673
1674                        psb_intel_sdvo_connector->top_margin = temp_value;
1675                        psb_intel_sdvo_connector->bottom_margin = temp_value;
1676                        temp_value = psb_intel_sdvo_connector->max_vscan -
1677                                psb_intel_sdvo_connector->top_margin;
1678                        cmd = SDVO_CMD_SET_OVERSCAN_V;
1679                        goto set_value;
1680                }
1681                CHECK_PROPERTY(hpos, HPOS)
1682                CHECK_PROPERTY(vpos, VPOS)
1683                CHECK_PROPERTY(saturation, SATURATION)
1684                CHECK_PROPERTY(contrast, CONTRAST)
1685                CHECK_PROPERTY(hue, HUE)
1686                CHECK_PROPERTY(brightness, BRIGHTNESS)
1687                CHECK_PROPERTY(sharpness, SHARPNESS)
1688                CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1689                CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1690                CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1691                CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1692                CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1693                CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1694        }
1695
1696        return -EINVAL; /* unknown property */
1697
1698set_value:
1699        if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2))
1700                return -EIO;
1701
1702
1703done:
1704        if (psb_intel_sdvo->base.base.crtc) {
1705                struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;
1706                drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1707                                         crtc->y, crtc->primary->fb);
1708        }
1709
1710        return 0;
1711#undef CHECK_PROPERTY
1712}
1713
1714static void psb_intel_sdvo_save(struct drm_connector *connector)
1715{
1716        struct drm_device *dev = connector->dev;
1717        struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
1718        struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base);
1719
1720        sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg);
1721}
1722
1723static void psb_intel_sdvo_restore(struct drm_connector *connector)
1724{
1725        struct drm_device *dev = connector->dev;
1726        struct drm_encoder *encoder = &gma_attached_encoder(connector)->base;
1727        struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder);
1728        struct drm_crtc *crtc = encoder->crtc;
1729
1730        REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO);
1731
1732        /* Force a full mode set on the crtc. We're supposed to have the
1733           mode_config lock already. */
1734        if (connector->status == connector_status_connected)
1735                drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,
1736                                         NULL);
1737}
1738
1739static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = {
1740        .dpms = psb_intel_sdvo_dpms,
1741        .mode_fixup = psb_intel_sdvo_mode_fixup,
1742        .prepare = gma_encoder_prepare,
1743        .mode_set = psb_intel_sdvo_mode_set,
1744        .commit = gma_encoder_commit,
1745};
1746
1747static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = {
1748        .dpms = drm_helper_connector_dpms,
1749        .detect = psb_intel_sdvo_detect,
1750        .fill_modes = drm_helper_probe_single_connector_modes,
1751        .set_property = psb_intel_sdvo_set_property,
1752        .destroy = psb_intel_sdvo_destroy,
1753};
1754
1755static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = {
1756        .get_modes = psb_intel_sdvo_get_modes,
1757        .mode_valid = psb_intel_sdvo_mode_valid,
1758        .best_encoder = gma_best_encoder,
1759};
1760
1761static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1762{
1763        struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1764
1765        if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1766                drm_mode_destroy(encoder->dev,
1767                                 psb_intel_sdvo->sdvo_lvds_fixed_mode);
1768
1769        i2c_del_adapter(&psb_intel_sdvo->ddc);
1770        gma_encoder_destroy(encoder);
1771}
1772
1773static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = {
1774        .destroy = psb_intel_sdvo_enc_destroy,
1775};
1776
1777static void
1778psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo)
1779{
1780        /* FIXME: At the moment, ddc_bus = 2 is the only thing that works.
1781         * We need to figure out if this is true for all available poulsbo
1782         * hardware, or if we need to fiddle with the guessing code above.
1783         * The problem might go away if we can parse sdvo mappings from bios */
1784        sdvo->ddc_bus = 2;
1785
1786#if 0
1787        uint16_t mask = 0;
1788        unsigned int num_bits;
1789
1790        /* Make a mask of outputs less than or equal to our own priority in the
1791         * list.
1792         */
1793        switch (sdvo->controlled_output) {
1794        case SDVO_OUTPUT_LVDS1:
1795                mask |= SDVO_OUTPUT_LVDS1;
1796        case SDVO_OUTPUT_LVDS0:
1797                mask |= SDVO_OUTPUT_LVDS0;
1798        case SDVO_OUTPUT_TMDS1:
1799                mask |= SDVO_OUTPUT_TMDS1;
1800        case SDVO_OUTPUT_TMDS0:
1801                mask |= SDVO_OUTPUT_TMDS0;
1802        case SDVO_OUTPUT_RGB1:
1803                mask |= SDVO_OUTPUT_RGB1;
1804        case SDVO_OUTPUT_RGB0:
1805                mask |= SDVO_OUTPUT_RGB0;
1806                break;
1807        }
1808
1809        /* Count bits to find what number we are in the priority list. */
1810        mask &= sdvo->caps.output_flags;
1811        num_bits = hweight16(mask);
1812        /* If more than 3 outputs, default to DDC bus 3 for now. */
1813        if (num_bits > 3)
1814                num_bits = 3;
1815
1816        /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1817        sdvo->ddc_bus = 1 << num_bits;
1818#endif
1819}
1820
1821/*
1822 * Choose the appropriate DDC bus for control bus switch command for this
1823 * SDVO output based on the controlled output.
1824 *
1825 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1826 * outputs, then LVDS outputs.
1827 */
1828static void
1829psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv,
1830                          struct psb_intel_sdvo *sdvo, u32 reg)
1831{
1832        struct sdvo_device_mapping *mapping;
1833
1834        if (IS_SDVOB(reg))
1835                mapping = &(dev_priv->sdvo_mappings[0]);
1836        else
1837                mapping = &(dev_priv->sdvo_mappings[1]);
1838
1839        if (mapping->initialized)
1840                sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1841        else
1842                psb_intel_sdvo_guess_ddc_bus(sdvo);
1843}
1844
1845static void
1846psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv,
1847                          struct psb_intel_sdvo *sdvo, u32 reg)
1848{
1849        struct sdvo_device_mapping *mapping;
1850        u8 pin, speed;
1851
1852        if (IS_SDVOB(reg))
1853                mapping = &dev_priv->sdvo_mappings[0];
1854        else
1855                mapping = &dev_priv->sdvo_mappings[1];
1856
1857        pin = GMBUS_PORT_DPB;
1858        speed = GMBUS_RATE_1MHZ >> 8;
1859        if (mapping->initialized) {
1860                pin = mapping->i2c_pin;
1861                speed = mapping->i2c_speed;
1862        }
1863
1864        if (pin < GMBUS_NUM_PORTS) {
1865                sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1866                gma_intel_gmbus_set_speed(sdvo->i2c, speed);
1867                gma_intel_gmbus_force_bit(sdvo->i2c, true);
1868        } else
1869                sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1870}
1871
1872static bool
1873psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1874{
1875        return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo);
1876}
1877
1878static u8
1879psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1880{
1881        struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
1882        struct sdvo_device_mapping *my_mapping, *other_mapping;
1883
1884        if (IS_SDVOB(sdvo_reg)) {
1885                my_mapping = &dev_priv->sdvo_mappings[0];
1886                other_mapping = &dev_priv->sdvo_mappings[1];
1887        } else {
1888                my_mapping = &dev_priv->sdvo_mappings[1];
1889                other_mapping = &dev_priv->sdvo_mappings[0];
1890        }
1891
1892        /* If the BIOS described our SDVO device, take advantage of it. */
1893        if (my_mapping->slave_addr)
1894                return my_mapping->slave_addr;
1895
1896        /* If the BIOS only described a different SDVO device, use the
1897         * address that it isn't using.
1898         */
1899        if (other_mapping->slave_addr) {
1900                if (other_mapping->slave_addr == 0x70)
1901                        return 0x72;
1902                else
1903                        return 0x70;
1904        }
1905
1906        /* No SDVO device info is found for another DVO port,
1907         * so use mapping assumption we had before BIOS parsing.
1908         */
1909        if (IS_SDVOB(sdvo_reg))
1910                return 0x70;
1911        else
1912                return 0x72;
1913}
1914
1915static void
1916psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector,
1917                          struct psb_intel_sdvo *encoder)
1918{
1919        drm_connector_init(encoder->base.base.dev,
1920                           &connector->base.base,
1921                           &psb_intel_sdvo_connector_funcs,
1922                           connector->base.base.connector_type);
1923
1924        drm_connector_helper_add(&connector->base.base,
1925                                 &psb_intel_sdvo_connector_helper_funcs);
1926
1927        connector->base.base.interlace_allowed = 0;
1928        connector->base.base.doublescan_allowed = 0;
1929        connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1930
1931        connector->base.save = psb_intel_sdvo_save;
1932        connector->base.restore = psb_intel_sdvo_restore;
1933
1934        gma_connector_attach_encoder(&connector->base, &encoder->base);
1935        drm_connector_register(&connector->base.base);
1936}
1937
1938static void
1939psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector)
1940{
1941        /* FIXME: We don't support HDMI at the moment
1942        struct drm_device *dev = connector->base.base.dev;
1943
1944        intel_attach_force_audio_property(&connector->base.base);
1945        intel_attach_broadcast_rgb_property(&connector->base.base);
1946        */
1947}
1948
1949static bool
1950psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1951{
1952        struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
1953        struct drm_connector *connector;
1954        struct gma_connector *intel_connector;
1955        struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
1956
1957        psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
1958        if (!psb_intel_sdvo_connector)
1959                return false;
1960
1961        if (device == 0) {
1962                psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
1963                psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
1964        } else if (device == 1) {
1965                psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
1966                psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
1967        }
1968
1969        intel_connector = &psb_intel_sdvo_connector->base;
1970        connector = &intel_connector->base;
1971        // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
1972        encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
1973        connector->connector_type = DRM_MODE_CONNECTOR_DVID;
1974
1975        if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) {
1976                connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
1977                psb_intel_sdvo->is_hdmi = true;
1978        }
1979        psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
1980                                       (1 << INTEL_ANALOG_CLONE_BIT));
1981
1982        psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
1983        if (psb_intel_sdvo->is_hdmi)
1984                psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector);
1985
1986        return true;
1987}
1988
1989static bool
1990psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type)
1991{
1992        struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
1993        struct drm_connector *connector;
1994        struct gma_connector *intel_connector;
1995        struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
1996
1997        psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
1998        if (!psb_intel_sdvo_connector)
1999                return false;
2000
2001        intel_connector = &psb_intel_sdvo_connector->base;
2002        connector = &intel_connector->base;
2003        encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2004        connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2005
2006        psb_intel_sdvo->controlled_output |= type;
2007        psb_intel_sdvo_connector->output_flag = type;
2008
2009        psb_intel_sdvo->is_tv = true;
2010        psb_intel_sdvo->base.needs_tv_clock = true;
2011        psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2012
2013        psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2014
2015        if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type))
2016                goto err;
2017
2018        if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2019                goto err;
2020
2021        return true;
2022
2023err:
2024        psb_intel_sdvo_destroy(connector);
2025        return false;
2026}
2027
2028static bool
2029psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2030{
2031        struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2032        struct drm_connector *connector;
2033        struct gma_connector *intel_connector;
2034        struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2035
2036        psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2037        if (!psb_intel_sdvo_connector)
2038                return false;
2039
2040        intel_connector = &psb_intel_sdvo_connector->base;
2041        connector = &intel_connector->base;
2042        connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2043        encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2044        connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2045
2046        if (device == 0) {
2047                psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2048                psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2049        } else if (device == 1) {
2050                psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2051                psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2052        }
2053
2054        psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2055                                       (1 << INTEL_ANALOG_CLONE_BIT));
2056
2057        psb_intel_sdvo_connector_init(psb_intel_sdvo_connector,
2058                                  psb_intel_sdvo);
2059        return true;
2060}
2061
2062static bool
2063psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2064{
2065        struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2066        struct drm_connector *connector;
2067        struct gma_connector *intel_connector;
2068        struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2069
2070        psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2071        if (!psb_intel_sdvo_connector)
2072                return false;
2073
2074        intel_connector = &psb_intel_sdvo_connector->base;
2075        connector = &intel_connector->base;
2076        encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2077        connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2078
2079        if (device == 0) {
2080                psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2081                psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2082        } else if (device == 1) {
2083                psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2084                psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2085        }
2086
2087        psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2088                                       (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2089
2090        psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2091        if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2092                goto err;
2093
2094        return true;
2095
2096err:
2097        psb_intel_sdvo_destroy(connector);
2098        return false;
2099}
2100
2101static bool
2102psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags)
2103{
2104        psb_intel_sdvo->is_tv = false;
2105        psb_intel_sdvo->base.needs_tv_clock = false;
2106        psb_intel_sdvo->is_lvds = false;
2107
2108        /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2109
2110        if (flags & SDVO_OUTPUT_TMDS0)
2111                if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0))
2112                        return false;
2113
2114        if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2115                if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1))
2116                        return false;
2117
2118        /* TV has no XXX1 function block */
2119        if (flags & SDVO_OUTPUT_SVID0)
2120                if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0))
2121                        return false;
2122
2123        if (flags & SDVO_OUTPUT_CVBS0)
2124                if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0))
2125                        return false;
2126
2127        if (flags & SDVO_OUTPUT_RGB0)
2128                if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0))
2129                        return false;
2130
2131        if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2132                if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1))
2133                        return false;
2134
2135        if (flags & SDVO_OUTPUT_LVDS0)
2136                if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0))
2137                        return false;
2138
2139        if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2140                if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1))
2141                        return false;
2142
2143        if ((flags & SDVO_OUTPUT_MASK) == 0) {
2144                unsigned char bytes[2];
2145
2146                psb_intel_sdvo->controlled_output = 0;
2147                memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2);
2148                DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2149                              SDVO_NAME(psb_intel_sdvo),
2150                              bytes[0], bytes[1]);
2151                return false;
2152        }
2153        psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2154
2155        return true;
2156}
2157
2158static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
2159                                          struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2160                                          int type)
2161{
2162        struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2163        struct psb_intel_sdvo_tv_format format;
2164        uint32_t format_map, i;
2165
2166        if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type))
2167                return false;
2168
2169        BUILD_BUG_ON(sizeof(format) != 6);
2170        if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2171                                  SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2172                                  &format, sizeof(format)))
2173                return false;
2174
2175        memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2176
2177        if (format_map == 0)
2178                return false;
2179
2180        psb_intel_sdvo_connector->format_supported_num = 0;
2181        for (i = 0 ; i < ARRAY_SIZE(tv_format_names); i++)
2182                if (format_map & (1 << i))
2183                        psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i;
2184
2185
2186        psb_intel_sdvo_connector->tv_format =
2187                        drm_property_create(dev, DRM_MODE_PROP_ENUM,
2188                                            "mode", psb_intel_sdvo_connector->format_supported_num);
2189        if (!psb_intel_sdvo_connector->tv_format)
2190                return false;
2191
2192        for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++)
2193                drm_property_add_enum(
2194                                psb_intel_sdvo_connector->tv_format,
2195                                i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]);
2196
2197        psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0];
2198        drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base,
2199                                      psb_intel_sdvo_connector->tv_format, 0);
2200        return true;
2201
2202}
2203
2204#define ENHANCEMENT(name, NAME) do { \
2205        if (enhancements.name) { \
2206                if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2207                    !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2208                        return false; \
2209                psb_intel_sdvo_connector->max_##name = data_value[0]; \
2210                psb_intel_sdvo_connector->cur_##name = response; \
2211                psb_intel_sdvo_connector->name = \
2212                        drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2213                if (!psb_intel_sdvo_connector->name) return false; \
2214                drm_object_attach_property(&connector->base, \
2215                                              psb_intel_sdvo_connector->name, \
2216                                              psb_intel_sdvo_connector->cur_##name); \
2217                DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2218                              data_value[0], data_value[1], response); \
2219        } \
2220} while(0)
2221
2222static bool
2223psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo,
2224                                      struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2225                                      struct psb_intel_sdvo_enhancements_reply enhancements)
2226{
2227        struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2228        struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2229        uint16_t response, data_value[2];
2230
2231        /* when horizontal overscan is supported, Add the left/right  property */
2232        if (enhancements.overscan_h) {
2233                if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2234                                          SDVO_CMD_GET_MAX_OVERSCAN_H,
2235                                          &data_value, 4))
2236                        return false;
2237
2238                if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2239                                          SDVO_CMD_GET_OVERSCAN_H,
2240                                          &response, 2))
2241                        return false;
2242
2243                psb_intel_sdvo_connector->max_hscan = data_value[0];
2244                psb_intel_sdvo_connector->left_margin = data_value[0] - response;
2245                psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin;
2246                psb_intel_sdvo_connector->left =
2247                        drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2248                if (!psb_intel_sdvo_connector->left)
2249                        return false;
2250
2251                drm_object_attach_property(&connector->base,
2252                                              psb_intel_sdvo_connector->left,
2253                                              psb_intel_sdvo_connector->left_margin);
2254
2255                psb_intel_sdvo_connector->right =
2256                        drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2257                if (!psb_intel_sdvo_connector->right)
2258                        return false;
2259
2260                drm_object_attach_property(&connector->base,
2261                                              psb_intel_sdvo_connector->right,
2262                                              psb_intel_sdvo_connector->right_margin);
2263                DRM_DEBUG_KMS("h_overscan: max %d, "
2264                              "default %d, current %d\n",
2265                              data_value[0], data_value[1], response);
2266        }
2267
2268        if (enhancements.overscan_v) {
2269                if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2270                                          SDVO_CMD_GET_MAX_OVERSCAN_V,
2271                                          &data_value, 4))
2272                        return false;
2273
2274                if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2275                                          SDVO_CMD_GET_OVERSCAN_V,
2276                                          &response, 2))
2277                        return false;
2278
2279                psb_intel_sdvo_connector->max_vscan = data_value[0];
2280                psb_intel_sdvo_connector->top_margin = data_value[0] - response;
2281                psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin;
2282                psb_intel_sdvo_connector->top =
2283                        drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]);
2284                if (!psb_intel_sdvo_connector->top)
2285                        return false;
2286
2287                drm_object_attach_property(&connector->base,
2288                                              psb_intel_sdvo_connector->top,
2289                                              psb_intel_sdvo_connector->top_margin);
2290
2291                psb_intel_sdvo_connector->bottom =
2292                        drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]);
2293                if (!psb_intel_sdvo_connector->bottom)
2294                        return false;
2295
2296                drm_object_attach_property(&connector->base,
2297                                              psb_intel_sdvo_connector->bottom,
2298                                              psb_intel_sdvo_connector->bottom_margin);
2299                DRM_DEBUG_KMS("v_overscan: max %d, "
2300                              "default %d, current %d\n",
2301                              data_value[0], data_value[1], response);
2302        }
2303
2304        ENHANCEMENT(hpos, HPOS);
2305        ENHANCEMENT(vpos, VPOS);
2306        ENHANCEMENT(saturation, SATURATION);
2307        ENHANCEMENT(contrast, CONTRAST);
2308        ENHANCEMENT(hue, HUE);
2309        ENHANCEMENT(sharpness, SHARPNESS);
2310        ENHANCEMENT(brightness, BRIGHTNESS);
2311        ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2312        ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2313        ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2314        ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2315        ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2316
2317        if (enhancements.dot_crawl) {
2318                if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2319                        return false;
2320
2321                psb_intel_sdvo_connector->max_dot_crawl = 1;
2322                psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2323                psb_intel_sdvo_connector->dot_crawl =
2324                        drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2325                if (!psb_intel_sdvo_connector->dot_crawl)
2326                        return false;
2327
2328                drm_object_attach_property(&connector->base,
2329                                              psb_intel_sdvo_connector->dot_crawl,
2330                                              psb_intel_sdvo_connector->cur_dot_crawl);
2331                DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2332        }
2333
2334        return true;
2335}
2336
2337static bool
2338psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo,
2339                                        struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2340                                        struct psb_intel_sdvo_enhancements_reply enhancements)
2341{
2342        struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2343        struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2344        uint16_t response, data_value[2];
2345
2346        ENHANCEMENT(brightness, BRIGHTNESS);
2347
2348        return true;
2349}
2350#undef ENHANCEMENT
2351
2352static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
2353                                               struct psb_intel_sdvo_connector *psb_intel_sdvo_connector)
2354{
2355        union {
2356                struct psb_intel_sdvo_enhancements_reply reply;
2357                uint16_t response;
2358        } enhancements;
2359
2360        BUILD_BUG_ON(sizeof(enhancements) != 2);
2361
2362        enhancements.response = 0;
2363        psb_intel_sdvo_get_value(psb_intel_sdvo,
2364                             SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2365                             &enhancements, sizeof(enhancements));
2366        if (enhancements.response == 0) {
2367                DRM_DEBUG_KMS("No enhancement is supported\n");
2368                return true;
2369        }
2370
2371        if (IS_TV(psb_intel_sdvo_connector))
2372                return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2373        else if(IS_LVDS(psb_intel_sdvo_connector))
2374                return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2375        else
2376                return true;
2377}
2378
2379static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2380                                     struct i2c_msg *msgs,
2381                                     int num)
2382{
2383        struct psb_intel_sdvo *sdvo = adapter->algo_data;
2384
2385        if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2386                return -EIO;
2387
2388        return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2389}
2390
2391static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2392{
2393        struct psb_intel_sdvo *sdvo = adapter->algo_data;
2394        return sdvo->i2c->algo->functionality(sdvo->i2c);
2395}
2396
2397static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = {
2398        .master_xfer    = psb_intel_sdvo_ddc_proxy_xfer,
2399        .functionality  = psb_intel_sdvo_ddc_proxy_func
2400};
2401
2402static bool
2403psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo,
2404                          struct drm_device *dev)
2405{
2406        sdvo->ddc.owner = THIS_MODULE;
2407        sdvo->ddc.class = I2C_CLASS_DDC;
2408        snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2409        sdvo->ddc.dev.parent = dev->dev;
2410        sdvo->ddc.algo_data = sdvo;
2411        sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy;
2412
2413        return i2c_add_adapter(&sdvo->ddc) == 0;
2414}
2415
2416bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2417{
2418        struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
2419        struct gma_encoder *gma_encoder;
2420        struct psb_intel_sdvo *psb_intel_sdvo;
2421        int i;
2422
2423        psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL);
2424        if (!psb_intel_sdvo)
2425                return false;
2426
2427        psb_intel_sdvo->sdvo_reg = sdvo_reg;
2428        psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2429        psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2430        if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) {
2431                kfree(psb_intel_sdvo);
2432                return false;
2433        }
2434
2435        /* encoder type will be decided later */
2436        gma_encoder = &psb_intel_sdvo->base;
2437        gma_encoder->type = INTEL_OUTPUT_SDVO;
2438        drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs,
2439                         0, NULL);
2440
2441        /* Read the regs to test if we can talk to the device */
2442        for (i = 0; i < 0x40; i++) {
2443                u8 byte;
2444
2445                if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) {
2446                        DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2447                                      IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2448                        goto err;
2449                }
2450        }
2451
2452        if (IS_SDVOB(sdvo_reg))
2453                dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2454        else
2455                dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2456
2457        drm_encoder_helper_add(&gma_encoder->base, &psb_intel_sdvo_helper_funcs);
2458
2459        /* In default case sdvo lvds is false */
2460        if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps))
2461                goto err;
2462
2463        if (psb_intel_sdvo_output_setup(psb_intel_sdvo,
2464                                    psb_intel_sdvo->caps.output_flags) != true) {
2465                DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2466                              IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2467                goto err;
2468        }
2469
2470        psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2471
2472        /* Set the input timing to the screen. Assume always input 0. */
2473        if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
2474                goto err;
2475
2476        if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo,
2477                                                    &psb_intel_sdvo->pixel_clock_min,
2478                                                    &psb_intel_sdvo->pixel_clock_max))
2479                goto err;
2480
2481        DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2482                        "clock range %dMHz - %dMHz, "
2483                        "input 1: %c, input 2: %c, "
2484                        "output 1: %c, output 2: %c\n",
2485                        SDVO_NAME(psb_intel_sdvo),
2486                        psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id,
2487                        psb_intel_sdvo->caps.device_rev_id,
2488                        psb_intel_sdvo->pixel_clock_min / 1000,
2489                        psb_intel_sdvo->pixel_clock_max / 1000,
2490                        (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2491                        (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2492                        /* check currently supported outputs */
2493                        psb_intel_sdvo->caps.output_flags &
2494                        (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2495                        psb_intel_sdvo->caps.output_flags &
2496                        (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2497        return true;
2498
2499err:
2500        drm_encoder_cleanup(&gma_encoder->base);
2501        i2c_del_adapter(&psb_intel_sdvo->ddc);
2502        kfree(psb_intel_sdvo);
2503
2504        return false;
2505}
2506