linux/drivers/gpu/drm/i915/display/intel_dvo.c
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   1/*
   2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3 * Copyright © 2006-2007 Intel Corporation
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a
   6 * copy of this software and associated documentation files (the "Software"),
   7 * to deal in the Software without restriction, including without limitation
   8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9 * and/or sell copies of the Software, and to permit persons to whom the
  10 * Software is furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice (including the next
  13 * paragraph) shall be included in all copies or substantial portions of the
  14 * Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22 * DEALINGS IN THE SOFTWARE.
  23 *
  24 * Authors:
  25 *      Eric Anholt <eric@anholt.net>
  26 */
  27
  28#include <linux/i2c.h>
  29#include <linux/slab.h>
  30
  31#include <drm/drm_atomic_helper.h>
  32#include <drm/drm_crtc.h>
  33
  34#include "i915_drv.h"
  35#include "intel_connector.h"
  36#include "intel_de.h"
  37#include "intel_display_types.h"
  38#include "intel_dvo.h"
  39#include "intel_dvo_dev.h"
  40#include "intel_gmbus.h"
  41#include "intel_panel.h"
  42
  43#define INTEL_DVO_CHIP_NONE     0
  44#define INTEL_DVO_CHIP_LVDS     1
  45#define INTEL_DVO_CHIP_TMDS     2
  46#define INTEL_DVO_CHIP_TVOUT    4
  47#define INTEL_DVO_CHIP_LVDS_NO_FIXED    5
  48
  49#define SIL164_ADDR     0x38
  50#define CH7xxx_ADDR     0x76
  51#define TFP410_ADDR     0x38
  52#define NS2501_ADDR     0x38
  53
  54static const struct intel_dvo_device intel_dvo_devices[] = {
  55        {
  56                .type = INTEL_DVO_CHIP_TMDS,
  57                .name = "sil164",
  58                .dvo_reg = DVOC,
  59                .dvo_srcdim_reg = DVOC_SRCDIM,
  60                .slave_addr = SIL164_ADDR,
  61                .dev_ops = &sil164_ops,
  62        },
  63        {
  64                .type = INTEL_DVO_CHIP_TMDS,
  65                .name = "ch7xxx",
  66                .dvo_reg = DVOC,
  67                .dvo_srcdim_reg = DVOC_SRCDIM,
  68                .slave_addr = CH7xxx_ADDR,
  69                .dev_ops = &ch7xxx_ops,
  70        },
  71        {
  72                .type = INTEL_DVO_CHIP_TMDS,
  73                .name = "ch7xxx",
  74                .dvo_reg = DVOC,
  75                .dvo_srcdim_reg = DVOC_SRCDIM,
  76                .slave_addr = 0x75, /* For some ch7010 */
  77                .dev_ops = &ch7xxx_ops,
  78        },
  79        {
  80                .type = INTEL_DVO_CHIP_LVDS,
  81                .name = "ivch",
  82                .dvo_reg = DVOA,
  83                .dvo_srcdim_reg = DVOA_SRCDIM,
  84                .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  85                .dev_ops = &ivch_ops,
  86        },
  87        {
  88                .type = INTEL_DVO_CHIP_TMDS,
  89                .name = "tfp410",
  90                .dvo_reg = DVOC,
  91                .dvo_srcdim_reg = DVOC_SRCDIM,
  92                .slave_addr = TFP410_ADDR,
  93                .dev_ops = &tfp410_ops,
  94        },
  95        {
  96                .type = INTEL_DVO_CHIP_LVDS,
  97                .name = "ch7017",
  98                .dvo_reg = DVOC,
  99                .dvo_srcdim_reg = DVOC_SRCDIM,
 100                .slave_addr = 0x75,
 101                .gpio = GMBUS_PIN_DPB,
 102                .dev_ops = &ch7017_ops,
 103        },
 104        {
 105                .type = INTEL_DVO_CHIP_LVDS_NO_FIXED,
 106                .name = "ns2501",
 107                .dvo_reg = DVOB,
 108                .dvo_srcdim_reg = DVOB_SRCDIM,
 109                .slave_addr = NS2501_ADDR,
 110                .dev_ops = &ns2501_ops,
 111        },
 112};
 113
 114struct intel_dvo {
 115        struct intel_encoder base;
 116
 117        struct intel_dvo_device dev;
 118
 119        struct intel_connector *attached_connector;
 120
 121        bool panel_wants_dither;
 122};
 123
 124static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
 125{
 126        return container_of(encoder, struct intel_dvo, base);
 127}
 128
 129static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
 130{
 131        return enc_to_dvo(intel_attached_encoder(connector));
 132}
 133
 134static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
 135{
 136        struct drm_device *dev = connector->base.dev;
 137        struct drm_i915_private *dev_priv = to_i915(dev);
 138        struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 139        u32 tmp;
 140
 141        tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
 142
 143        if (!(tmp & DVO_ENABLE))
 144                return false;
 145
 146        return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
 147}
 148
 149static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
 150                                   enum pipe *pipe)
 151{
 152        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 153        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 154        u32 tmp;
 155
 156        tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
 157
 158        *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT;
 159
 160        return tmp & DVO_ENABLE;
 161}
 162
 163static void intel_dvo_get_config(struct intel_encoder *encoder,
 164                                 struct intel_crtc_state *pipe_config)
 165{
 166        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 167        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 168        u32 tmp, flags = 0;
 169
 170        pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
 171
 172        tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
 173        if (tmp & DVO_HSYNC_ACTIVE_HIGH)
 174                flags |= DRM_MODE_FLAG_PHSYNC;
 175        else
 176                flags |= DRM_MODE_FLAG_NHSYNC;
 177        if (tmp & DVO_VSYNC_ACTIVE_HIGH)
 178                flags |= DRM_MODE_FLAG_PVSYNC;
 179        else
 180                flags |= DRM_MODE_FLAG_NVSYNC;
 181
 182        pipe_config->hw.adjusted_mode.flags |= flags;
 183
 184        pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
 185}
 186
 187static void intel_disable_dvo(struct intel_atomic_state *state,
 188                              struct intel_encoder *encoder,
 189                              const struct intel_crtc_state *old_crtc_state,
 190                              const struct drm_connector_state *old_conn_state)
 191{
 192        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 193        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 194        i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 195        u32 temp = intel_de_read(dev_priv, dvo_reg);
 196
 197        intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
 198        intel_de_write(dev_priv, dvo_reg, temp & ~DVO_ENABLE);
 199        intel_de_read(dev_priv, dvo_reg);
 200}
 201
 202static void intel_enable_dvo(struct intel_atomic_state *state,
 203                             struct intel_encoder *encoder,
 204                             const struct intel_crtc_state *pipe_config,
 205                             const struct drm_connector_state *conn_state)
 206{
 207        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 208        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 209        i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 210        u32 temp = intel_de_read(dev_priv, dvo_reg);
 211
 212        intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
 213                                         &pipe_config->hw.mode,
 214                                         &pipe_config->hw.adjusted_mode);
 215
 216        intel_de_write(dev_priv, dvo_reg, temp | DVO_ENABLE);
 217        intel_de_read(dev_priv, dvo_reg);
 218
 219        intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
 220}
 221
 222static enum drm_mode_status
 223intel_dvo_mode_valid(struct drm_connector *connector,
 224                     struct drm_display_mode *mode)
 225{
 226        struct intel_connector *intel_connector = to_intel_connector(connector);
 227        struct intel_dvo *intel_dvo = intel_attached_dvo(intel_connector);
 228        const struct drm_display_mode *fixed_mode =
 229                intel_connector->panel.fixed_mode;
 230        int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 231        int target_clock = mode->clock;
 232
 233        if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 234                return MODE_NO_DBLESCAN;
 235
 236        /* XXX: Validate clock range */
 237
 238        if (fixed_mode) {
 239                enum drm_mode_status status;
 240
 241                status = intel_panel_mode_valid(intel_connector, mode);
 242                if (status != MODE_OK)
 243                        return status;
 244
 245                target_clock = fixed_mode->clock;
 246        }
 247
 248        if (target_clock > max_dotclk)
 249                return MODE_CLOCK_HIGH;
 250
 251        return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
 252}
 253
 254static int intel_dvo_compute_config(struct intel_encoder *encoder,
 255                                    struct intel_crtc_state *pipe_config,
 256                                    struct drm_connector_state *conn_state)
 257{
 258        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 259        struct intel_connector *connector = to_intel_connector(conn_state->connector);
 260        const struct drm_display_mode *fixed_mode =
 261                intel_dvo->attached_connector->panel.fixed_mode;
 262        struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
 263
 264        /*
 265         * If we have timings from the BIOS for the panel, put them in
 266         * to the adjusted mode.  The CRTC will be set up for this mode,
 267         * with the panel scaling set up to source from the H/VDisplay
 268         * of the original mode.
 269         */
 270        if (fixed_mode) {
 271                int ret;
 272
 273                ret = intel_panel_compute_config(connector, adjusted_mode);
 274                if (ret)
 275                        return ret;
 276        }
 277
 278        if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 279                return -EINVAL;
 280
 281        pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 282
 283        return 0;
 284}
 285
 286static void intel_dvo_pre_enable(struct intel_atomic_state *state,
 287                                 struct intel_encoder *encoder,
 288                                 const struct intel_crtc_state *pipe_config,
 289                                 const struct drm_connector_state *conn_state)
 290{
 291        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 292        struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
 293        const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
 294        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 295        enum pipe pipe = crtc->pipe;
 296        u32 dvo_val;
 297        i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 298        i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
 299
 300        /* Save the data order, since I don't know what it should be set to. */
 301        dvo_val = intel_de_read(dev_priv, dvo_reg) &
 302                  (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
 303        dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
 304                   DVO_BLANK_ACTIVE_HIGH;
 305
 306        dvo_val |= DVO_PIPE_SEL(pipe);
 307        dvo_val |= DVO_PIPE_STALL;
 308        if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 309                dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
 310        if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 311                dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
 312
 313        intel_de_write(dev_priv, dvo_srcdim_reg,
 314                       (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
 315        intel_de_write(dev_priv, dvo_reg, dvo_val);
 316}
 317
 318static enum drm_connector_status
 319intel_dvo_detect(struct drm_connector *connector, bool force)
 320{
 321        struct drm_i915_private *i915 = to_i915(connector->dev);
 322        struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector));
 323
 324        DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 325                      connector->base.id, connector->name);
 326
 327        if (!INTEL_DISPLAY_ENABLED(i915))
 328                return connector_status_disconnected;
 329
 330        return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
 331}
 332
 333static int intel_dvo_get_modes(struct drm_connector *connector)
 334{
 335        struct drm_i915_private *dev_priv = to_i915(connector->dev);
 336        const struct drm_display_mode *fixed_mode =
 337                to_intel_connector(connector)->panel.fixed_mode;
 338        int num_modes;
 339
 340        /*
 341         * We should probably have an i2c driver get_modes function for those
 342         * devices which will have a fixed set of modes determined by the chip
 343         * (TV-out, for example), but for now with just TMDS and LVDS,
 344         * that's not the case.
 345         */
 346        num_modes = intel_ddc_get_modes(connector,
 347                                        intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
 348        if (num_modes)
 349                return num_modes;
 350
 351        if (fixed_mode) {
 352                struct drm_display_mode *mode;
 353
 354                mode = drm_mode_duplicate(connector->dev, fixed_mode);
 355                if (mode) {
 356                        drm_mode_probed_add(connector, mode);
 357                        num_modes++;
 358                }
 359        }
 360
 361        return num_modes;
 362}
 363
 364static const struct drm_connector_funcs intel_dvo_connector_funcs = {
 365        .detect = intel_dvo_detect,
 366        .late_register = intel_connector_register,
 367        .early_unregister = intel_connector_unregister,
 368        .destroy = intel_connector_destroy,
 369        .fill_modes = drm_helper_probe_single_connector_modes,
 370        .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 371        .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 372};
 373
 374static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
 375        .mode_valid = intel_dvo_mode_valid,
 376        .get_modes = intel_dvo_get_modes,
 377};
 378
 379static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
 380{
 381        struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
 382
 383        if (intel_dvo->dev.dev_ops->destroy)
 384                intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
 385
 386        intel_encoder_destroy(encoder);
 387}
 388
 389static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
 390        .destroy = intel_dvo_enc_destroy,
 391};
 392
 393/*
 394 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 395 *
 396 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 397 * chip being on DVOB/C and having multiple pipes.
 398 */
 399static struct drm_display_mode *
 400intel_dvo_get_current_mode(struct intel_encoder *encoder)
 401{
 402        struct drm_display_mode *mode;
 403
 404        mode = intel_encoder_current_mode(encoder);
 405        if (mode) {
 406                DRM_DEBUG_KMS("using current (BIOS) mode: ");
 407                drm_mode_debug_printmodeline(mode);
 408                mode->type |= DRM_MODE_TYPE_PREFERRED;
 409        }
 410
 411        return mode;
 412}
 413
 414static enum port intel_dvo_port(i915_reg_t dvo_reg)
 415{
 416        if (i915_mmio_reg_equal(dvo_reg, DVOA))
 417                return PORT_A;
 418        else if (i915_mmio_reg_equal(dvo_reg, DVOB))
 419                return PORT_B;
 420        else
 421                return PORT_C;
 422}
 423
 424void intel_dvo_init(struct drm_i915_private *dev_priv)
 425{
 426        struct intel_encoder *intel_encoder;
 427        struct intel_dvo *intel_dvo;
 428        struct intel_connector *intel_connector;
 429        int i;
 430        int encoder_type = DRM_MODE_ENCODER_NONE;
 431
 432        intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
 433        if (!intel_dvo)
 434                return;
 435
 436        intel_connector = intel_connector_alloc();
 437        if (!intel_connector) {
 438                kfree(intel_dvo);
 439                return;
 440        }
 441
 442        intel_dvo->attached_connector = intel_connector;
 443
 444        intel_encoder = &intel_dvo->base;
 445
 446        intel_encoder->disable = intel_disable_dvo;
 447        intel_encoder->enable = intel_enable_dvo;
 448        intel_encoder->get_hw_state = intel_dvo_get_hw_state;
 449        intel_encoder->get_config = intel_dvo_get_config;
 450        intel_encoder->compute_config = intel_dvo_compute_config;
 451        intel_encoder->pre_enable = intel_dvo_pre_enable;
 452        intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
 453
 454        /* Now, try to find a controller */
 455        for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
 456                struct drm_connector *connector = &intel_connector->base;
 457                const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
 458                struct i2c_adapter *i2c;
 459                int gpio;
 460                bool dvoinit;
 461                enum pipe pipe;
 462                u32 dpll[I915_MAX_PIPES];
 463                enum port port;
 464
 465                /*
 466                 * Allow the I2C driver info to specify the GPIO to be used in
 467                 * special cases, but otherwise default to what's defined
 468                 * in the spec.
 469                 */
 470                if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
 471                        gpio = dvo->gpio;
 472                else if (dvo->type == INTEL_DVO_CHIP_LVDS)
 473                        gpio = GMBUS_PIN_SSC;
 474                else
 475                        gpio = GMBUS_PIN_DPB;
 476
 477                /*
 478                 * Set up the I2C bus necessary for the chip we're probing.
 479                 * It appears that everything is on GPIOE except for panels
 480                 * on i830 laptops, which are on GPIOB (DVOA).
 481                 */
 482                i2c = intel_gmbus_get_adapter(dev_priv, gpio);
 483
 484                intel_dvo->dev = *dvo;
 485
 486                /*
 487                 * GMBUS NAK handling seems to be unstable, hence let the
 488                 * transmitter detection run in bit banging mode for now.
 489                 */
 490                intel_gmbus_force_bit(i2c, true);
 491
 492                /*
 493                 * ns2501 requires the DVO 2x clock before it will
 494                 * respond to i2c accesses, so make sure we have
 495                 * have the clock enabled before we attempt to
 496                 * initialize the device.
 497                 */
 498                for_each_pipe(dev_priv, pipe) {
 499                        dpll[pipe] = intel_de_read(dev_priv, DPLL(pipe));
 500                        intel_de_write(dev_priv, DPLL(pipe),
 501                                       dpll[pipe] | DPLL_DVO_2X_MODE);
 502                }
 503
 504                dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
 505
 506                /* restore the DVO 2x clock state to original */
 507                for_each_pipe(dev_priv, pipe) {
 508                        intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]);
 509                }
 510
 511                intel_gmbus_force_bit(i2c, false);
 512
 513                if (!dvoinit)
 514                        continue;
 515
 516                port = intel_dvo_port(dvo->dvo_reg);
 517                drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
 518                                 &intel_dvo_enc_funcs, encoder_type,
 519                                 "DVO %c", port_name(port));
 520
 521                intel_encoder->type = INTEL_OUTPUT_DVO;
 522                intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
 523                intel_encoder->port = port;
 524                intel_encoder->pipe_mask = ~0;
 525
 526                if (dvo->type != INTEL_DVO_CHIP_LVDS)
 527                        intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
 528                                (1 << INTEL_OUTPUT_DVO);
 529
 530                switch (dvo->type) {
 531                case INTEL_DVO_CHIP_TMDS:
 532                        intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT |
 533                                DRM_CONNECTOR_POLL_DISCONNECT;
 534                        drm_connector_init(&dev_priv->drm, connector,
 535                                           &intel_dvo_connector_funcs,
 536                                           DRM_MODE_CONNECTOR_DVII);
 537                        encoder_type = DRM_MODE_ENCODER_TMDS;
 538                        break;
 539                case INTEL_DVO_CHIP_LVDS_NO_FIXED:
 540                case INTEL_DVO_CHIP_LVDS:
 541                        drm_connector_init(&dev_priv->drm, connector,
 542                                           &intel_dvo_connector_funcs,
 543                                           DRM_MODE_CONNECTOR_LVDS);
 544                        encoder_type = DRM_MODE_ENCODER_LVDS;
 545                        break;
 546                }
 547
 548                drm_connector_helper_add(connector,
 549                                         &intel_dvo_connector_helper_funcs);
 550                connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 551                connector->interlace_allowed = false;
 552                connector->doublescan_allowed = false;
 553
 554                intel_connector_attach_encoder(intel_connector, intel_encoder);
 555                if (dvo->type == INTEL_DVO_CHIP_LVDS) {
 556                        /*
 557                         * For our LVDS chipsets, we should hopefully be able
 558                         * to dig the fixed panel mode out of the BIOS data.
 559                         * However, it's in a different format from the BIOS
 560                         * data on chipsets with integrated LVDS (stored in AIM
 561                         * headers, likely), so for now, just get the current
 562                         * mode being output through DVO.
 563                         */
 564                        intel_panel_init(&intel_connector->panel,
 565                                         intel_dvo_get_current_mode(intel_encoder),
 566                                         NULL);
 567                        intel_dvo->panel_wants_dither = true;
 568                }
 569
 570                return;
 571        }
 572
 573        kfree(intel_dvo);
 574        kfree(intel_connector);
 575}
 576