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7#include <linux/delay.h>
8#include <linux/gpio/consumer.h>
9#include <linux/module.h>
10#include <linux/of.h>
11#include <linux/of_device.h>
12#include <linux/regulator/consumer.h>
13
14#include <drm/drm_connector.h>
15#include <drm/drm_crtc.h>
16#include <drm/drm_mipi_dsi.h>
17#include <drm/drm_panel.h>
18
19#include <video/mipi_display.h>
20
21struct panel_desc {
22 const struct drm_display_mode *modes;
23 unsigned int bpc;
24
25
26
27
28
29 struct {
30 unsigned int width_mm;
31 unsigned int height_mm;
32 } size;
33
34 unsigned long mode_flags;
35 enum mipi_dsi_pixel_format format;
36 const struct panel_init_cmd *init_cmds;
37 unsigned int lanes;
38 bool discharge_on_disable;
39};
40
41struct boe_panel {
42 struct drm_panel base;
43 struct mipi_dsi_device *dsi;
44
45 const struct panel_desc *desc;
46
47 enum drm_panel_orientation orientation;
48 struct regulator *pp3300;
49 struct regulator *pp1800;
50 struct regulator *avee;
51 struct regulator *avdd;
52 struct gpio_desc *enable_gpio;
53
54 bool prepared;
55};
56
57enum dsi_cmd_type {
58 INIT_DCS_CMD,
59 DELAY_CMD,
60};
61
62struct panel_init_cmd {
63 enum dsi_cmd_type type;
64 size_t len;
65 const char *data;
66};
67
68#define _INIT_DCS_CMD(...) { \
69 .type = INIT_DCS_CMD, \
70 .len = sizeof((char[]){__VA_ARGS__}), \
71 .data = (char[]){__VA_ARGS__} }
72
73#define _INIT_DELAY_CMD(...) { \
74 .type = DELAY_CMD,\
75 .len = sizeof((char[]){__VA_ARGS__}), \
76 .data = (char[]){__VA_ARGS__} }
77
78static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
79 _INIT_DCS_CMD(0xFF, 0x20),
80 _INIT_DCS_CMD(0xFB, 0x01),
81 _INIT_DCS_CMD(0x05, 0xD9),
82 _INIT_DCS_CMD(0x07, 0x78),
83 _INIT_DCS_CMD(0x08, 0x5A),
84 _INIT_DCS_CMD(0x0D, 0x63),
85 _INIT_DCS_CMD(0x0E, 0x91),
86 _INIT_DCS_CMD(0x0F, 0x73),
87 _INIT_DCS_CMD(0x95, 0xEB),
88 _INIT_DCS_CMD(0x96, 0xEB),
89 _INIT_DCS_CMD(0x30, 0x11),
90 _INIT_DCS_CMD(0x6D, 0x66),
91 _INIT_DCS_CMD(0x75, 0xA2),
92 _INIT_DCS_CMD(0x77, 0x3B),
93
94 _INIT_DCS_CMD(0xB0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
95 _INIT_DCS_CMD(0xB1, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
96 _INIT_DCS_CMD(0xB2, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
97 _INIT_DCS_CMD(0xB3, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
98
99 _INIT_DCS_CMD(0xB4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
100 _INIT_DCS_CMD(0xB5, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
101 _INIT_DCS_CMD(0xB6, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
102 _INIT_DCS_CMD(0xB7, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
103 _INIT_DCS_CMD(0xB8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
104 _INIT_DCS_CMD(0xB9, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
105 _INIT_DCS_CMD(0xBA, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
106 _INIT_DCS_CMD(0xBB, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
107
108 _INIT_DCS_CMD(0xFF, 0x21),
109 _INIT_DCS_CMD(0xFB, 0x01),
110
111 _INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
112 _INIT_DCS_CMD(0xB1, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
113 _INIT_DCS_CMD(0xB2, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
114 _INIT_DCS_CMD(0xB3, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xF7),
115
116 _INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
117 _INIT_DCS_CMD(0xB5, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
118 _INIT_DCS_CMD(0xB6, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
119 _INIT_DCS_CMD(0xB7, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xF7),
120
121 _INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
122 _INIT_DCS_CMD(0xB9, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
123 _INIT_DCS_CMD(0xBA, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
124 _INIT_DCS_CMD(0xBB, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xF7),
125
126 _INIT_DCS_CMD(0xFF, 0x24),
127 _INIT_DCS_CMD(0xFB, 0x01),
128
129 _INIT_DCS_CMD(0x00, 0x00),
130 _INIT_DCS_CMD(0x01, 0x00),
131
132 _INIT_DCS_CMD(0x02, 0x1C),
133 _INIT_DCS_CMD(0x03, 0x1C),
134
135 _INIT_DCS_CMD(0x04, 0x1D),
136 _INIT_DCS_CMD(0x05, 0x1D),
137
138 _INIT_DCS_CMD(0x06, 0x04),
139 _INIT_DCS_CMD(0x07, 0x04),
140
141 _INIT_DCS_CMD(0x08, 0x0F),
142 _INIT_DCS_CMD(0x09, 0x0F),
143
144 _INIT_DCS_CMD(0x0A, 0x0E),
145 _INIT_DCS_CMD(0x0B, 0x0E),
146
147 _INIT_DCS_CMD(0x0C, 0x0D),
148 _INIT_DCS_CMD(0x0D, 0x0D),
149
150 _INIT_DCS_CMD(0x0E, 0x0C),
151 _INIT_DCS_CMD(0x0F, 0x0C),
152
153 _INIT_DCS_CMD(0x10, 0x08),
154 _INIT_DCS_CMD(0x11, 0x08),
155
156 _INIT_DCS_CMD(0x12, 0x00),
157 _INIT_DCS_CMD(0x13, 0x00),
158 _INIT_DCS_CMD(0x14, 0x00),
159 _INIT_DCS_CMD(0x15, 0x00),
160
161 _INIT_DCS_CMD(0x16, 0x00),
162 _INIT_DCS_CMD(0x17, 0x00),
163
164 _INIT_DCS_CMD(0x18, 0x1C),
165 _INIT_DCS_CMD(0x19, 0x1C),
166
167 _INIT_DCS_CMD(0x1A, 0x1D),
168 _INIT_DCS_CMD(0x1B, 0x1D),
169
170 _INIT_DCS_CMD(0x1C, 0x04),
171 _INIT_DCS_CMD(0x1D, 0x04),
172
173 _INIT_DCS_CMD(0x1E, 0x0F),
174 _INIT_DCS_CMD(0x1F, 0x0F),
175
176 _INIT_DCS_CMD(0x20, 0x0E),
177 _INIT_DCS_CMD(0x21, 0x0E),
178
179 _INIT_DCS_CMD(0x22, 0x0D),
180 _INIT_DCS_CMD(0x23, 0x0D),
181
182 _INIT_DCS_CMD(0x24, 0x0C),
183 _INIT_DCS_CMD(0x25, 0x0C),
184
185 _INIT_DCS_CMD(0x26, 0x08),
186 _INIT_DCS_CMD(0x27, 0x08),
187
188 _INIT_DCS_CMD(0x28, 0x00),
189 _INIT_DCS_CMD(0x29, 0x00),
190 _INIT_DCS_CMD(0x2A, 0x00),
191 _INIT_DCS_CMD(0x2B, 0x00),
192
193 _INIT_DCS_CMD(0x2D, 0x20),
194 _INIT_DCS_CMD(0x2F, 0x0A),
195 _INIT_DCS_CMD(0x30, 0x44),
196 _INIT_DCS_CMD(0x33, 0x0C),
197 _INIT_DCS_CMD(0x34, 0x32),
198
199 _INIT_DCS_CMD(0x37, 0x44),
200 _INIT_DCS_CMD(0x38, 0x40),
201 _INIT_DCS_CMD(0x39, 0x00),
202 _INIT_DCS_CMD(0x3A, 0x5D),
203 _INIT_DCS_CMD(0x3B, 0x60),
204 _INIT_DCS_CMD(0x3D, 0x42),
205 _INIT_DCS_CMD(0x3F, 0x06),
206 _INIT_DCS_CMD(0x43, 0x06),
207 _INIT_DCS_CMD(0x47, 0x66),
208 _INIT_DCS_CMD(0x4A, 0x5D),
209 _INIT_DCS_CMD(0x4B, 0x60),
210 _INIT_DCS_CMD(0x4C, 0x91),
211 _INIT_DCS_CMD(0x4D, 0x21),
212 _INIT_DCS_CMD(0x4E, 0x43),
213 _INIT_DCS_CMD(0x51, 0x12),
214 _INIT_DCS_CMD(0x52, 0x34),
215 _INIT_DCS_CMD(0x55, 0x82, 0x02),
216 _INIT_DCS_CMD(0x56, 0x04),
217 _INIT_DCS_CMD(0x58, 0x21),
218 _INIT_DCS_CMD(0x59, 0x30),
219 _INIT_DCS_CMD(0x5A, 0x60),
220 _INIT_DCS_CMD(0x5B, 0x50),
221 _INIT_DCS_CMD(0x5E, 0x00, 0x06),
222 _INIT_DCS_CMD(0x5F, 0x00),
223 _INIT_DCS_CMD(0x65, 0x82),
224 _INIT_DCS_CMD(0x7E, 0x20),
225 _INIT_DCS_CMD(0x7F, 0x3C),
226 _INIT_DCS_CMD(0x82, 0x04),
227 _INIT_DCS_CMD(0x97, 0xC0),
228 _INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00),
229 _INIT_DCS_CMD(0x91, 0x44),
230 _INIT_DCS_CMD(0x92, 0xA9),
231 _INIT_DCS_CMD(0x93, 0x1A),
232 _INIT_DCS_CMD(0x94, 0x96),
233 _INIT_DCS_CMD(0xD7, 0x55),
234 _INIT_DCS_CMD(0xDA, 0x0A),
235 _INIT_DCS_CMD(0xDE, 0x08),
236 _INIT_DCS_CMD(0xDB, 0x05),
237 _INIT_DCS_CMD(0xDC, 0xA9),
238 _INIT_DCS_CMD(0xDD, 0x22),
239
240 _INIT_DCS_CMD(0xDF, 0x05),
241 _INIT_DCS_CMD(0xE0, 0xA9),
242 _INIT_DCS_CMD(0xE1, 0x05),
243 _INIT_DCS_CMD(0xE2, 0xA9),
244 _INIT_DCS_CMD(0xE3, 0x05),
245 _INIT_DCS_CMD(0xE4, 0xA9),
246 _INIT_DCS_CMD(0xE5, 0x05),
247 _INIT_DCS_CMD(0xE6, 0xA9),
248 _INIT_DCS_CMD(0x5C, 0x00),
249 _INIT_DCS_CMD(0x5D, 0x00),
250 _INIT_DCS_CMD(0x8D, 0x00),
251 _INIT_DCS_CMD(0x8E, 0x00),
252 _INIT_DCS_CMD(0xB5, 0x90),
253 _INIT_DCS_CMD(0xFF, 0x25),
254 _INIT_DCS_CMD(0xFB, 0x01),
255 _INIT_DCS_CMD(0x05, 0x00),
256 _INIT_DCS_CMD(0x19, 0x07),
257 _INIT_DCS_CMD(0x1F, 0x60),
258 _INIT_DCS_CMD(0x20, 0x50),
259 _INIT_DCS_CMD(0x26, 0x60),
260 _INIT_DCS_CMD(0x27, 0x50),
261 _INIT_DCS_CMD(0x33, 0x60),
262 _INIT_DCS_CMD(0x34, 0x50),
263 _INIT_DCS_CMD(0x3F, 0xE0),
264 _INIT_DCS_CMD(0x40, 0x00),
265 _INIT_DCS_CMD(0x44, 0x00),
266 _INIT_DCS_CMD(0x45, 0x40),
267 _INIT_DCS_CMD(0x48, 0x60),
268 _INIT_DCS_CMD(0x49, 0x50),
269 _INIT_DCS_CMD(0x5B, 0x00),
270 _INIT_DCS_CMD(0x5C, 0x00),
271 _INIT_DCS_CMD(0x5D, 0x00),
272 _INIT_DCS_CMD(0x5E, 0xD0),
273 _INIT_DCS_CMD(0x61, 0x60),
274 _INIT_DCS_CMD(0x62, 0x50),
275 _INIT_DCS_CMD(0xF1, 0x10),
276 _INIT_DCS_CMD(0xFF, 0x2A),
277 _INIT_DCS_CMD(0xFB, 0x01),
278
279 _INIT_DCS_CMD(0x64, 0x16),
280 _INIT_DCS_CMD(0x67, 0x16),
281 _INIT_DCS_CMD(0x6A, 0x16),
282
283 _INIT_DCS_CMD(0x70, 0x30),
284
285 _INIT_DCS_CMD(0xA2, 0xF3),
286 _INIT_DCS_CMD(0xA3, 0xFF),
287 _INIT_DCS_CMD(0xA4, 0xFF),
288 _INIT_DCS_CMD(0xA5, 0xFF),
289
290 _INIT_DCS_CMD(0xD6, 0x08),
291
292 _INIT_DCS_CMD(0xFF, 0x26),
293 _INIT_DCS_CMD(0xFB, 0x01),
294 _INIT_DCS_CMD(0x00, 0xA1),
295
296 _INIT_DCS_CMD(0x02, 0x31),
297 _INIT_DCS_CMD(0x04, 0x28),
298 _INIT_DCS_CMD(0x06, 0x30),
299 _INIT_DCS_CMD(0x0C, 0x16),
300 _INIT_DCS_CMD(0x0D, 0x0D),
301 _INIT_DCS_CMD(0x0F, 0x00),
302 _INIT_DCS_CMD(0x11, 0x00),
303 _INIT_DCS_CMD(0x12, 0x50),
304 _INIT_DCS_CMD(0x13, 0x56),
305 _INIT_DCS_CMD(0x14, 0x57),
306 _INIT_DCS_CMD(0x15, 0x00),
307 _INIT_DCS_CMD(0x16, 0x10),
308 _INIT_DCS_CMD(0x17, 0xA0),
309 _INIT_DCS_CMD(0x18, 0x86),
310 _INIT_DCS_CMD(0x19, 0x0D),
311 _INIT_DCS_CMD(0x1A, 0x7F),
312 _INIT_DCS_CMD(0x1B, 0x0C),
313 _INIT_DCS_CMD(0x1C, 0xBF),
314 _INIT_DCS_CMD(0x22, 0x00),
315 _INIT_DCS_CMD(0x23, 0x00),
316 _INIT_DCS_CMD(0x2A, 0x0D),
317 _INIT_DCS_CMD(0x2B, 0x7F),
318
319 _INIT_DCS_CMD(0x1D, 0x00),
320 _INIT_DCS_CMD(0x1E, 0x65),
321 _INIT_DCS_CMD(0x1F, 0x65),
322 _INIT_DCS_CMD(0x24, 0x00),
323 _INIT_DCS_CMD(0x25, 0x65),
324 _INIT_DCS_CMD(0x2F, 0x05),
325 _INIT_DCS_CMD(0x30, 0x65),
326 _INIT_DCS_CMD(0x31, 0x05),
327 _INIT_DCS_CMD(0x32, 0x7D),
328 _INIT_DCS_CMD(0x39, 0x00),
329 _INIT_DCS_CMD(0x3A, 0x65),
330 _INIT_DCS_CMD(0x20, 0x01),
331 _INIT_DCS_CMD(0x33, 0x11),
332 _INIT_DCS_CMD(0x34, 0x78),
333 _INIT_DCS_CMD(0x35, 0x16),
334 _INIT_DCS_CMD(0xC8, 0x04),
335 _INIT_DCS_CMD(0xC9, 0x80),
336 _INIT_DCS_CMD(0xCA, 0x4E),
337 _INIT_DCS_CMD(0xCB, 0x00),
338 _INIT_DCS_CMD(0xA9, 0x4C),
339 _INIT_DCS_CMD(0xAA, 0x47),
340
341 _INIT_DCS_CMD(0xFF, 0x27),
342 _INIT_DCS_CMD(0xFB, 0x01),
343
344 _INIT_DCS_CMD(0x56, 0x06),
345 _INIT_DCS_CMD(0x58, 0x80),
346 _INIT_DCS_CMD(0x59, 0x75),
347 _INIT_DCS_CMD(0x5A, 0x00),
348 _INIT_DCS_CMD(0x5B, 0x02),
349 _INIT_DCS_CMD(0x5C, 0x00),
350 _INIT_DCS_CMD(0x5D, 0x00),
351 _INIT_DCS_CMD(0x5E, 0x20),
352 _INIT_DCS_CMD(0x5F, 0x10),
353 _INIT_DCS_CMD(0x60, 0x00),
354 _INIT_DCS_CMD(0x61, 0x2E),
355 _INIT_DCS_CMD(0x62, 0x00),
356 _INIT_DCS_CMD(0x63, 0x01),
357 _INIT_DCS_CMD(0x64, 0x43),
358 _INIT_DCS_CMD(0x65, 0x2D),
359 _INIT_DCS_CMD(0x66, 0x00),
360 _INIT_DCS_CMD(0x67, 0x01),
361 _INIT_DCS_CMD(0x68, 0x44),
362
363 _INIT_DCS_CMD(0x00, 0x00),
364 _INIT_DCS_CMD(0x78, 0x00),
365 _INIT_DCS_CMD(0xC3, 0x00),
366
367 _INIT_DCS_CMD(0xFF, 0x2A),
368 _INIT_DCS_CMD(0xFB, 0x01),
369
370 _INIT_DCS_CMD(0x22, 0x2F),
371 _INIT_DCS_CMD(0x23, 0x08),
372
373 _INIT_DCS_CMD(0x24, 0x00),
374 _INIT_DCS_CMD(0x25, 0x65),
375 _INIT_DCS_CMD(0x26, 0xF8),
376 _INIT_DCS_CMD(0x27, 0x00),
377 _INIT_DCS_CMD(0x28, 0x1A),
378 _INIT_DCS_CMD(0x29, 0x00),
379 _INIT_DCS_CMD(0x2A, 0x1A),
380 _INIT_DCS_CMD(0x2B, 0x00),
381 _INIT_DCS_CMD(0x2D, 0x1A),
382
383 _INIT_DCS_CMD(0xFF, 0x23),
384 _INIT_DCS_CMD(0xFB, 0x01),
385
386 _INIT_DCS_CMD(0x00, 0x80),
387 _INIT_DCS_CMD(0x07, 0x00),
388
389 _INIT_DCS_CMD(0xFF, 0xE0),
390 _INIT_DCS_CMD(0xFB, 0x01),
391 _INIT_DCS_CMD(0x14, 0x60),
392 _INIT_DCS_CMD(0x16, 0xC0),
393
394 _INIT_DCS_CMD(0xFF, 0xF0),
395 _INIT_DCS_CMD(0xFB, 0x01),
396 _INIT_DCS_CMD(0x3A, 0x08),
397
398 _INIT_DCS_CMD(0xFF, 0x10),
399 _INIT_DCS_CMD(0xFB, 0x01),
400 _INIT_DCS_CMD(0xB9, 0x01),
401 _INIT_DCS_CMD(0xFF, 0x20),
402 _INIT_DCS_CMD(0xFB, 0x01),
403 _INIT_DCS_CMD(0x18, 0x40),
404
405 _INIT_DCS_CMD(0xFF, 0x10),
406 _INIT_DCS_CMD(0xFB, 0x01),
407 _INIT_DCS_CMD(0xB9, 0x02),
408 _INIT_DCS_CMD(0x35, 0x00),
409 _INIT_DCS_CMD(0x51, 0x00, 0xFF),
410 _INIT_DCS_CMD(0x53, 0x24),
411 _INIT_DCS_CMD(0x55, 0x00),
412 _INIT_DCS_CMD(0xBB, 0x13),
413 _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04),
414 _INIT_DELAY_CMD(100),
415 _INIT_DCS_CMD(0x11),
416 _INIT_DELAY_CMD(200),
417 _INIT_DCS_CMD(0x29),
418 _INIT_DELAY_CMD(100),
419 {},
420};
421
422static const struct panel_init_cmd inx_init_cmd[] = {
423 _INIT_DCS_CMD(0xFF, 0x20),
424 _INIT_DCS_CMD(0xFB, 0x01),
425 _INIT_DCS_CMD(0x05, 0xD1),
426 _INIT_DCS_CMD(0x0D, 0x63),
427 _INIT_DCS_CMD(0x07, 0x8C),
428 _INIT_DCS_CMD(0x08, 0x4B),
429 _INIT_DCS_CMD(0x0E, 0x91),
430 _INIT_DCS_CMD(0x0F, 0x69),
431 _INIT_DCS_CMD(0x95, 0xFF),
432 _INIT_DCS_CMD(0x96, 0xFF),
433 _INIT_DCS_CMD(0x9D, 0x0A),
434 _INIT_DCS_CMD(0x9E, 0x0A),
435 _INIT_DCS_CMD(0x69, 0x98),
436 _INIT_DCS_CMD(0x75, 0xA2),
437 _INIT_DCS_CMD(0x77, 0xB3),
438 _INIT_DCS_CMD(0xFF, 0x24),
439 _INIT_DCS_CMD(0xFB, 0x01),
440 _INIT_DCS_CMD(0x91, 0x44),
441 _INIT_DCS_CMD(0x92, 0x7A),
442 _INIT_DCS_CMD(0x93, 0x1A),
443 _INIT_DCS_CMD(0x94, 0x40),
444 _INIT_DCS_CMD(0x9A, 0x08),
445 _INIT_DCS_CMD(0x60, 0x96),
446 _INIT_DCS_CMD(0x61, 0xD0),
447 _INIT_DCS_CMD(0x63, 0x70),
448 _INIT_DCS_CMD(0xC2, 0xCF),
449 _INIT_DCS_CMD(0x9B, 0x0F),
450 _INIT_DCS_CMD(0x9A, 0x08),
451 _INIT_DCS_CMD(0x00, 0x03),
452 _INIT_DCS_CMD(0x01, 0x03),
453 _INIT_DCS_CMD(0x02, 0x03),
454 _INIT_DCS_CMD(0x03, 0x03),
455 _INIT_DCS_CMD(0x04, 0x03),
456 _INIT_DCS_CMD(0x05, 0x03),
457 _INIT_DCS_CMD(0x06, 0x22),
458 _INIT_DCS_CMD(0x07, 0x06),
459 _INIT_DCS_CMD(0x08, 0x00),
460 _INIT_DCS_CMD(0x09, 0x1D),
461 _INIT_DCS_CMD(0x0A, 0x1C),
462 _INIT_DCS_CMD(0x0B, 0x13),
463 _INIT_DCS_CMD(0x0C, 0x12),
464 _INIT_DCS_CMD(0x0D, 0x11),
465 _INIT_DCS_CMD(0x0E, 0x10),
466 _INIT_DCS_CMD(0x0F, 0x0F),
467 _INIT_DCS_CMD(0x10, 0x0E),
468 _INIT_DCS_CMD(0x11, 0x0D),
469 _INIT_DCS_CMD(0x12, 0x0C),
470 _INIT_DCS_CMD(0x13, 0x04),
471 _INIT_DCS_CMD(0x14, 0x03),
472 _INIT_DCS_CMD(0x15, 0x03),
473 _INIT_DCS_CMD(0x16, 0x03),
474 _INIT_DCS_CMD(0x17, 0x03),
475 _INIT_DCS_CMD(0x18, 0x03),
476 _INIT_DCS_CMD(0x19, 0x03),
477 _INIT_DCS_CMD(0x1A, 0x03),
478 _INIT_DCS_CMD(0x1B, 0x03),
479 _INIT_DCS_CMD(0x1C, 0x22),
480 _INIT_DCS_CMD(0x1D, 0x06),
481 _INIT_DCS_CMD(0x1E, 0x00),
482 _INIT_DCS_CMD(0x1F, 0x1D),
483 _INIT_DCS_CMD(0x20, 0x1C),
484 _INIT_DCS_CMD(0x21, 0x13),
485 _INIT_DCS_CMD(0x22, 0x12),
486 _INIT_DCS_CMD(0x23, 0x11),
487 _INIT_DCS_CMD(0x24, 0x10),
488 _INIT_DCS_CMD(0x25, 0x0F),
489 _INIT_DCS_CMD(0x26, 0x0E),
490 _INIT_DCS_CMD(0x27, 0x0D),
491 _INIT_DCS_CMD(0x28, 0x0C),
492 _INIT_DCS_CMD(0x29, 0x04),
493 _INIT_DCS_CMD(0x2A, 0x03),
494 _INIT_DCS_CMD(0x2B, 0x03),
495
496 _INIT_DCS_CMD(0x2F, 0x06),
497 _INIT_DCS_CMD(0x30, 0x32),
498 _INIT_DCS_CMD(0x31, 0x43),
499 _INIT_DCS_CMD(0x33, 0x06),
500 _INIT_DCS_CMD(0x34, 0x32),
501 _INIT_DCS_CMD(0x35, 0x43),
502 _INIT_DCS_CMD(0x37, 0x44),
503 _INIT_DCS_CMD(0x38, 0x40),
504 _INIT_DCS_CMD(0x39, 0x00),
505 _INIT_DCS_CMD(0x3A, 0x01),
506 _INIT_DCS_CMD(0x3B, 0x48),
507 _INIT_DCS_CMD(0x3D, 0x93),
508 _INIT_DCS_CMD(0xAB, 0x44),
509 _INIT_DCS_CMD(0xAC, 0x40),
510
511 _INIT_DCS_CMD(0x4D, 0x21),
512 _INIT_DCS_CMD(0x4E, 0x43),
513 _INIT_DCS_CMD(0x4F, 0x65),
514 _INIT_DCS_CMD(0x50, 0x87),
515 _INIT_DCS_CMD(0x51, 0x78),
516 _INIT_DCS_CMD(0x52, 0x56),
517 _INIT_DCS_CMD(0x53, 0x34),
518 _INIT_DCS_CMD(0x54, 0x21),
519 _INIT_DCS_CMD(0x55, 0x83),
520 _INIT_DCS_CMD(0x56, 0x08),
521 _INIT_DCS_CMD(0x58, 0x21),
522 _INIT_DCS_CMD(0x59, 0x40),
523 _INIT_DCS_CMD(0x5A, 0x09),
524 _INIT_DCS_CMD(0x5B, 0x48),
525 _INIT_DCS_CMD(0x5E, 0x00, 0x10),
526 _INIT_DCS_CMD(0x5F, 0x00),
527
528 _INIT_DCS_CMD(0x7A, 0x00),
529 _INIT_DCS_CMD(0x7B, 0x00),
530 _INIT_DCS_CMD(0x7C, 0x00),
531 _INIT_DCS_CMD(0x7D, 0x00),
532 _INIT_DCS_CMD(0x7E, 0x20),
533 _INIT_DCS_CMD(0x7F, 0x3C),
534 _INIT_DCS_CMD(0x80, 0x00),
535 _INIT_DCS_CMD(0x81, 0x00),
536 _INIT_DCS_CMD(0x82, 0x08),
537 _INIT_DCS_CMD(0x97, 0x02),
538 _INIT_DCS_CMD(0xC5, 0x10),
539 _INIT_DCS_CMD(0xDA, 0x05),
540 _INIT_DCS_CMD(0xDB, 0x01),
541 _INIT_DCS_CMD(0xDC, 0x7A),
542 _INIT_DCS_CMD(0xDD, 0x55),
543 _INIT_DCS_CMD(0xDE, 0x27),
544 _INIT_DCS_CMD(0xDF, 0x01),
545 _INIT_DCS_CMD(0xE0, 0x7A),
546 _INIT_DCS_CMD(0xE1, 0x01),
547 _INIT_DCS_CMD(0xE2, 0x7A),
548 _INIT_DCS_CMD(0xE3, 0x01),
549 _INIT_DCS_CMD(0xE4, 0x7A),
550 _INIT_DCS_CMD(0xE5, 0x01),
551 _INIT_DCS_CMD(0xE6, 0x7A),
552 _INIT_DCS_CMD(0xE7, 0x00),
553 _INIT_DCS_CMD(0xE8, 0x00),
554 _INIT_DCS_CMD(0xE9, 0x01),
555 _INIT_DCS_CMD(0xEA, 0x7A),
556 _INIT_DCS_CMD(0xEB, 0x01),
557 _INIT_DCS_CMD(0xEE, 0x7A),
558 _INIT_DCS_CMD(0xEF, 0x01),
559 _INIT_DCS_CMD(0xF0, 0x7A),
560
561 _INIT_DCS_CMD(0xFF, 0x25),
562 _INIT_DCS_CMD(0xFB, 0x01),
563
564 _INIT_DCS_CMD(0x05, 0x00),
565
566 _INIT_DCS_CMD(0xF1, 0x10),
567 _INIT_DCS_CMD(0x1E, 0x00),
568 _INIT_DCS_CMD(0x1F, 0x09),
569 _INIT_DCS_CMD(0x20, 0x46),
570 _INIT_DCS_CMD(0x25, 0x00),
571 _INIT_DCS_CMD(0x26, 0x09),
572 _INIT_DCS_CMD(0x27, 0x46),
573 _INIT_DCS_CMD(0x3F, 0x80),
574 _INIT_DCS_CMD(0x40, 0x00),
575 _INIT_DCS_CMD(0x43, 0x00),
576
577 _INIT_DCS_CMD(0x44, 0x09),
578 _INIT_DCS_CMD(0x45, 0x46),
579
580 _INIT_DCS_CMD(0x48, 0x09),
581 _INIT_DCS_CMD(0x49, 0x46),
582 _INIT_DCS_CMD(0x5B, 0x80),
583 _INIT_DCS_CMD(0x5C, 0x00),
584 _INIT_DCS_CMD(0x5D, 0x01),
585 _INIT_DCS_CMD(0x5E, 0x46),
586 _INIT_DCS_CMD(0x61, 0x01),
587 _INIT_DCS_CMD(0x62, 0x46),
588 _INIT_DCS_CMD(0x68, 0x10),
589 _INIT_DCS_CMD(0xFF, 0x26),
590 _INIT_DCS_CMD(0xFB, 0x01),
591
592 _INIT_DCS_CMD(0x00, 0xA1),
593 _INIT_DCS_CMD(0x02, 0x31),
594 _INIT_DCS_CMD(0x0A, 0xF2),
595 _INIT_DCS_CMD(0x04, 0x28),
596 _INIT_DCS_CMD(0x06, 0x30),
597 _INIT_DCS_CMD(0x0C, 0x16),
598 _INIT_DCS_CMD(0x0D, 0x0D),
599 _INIT_DCS_CMD(0x0F, 0x00),
600 _INIT_DCS_CMD(0x11, 0x00),
601 _INIT_DCS_CMD(0x12, 0x50),
602 _INIT_DCS_CMD(0x13, 0x56),
603 _INIT_DCS_CMD(0x14, 0x57),
604 _INIT_DCS_CMD(0x15, 0x00),
605 _INIT_DCS_CMD(0x16, 0x10),
606 _INIT_DCS_CMD(0x17, 0xA0),
607 _INIT_DCS_CMD(0x18, 0x86),
608 _INIT_DCS_CMD(0x22, 0x00),
609 _INIT_DCS_CMD(0x23, 0x00),
610 _INIT_DCS_CMD(0x19, 0x0D),
611 _INIT_DCS_CMD(0x1A, 0x7F),
612 _INIT_DCS_CMD(0x1B, 0x0C),
613 _INIT_DCS_CMD(0x1C, 0xBF),
614 _INIT_DCS_CMD(0x2A, 0x0D),
615 _INIT_DCS_CMD(0x2B, 0x7F),
616 _INIT_DCS_CMD(0x20, 0x00),
617
618 _INIT_DCS_CMD(0x1D, 0x00),
619 _INIT_DCS_CMD(0x1E, 0x78),
620 _INIT_DCS_CMD(0x1F, 0x78),
621
622 _INIT_DCS_CMD(0x2F, 0x03),
623 _INIT_DCS_CMD(0x30, 0x78),
624 _INIT_DCS_CMD(0x33, 0x78),
625 _INIT_DCS_CMD(0x34, 0x66),
626 _INIT_DCS_CMD(0x35, 0x11),
627
628 _INIT_DCS_CMD(0x39, 0x10),
629 _INIT_DCS_CMD(0x3A, 0x78),
630 _INIT_DCS_CMD(0x3B, 0x06),
631
632 _INIT_DCS_CMD(0xC8, 0x04),
633 _INIT_DCS_CMD(0xC9, 0x84),
634 _INIT_DCS_CMD(0xCA, 0x4E),
635 _INIT_DCS_CMD(0xCB, 0x00),
636
637 _INIT_DCS_CMD(0xA9, 0x50),
638 _INIT_DCS_CMD(0xAA, 0x4F),
639 _INIT_DCS_CMD(0xAB, 0x4D),
640 _INIT_DCS_CMD(0xAC, 0x4A),
641 _INIT_DCS_CMD(0xAD, 0x48),
642 _INIT_DCS_CMD(0xAE, 0x46),
643 _INIT_DCS_CMD(0xFF, 0x27),
644 _INIT_DCS_CMD(0xFB, 0x01),
645 _INIT_DCS_CMD(0xC0, 0x18),
646 _INIT_DCS_CMD(0xC1, 0x00),
647 _INIT_DCS_CMD(0xC2, 0x00),
648 _INIT_DCS_CMD(0x56, 0x06),
649 _INIT_DCS_CMD(0x58, 0x80),
650 _INIT_DCS_CMD(0x59, 0x75),
651 _INIT_DCS_CMD(0x5A, 0x00),
652 _INIT_DCS_CMD(0x5B, 0x02),
653 _INIT_DCS_CMD(0x5C, 0x00),
654 _INIT_DCS_CMD(0x5D, 0x00),
655 _INIT_DCS_CMD(0x5E, 0x20),
656 _INIT_DCS_CMD(0x5F, 0x10),
657 _INIT_DCS_CMD(0x60, 0x00),
658 _INIT_DCS_CMD(0x61, 0x2E),
659 _INIT_DCS_CMD(0x62, 0x00),
660 _INIT_DCS_CMD(0x63, 0x01),
661 _INIT_DCS_CMD(0x64, 0x43),
662 _INIT_DCS_CMD(0x65, 0x2D),
663 _INIT_DCS_CMD(0x66, 0x00),
664 _INIT_DCS_CMD(0x67, 0x01),
665 _INIT_DCS_CMD(0x68, 0x43),
666 _INIT_DCS_CMD(0x98, 0x01),
667 _INIT_DCS_CMD(0xB4, 0x03),
668 _INIT_DCS_CMD(0x9B, 0xBD),
669 _INIT_DCS_CMD(0xA0, 0x90),
670 _INIT_DCS_CMD(0xAB, 0x1B),
671 _INIT_DCS_CMD(0xBC, 0x0C),
672 _INIT_DCS_CMD(0xBD, 0x28),
673
674 _INIT_DCS_CMD(0xFF, 0x2A),
675 _INIT_DCS_CMD(0xFB, 0x01),
676
677 _INIT_DCS_CMD(0x22, 0x2F),
678 _INIT_DCS_CMD(0x23, 0x08),
679
680 _INIT_DCS_CMD(0x24, 0x00),
681 _INIT_DCS_CMD(0x25, 0x65),
682 _INIT_DCS_CMD(0x26, 0xF8),
683 _INIT_DCS_CMD(0x27, 0x00),
684 _INIT_DCS_CMD(0x28, 0x1A),
685 _INIT_DCS_CMD(0x29, 0x00),
686 _INIT_DCS_CMD(0x2A, 0x1A),
687 _INIT_DCS_CMD(0x2B, 0x00),
688 _INIT_DCS_CMD(0x2D, 0x1A),
689
690 _INIT_DCS_CMD(0x64, 0x96),
691 _INIT_DCS_CMD(0x65, 0x00),
692 _INIT_DCS_CMD(0x66, 0x00),
693 _INIT_DCS_CMD(0x6A, 0x96),
694 _INIT_DCS_CMD(0x6B, 0x00),
695 _INIT_DCS_CMD(0x6C, 0x00),
696 _INIT_DCS_CMD(0x70, 0x92),
697 _INIT_DCS_CMD(0x71, 0x00),
698 _INIT_DCS_CMD(0x72, 0x00),
699 _INIT_DCS_CMD(0xA2, 0x33),
700 _INIT_DCS_CMD(0xA3, 0x30),
701 _INIT_DCS_CMD(0xA4, 0xC0),
702 _INIT_DCS_CMD(0xE8, 0x00),
703 _INIT_DCS_CMD(0xFF, 0xF0),
704 _INIT_DCS_CMD(0xFB, 0x01),
705 _INIT_DCS_CMD(0x3A, 0x08),
706 _INIT_DCS_CMD(0xFF, 0xD0),
707 _INIT_DCS_CMD(0xFB, 0x01),
708 _INIT_DCS_CMD(0x00, 0x33),
709 _INIT_DCS_CMD(0x02, 0x77),
710 _INIT_DCS_CMD(0x08, 0x01),
711 _INIT_DCS_CMD(0x09, 0xBF),
712 _INIT_DCS_CMD(0x28, 0x30),
713 _INIT_DCS_CMD(0x2F, 0x33),
714 _INIT_DCS_CMD(0xFF, 0x23),
715 _INIT_DCS_CMD(0xFB, 0x01),
716 _INIT_DCS_CMD(0x00, 0x80),
717 _INIT_DCS_CMD(0x07, 0x00),
718 _INIT_DCS_CMD(0xFF, 0x20),
719 _INIT_DCS_CMD(0xFB, 0x01),
720 _INIT_DCS_CMD(0x30, 0x00),
721 _INIT_DCS_CMD(0xFF, 0x10),
722 _INIT_DCS_CMD(0xB9, 0x01),
723 _INIT_DCS_CMD(0xFF, 0x20),
724 _INIT_DCS_CMD(0x18, 0x40),
725 _INIT_DCS_CMD(0xFF, 0x10),
726 _INIT_DCS_CMD(0xB9, 0x02),
727 _INIT_DCS_CMD(0xFF, 0x10),
728 _INIT_DCS_CMD(0xFB, 0x01),
729 _INIT_DCS_CMD(0xBB, 0x13),
730 _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04),
731 _INIT_DCS_CMD(0x35, 0x00),
732 _INIT_DCS_CMD(0x51, 0x0F, 0xFF),
733 _INIT_DCS_CMD(0x53, 0x24),
734 _INIT_DELAY_CMD(100),
735 _INIT_DCS_CMD(0x11),
736 _INIT_DELAY_CMD(200),
737 _INIT_DCS_CMD(0x29),
738 _INIT_DELAY_CMD(100),
739 {},
740};
741
742static const struct panel_init_cmd boe_init_cmd[] = {
743 _INIT_DELAY_CMD(24),
744 _INIT_DCS_CMD(0xB0, 0x05),
745 _INIT_DCS_CMD(0xB1, 0xE5),
746 _INIT_DCS_CMD(0xB3, 0x52),
747 _INIT_DCS_CMD(0xB0, 0x00),
748 _INIT_DCS_CMD(0xB3, 0x88),
749 _INIT_DCS_CMD(0xB0, 0x04),
750 _INIT_DCS_CMD(0xB8, 0x00),
751 _INIT_DCS_CMD(0xB0, 0x00),
752 _INIT_DCS_CMD(0xB6, 0x03),
753 _INIT_DCS_CMD(0xBA, 0x8B),
754 _INIT_DCS_CMD(0xBF, 0x1A),
755 _INIT_DCS_CMD(0xC0, 0x0F),
756 _INIT_DCS_CMD(0xC2, 0x0C),
757 _INIT_DCS_CMD(0xC3, 0x02),
758 _INIT_DCS_CMD(0xC4, 0x0C),
759 _INIT_DCS_CMD(0xC5, 0x02),
760 _INIT_DCS_CMD(0xB0, 0x01),
761 _INIT_DCS_CMD(0xE0, 0x26),
762 _INIT_DCS_CMD(0xE1, 0x26),
763 _INIT_DCS_CMD(0xDC, 0x00),
764 _INIT_DCS_CMD(0xDD, 0x00),
765 _INIT_DCS_CMD(0xCC, 0x26),
766 _INIT_DCS_CMD(0xCD, 0x26),
767 _INIT_DCS_CMD(0xC8, 0x00),
768 _INIT_DCS_CMD(0xC9, 0x00),
769 _INIT_DCS_CMD(0xD2, 0x03),
770 _INIT_DCS_CMD(0xD3, 0x03),
771 _INIT_DCS_CMD(0xE6, 0x04),
772 _INIT_DCS_CMD(0xE7, 0x04),
773 _INIT_DCS_CMD(0xC4, 0x09),
774 _INIT_DCS_CMD(0xC5, 0x09),
775 _INIT_DCS_CMD(0xD8, 0x0A),
776 _INIT_DCS_CMD(0xD9, 0x0A),
777 _INIT_DCS_CMD(0xC2, 0x0B),
778 _INIT_DCS_CMD(0xC3, 0x0B),
779 _INIT_DCS_CMD(0xD6, 0x0C),
780 _INIT_DCS_CMD(0xD7, 0x0C),
781 _INIT_DCS_CMD(0xC0, 0x05),
782 _INIT_DCS_CMD(0xC1, 0x05),
783 _INIT_DCS_CMD(0xD4, 0x06),
784 _INIT_DCS_CMD(0xD5, 0x06),
785 _INIT_DCS_CMD(0xCA, 0x07),
786 _INIT_DCS_CMD(0xCB, 0x07),
787 _INIT_DCS_CMD(0xDE, 0x08),
788 _INIT_DCS_CMD(0xDF, 0x08),
789 _INIT_DCS_CMD(0xB0, 0x02),
790 _INIT_DCS_CMD(0xC0, 0x00),
791 _INIT_DCS_CMD(0xC1, 0x0D),
792 _INIT_DCS_CMD(0xC2, 0x17),
793 _INIT_DCS_CMD(0xC3, 0x26),
794 _INIT_DCS_CMD(0xC4, 0x31),
795 _INIT_DCS_CMD(0xC5, 0x1C),
796 _INIT_DCS_CMD(0xC6, 0x2C),
797 _INIT_DCS_CMD(0xC7, 0x33),
798 _INIT_DCS_CMD(0xC8, 0x31),
799 _INIT_DCS_CMD(0xC9, 0x37),
800 _INIT_DCS_CMD(0xCA, 0x37),
801 _INIT_DCS_CMD(0xCB, 0x37),
802 _INIT_DCS_CMD(0xCC, 0x39),
803 _INIT_DCS_CMD(0xCD, 0x2E),
804 _INIT_DCS_CMD(0xCE, 0x2F),
805 _INIT_DCS_CMD(0xCF, 0x2F),
806 _INIT_DCS_CMD(0xD0, 0x07),
807 _INIT_DCS_CMD(0xD2, 0x00),
808 _INIT_DCS_CMD(0xD3, 0x0D),
809 _INIT_DCS_CMD(0xD4, 0x17),
810 _INIT_DCS_CMD(0xD5, 0x26),
811 _INIT_DCS_CMD(0xD6, 0x31),
812 _INIT_DCS_CMD(0xD7, 0x3F),
813 _INIT_DCS_CMD(0xD8, 0x3F),
814 _INIT_DCS_CMD(0xD9, 0x3F),
815 _INIT_DCS_CMD(0xDA, 0x3F),
816 _INIT_DCS_CMD(0xDB, 0x37),
817 _INIT_DCS_CMD(0xDC, 0x37),
818 _INIT_DCS_CMD(0xDD, 0x37),
819 _INIT_DCS_CMD(0xDE, 0x39),
820 _INIT_DCS_CMD(0xDF, 0x2E),
821 _INIT_DCS_CMD(0xE0, 0x2F),
822 _INIT_DCS_CMD(0xE1, 0x2F),
823 _INIT_DCS_CMD(0xE2, 0x07),
824 _INIT_DCS_CMD(0xB0, 0x03),
825 _INIT_DCS_CMD(0xC8, 0x0B),
826 _INIT_DCS_CMD(0xC9, 0x07),
827 _INIT_DCS_CMD(0xC3, 0x00),
828 _INIT_DCS_CMD(0xE7, 0x00),
829 _INIT_DCS_CMD(0xC5, 0x2A),
830 _INIT_DCS_CMD(0xDE, 0x2A),
831 _INIT_DCS_CMD(0xCA, 0x43),
832 _INIT_DCS_CMD(0xC9, 0x07),
833 _INIT_DCS_CMD(0xE4, 0xC0),
834 _INIT_DCS_CMD(0xE5, 0x0D),
835 _INIT_DCS_CMD(0xCB, 0x00),
836 _INIT_DCS_CMD(0xB0, 0x06),
837 _INIT_DCS_CMD(0xB8, 0xA5),
838 _INIT_DCS_CMD(0xC0, 0xA5),
839 _INIT_DCS_CMD(0xC7, 0x0F),
840 _INIT_DCS_CMD(0xD5, 0x32),
841 _INIT_DCS_CMD(0xB8, 0x00),
842 _INIT_DCS_CMD(0xC0, 0x00),
843 _INIT_DCS_CMD(0xBC, 0x00),
844 _INIT_DCS_CMD(0xB0, 0x07),
845 _INIT_DCS_CMD(0xB1, 0x00),
846 _INIT_DCS_CMD(0xB2, 0x02),
847 _INIT_DCS_CMD(0xB3, 0x0F),
848 _INIT_DCS_CMD(0xB4, 0x25),
849 _INIT_DCS_CMD(0xB5, 0x39),
850 _INIT_DCS_CMD(0xB6, 0x4E),
851 _INIT_DCS_CMD(0xB7, 0x72),
852 _INIT_DCS_CMD(0xB8, 0x97),
853 _INIT_DCS_CMD(0xB9, 0xDC),
854 _INIT_DCS_CMD(0xBA, 0x22),
855 _INIT_DCS_CMD(0xBB, 0xA4),
856 _INIT_DCS_CMD(0xBC, 0x2B),
857 _INIT_DCS_CMD(0xBD, 0x2F),
858 _INIT_DCS_CMD(0xBE, 0xA9),
859 _INIT_DCS_CMD(0xBF, 0x25),
860 _INIT_DCS_CMD(0xC0, 0x61),
861 _INIT_DCS_CMD(0xC1, 0x97),
862 _INIT_DCS_CMD(0xC2, 0xB2),
863 _INIT_DCS_CMD(0xC3, 0xCD),
864 _INIT_DCS_CMD(0xC4, 0xD9),
865 _INIT_DCS_CMD(0xC5, 0xE7),
866 _INIT_DCS_CMD(0xC6, 0xF4),
867 _INIT_DCS_CMD(0xC7, 0xFA),
868 _INIT_DCS_CMD(0xC8, 0xFC),
869 _INIT_DCS_CMD(0xC9, 0x00),
870 _INIT_DCS_CMD(0xCA, 0x00),
871 _INIT_DCS_CMD(0xCB, 0x16),
872 _INIT_DCS_CMD(0xCC, 0xAF),
873 _INIT_DCS_CMD(0xCD, 0xFF),
874 _INIT_DCS_CMD(0xCE, 0xFF),
875 _INIT_DCS_CMD(0xB0, 0x08),
876 _INIT_DCS_CMD(0xB1, 0x04),
877 _INIT_DCS_CMD(0xB2, 0x05),
878 _INIT_DCS_CMD(0xB3, 0x11),
879 _INIT_DCS_CMD(0xB4, 0x24),
880 _INIT_DCS_CMD(0xB5, 0x39),
881 _INIT_DCS_CMD(0xB6, 0x4F),
882 _INIT_DCS_CMD(0xB7, 0x72),
883 _INIT_DCS_CMD(0xB8, 0x98),
884 _INIT_DCS_CMD(0xB9, 0xDC),
885 _INIT_DCS_CMD(0xBA, 0x23),
886 _INIT_DCS_CMD(0xBB, 0xA6),
887 _INIT_DCS_CMD(0xBC, 0x2C),
888 _INIT_DCS_CMD(0xBD, 0x30),
889 _INIT_DCS_CMD(0xBE, 0xAA),
890 _INIT_DCS_CMD(0xBF, 0x26),
891 _INIT_DCS_CMD(0xC0, 0x62),
892 _INIT_DCS_CMD(0xC1, 0x9B),
893 _INIT_DCS_CMD(0xC2, 0xB5),
894 _INIT_DCS_CMD(0xC3, 0xCF),
895 _INIT_DCS_CMD(0xC4, 0xDB),
896 _INIT_DCS_CMD(0xC5, 0xE8),
897 _INIT_DCS_CMD(0xC6, 0xF5),
898 _INIT_DCS_CMD(0xC7, 0xFA),
899 _INIT_DCS_CMD(0xC8, 0xFC),
900 _INIT_DCS_CMD(0xC9, 0x00),
901 _INIT_DCS_CMD(0xCA, 0x00),
902 _INIT_DCS_CMD(0xCB, 0x16),
903 _INIT_DCS_CMD(0xCC, 0xAF),
904 _INIT_DCS_CMD(0xCD, 0xFF),
905 _INIT_DCS_CMD(0xCE, 0xFF),
906 _INIT_DCS_CMD(0xB0, 0x09),
907 _INIT_DCS_CMD(0xB1, 0x04),
908 _INIT_DCS_CMD(0xB2, 0x02),
909 _INIT_DCS_CMD(0xB3, 0x16),
910 _INIT_DCS_CMD(0xB4, 0x24),
911 _INIT_DCS_CMD(0xB5, 0x3B),
912 _INIT_DCS_CMD(0xB6, 0x4F),
913 _INIT_DCS_CMD(0xB7, 0x73),
914 _INIT_DCS_CMD(0xB8, 0x99),
915 _INIT_DCS_CMD(0xB9, 0xE0),
916 _INIT_DCS_CMD(0xBA, 0x26),
917 _INIT_DCS_CMD(0xBB, 0xAD),
918 _INIT_DCS_CMD(0xBC, 0x36),
919 _INIT_DCS_CMD(0xBD, 0x3A),
920 _INIT_DCS_CMD(0xBE, 0xAE),
921 _INIT_DCS_CMD(0xBF, 0x2A),
922 _INIT_DCS_CMD(0xC0, 0x66),
923 _INIT_DCS_CMD(0xC1, 0x9E),
924 _INIT_DCS_CMD(0xC2, 0xB8),
925 _INIT_DCS_CMD(0xC3, 0xD1),
926 _INIT_DCS_CMD(0xC4, 0xDD),
927 _INIT_DCS_CMD(0xC5, 0xE9),
928 _INIT_DCS_CMD(0xC6, 0xF6),
929 _INIT_DCS_CMD(0xC7, 0xFA),
930 _INIT_DCS_CMD(0xC8, 0xFC),
931 _INIT_DCS_CMD(0xC9, 0x00),
932 _INIT_DCS_CMD(0xCA, 0x00),
933 _INIT_DCS_CMD(0xCB, 0x16),
934 _INIT_DCS_CMD(0xCC, 0xAF),
935 _INIT_DCS_CMD(0xCD, 0xFF),
936 _INIT_DCS_CMD(0xCE, 0xFF),
937 _INIT_DCS_CMD(0xB0, 0x0A),
938 _INIT_DCS_CMD(0xB1, 0x00),
939 _INIT_DCS_CMD(0xB2, 0x02),
940 _INIT_DCS_CMD(0xB3, 0x0F),
941 _INIT_DCS_CMD(0xB4, 0x25),
942 _INIT_DCS_CMD(0xB5, 0x39),
943 _INIT_DCS_CMD(0xB6, 0x4E),
944 _INIT_DCS_CMD(0xB7, 0x72),
945 _INIT_DCS_CMD(0xB8, 0x97),
946 _INIT_DCS_CMD(0xB9, 0xDC),
947 _INIT_DCS_CMD(0xBA, 0x22),
948 _INIT_DCS_CMD(0xBB, 0xA4),
949 _INIT_DCS_CMD(0xBC, 0x2B),
950 _INIT_DCS_CMD(0xBD, 0x2F),
951 _INIT_DCS_CMD(0xBE, 0xA9),
952 _INIT_DCS_CMD(0xBF, 0x25),
953 _INIT_DCS_CMD(0xC0, 0x61),
954 _INIT_DCS_CMD(0xC1, 0x97),
955 _INIT_DCS_CMD(0xC2, 0xB2),
956 _INIT_DCS_CMD(0xC3, 0xCD),
957 _INIT_DCS_CMD(0xC4, 0xD9),
958 _INIT_DCS_CMD(0xC5, 0xE7),
959 _INIT_DCS_CMD(0xC6, 0xF4),
960 _INIT_DCS_CMD(0xC7, 0xFA),
961 _INIT_DCS_CMD(0xC8, 0xFC),
962 _INIT_DCS_CMD(0xC9, 0x00),
963 _INIT_DCS_CMD(0xCA, 0x00),
964 _INIT_DCS_CMD(0xCB, 0x16),
965 _INIT_DCS_CMD(0xCC, 0xAF),
966 _INIT_DCS_CMD(0xCD, 0xFF),
967 _INIT_DCS_CMD(0xCE, 0xFF),
968 _INIT_DCS_CMD(0xB0, 0x0B),
969 _INIT_DCS_CMD(0xB1, 0x04),
970 _INIT_DCS_CMD(0xB2, 0x05),
971 _INIT_DCS_CMD(0xB3, 0x11),
972 _INIT_DCS_CMD(0xB4, 0x24),
973 _INIT_DCS_CMD(0xB5, 0x39),
974 _INIT_DCS_CMD(0xB6, 0x4F),
975 _INIT_DCS_CMD(0xB7, 0x72),
976 _INIT_DCS_CMD(0xB8, 0x98),
977 _INIT_DCS_CMD(0xB9, 0xDC),
978 _INIT_DCS_CMD(0xBA, 0x23),
979 _INIT_DCS_CMD(0xBB, 0xA6),
980 _INIT_DCS_CMD(0xBC, 0x2C),
981 _INIT_DCS_CMD(0xBD, 0x30),
982 _INIT_DCS_CMD(0xBE, 0xAA),
983 _INIT_DCS_CMD(0xBF, 0x26),
984 _INIT_DCS_CMD(0xC0, 0x62),
985 _INIT_DCS_CMD(0xC1, 0x9B),
986 _INIT_DCS_CMD(0xC2, 0xB5),
987 _INIT_DCS_CMD(0xC3, 0xCF),
988 _INIT_DCS_CMD(0xC4, 0xDB),
989 _INIT_DCS_CMD(0xC5, 0xE8),
990 _INIT_DCS_CMD(0xC6, 0xF5),
991 _INIT_DCS_CMD(0xC7, 0xFA),
992 _INIT_DCS_CMD(0xC8, 0xFC),
993 _INIT_DCS_CMD(0xC9, 0x00),
994 _INIT_DCS_CMD(0xCA, 0x00),
995 _INIT_DCS_CMD(0xCB, 0x16),
996 _INIT_DCS_CMD(0xCC, 0xAF),
997 _INIT_DCS_CMD(0xCD, 0xFF),
998 _INIT_DCS_CMD(0xCE, 0xFF),
999 _INIT_DCS_CMD(0xB0, 0x0C),
1000 _INIT_DCS_CMD(0xB1, 0x04),
1001 _INIT_DCS_CMD(0xB2, 0x02),
1002 _INIT_DCS_CMD(0xB3, 0x16),
1003 _INIT_DCS_CMD(0xB4, 0x24),
1004 _INIT_DCS_CMD(0xB5, 0x3B),
1005 _INIT_DCS_CMD(0xB6, 0x4F),
1006 _INIT_DCS_CMD(0xB7, 0x73),
1007 _INIT_DCS_CMD(0xB8, 0x99),
1008 _INIT_DCS_CMD(0xB9, 0xE0),
1009 _INIT_DCS_CMD(0xBA, 0x26),
1010 _INIT_DCS_CMD(0xBB, 0xAD),
1011 _INIT_DCS_CMD(0xBC, 0x36),
1012 _INIT_DCS_CMD(0xBD, 0x3A),
1013 _INIT_DCS_CMD(0xBE, 0xAE),
1014 _INIT_DCS_CMD(0xBF, 0x2A),
1015 _INIT_DCS_CMD(0xC0, 0x66),
1016 _INIT_DCS_CMD(0xC1, 0x9E),
1017 _INIT_DCS_CMD(0xC2, 0xB8),
1018 _INIT_DCS_CMD(0xC3, 0xD1),
1019 _INIT_DCS_CMD(0xC4, 0xDD),
1020 _INIT_DCS_CMD(0xC5, 0xE9),
1021 _INIT_DCS_CMD(0xC6, 0xF6),
1022 _INIT_DCS_CMD(0xC7, 0xFA),
1023 _INIT_DCS_CMD(0xC8, 0xFC),
1024 _INIT_DCS_CMD(0xC9, 0x00),
1025 _INIT_DCS_CMD(0xCA, 0x00),
1026 _INIT_DCS_CMD(0xCB, 0x16),
1027 _INIT_DCS_CMD(0xCC, 0xAF),
1028 _INIT_DCS_CMD(0xCD, 0xFF),
1029 _INIT_DCS_CMD(0xCE, 0xFF),
1030 _INIT_DCS_CMD(0xB0, 0x00),
1031 _INIT_DCS_CMD(0xB3, 0x08),
1032 _INIT_DCS_CMD(0xB0, 0x04),
1033 _INIT_DCS_CMD(0xB8, 0x68),
1034 _INIT_DELAY_CMD(150),
1035 {},
1036};
1037
1038static const struct panel_init_cmd auo_kd101n80_45na_init_cmd[] = {
1039 _INIT_DELAY_CMD(24),
1040 _INIT_DCS_CMD(0x11),
1041 _INIT_DELAY_CMD(120),
1042 _INIT_DCS_CMD(0x29),
1043 _INIT_DELAY_CMD(120),
1044 {},
1045};
1046
1047static const struct panel_init_cmd auo_b101uan08_3_init_cmd[] = {
1048 _INIT_DELAY_CMD(24),
1049 _INIT_DCS_CMD(0xB0, 0x01),
1050 _INIT_DCS_CMD(0xC0, 0x48),
1051 _INIT_DCS_CMD(0xC1, 0x48),
1052 _INIT_DCS_CMD(0xC2, 0x47),
1053 _INIT_DCS_CMD(0xC3, 0x47),
1054 _INIT_DCS_CMD(0xC4, 0x46),
1055 _INIT_DCS_CMD(0xC5, 0x46),
1056 _INIT_DCS_CMD(0xC6, 0x45),
1057 _INIT_DCS_CMD(0xC7, 0x45),
1058 _INIT_DCS_CMD(0xC8, 0x64),
1059 _INIT_DCS_CMD(0xC9, 0x64),
1060 _INIT_DCS_CMD(0xCA, 0x4F),
1061 _INIT_DCS_CMD(0xCB, 0x4F),
1062 _INIT_DCS_CMD(0xCC, 0x40),
1063 _INIT_DCS_CMD(0xCD, 0x40),
1064 _INIT_DCS_CMD(0xCE, 0x66),
1065 _INIT_DCS_CMD(0xCF, 0x66),
1066 _INIT_DCS_CMD(0xD0, 0x4F),
1067 _INIT_DCS_CMD(0xD1, 0x4F),
1068 _INIT_DCS_CMD(0xD2, 0x41),
1069 _INIT_DCS_CMD(0xD3, 0x41),
1070 _INIT_DCS_CMD(0xD4, 0x48),
1071 _INIT_DCS_CMD(0xD5, 0x48),
1072 _INIT_DCS_CMD(0xD6, 0x47),
1073 _INIT_DCS_CMD(0xD7, 0x47),
1074 _INIT_DCS_CMD(0xD8, 0x46),
1075 _INIT_DCS_CMD(0xD9, 0x46),
1076 _INIT_DCS_CMD(0xDA, 0x45),
1077 _INIT_DCS_CMD(0xDB, 0x45),
1078 _INIT_DCS_CMD(0xDC, 0x64),
1079 _INIT_DCS_CMD(0xDD, 0x64),
1080 _INIT_DCS_CMD(0xDE, 0x4F),
1081 _INIT_DCS_CMD(0xDF, 0x4F),
1082 _INIT_DCS_CMD(0xE0, 0x40),
1083 _INIT_DCS_CMD(0xE1, 0x40),
1084 _INIT_DCS_CMD(0xE2, 0x66),
1085 _INIT_DCS_CMD(0xE3, 0x66),
1086 _INIT_DCS_CMD(0xE4, 0x4F),
1087 _INIT_DCS_CMD(0xE5, 0x4F),
1088 _INIT_DCS_CMD(0xE6, 0x41),
1089 _INIT_DCS_CMD(0xE7, 0x41),
1090 _INIT_DELAY_CMD(150),
1091 {},
1092};
1093
1094static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
1095{
1096 return container_of(panel, struct boe_panel, base);
1097}
1098
1099static int boe_panel_init_dcs_cmd(struct boe_panel *boe)
1100{
1101 struct mipi_dsi_device *dsi = boe->dsi;
1102 struct drm_panel *panel = &boe->base;
1103 int i, err = 0;
1104
1105 if (boe->desc->init_cmds) {
1106 const struct panel_init_cmd *init_cmds = boe->desc->init_cmds;
1107
1108 for (i = 0; init_cmds[i].len != 0; i++) {
1109 const struct panel_init_cmd *cmd = &init_cmds[i];
1110
1111 switch (cmd->type) {
1112 case DELAY_CMD:
1113 msleep(cmd->data[0]);
1114 err = 0;
1115 break;
1116
1117 case INIT_DCS_CMD:
1118 err = mipi_dsi_dcs_write(dsi, cmd->data[0],
1119 cmd->len <= 1 ? NULL :
1120 &cmd->data[1],
1121 cmd->len - 1);
1122 break;
1123
1124 default:
1125 err = -EINVAL;
1126 }
1127
1128 if (err < 0) {
1129 dev_err(panel->dev,
1130 "failed to write command %u\n", i);
1131 return err;
1132 }
1133 }
1134 }
1135 return 0;
1136}
1137
1138static int boe_panel_enter_sleep_mode(struct boe_panel *boe)
1139{
1140 struct mipi_dsi_device *dsi = boe->dsi;
1141 int ret;
1142
1143 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
1144
1145 ret = mipi_dsi_dcs_set_display_off(dsi);
1146 if (ret < 0)
1147 return ret;
1148
1149 ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
1150 if (ret < 0)
1151 return ret;
1152
1153 return 0;
1154}
1155
1156static int boe_panel_unprepare(struct drm_panel *panel)
1157{
1158 struct boe_panel *boe = to_boe_panel(panel);
1159 int ret;
1160
1161 if (!boe->prepared)
1162 return 0;
1163
1164 ret = boe_panel_enter_sleep_mode(boe);
1165 if (ret < 0) {
1166 dev_err(panel->dev, "failed to set panel off: %d\n", ret);
1167 return ret;
1168 }
1169
1170 msleep(150);
1171
1172 if (boe->desc->discharge_on_disable) {
1173 regulator_disable(boe->avee);
1174 regulator_disable(boe->avdd);
1175 usleep_range(5000, 7000);
1176 gpiod_set_value(boe->enable_gpio, 0);
1177 usleep_range(5000, 7000);
1178 regulator_disable(boe->pp1800);
1179 regulator_disable(boe->pp3300);
1180 } else {
1181 gpiod_set_value(boe->enable_gpio, 0);
1182 usleep_range(1000, 2000);
1183 regulator_disable(boe->avee);
1184 regulator_disable(boe->avdd);
1185 usleep_range(5000, 7000);
1186 regulator_disable(boe->pp1800);
1187 regulator_disable(boe->pp3300);
1188 }
1189
1190 boe->prepared = false;
1191
1192 return 0;
1193}
1194
1195static int boe_panel_prepare(struct drm_panel *panel)
1196{
1197 struct boe_panel *boe = to_boe_panel(panel);
1198 int ret;
1199
1200 if (boe->prepared)
1201 return 0;
1202
1203 gpiod_set_value(boe->enable_gpio, 0);
1204 usleep_range(1000, 1500);
1205
1206 ret = regulator_enable(boe->pp3300);
1207 if (ret < 0)
1208 return ret;
1209
1210 ret = regulator_enable(boe->pp1800);
1211 if (ret < 0)
1212 return ret;
1213
1214 usleep_range(3000, 5000);
1215
1216 ret = regulator_enable(boe->avdd);
1217 if (ret < 0)
1218 goto poweroff1v8;
1219 ret = regulator_enable(boe->avee);
1220 if (ret < 0)
1221 goto poweroffavdd;
1222
1223 usleep_range(10000, 11000);
1224
1225 gpiod_set_value(boe->enable_gpio, 1);
1226 usleep_range(1000, 2000);
1227 gpiod_set_value(boe->enable_gpio, 0);
1228 usleep_range(1000, 2000);
1229 gpiod_set_value(boe->enable_gpio, 1);
1230 usleep_range(6000, 10000);
1231
1232 ret = boe_panel_init_dcs_cmd(boe);
1233 if (ret < 0) {
1234 dev_err(panel->dev, "failed to init panel: %d\n", ret);
1235 goto poweroff;
1236 }
1237
1238 boe->prepared = true;
1239
1240 return 0;
1241
1242poweroff:
1243 regulator_disable(boe->avee);
1244poweroffavdd:
1245 regulator_disable(boe->avdd);
1246poweroff1v8:
1247 usleep_range(5000, 7000);
1248 regulator_disable(boe->pp1800);
1249 gpiod_set_value(boe->enable_gpio, 0);
1250
1251 return ret;
1252}
1253
1254static int boe_panel_enable(struct drm_panel *panel)
1255{
1256 msleep(130);
1257 return 0;
1258}
1259
1260static const struct drm_display_mode boe_tv110c9m_default_mode = {
1261 .clock = 166594,
1262 .hdisplay = 1200,
1263 .hsync_start = 1200 + 40,
1264 .hsync_end = 1200 + 40 + 8,
1265 .htotal = 1200 + 40 + 8 + 28,
1266 .vdisplay = 2000,
1267 .vsync_start = 2000 + 26,
1268 .vsync_end = 2000 + 26 + 2,
1269 .vtotal = 2000 + 26 + 2 + 148,
1270 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1271};
1272
1273static const struct panel_desc boe_tv110c9m_desc = {
1274 .modes = &boe_tv110c9m_default_mode,
1275 .bpc = 8,
1276 .size = {
1277 .width_mm = 143,
1278 .height_mm = 238,
1279 },
1280 .lanes = 4,
1281 .format = MIPI_DSI_FMT_RGB888,
1282 .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
1283 | MIPI_DSI_MODE_VIDEO_HSE
1284 | MIPI_DSI_CLOCK_NON_CONTINUOUS
1285 | MIPI_DSI_MODE_VIDEO_BURST,
1286 .init_cmds = boe_tv110c9m_init_cmd,
1287};
1288
1289static const struct drm_display_mode inx_hj110iz_default_mode = {
1290 .clock = 166594,
1291 .hdisplay = 1200,
1292 .hsync_start = 1200 + 40,
1293 .hsync_end = 1200 + 40 + 8,
1294 .htotal = 1200 + 40 + 8 + 28,
1295 .vdisplay = 2000,
1296 .vsync_start = 2000 + 26,
1297 .vsync_end = 2000 + 26 + 1,
1298 .vtotal = 2000 + 26 + 1 + 149,
1299 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1300};
1301
1302static const struct panel_desc inx_hj110iz_desc = {
1303 .modes = &inx_hj110iz_default_mode,
1304 .bpc = 8,
1305 .size = {
1306 .width_mm = 143,
1307 .height_mm = 238,
1308 },
1309 .lanes = 4,
1310 .format = MIPI_DSI_FMT_RGB888,
1311 .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
1312 | MIPI_DSI_MODE_VIDEO_HSE
1313 | MIPI_DSI_CLOCK_NON_CONTINUOUS
1314 | MIPI_DSI_MODE_VIDEO_BURST,
1315 .init_cmds = inx_init_cmd,
1316};
1317
1318static const struct drm_display_mode boe_tv101wum_nl6_default_mode = {
1319 .clock = 159425,
1320 .hdisplay = 1200,
1321 .hsync_start = 1200 + 100,
1322 .hsync_end = 1200 + 100 + 40,
1323 .htotal = 1200 + 100 + 40 + 24,
1324 .vdisplay = 1920,
1325 .vsync_start = 1920 + 10,
1326 .vsync_end = 1920 + 10 + 14,
1327 .vtotal = 1920 + 10 + 14 + 4,
1328};
1329
1330static const struct panel_desc boe_tv101wum_nl6_desc = {
1331 .modes = &boe_tv101wum_nl6_default_mode,
1332 .bpc = 8,
1333 .size = {
1334 .width_mm = 135,
1335 .height_mm = 216,
1336 },
1337 .lanes = 4,
1338 .format = MIPI_DSI_FMT_RGB888,
1339 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1340 MIPI_DSI_MODE_LPM,
1341 .init_cmds = boe_init_cmd,
1342 .discharge_on_disable = false,
1343};
1344
1345static const struct drm_display_mode auo_kd101n80_45na_default_mode = {
1346 .clock = 157000,
1347 .hdisplay = 1200,
1348 .hsync_start = 1200 + 60,
1349 .hsync_end = 1200 + 60 + 24,
1350 .htotal = 1200 + 60 + 24 + 56,
1351 .vdisplay = 1920,
1352 .vsync_start = 1920 + 16,
1353 .vsync_end = 1920 + 16 + 4,
1354 .vtotal = 1920 + 16 + 4 + 16,
1355};
1356
1357static const struct panel_desc auo_kd101n80_45na_desc = {
1358 .modes = &auo_kd101n80_45na_default_mode,
1359 .bpc = 8,
1360 .size = {
1361 .width_mm = 135,
1362 .height_mm = 216,
1363 },
1364 .lanes = 4,
1365 .format = MIPI_DSI_FMT_RGB888,
1366 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1367 MIPI_DSI_MODE_LPM,
1368 .init_cmds = auo_kd101n80_45na_init_cmd,
1369 .discharge_on_disable = true,
1370};
1371
1372static const struct drm_display_mode boe_tv101wum_n53_default_mode = {
1373 .clock = 159916,
1374 .hdisplay = 1200,
1375 .hsync_start = 1200 + 80,
1376 .hsync_end = 1200 + 80 + 24,
1377 .htotal = 1200 + 80 + 24 + 60,
1378 .vdisplay = 1920,
1379 .vsync_start = 1920 + 20,
1380 .vsync_end = 1920 + 20 + 4,
1381 .vtotal = 1920 + 20 + 4 + 10,
1382 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1383};
1384
1385static const struct panel_desc boe_tv101wum_n53_desc = {
1386 .modes = &boe_tv101wum_n53_default_mode,
1387 .bpc = 8,
1388 .size = {
1389 .width_mm = 135,
1390 .height_mm = 216,
1391 },
1392 .lanes = 4,
1393 .format = MIPI_DSI_FMT_RGB888,
1394 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1395 MIPI_DSI_MODE_LPM,
1396 .init_cmds = boe_init_cmd,
1397};
1398
1399static const struct drm_display_mode auo_b101uan08_3_default_mode = {
1400 .clock = 159667,
1401 .hdisplay = 1200,
1402 .hsync_start = 1200 + 60,
1403 .hsync_end = 1200 + 60 + 4,
1404 .htotal = 1200 + 60 + 4 + 80,
1405 .vdisplay = 1920,
1406 .vsync_start = 1920 + 34,
1407 .vsync_end = 1920 + 34 + 2,
1408 .vtotal = 1920 + 34 + 2 + 24,
1409 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1410};
1411
1412static const struct panel_desc auo_b101uan08_3_desc = {
1413 .modes = &auo_b101uan08_3_default_mode,
1414 .bpc = 8,
1415 .size = {
1416 .width_mm = 135,
1417 .height_mm = 216,
1418 },
1419 .lanes = 4,
1420 .format = MIPI_DSI_FMT_RGB888,
1421 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1422 MIPI_DSI_MODE_LPM,
1423 .init_cmds = auo_b101uan08_3_init_cmd,
1424};
1425
1426static const struct drm_display_mode boe_tv105wum_nw0_default_mode = {
1427 .clock = 159916,
1428 .hdisplay = 1200,
1429 .hsync_start = 1200 + 80,
1430 .hsync_end = 1200 + 80 + 24,
1431 .htotal = 1200 + 80 + 24 + 60,
1432 .vdisplay = 1920,
1433 .vsync_start = 1920 + 20,
1434 .vsync_end = 1920 + 20 + 4,
1435 .vtotal = 1920 + 20 + 4 + 10,
1436 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1437};
1438
1439static const struct panel_desc boe_tv105wum_nw0_desc = {
1440 .modes = &boe_tv105wum_nw0_default_mode,
1441 .bpc = 8,
1442 .size = {
1443 .width_mm = 141,
1444 .height_mm = 226,
1445 },
1446 .lanes = 4,
1447 .format = MIPI_DSI_FMT_RGB888,
1448 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1449 MIPI_DSI_MODE_LPM,
1450 .init_cmds = boe_init_cmd,
1451};
1452
1453static int boe_panel_get_modes(struct drm_panel *panel,
1454 struct drm_connector *connector)
1455{
1456 struct boe_panel *boe = to_boe_panel(panel);
1457 const struct drm_display_mode *m = boe->desc->modes;
1458 struct drm_display_mode *mode;
1459
1460 mode = drm_mode_duplicate(connector->dev, m);
1461 if (!mode) {
1462 dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
1463 m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
1464 return -ENOMEM;
1465 }
1466
1467 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1468 drm_mode_set_name(mode);
1469 drm_mode_probed_add(connector, mode);
1470
1471 connector->display_info.width_mm = boe->desc->size.width_mm;
1472 connector->display_info.height_mm = boe->desc->size.height_mm;
1473 connector->display_info.bpc = boe->desc->bpc;
1474 drm_connector_set_panel_orientation(connector, boe->orientation);
1475
1476 return 1;
1477}
1478
1479static const struct drm_panel_funcs boe_panel_funcs = {
1480 .unprepare = boe_panel_unprepare,
1481 .prepare = boe_panel_prepare,
1482 .enable = boe_panel_enable,
1483 .get_modes = boe_panel_get_modes,
1484};
1485
1486static int boe_panel_add(struct boe_panel *boe)
1487{
1488 struct device *dev = &boe->dsi->dev;
1489 int err;
1490
1491 boe->avdd = devm_regulator_get(dev, "avdd");
1492 if (IS_ERR(boe->avdd))
1493 return PTR_ERR(boe->avdd);
1494
1495 boe->avee = devm_regulator_get(dev, "avee");
1496 if (IS_ERR(boe->avee))
1497 return PTR_ERR(boe->avee);
1498
1499 boe->pp3300 = devm_regulator_get(dev, "pp3300");
1500 if (IS_ERR(boe->pp3300))
1501 return PTR_ERR(boe->pp3300);
1502
1503 boe->pp1800 = devm_regulator_get(dev, "pp1800");
1504 if (IS_ERR(boe->pp1800))
1505 return PTR_ERR(boe->pp1800);
1506
1507 boe->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
1508 if (IS_ERR(boe->enable_gpio)) {
1509 dev_err(dev, "cannot get reset-gpios %ld\n",
1510 PTR_ERR(boe->enable_gpio));
1511 return PTR_ERR(boe->enable_gpio);
1512 }
1513
1514 gpiod_set_value(boe->enable_gpio, 0);
1515
1516 drm_panel_init(&boe->base, dev, &boe_panel_funcs,
1517 DRM_MODE_CONNECTOR_DSI);
1518 err = of_drm_get_panel_orientation(dev->of_node, &boe->orientation);
1519 if (err < 0) {
1520 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
1521 return err;
1522 }
1523
1524 err = drm_panel_of_backlight(&boe->base);
1525 if (err)
1526 return err;
1527
1528 boe->base.funcs = &boe_panel_funcs;
1529 boe->base.dev = &boe->dsi->dev;
1530
1531 drm_panel_add(&boe->base);
1532
1533 return 0;
1534}
1535
1536static int boe_panel_probe(struct mipi_dsi_device *dsi)
1537{
1538 struct boe_panel *boe;
1539 int ret;
1540 const struct panel_desc *desc;
1541
1542 boe = devm_kzalloc(&dsi->dev, sizeof(*boe), GFP_KERNEL);
1543 if (!boe)
1544 return -ENOMEM;
1545
1546 desc = of_device_get_match_data(&dsi->dev);
1547 dsi->lanes = desc->lanes;
1548 dsi->format = desc->format;
1549 dsi->mode_flags = desc->mode_flags;
1550 boe->desc = desc;
1551 boe->dsi = dsi;
1552 ret = boe_panel_add(boe);
1553 if (ret < 0)
1554 return ret;
1555
1556 mipi_dsi_set_drvdata(dsi, boe);
1557
1558 ret = mipi_dsi_attach(dsi);
1559 if (ret)
1560 drm_panel_remove(&boe->base);
1561
1562 return ret;
1563}
1564
1565static void boe_panel_shutdown(struct mipi_dsi_device *dsi)
1566{
1567 struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
1568
1569 drm_panel_disable(&boe->base);
1570 drm_panel_unprepare(&boe->base);
1571}
1572
1573static int boe_panel_remove(struct mipi_dsi_device *dsi)
1574{
1575 struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
1576 int ret;
1577
1578 boe_panel_shutdown(dsi);
1579
1580 ret = mipi_dsi_detach(dsi);
1581 if (ret < 0)
1582 dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
1583
1584 if (boe->base.dev)
1585 drm_panel_remove(&boe->base);
1586
1587 return 0;
1588}
1589
1590static const struct of_device_id boe_of_match[] = {
1591 { .compatible = "boe,tv101wum-nl6",
1592 .data = &boe_tv101wum_nl6_desc
1593 },
1594 { .compatible = "auo,kd101n80-45na",
1595 .data = &auo_kd101n80_45na_desc
1596 },
1597 { .compatible = "boe,tv101wum-n53",
1598 .data = &boe_tv101wum_n53_desc
1599 },
1600 { .compatible = "auo,b101uan08.3",
1601 .data = &auo_b101uan08_3_desc
1602 },
1603 { .compatible = "boe,tv105wum-nw0",
1604 .data = &boe_tv105wum_nw0_desc
1605 },
1606 { .compatible = "boe,tv110c9m-ll3",
1607 .data = &boe_tv110c9m_desc
1608 },
1609 { .compatible = "innolux,hj110iz-01a",
1610 .data = &inx_hj110iz_desc
1611 },
1612 { }
1613};
1614MODULE_DEVICE_TABLE(of, boe_of_match);
1615
1616static struct mipi_dsi_driver boe_panel_driver = {
1617 .driver = {
1618 .name = "panel-boe-tv101wum-nl6",
1619 .of_match_table = boe_of_match,
1620 },
1621 .probe = boe_panel_probe,
1622 .remove = boe_panel_remove,
1623 .shutdown = boe_panel_shutdown,
1624};
1625module_mipi_dsi_driver(boe_panel_driver);
1626
1627MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>");
1628MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver");
1629MODULE_LICENSE("GPL v2");
1630
