LXR linux/drivers/net/ethernet/hisilicon/hns3/hnae3.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2// Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4#ifndef __HNAE3_H
   5#define __HNAE3_H
   6
   7/* Names used in this framework:
   8 *      ae handle (handle):
   9 *        a set of queues provided by AE
  10 *      ring buffer queue (rbq):
  11 *        the channel between upper layer and the AE, can do tx and rx
  12 *      ring:
  13 *        a tx or rx channel within a rbq
  14 *      ring description (desc):
  15 *        an element in the ring with packet information
  16 *      buffer:
  17 *        a memory region referred by desc with the full packet payload
  18 *
  19 * "num" means a static number set as a parameter, "count" mean a dynamic
  20 *   number set while running
  21 * "cb" means control block
  22 */
  23
  24#include <linux/acpi.h>
  25#include <linux/dcbnl.h>
  26#include <linux/delay.h>
  27#include <linux/device.h>
  28#include <linux/ethtool.h>
  29#include <linux/module.h>
  30#include <linux/netdevice.h>
  31#include <linux/pci.h>
  32#include <linux/pkt_sched.h>
  33#include <linux/types.h>
  34#include <net/pkt_cls.h>
  35
  36#define HNAE3_MOD_VERSION "1.0"
  37
  38#define HNAE3_MIN_VECTOR_NUM    2 /* first one for misc, another for IO */
  39
  40/* Device version */
  41#define HNAE3_DEVICE_VERSION_V1   0x00020
  42#define HNAE3_DEVICE_VERSION_V2   0x00021
  43#define HNAE3_DEVICE_VERSION_V3   0x00030
  44
  45#define HNAE3_PCI_REVISION_BIT_SIZE             8
  46
  47/* Device IDs */
  48#define HNAE3_DEV_ID_GE                         0xA220
  49#define HNAE3_DEV_ID_25GE                       0xA221
  50#define HNAE3_DEV_ID_25GE_RDMA                  0xA222
  51#define HNAE3_DEV_ID_25GE_RDMA_MACSEC           0xA223
  52#define HNAE3_DEV_ID_50GE_RDMA                  0xA224
  53#define HNAE3_DEV_ID_50GE_RDMA_MACSEC           0xA225
  54#define HNAE3_DEV_ID_100G_RDMA_MACSEC           0xA226
  55#define HNAE3_DEV_ID_200G_RDMA                  0xA228
  56#define HNAE3_DEV_ID_VF                         0xA22E
  57#define HNAE3_DEV_ID_RDMA_DCB_PFC_VF            0xA22F
  58
  59#define HNAE3_CLASS_NAME_SIZE 16
  60
  61#define HNAE3_DEV_INITED_B                      0x0
  62#define HNAE3_DEV_SUPPORT_ROCE_B                0x1
  63#define HNAE3_DEV_SUPPORT_DCB_B                 0x2
  64#define HNAE3_KNIC_CLIENT_INITED_B              0x3
  65#define HNAE3_UNIC_CLIENT_INITED_B              0x4
  66#define HNAE3_ROCE_CLIENT_INITED_B              0x5
  67
  68#define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) | \
  69                BIT(HNAE3_DEV_SUPPORT_ROCE_B))
  70
  71#define hnae3_dev_roce_supported(hdev) \
  72        hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
  73
  74#define hnae3_dev_dcb_supported(hdev) \
  75        hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
  76
  77enum HNAE3_DEV_CAP_BITS {
  78        HNAE3_DEV_SUPPORT_FD_B,
  79        HNAE3_DEV_SUPPORT_GRO_B,
  80        HNAE3_DEV_SUPPORT_FEC_B,
  81        HNAE3_DEV_SUPPORT_UDP_GSO_B,
  82        HNAE3_DEV_SUPPORT_QB_B,
  83        HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B,
  84        HNAE3_DEV_SUPPORT_PTP_B,
  85        HNAE3_DEV_SUPPORT_INT_QL_B,
  86        HNAE3_DEV_SUPPORT_HW_TX_CSUM_B,
  87        HNAE3_DEV_SUPPORT_TX_PUSH_B,
  88        HNAE3_DEV_SUPPORT_PHY_IMP_B,
  89        HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B,
  90        HNAE3_DEV_SUPPORT_HW_PAD_B,
  91        HNAE3_DEV_SUPPORT_STASH_B,
  92        HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,
  93        HNAE3_DEV_SUPPORT_PAUSE_B,
  94        HNAE3_DEV_SUPPORT_RAS_IMP_B,
  95        HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
  96        HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,
  97        HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,
  98        HNAE3_DEV_SUPPORT_MC_MAC_MNG_B,
  99};
 100
 101#define hnae3_dev_fd_supported(hdev) \
 102        test_bit(HNAE3_DEV_SUPPORT_FD_B, (hdev)->ae_dev->caps)
 103
 104#define hnae3_dev_gro_supported(hdev) \
 105        test_bit(HNAE3_DEV_SUPPORT_GRO_B, (hdev)->ae_dev->caps)
 106
 107#define hnae3_dev_fec_supported(hdev) \
 108        test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps)
 109
 110#define hnae3_dev_udp_gso_supported(hdev) \
 111        test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps)
 112
 113#define hnae3_dev_qb_supported(hdev) \
 114        test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps)
 115
 116#define hnae3_dev_fd_forward_tc_supported(hdev) \
 117        test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps)
 118
 119#define hnae3_dev_ptp_supported(hdev) \
 120        test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps)
 121
 122#define hnae3_dev_int_ql_supported(hdev) \
 123        test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps)
 124
 125#define hnae3_dev_hw_csum_supported(hdev) \
 126        test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, (hdev)->ae_dev->caps)
 127
 128#define hnae3_dev_tx_push_supported(hdev) \
 129        test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps)
 130
 131#define hnae3_dev_phy_imp_supported(hdev) \
 132        test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps)
 133
 134#define hnae3_dev_ras_imp_supported(hdev) \
 135        test_bit(HNAE3_DEV_SUPPORT_RAS_IMP_B, (hdev)->ae_dev->caps)
 136
 137#define hnae3_dev_tqp_txrx_indep_supported(hdev) \
 138        test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps)
 139
 140#define hnae3_dev_hw_pad_supported(hdev) \
 141        test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps)
 142
 143#define hnae3_dev_stash_supported(hdev) \
 144        test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps)
 145
 146#define hnae3_dev_pause_supported(hdev) \
 147        test_bit(HNAE3_DEV_SUPPORT_PAUSE_B, (hdev)->ae_dev->caps)
 148
 149#define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \
 150        test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps)
 151
 152#define hnae3_ae_dev_rxd_adv_layout_supported(ae_dev) \
 153        test_bit(HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, (ae_dev)->caps)
 154
 155#define hnae3_ae_dev_mc_mac_mng_supported(ae_dev) \
 156        test_bit(HNAE3_DEV_SUPPORT_MC_MAC_MNG_B, (ae_dev)->caps)
 157
 158enum HNAE3_PF_CAP_BITS {
 159        HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,
 160};
 161#define ring_ptr_move_fw(ring, p) \
 162        ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
 163#define ring_ptr_move_bw(ring, p) \
 164        ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
 165
 166struct hnae3_handle;
 167
 168struct hnae3_queue {
 169        void __iomem *io_base;
 170        struct hnae3_ae_algo *ae_algo;
 171        struct hnae3_handle *handle;
 172        int tqp_index;          /* index in a handle */
 173        u32 buf_size;           /* size for hnae_desc->addr, preset by AE */
 174        u16 tx_desc_num;        /* total number of tx desc */
 175        u16 rx_desc_num;        /* total number of rx desc */
 176};
 177
 178struct hns3_mac_stats {
 179        u64 tx_pause_cnt;
 180        u64 rx_pause_cnt;
 181};
 182
 183/* hnae3 loop mode */
 184enum hnae3_loop {
 185        HNAE3_LOOP_APP,
 186        HNAE3_LOOP_SERIAL_SERDES,
 187        HNAE3_LOOP_PARALLEL_SERDES,
 188        HNAE3_LOOP_PHY,
 189        HNAE3_LOOP_NONE,
 190};
 191
 192enum hnae3_client_type {
 193        HNAE3_CLIENT_KNIC,
 194        HNAE3_CLIENT_ROCE,
 195};
 196
 197/* mac media type */
 198enum hnae3_media_type {
 199        HNAE3_MEDIA_TYPE_UNKNOWN,
 200        HNAE3_MEDIA_TYPE_FIBER,
 201        HNAE3_MEDIA_TYPE_COPPER,
 202        HNAE3_MEDIA_TYPE_BACKPLANE,
 203        HNAE3_MEDIA_TYPE_NONE,
 204};
 205
 206/* must be consistent with definition in firmware */
 207enum hnae3_module_type {
 208        HNAE3_MODULE_TYPE_UNKNOWN       = 0x00,
 209        HNAE3_MODULE_TYPE_FIBRE_LR      = 0x01,
 210        HNAE3_MODULE_TYPE_FIBRE_SR      = 0x02,
 211        HNAE3_MODULE_TYPE_AOC           = 0x03,
 212        HNAE3_MODULE_TYPE_CR            = 0x04,
 213        HNAE3_MODULE_TYPE_KR            = 0x05,
 214        HNAE3_MODULE_TYPE_TP            = 0x06,
 215};
 216
 217enum hnae3_fec_mode {
 218        HNAE3_FEC_AUTO = 0,
 219        HNAE3_FEC_BASER,
 220        HNAE3_FEC_RS,
 221        HNAE3_FEC_USER_DEF,
 222};
 223
 224enum hnae3_reset_notify_type {
 225        HNAE3_UP_CLIENT,
 226        HNAE3_DOWN_CLIENT,
 227        HNAE3_INIT_CLIENT,
 228        HNAE3_UNINIT_CLIENT,
 229};
 230
 231enum hnae3_hw_error_type {
 232        HNAE3_PPU_POISON_ERROR,
 233        HNAE3_CMDQ_ECC_ERROR,
 234        HNAE3_IMP_RD_POISON_ERROR,
 235        HNAE3_ROCEE_AXI_RESP_ERROR,
 236};
 237
 238enum hnae3_reset_type {
 239        HNAE3_VF_RESET,
 240        HNAE3_VF_FUNC_RESET,
 241        HNAE3_VF_PF_FUNC_RESET,
 242        HNAE3_VF_FULL_RESET,
 243        HNAE3_FLR_RESET,
 244        HNAE3_FUNC_RESET,
 245        HNAE3_GLOBAL_RESET,
 246        HNAE3_IMP_RESET,
 247        HNAE3_NONE_RESET,
 248        HNAE3_MAX_RESET,
 249};
 250
 251enum hnae3_port_base_vlan_state {
 252        HNAE3_PORT_BASE_VLAN_DISABLE,
 253        HNAE3_PORT_BASE_VLAN_ENABLE,
 254        HNAE3_PORT_BASE_VLAN_MODIFY,
 255        HNAE3_PORT_BASE_VLAN_NOCHANGE,
 256};
 257
 258enum hnae3_dbg_cmd {
 259        HNAE3_DBG_CMD_TM_NODES,
 260        HNAE3_DBG_CMD_TM_PRI,
 261        HNAE3_DBG_CMD_TM_QSET,
 262        HNAE3_DBG_CMD_TM_MAP,
 263        HNAE3_DBG_CMD_TM_PG,
 264        HNAE3_DBG_CMD_TM_PORT,
 265        HNAE3_DBG_CMD_TC_SCH_INFO,
 266        HNAE3_DBG_CMD_QOS_PAUSE_CFG,
 267        HNAE3_DBG_CMD_QOS_PRI_MAP,
 268        HNAE3_DBG_CMD_QOS_BUF_CFG,
 269        HNAE3_DBG_CMD_DEV_INFO,
 270        HNAE3_DBG_CMD_TX_BD,
 271        HNAE3_DBG_CMD_RX_BD,
 272        HNAE3_DBG_CMD_MAC_UC,
 273        HNAE3_DBG_CMD_MAC_MC,
 274        HNAE3_DBG_CMD_MNG_TBL,
 275        HNAE3_DBG_CMD_LOOPBACK,
 276        HNAE3_DBG_CMD_PTP_INFO,
 277        HNAE3_DBG_CMD_INTERRUPT_INFO,
 278        HNAE3_DBG_CMD_RESET_INFO,
 279        HNAE3_DBG_CMD_IMP_INFO,
 280        HNAE3_DBG_CMD_NCL_CONFIG,
 281        HNAE3_DBG_CMD_REG_BIOS_COMMON,
 282        HNAE3_DBG_CMD_REG_SSU,
 283        HNAE3_DBG_CMD_REG_IGU_EGU,
 284        HNAE3_DBG_CMD_REG_RPU,
 285        HNAE3_DBG_CMD_REG_NCSI,
 286        HNAE3_DBG_CMD_REG_RTC,
 287        HNAE3_DBG_CMD_REG_PPP,
 288        HNAE3_DBG_CMD_REG_RCB,
 289        HNAE3_DBG_CMD_REG_TQP,
 290        HNAE3_DBG_CMD_REG_MAC,
 291        HNAE3_DBG_CMD_REG_DCB,
 292        HNAE3_DBG_CMD_VLAN_CONFIG,
 293        HNAE3_DBG_CMD_QUEUE_MAP,
 294        HNAE3_DBG_CMD_RX_QUEUE_INFO,
 295        HNAE3_DBG_CMD_TX_QUEUE_INFO,
 296        HNAE3_DBG_CMD_FD_TCAM,
 297        HNAE3_DBG_CMD_FD_COUNTER,
 298        HNAE3_DBG_CMD_MAC_TNL_STATUS,
 299        HNAE3_DBG_CMD_SERV_INFO,
 300        HNAE3_DBG_CMD_UMV_INFO,
 301        HNAE3_DBG_CMD_PAGE_POOL_INFO,
 302        HNAE3_DBG_CMD_COAL_INFO,
 303        HNAE3_DBG_CMD_UNKNOWN,
 304};
 305
 306struct hnae3_vector_info {
 307        u8 __iomem *io_addr;
 308        int vector;
 309};
 310
 311#define HNAE3_RING_TYPE_B 0
 312#define HNAE3_RING_TYPE_TX 0
 313#define HNAE3_RING_TYPE_RX 1
 314#define HNAE3_RING_GL_IDX_S 0
 315#define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
 316#define HNAE3_RING_GL_RX 0
 317#define HNAE3_RING_GL_TX 1
 318
 319#define HNAE3_FW_VERSION_BYTE3_SHIFT    24
 320#define HNAE3_FW_VERSION_BYTE3_MASK     GENMASK(31, 24)
 321#define HNAE3_FW_VERSION_BYTE2_SHIFT    16
 322#define HNAE3_FW_VERSION_BYTE2_MASK     GENMASK(23, 16)
 323#define HNAE3_FW_VERSION_BYTE1_SHIFT    8
 324#define HNAE3_FW_VERSION_BYTE1_MASK     GENMASK(15, 8)
 325#define HNAE3_FW_VERSION_BYTE0_SHIFT    0
 326#define HNAE3_FW_VERSION_BYTE0_MASK     GENMASK(7, 0)
 327
 328struct hnae3_ring_chain_node {
 329        struct hnae3_ring_chain_node *next;
 330        u32 tqp_index;
 331        u32 flag;
 332        u32 int_gl_idx;
 333};
 334
 335#define HNAE3_IS_TX_RING(node) \
 336        (((node)->flag & 1 << HNAE3_RING_TYPE_B) == HNAE3_RING_TYPE_TX)
 337
 338/* device specification info from firmware */
 339struct hnae3_dev_specs {
 340        u32 mac_entry_num; /* number of mac-vlan table entry */
 341        u32 mng_entry_num; /* number of manager table entry */
 342        u32 max_tm_rate;
 343        u16 rss_ind_tbl_size;
 344        u16 rss_key_size;
 345        u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */
 346        u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */
 347        u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */
 348        u16 max_frm_size;
 349        u16 max_qset_num;
 350        u16 umv_size;
 351        u16 mc_mac_size;
 352        u32 mac_stats_num;
 353};
 354
 355struct hnae3_client_ops {
 356        int (*init_instance)(struct hnae3_handle *handle);
 357        void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
 358        void (*link_status_change)(struct hnae3_handle *handle, bool state);
 359        int (*reset_notify)(struct hnae3_handle *handle,
 360                            enum hnae3_reset_notify_type type);
 361        void (*process_hw_error)(struct hnae3_handle *handle,
 362                                 enum hnae3_hw_error_type);
 363};
 364
 365#define HNAE3_CLIENT_NAME_LENGTH 16
 366struct hnae3_client {
 367        char name[HNAE3_CLIENT_NAME_LENGTH];
 368        unsigned long state;
 369        enum hnae3_client_type type;
 370        const struct hnae3_client_ops *ops;
 371        struct list_head node;
 372};
 373
 374#define HNAE3_DEV_CAPS_MAX_NUM  96
 375struct hnae3_ae_dev {
 376        struct pci_dev *pdev;
 377        const struct hnae3_ae_ops *ops;
 378        struct list_head node;
 379        u32 flag;
 380        unsigned long hw_err_reset_req;
 381        struct hnae3_dev_specs dev_specs;
 382        u32 dev_version;
 383        unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)];
 384        void *priv;
 385};
 386
 387/* This struct defines the operation on the handle.
 388 *
 389 * init_ae_dev(): (mandatory)
 390 *   Get PF configure from pci_dev and initialize PF hardware
 391 * uninit_ae_dev()
 392 *   Disable PF device and release PF resource
 393 * register_client
 394 *   Register client to ae_dev
 395 * unregister_client()
 396 *   Unregister client from ae_dev
 397 * start()
 398 *   Enable the hardware
 399 * stop()
 400 *   Disable the hardware
 401 * start_client()
 402 *   Inform the hclge that client has been started
 403 * stop_client()
 404 *   Inform the hclge that client has been stopped
 405 * get_status()
 406 *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
 407 *   non-ok
 408 * get_ksettings_an_result()
 409 *   Get negotiation status,speed and duplex
 410 * get_media_type()
 411 *   Get media type of MAC
 412 * check_port_speed()
 413 *   Check target speed whether is supported
 414 * adjust_link()
 415 *   Adjust link status
 416 * set_loopback()
 417 *   Set loopback
 418 * set_promisc_mode
 419 *   Set promisc mode
 420 * request_update_promisc_mode
 421 *   request to hclge(vf) to update promisc mode
 422 * set_mtu()
 423 *   set mtu
 424 * get_pauseparam()
 425 *   get tx and rx of pause frame use
 426 * set_pauseparam()
 427 *   set tx and rx of pause frame use
 428 * set_autoneg()
 429 *   set auto autonegotiation of pause frame use
 430 * get_autoneg()
 431 *   get auto autonegotiation of pause frame use
 432 * restart_autoneg()
 433 *   restart autonegotiation
 434 * halt_autoneg()
 435 *   halt/resume autonegotiation when autonegotiation on
 436 * get_coalesce_usecs()
 437 *   get usecs to delay a TX interrupt after a packet is sent
 438 * get_rx_max_coalesced_frames()
 439 *   get Maximum number of packets to be sent before a TX interrupt.
 440 * set_coalesce_usecs()
 441 *   set usecs to delay a TX interrupt after a packet is sent
 442 * set_coalesce_frames()
 443 *   set Maximum number of packets to be sent before a TX interrupt.
 444 * get_mac_addr()
 445 *   get mac address
 446 * set_mac_addr()
 447 *   set mac address
 448 * add_uc_addr
 449 *   Add unicast addr to mac table
 450 * rm_uc_addr
 451 *   Remove unicast addr from mac table
 452 * set_mc_addr()
 453 *   Set multicast address
 454 * add_mc_addr
 455 *   Add multicast address to mac table
 456 * rm_mc_addr
 457 *   Remove multicast address from mac table
 458 * update_stats()
 459 *   Update Old network device statistics
 460 * get_mac_stats()
 461 *   get mac pause statistics including tx_cnt and rx_cnt
 462 * get_ethtool_stats()
 463 *   Get ethtool network device statistics
 464 * get_strings()
 465 *   Get a set of strings that describe the requested objects
 466 * get_sset_count()
 467 *   Get number of strings that @get_strings will write
 468 * update_led_status()
 469 *   Update the led status
 470 * set_led_id()
 471 *   Set led id
 472 * get_regs()
 473 *   Get regs dump
 474 * get_regs_len()
 475 *   Get the len of the regs dump
 476 * get_rss_key_size()
 477 *   Get rss key size
 478 * get_rss()
 479 *   Get rss table
 480 * set_rss()
 481 *   Set rss table
 482 * get_tc_size()
 483 *   Get tc size of handle
 484 * get_vector()
 485 *   Get vector number and vector information
 486 * put_vector()
 487 *   Put the vector in hdev
 488 * map_ring_to_vector()
 489 *   Map rings to vector
 490 * unmap_ring_from_vector()
 491 *   Unmap rings from vector
 492 * reset_queue()
 493 *   Reset queue
 494 * get_fw_version()
 495 *   Get firmware version
 496 * get_mdix_mode()
 497 *   Get media typr of phy
 498 * enable_vlan_filter()
 499 *   Enable vlan filter
 500 * set_vlan_filter()
 501 *   Set vlan filter config of Ports
 502 * set_vf_vlan_filter()
 503 *   Set vlan filter config of vf
 504 * enable_hw_strip_rxvtag()
 505 *   Enable/disable hardware strip vlan tag of packets received
 506 * set_gro_en
 507 *   Enable/disable HW GRO
 508 * add_arfs_entry
 509 *   Check the 5-tuples of flow, and create flow director rule
 510 * get_vf_config
 511 *   Get the VF configuration setting by the host
 512 * set_vf_link_state
 513 *   Set VF link status
 514 * set_vf_spoofchk
 515 *   Enable/disable spoof check for specified vf
 516 * set_vf_trust
 517 *   Enable/disable trust for specified vf, if the vf being trusted, then
 518 *   it can enable promisc mode
 519 * set_vf_rate
 520 *   Set the max tx rate of specified vf.
 521 * set_vf_mac
 522 *   Configure the default MAC for specified VF
 523 * get_module_eeprom
 524 *   Get the optical module eeprom info.
 525 * add_cls_flower
 526 *   Add clsflower rule
 527 * del_cls_flower
 528 *   Delete clsflower rule
 529 * cls_flower_active
 530 *   Check if any cls flower rule exist
 531 * dbg_read_cmd
 532 *   Execute debugfs read command.
 533 * set_tx_hwts_info
 534 *   Save information for 1588 tx packet
 535 * get_rx_hwts
 536 *   Get 1588 rx hwstamp
 537 * get_ts_info
 538 *   Get phc info
 539 */
 540struct hnae3_ae_ops {
 541        int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
 542        void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
 543        void (*reset_prepare)(struct hnae3_ae_dev *ae_dev,
 544                              enum hnae3_reset_type rst_type);
 545        void (*reset_done)(struct hnae3_ae_dev *ae_dev);
 546        int (*init_client_instance)(struct hnae3_client *client,
 547                                    struct hnae3_ae_dev *ae_dev);
 548        void (*uninit_client_instance)(struct hnae3_client *client,
 549                                       struct hnae3_ae_dev *ae_dev);
 550        int (*start)(struct hnae3_handle *handle);
 551        void (*stop)(struct hnae3_handle *handle);
 552        int (*client_start)(struct hnae3_handle *handle);
 553        void (*client_stop)(struct hnae3_handle *handle);
 554        int (*get_status)(struct hnae3_handle *handle);
 555        void (*get_ksettings_an_result)(struct hnae3_handle *handle,
 556                                        u8 *auto_neg, u32 *speed, u8 *duplex);
 557
 558        int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
 559                                   u8 duplex);
 560
 561        void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
 562                               u8 *module_type);
 563        int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
 564        void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
 565                        u8 *fec_mode);
 566        int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
 567        void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
 568        int (*set_loopback)(struct hnae3_handle *handle,
 569                            enum hnae3_loop loop_mode, bool en);
 570
 571        int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
 572                                bool en_mc_pmc);
 573        void (*request_update_promisc_mode)(struct hnae3_handle *handle);
 574        int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
 575
 576        void (*get_pauseparam)(struct hnae3_handle *handle,
 577                               u32 *auto_neg, u32 *rx_en, u32 *tx_en);
 578        int (*set_pauseparam)(struct hnae3_handle *handle,
 579                              u32 auto_neg, u32 rx_en, u32 tx_en);
 580
 581        int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
 582        int (*get_autoneg)(struct hnae3_handle *handle);
 583        int (*restart_autoneg)(struct hnae3_handle *handle);
 584        int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
 585
 586        void (*get_coalesce_usecs)(struct hnae3_handle *handle,
 587                                   u32 *tx_usecs, u32 *rx_usecs);
 588        void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
 589                                            u32 *tx_frames, u32 *rx_frames);
 590        int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
 591        int (*set_coalesce_frames)(struct hnae3_handle *handle,
 592                                   u32 coalesce_frames);
 593        void (*get_coalesce_range)(struct hnae3_handle *handle,
 594                                   u32 *tx_frames_low, u32 *rx_frames_low,
 595                                   u32 *tx_frames_high, u32 *rx_frames_high,
 596                                   u32 *tx_usecs_low, u32 *rx_usecs_low,
 597                                   u32 *tx_usecs_high, u32 *rx_usecs_high);
 598
 599        void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
 600        int (*set_mac_addr)(struct hnae3_handle *handle, const void *p,
 601                            bool is_first);
 602        int (*do_ioctl)(struct hnae3_handle *handle,
 603                        struct ifreq *ifr, int cmd);
 604        int (*add_uc_addr)(struct hnae3_handle *handle,
 605                           const unsigned char *addr);
 606        int (*rm_uc_addr)(struct hnae3_handle *handle,
 607                          const unsigned char *addr);
 608        int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
 609        int (*add_mc_addr)(struct hnae3_handle *handle,
 610                           const unsigned char *addr);
 611        int (*rm_mc_addr)(struct hnae3_handle *handle,
 612                          const unsigned char *addr);
 613        void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
 614        void (*update_stats)(struct hnae3_handle *handle,
 615                             struct net_device_stats *net_stats);
 616        void (*get_stats)(struct hnae3_handle *handle, u64 *data);
 617        void (*get_mac_stats)(struct hnae3_handle *handle,
 618                              struct hns3_mac_stats *mac_stats);
 619        void (*get_strings)(struct hnae3_handle *handle,
 620                            u32 stringset, u8 *data);
 621        int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
 622
 623        void (*get_regs)(struct hnae3_handle *handle, u32 *version,
 624                         void *data);
 625        int (*get_regs_len)(struct hnae3_handle *handle);
 626
 627        u32 (*get_rss_key_size)(struct hnae3_handle *handle);
 628        int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
 629                       u8 *hfunc);
 630        int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
 631                       const u8 *key, const u8 hfunc);
 632        int (*set_rss_tuple)(struct hnae3_handle *handle,
 633                             struct ethtool_rxnfc *cmd);
 634        int (*get_rss_tuple)(struct hnae3_handle *handle,
 635                             struct ethtool_rxnfc *cmd);
 636
 637        int (*get_tc_size)(struct hnae3_handle *handle);
 638
 639        int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
 640                          struct hnae3_vector_info *vector_info);
 641        int (*put_vector)(struct hnae3_handle *handle, int vector_num);
 642        int (*map_ring_to_vector)(struct hnae3_handle *handle,
 643                                  int vector_num,
 644                                  struct hnae3_ring_chain_node *vr_chain);
 645        int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
 646                                      int vector_num,
 647                                      struct hnae3_ring_chain_node *vr_chain);
 648
 649        int (*reset_queue)(struct hnae3_handle *handle);
 650        u32 (*get_fw_version)(struct hnae3_handle *handle);
 651        void (*get_mdix_mode)(struct hnae3_handle *handle,
 652                              u8 *tp_mdix_ctrl, u8 *tp_mdix);
 653
 654        int (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
 655        int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
 656                               u16 vlan_id, bool is_kill);
 657        int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
 658                                  u16 vlan, u8 qos, __be16 proto);
 659        int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
 660        void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
 661        enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
 662                                                 unsigned long *addr);
 663        void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
 664                                          enum hnae3_reset_type rst_type);
 665        void (*get_channels)(struct hnae3_handle *handle,
 666                             struct ethtool_channels *ch);
 667        void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
 668                                      u16 *alloc_tqps, u16 *max_rss_size);
 669        int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
 670                            bool rxfh_configured);
 671        void (*get_flowctrl_adv)(struct hnae3_handle *handle,
 672                                 u32 *flowctrl_adv);
 673        int (*set_led_id)(struct hnae3_handle *handle,
 674                          enum ethtool_phys_id_state status);
 675        void (*get_link_mode)(struct hnae3_handle *handle,
 676                              unsigned long *supported,
 677                              unsigned long *advertising);
 678        int (*add_fd_entry)(struct hnae3_handle *handle,
 679                            struct ethtool_rxnfc *cmd);
 680        int (*del_fd_entry)(struct hnae3_handle *handle,
 681                            struct ethtool_rxnfc *cmd);
 682        int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
 683                               struct ethtool_rxnfc *cmd);
 684        int (*get_fd_rule_info)(struct hnae3_handle *handle,
 685                                struct ethtool_rxnfc *cmd);
 686        int (*get_fd_all_rules)(struct hnae3_handle *handle,
 687                                struct ethtool_rxnfc *cmd, u32 *rule_locs);
 688        void (*enable_fd)(struct hnae3_handle *handle, bool enable);
 689        int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
 690                              u16 flow_id, struct flow_keys *fkeys);
 691        int (*dbg_read_cmd)(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,
 692                            char *buf, int len);
 693        pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
 694        bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
 695        bool (*ae_dev_resetting)(struct hnae3_handle *handle);
 696        unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
 697        int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
 698        u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
 699        void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
 700        int (*mac_connect_phy)(struct hnae3_handle *handle);
 701        void (*mac_disconnect_phy)(struct hnae3_handle *handle);
 702        int (*get_vf_config)(struct hnae3_handle *handle, int vf,
 703                             struct ifla_vf_info *ivf);
 704        int (*set_vf_link_state)(struct hnae3_handle *handle, int vf,
 705                                 int link_state);
 706        int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf,
 707                               bool enable);
 708        int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable);
 709        int (*set_vf_rate)(struct hnae3_handle *handle, int vf,
 710                           int min_tx_rate, int max_tx_rate, bool force);
 711        int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p);
 712        int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset,
 713                                 u32 len, u8 *data);
 714        bool (*get_cmdq_stat)(struct hnae3_handle *handle);
 715        int (*add_cls_flower)(struct hnae3_handle *handle,
 716                              struct flow_cls_offload *cls_flower, int tc);
 717        int (*del_cls_flower)(struct hnae3_handle *handle,
 718                              struct flow_cls_offload *cls_flower);
 719        bool (*cls_flower_active)(struct hnae3_handle *handle);
 720        int (*get_phy_link_ksettings)(struct hnae3_handle *handle,
 721                                      struct ethtool_link_ksettings *cmd);
 722        int (*set_phy_link_ksettings)(struct hnae3_handle *handle,
 723                                      const struct ethtool_link_ksettings *cmd);
 724        bool (*set_tx_hwts_info)(struct hnae3_handle *handle,
 725                                 struct sk_buff *skb);
 726        void (*get_rx_hwts)(struct hnae3_handle *handle, struct sk_buff *skb,
 727                            u32 nsec, u32 sec);
 728        int (*get_ts_info)(struct hnae3_handle *handle,
 729                           struct ethtool_ts_info *info);
 730        int (*get_link_diagnosis_info)(struct hnae3_handle *handle,
 731                                       u32 *status_code);
 732};
 733
 734struct hnae3_dcb_ops {
 735        /* IEEE 802.1Qaz std */
 736        int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
 737        int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
 738        int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
 739        int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
 740
 741        /* DCBX configuration */
 742        u8   (*getdcbx)(struct hnae3_handle *);
 743        u8   (*setdcbx)(struct hnae3_handle *, u8);
 744
 745        int (*setup_tc)(struct hnae3_handle *handle,
 746                        struct tc_mqprio_qopt_offload *mqprio_qopt);
 747};
 748
 749struct hnae3_ae_algo {
 750        const struct hnae3_ae_ops *ops;
 751        struct list_head node;
 752        const struct pci_device_id *pdev_id_table;
 753};
 754
 755#define HNAE3_INT_NAME_LEN        32
 756#define HNAE3_ITR_COUNTDOWN_START 100
 757
 758#define HNAE3_MAX_TC            8
 759#define HNAE3_MAX_USER_PRIO     8
 760struct hnae3_tc_info {
 761        u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */
 762        u16 tqp_count[HNAE3_MAX_TC];
 763        u16 tqp_offset[HNAE3_MAX_TC];
 764        u8 num_tc; /* Total number of enabled TCs */
 765        bool mqprio_active;
 766};
 767
 768struct hnae3_knic_private_info {
 769        struct net_device *netdev; /* Set by KNIC client when init instance */
 770        u16 rss_size;              /* Allocated RSS queues */
 771        u16 req_rss_size;
 772        u16 rx_buf_len;
 773        u16 num_tx_desc;
 774        u16 num_rx_desc;
 775        u32 tx_spare_buf_size;
 776
 777        struct hnae3_tc_info tc_info;
 778
 779        u16 num_tqps;             /* total number of TQPs in this handle */
 780        struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
 781        const struct hnae3_dcb_ops *dcb_ops;
 782
 783        u16 int_rl_setting;
 784        enum pkt_hash_types rss_type;
 785        void __iomem *io_base;
 786};
 787
 788struct hnae3_roce_private_info {
 789        struct net_device *netdev;
 790        void __iomem *roce_io_base;
 791        void __iomem *roce_mem_base;
 792        int base_vector;
 793        int num_vectors;
 794
 795        /* The below attributes defined for RoCE client, hnae3 gives
 796         * initial values to them, and RoCE client can modify and use
 797         * them.
 798         */
 799        unsigned long reset_state;
 800        unsigned long instance_state;
 801        unsigned long state;
 802};
 803
 804#define HNAE3_SUPPORT_APP_LOOPBACK    BIT(0)
 805#define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
 806#define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK    BIT(2)
 807#define HNAE3_SUPPORT_VF              BIT(3)
 808#define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK  BIT(4)
 809
 810#define HNAE3_USER_UPE          BIT(0)  /* unicast promisc enabled by user */
 811#define HNAE3_USER_MPE          BIT(1)  /* mulitcast promisc enabled by user */
 812#define HNAE3_BPE               BIT(2)  /* broadcast promisc enable */
 813#define HNAE3_OVERFLOW_UPE      BIT(3)  /* unicast mac vlan overflow */
 814#define HNAE3_OVERFLOW_MPE      BIT(4)  /* multicast mac vlan overflow */
 815#define HNAE3_UPE               (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
 816#define HNAE3_MPE               (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
 817
 818enum hnae3_pflag {
 819        HNAE3_PFLAG_LIMIT_PROMISC,
 820        HNAE3_PFLAG_MAX
 821};
 822
 823struct hnae3_handle {
 824        struct hnae3_client *client;
 825        struct pci_dev *pdev;
 826        void *priv;
 827        struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
 828        u64 flags; /* Indicate the capabilities for this handle */
 829
 830        union {
 831                struct net_device *netdev; /* first member */
 832                struct hnae3_knic_private_info kinfo;
 833                struct hnae3_roce_private_info rinfo;
 834        };
 835
 836        u32 numa_node_mask;     /* for multi-chip support */
 837
 838        enum hnae3_port_base_vlan_state port_base_vlan_state;
 839
 840        u8 netdev_flags;
 841        struct dentry *hnae3_dbgfs;
 842        /* protects concurrent contention between debugfs commands */
 843        struct mutex dbgfs_lock;
 844
 845        /* Network interface message level enabled bits */
 846        u32 msg_enable;
 847
 848        unsigned long supported_pflags;
 849        unsigned long priv_flags;
 850};
 851
 852#define hnae3_set_field(origin, mask, shift, val) \
 853        do { \
 854                (origin) &= (~(mask)); \
 855                (origin) |= ((val) << (shift)) & (mask); \
 856        } while (0)
 857#define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
 858
 859#define hnae3_set_bit(origin, shift, val) \
 860        hnae3_set_field(origin, 0x1 << (shift), shift, val)
 861#define hnae3_get_bit(origin, shift) \
 862        hnae3_get_field(origin, 0x1 << (shift), shift)
 863
 864int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
 865void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
 866
 867void hnae3_unregister_ae_algo_prepare(struct hnae3_ae_algo *ae_algo);
 868void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
 869void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
 870
 871void hnae3_unregister_client(struct hnae3_client *client);
 872int hnae3_register_client(struct hnae3_client *client);
 873
 874void hnae3_set_client_init_flag(struct hnae3_client *client,
 875                                struct hnae3_ae_dev *ae_dev,
 876                                unsigned int inited);
 877#endif
 878