1
2
3
4#ifndef _IONIC_DEV_H_
5#define _IONIC_DEV_H_
6
7#include <linux/atomic.h>
8#include <linux/mutex.h>
9#include <linux/workqueue.h>
10
11#include "ionic_if.h"
12#include "ionic_regs.h"
13
14#define IONIC_MAX_TX_DESC 8192
15#define IONIC_MAX_RX_DESC 16384
16#define IONIC_MIN_TXRX_DESC 64
17#define IONIC_DEF_TXRX_DESC 4096
18#define IONIC_RX_FILL_THRESHOLD 16
19#define IONIC_RX_FILL_DIV 8
20#define IONIC_LIFS_MAX 1024
21#define IONIC_WATCHDOG_SECS 5
22#define IONIC_ITR_COAL_USEC_DEFAULT 64
23
24#define IONIC_DEV_CMD_REG_VERSION 1
25#define IONIC_DEV_INFO_REG_COUNT 32
26#define IONIC_DEV_CMD_REG_COUNT 32
27
28struct ionic_dev_bar {
29 void __iomem *vaddr;
30 phys_addr_t bus_addr;
31 unsigned long len;
32 int res_index;
33};
34
35#ifndef __CHECKER__
36
37static_assert(sizeof(struct ionic_intr) == 32);
38
39static_assert(sizeof(struct ionic_doorbell) == 8);
40static_assert(sizeof(struct ionic_intr_status) == 8);
41static_assert(sizeof(union ionic_dev_regs) == 4096);
42static_assert(sizeof(union ionic_dev_info_regs) == 2048);
43static_assert(sizeof(union ionic_dev_cmd_regs) == 2048);
44static_assert(sizeof(struct ionic_lif_stats) == 1024);
45
46static_assert(sizeof(struct ionic_admin_cmd) == 64);
47static_assert(sizeof(struct ionic_admin_comp) == 16);
48static_assert(sizeof(struct ionic_nop_cmd) == 64);
49static_assert(sizeof(struct ionic_nop_comp) == 16);
50
51
52static_assert(sizeof(struct ionic_dev_identify_cmd) == 64);
53static_assert(sizeof(struct ionic_dev_identify_comp) == 16);
54static_assert(sizeof(struct ionic_dev_init_cmd) == 64);
55static_assert(sizeof(struct ionic_dev_init_comp) == 16);
56static_assert(sizeof(struct ionic_dev_reset_cmd) == 64);
57static_assert(sizeof(struct ionic_dev_reset_comp) == 16);
58static_assert(sizeof(struct ionic_dev_getattr_cmd) == 64);
59static_assert(sizeof(struct ionic_dev_getattr_comp) == 16);
60static_assert(sizeof(struct ionic_dev_setattr_cmd) == 64);
61static_assert(sizeof(struct ionic_dev_setattr_comp) == 16);
62static_assert(sizeof(struct ionic_lif_setphc_cmd) == 64);
63
64
65static_assert(sizeof(struct ionic_port_identify_cmd) == 64);
66static_assert(sizeof(struct ionic_port_identify_comp) == 16);
67static_assert(sizeof(struct ionic_port_init_cmd) == 64);
68static_assert(sizeof(struct ionic_port_init_comp) == 16);
69static_assert(sizeof(struct ionic_port_reset_cmd) == 64);
70static_assert(sizeof(struct ionic_port_reset_comp) == 16);
71static_assert(sizeof(struct ionic_port_getattr_cmd) == 64);
72static_assert(sizeof(struct ionic_port_getattr_comp) == 16);
73static_assert(sizeof(struct ionic_port_setattr_cmd) == 64);
74static_assert(sizeof(struct ionic_port_setattr_comp) == 16);
75
76
77static_assert(sizeof(struct ionic_lif_init_cmd) == 64);
78static_assert(sizeof(struct ionic_lif_init_comp) == 16);
79static_assert(sizeof(struct ionic_lif_reset_cmd) == 64);
80static_assert(sizeof(ionic_lif_reset_comp) == 16);
81static_assert(sizeof(struct ionic_lif_getattr_cmd) == 64);
82static_assert(sizeof(struct ionic_lif_getattr_comp) == 16);
83static_assert(sizeof(struct ionic_lif_setattr_cmd) == 64);
84static_assert(sizeof(struct ionic_lif_setattr_comp) == 16);
85
86static_assert(sizeof(struct ionic_q_init_cmd) == 64);
87static_assert(sizeof(struct ionic_q_init_comp) == 16);
88static_assert(sizeof(struct ionic_q_control_cmd) == 64);
89static_assert(sizeof(ionic_q_control_comp) == 16);
90static_assert(sizeof(struct ionic_q_identify_cmd) == 64);
91static_assert(sizeof(struct ionic_q_identify_comp) == 16);
92
93static_assert(sizeof(struct ionic_rx_mode_set_cmd) == 64);
94static_assert(sizeof(ionic_rx_mode_set_comp) == 16);
95static_assert(sizeof(struct ionic_rx_filter_add_cmd) == 64);
96static_assert(sizeof(struct ionic_rx_filter_add_comp) == 16);
97static_assert(sizeof(struct ionic_rx_filter_del_cmd) == 64);
98static_assert(sizeof(ionic_rx_filter_del_comp) == 16);
99
100
101static_assert(sizeof(struct ionic_rdma_reset_cmd) == 64);
102static_assert(sizeof(struct ionic_rdma_queue_cmd) == 64);
103
104
105static_assert(sizeof(struct ionic_notifyq_cmd) == 4);
106static_assert(sizeof(union ionic_notifyq_comp) == 64);
107static_assert(sizeof(struct ionic_notifyq_event) == 64);
108static_assert(sizeof(struct ionic_link_change_event) == 64);
109static_assert(sizeof(struct ionic_reset_event) == 64);
110static_assert(sizeof(struct ionic_heartbeat_event) == 64);
111static_assert(sizeof(struct ionic_log_event) == 64);
112
113
114static_assert(sizeof(struct ionic_txq_desc) == 16);
115static_assert(sizeof(struct ionic_txq_sg_desc) == 128);
116static_assert(sizeof(struct ionic_txq_comp) == 16);
117
118static_assert(sizeof(struct ionic_rxq_desc) == 16);
119static_assert(sizeof(struct ionic_rxq_sg_desc) == 128);
120static_assert(sizeof(struct ionic_rxq_comp) == 16);
121
122
123static_assert(sizeof(struct ionic_vf_setattr_cmd) == 64);
124static_assert(sizeof(struct ionic_vf_setattr_comp) == 16);
125static_assert(sizeof(struct ionic_vf_getattr_cmd) == 64);
126static_assert(sizeof(struct ionic_vf_getattr_comp) == 16);
127#endif
128
129struct ionic_devinfo {
130 u8 asic_type;
131 u8 asic_rev;
132 char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN + 1];
133 char serial_num[IONIC_DEVINFO_SERIAL_BUFLEN + 1];
134};
135
136struct ionic_dev {
137 union ionic_dev_info_regs __iomem *dev_info_regs;
138 union ionic_dev_cmd_regs __iomem *dev_cmd_regs;
139 struct ionic_hwstamp_regs __iomem *hwstamp_regs;
140
141 atomic_long_t last_check_time;
142 unsigned long last_hb_time;
143 u32 last_fw_hb;
144 bool fw_hb_ready;
145 bool fw_status_ready;
146 u8 fw_generation;
147
148 u64 __iomem *db_pages;
149 dma_addr_t phy_db_pages;
150
151 struct ionic_intr __iomem *intr_ctrl;
152 u64 __iomem *intr_status;
153
154 u32 port_info_sz;
155 struct ionic_port_info *port_info;
156 dma_addr_t port_info_pa;
157
158 struct ionic_devinfo dev_info;
159};
160
161struct ionic_cq_info {
162 union {
163 void *cq_desc;
164 struct ionic_admin_comp *admincq;
165 struct ionic_notifyq_event *notifyq;
166 };
167};
168
169struct ionic_queue;
170struct ionic_qcq;
171struct ionic_desc_info;
172
173typedef void (*ionic_desc_cb)(struct ionic_queue *q,
174 struct ionic_desc_info *desc_info,
175 struct ionic_cq_info *cq_info, void *cb_arg);
176
177#define IONIC_PAGE_SIZE PAGE_SIZE
178#define IONIC_PAGE_SPLIT_SZ (PAGE_SIZE / 2)
179#define IONIC_PAGE_GFP_MASK (GFP_ATOMIC | __GFP_NOWARN |\
180 __GFP_COMP | __GFP_MEMALLOC)
181
182struct ionic_buf_info {
183 struct page *page;
184 dma_addr_t dma_addr;
185 u32 page_offset;
186 u32 len;
187};
188
189#define IONIC_MAX_FRAGS (1 + IONIC_TX_MAX_SG_ELEMS_V1)
190
191struct ionic_desc_info {
192 union {
193 void *desc;
194 struct ionic_txq_desc *txq_desc;
195 struct ionic_rxq_desc *rxq_desc;
196 struct ionic_admin_cmd *adminq_desc;
197 };
198 union {
199 void *sg_desc;
200 struct ionic_txq_sg_desc *txq_sg_desc;
201 struct ionic_rxq_sg_desc *rxq_sgl_desc;
202 };
203 unsigned int bytes;
204 unsigned int nbufs;
205 struct ionic_buf_info bufs[IONIC_MAX_FRAGS];
206 ionic_desc_cb cb;
207 void *cb_arg;
208};
209
210#define IONIC_QUEUE_NAME_MAX_SZ 32
211
212struct ionic_queue {
213 struct device *dev;
214 struct ionic_lif *lif;
215 struct ionic_desc_info *info;
216 u64 dbval;
217 u16 head_idx;
218 u16 tail_idx;
219 unsigned int index;
220 unsigned int num_descs;
221 unsigned int max_sg_elems;
222 u64 features;
223 u64 drop;
224 struct ionic_dev *idev;
225 unsigned int type;
226 unsigned int hw_index;
227 unsigned int hw_type;
228 union {
229 void *base;
230 struct ionic_txq_desc *txq;
231 struct ionic_rxq_desc *rxq;
232 struct ionic_admin_cmd *adminq;
233 };
234 union {
235 void *sg_base;
236 struct ionic_txq_sg_desc *txq_sgl;
237 struct ionic_rxq_sg_desc *rxq_sgl;
238 };
239 dma_addr_t base_pa;
240 dma_addr_t sg_base_pa;
241 unsigned int desc_size;
242 unsigned int sg_desc_size;
243 unsigned int pid;
244 char name[IONIC_QUEUE_NAME_MAX_SZ];
245} ____cacheline_aligned_in_smp;
246
247#define IONIC_INTR_INDEX_NOT_ASSIGNED -1
248#define IONIC_INTR_NAME_MAX_SZ 32
249
250struct ionic_intr_info {
251 char name[IONIC_INTR_NAME_MAX_SZ];
252 unsigned int index;
253 unsigned int vector;
254 u64 rearm_count;
255 unsigned int cpu;
256 cpumask_t affinity_mask;
257 u32 dim_coal_hw;
258};
259
260struct ionic_cq {
261 struct ionic_lif *lif;
262 struct ionic_cq_info *info;
263 struct ionic_queue *bound_q;
264 struct ionic_intr_info *bound_intr;
265 u16 tail_idx;
266 bool done_color;
267 unsigned int num_descs;
268 unsigned int desc_size;
269 void *base;
270 dma_addr_t base_pa;
271} ____cacheline_aligned_in_smp;
272
273struct ionic;
274
275static inline void ionic_intr_init(struct ionic_dev *idev,
276 struct ionic_intr_info *intr,
277 unsigned long index)
278{
279 ionic_intr_clean(idev->intr_ctrl, index);
280 intr->index = index;
281}
282
283static inline unsigned int ionic_q_space_avail(struct ionic_queue *q)
284{
285 unsigned int avail = q->tail_idx;
286
287 if (q->head_idx >= avail)
288 avail += q->num_descs - q->head_idx - 1;
289 else
290 avail -= q->head_idx + 1;
291
292 return avail;
293}
294
295static inline bool ionic_q_has_space(struct ionic_queue *q, unsigned int want)
296{
297 return ionic_q_space_avail(q) >= want;
298}
299
300void ionic_init_devinfo(struct ionic *ionic);
301int ionic_dev_setup(struct ionic *ionic);
302
303void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
304u8 ionic_dev_cmd_status(struct ionic_dev *idev);
305bool ionic_dev_cmd_done(struct ionic_dev *idev);
306void ionic_dev_cmd_comp(struct ionic_dev *idev, union ionic_dev_cmd_comp *comp);
307
308void ionic_dev_cmd_identify(struct ionic_dev *idev, u8 ver);
309void ionic_dev_cmd_init(struct ionic_dev *idev);
310void ionic_dev_cmd_reset(struct ionic_dev *idev);
311
312void ionic_dev_cmd_port_identify(struct ionic_dev *idev);
313void ionic_dev_cmd_port_init(struct ionic_dev *idev);
314void ionic_dev_cmd_port_reset(struct ionic_dev *idev);
315void ionic_dev_cmd_port_state(struct ionic_dev *idev, u8 state);
316void ionic_dev_cmd_port_speed(struct ionic_dev *idev, u32 speed);
317void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable);
318void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type);
319void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type);
320
321int ionic_set_vf_config(struct ionic *ionic, int vf, u8 attr, u8 *data);
322void ionic_dev_cmd_queue_identify(struct ionic_dev *idev,
323 u16 lif_type, u8 qtype, u8 qver);
324void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver);
325void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index,
326 dma_addr_t addr);
327void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index);
328void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq,
329 u16 lif_index, u16 intr_index);
330
331int ionic_db_page_num(struct ionic_lif *lif, int pid);
332
333int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq,
334 struct ionic_intr_info *intr,
335 unsigned int num_descs, size_t desc_size);
336void ionic_cq_map(struct ionic_cq *cq, void *base, dma_addr_t base_pa);
337void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q);
338typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, struct ionic_cq_info *cq_info);
339typedef void (*ionic_cq_done_cb)(void *done_arg);
340unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do,
341 ionic_cq_cb cb, ionic_cq_done_cb done_cb,
342 void *done_arg);
343
344int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
345 struct ionic_queue *q, unsigned int index, const char *name,
346 unsigned int num_descs, size_t desc_size,
347 size_t sg_desc_size, unsigned int pid);
348void ionic_q_map(struct ionic_queue *q, void *base, dma_addr_t base_pa);
349void ionic_q_sg_map(struct ionic_queue *q, void *base, dma_addr_t base_pa);
350void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, ionic_desc_cb cb,
351 void *cb_arg);
352void ionic_q_rewind(struct ionic_queue *q, struct ionic_desc_info *start);
353void ionic_q_service(struct ionic_queue *q, struct ionic_cq_info *cq_info,
354 unsigned int stop_index);
355int ionic_heartbeat_check(struct ionic *ionic);
356
357#endif
358
