linux/drivers/net/ethernet/smsc/smsc911x.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/***************************************************************************
   3 *
   4 * Copyright (C) 2004-2008 SMSC
   5 * Copyright (C) 2005-2008 ARM
   6 *
   7 ***************************************************************************
   8 * Rewritten, heavily based on smsc911x simple driver by SMSC.
   9 * Partly uses io macros from smc91x.c by Nicolas Pitre
  10 *
  11 * Supported devices:
  12 *   LAN9115, LAN9116, LAN9117, LAN9118
  13 *   LAN9215, LAN9216, LAN9217, LAN9218
  14 *   LAN9210, LAN9211
  15 *   LAN9220, LAN9221
  16 *   LAN89218,LAN9250
  17 */
  18
  19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20
  21#include <linux/crc32.h>
  22#include <linux/clk.h>
  23#include <linux/delay.h>
  24#include <linux/errno.h>
  25#include <linux/etherdevice.h>
  26#include <linux/ethtool.h>
  27#include <linux/init.h>
  28#include <linux/interrupt.h>
  29#include <linux/ioport.h>
  30#include <linux/kernel.h>
  31#include <linux/module.h>
  32#include <linux/netdevice.h>
  33#include <linux/platform_device.h>
  34#include <linux/regulator/consumer.h>
  35#include <linux/sched.h>
  36#include <linux/timer.h>
  37#include <linux/bug.h>
  38#include <linux/bitops.h>
  39#include <linux/irq.h>
  40#include <linux/io.h>
  41#include <linux/swab.h>
  42#include <linux/phy.h>
  43#include <linux/smsc911x.h>
  44#include <linux/device.h>
  45#include <linux/of.h>
  46#include <linux/of_device.h>
  47#include <linux/of_gpio.h>
  48#include <linux/of_net.h>
  49#include <linux/acpi.h>
  50#include <linux/pm_runtime.h>
  51#include <linux/property.h>
  52#include <linux/gpio/consumer.h>
  53
  54#include "smsc911x.h"
  55
  56#define SMSC_CHIPNAME           "smsc911x"
  57#define SMSC_MDIONAME           "smsc911x-mdio"
  58#define SMSC_DRV_VERSION        "2008-10-21"
  59
  60MODULE_LICENSE("GPL");
  61MODULE_VERSION(SMSC_DRV_VERSION);
  62MODULE_ALIAS("platform:smsc911x");
  63
  64#if USE_DEBUG > 0
  65static int debug = 16;
  66#else
  67static int debug = 3;
  68#endif
  69
  70module_param(debug, int, 0);
  71MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  72
  73struct smsc911x_data;
  74
  75struct smsc911x_ops {
  76        u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
  77        void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
  78        void (*rx_readfifo)(struct smsc911x_data *pdata,
  79                                unsigned int *buf, unsigned int wordcount);
  80        void (*tx_writefifo)(struct smsc911x_data *pdata,
  81                                unsigned int *buf, unsigned int wordcount);
  82};
  83
  84#define SMSC911X_NUM_SUPPLIES 2
  85
  86struct smsc911x_data {
  87        void __iomem *ioaddr;
  88
  89        unsigned int idrev;
  90
  91        /* used to decide which workarounds apply */
  92        unsigned int generation;
  93
  94        /* device configuration (copied from platform_data during probe) */
  95        struct smsc911x_platform_config config;
  96
  97        /* This needs to be acquired before calling any of below:
  98         * smsc911x_mac_read(), smsc911x_mac_write()
  99         */
 100        spinlock_t mac_lock;
 101
 102        /* spinlock to ensure register accesses are serialised */
 103        spinlock_t dev_lock;
 104
 105        struct mii_bus *mii_bus;
 106        unsigned int using_extphy;
 107        int last_duplex;
 108        int last_carrier;
 109
 110        u32 msg_enable;
 111        unsigned int gpio_setting;
 112        unsigned int gpio_orig_setting;
 113        struct net_device *dev;
 114        struct napi_struct napi;
 115
 116        unsigned int software_irq_signal;
 117
 118#ifdef USE_PHY_WORK_AROUND
 119#define MIN_PACKET_SIZE (64)
 120        char loopback_tx_pkt[MIN_PACKET_SIZE];
 121        char loopback_rx_pkt[MIN_PACKET_SIZE];
 122        unsigned int resetcount;
 123#endif
 124
 125        /* Members for Multicast filter workaround */
 126        unsigned int multicast_update_pending;
 127        unsigned int set_bits_mask;
 128        unsigned int clear_bits_mask;
 129        unsigned int hashhi;
 130        unsigned int hashlo;
 131
 132        /* register access functions */
 133        const struct smsc911x_ops *ops;
 134
 135        /* regulators */
 136        struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
 137
 138        /* Reset GPIO */
 139        struct gpio_desc *reset_gpiod;
 140
 141        /* clock */
 142        struct clk *clk;
 143};
 144
 145/* Easy access to information */
 146#define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
 147
 148static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
 149{
 150        if (pdata->config.flags & SMSC911X_USE_32BIT)
 151                return readl(pdata->ioaddr + reg);
 152
 153        if (pdata->config.flags & SMSC911X_USE_16BIT)
 154                return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
 155                        ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
 156
 157        BUG();
 158        return 0;
 159}
 160
 161static inline u32
 162__smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
 163{
 164        if (pdata->config.flags & SMSC911X_USE_32BIT)
 165                return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
 166
 167        if (pdata->config.flags & SMSC911X_USE_16BIT)
 168                return (readw(pdata->ioaddr +
 169                                __smsc_shift(pdata, reg)) & 0xFFFF) |
 170                        ((readw(pdata->ioaddr +
 171                        __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
 172
 173        BUG();
 174        return 0;
 175}
 176
 177static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
 178{
 179        u32 data;
 180        unsigned long flags;
 181
 182        spin_lock_irqsave(&pdata->dev_lock, flags);
 183        data = pdata->ops->reg_read(pdata, reg);
 184        spin_unlock_irqrestore(&pdata->dev_lock, flags);
 185
 186        return data;
 187}
 188
 189static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
 190                                        u32 val)
 191{
 192        if (pdata->config.flags & SMSC911X_USE_32BIT) {
 193                writel(val, pdata->ioaddr + reg);
 194                return;
 195        }
 196
 197        if (pdata->config.flags & SMSC911X_USE_16BIT) {
 198                writew(val & 0xFFFF, pdata->ioaddr + reg);
 199                writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
 200                return;
 201        }
 202
 203        BUG();
 204}
 205
 206static inline void
 207__smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
 208{
 209        if (pdata->config.flags & SMSC911X_USE_32BIT) {
 210                writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
 211                return;
 212        }
 213
 214        if (pdata->config.flags & SMSC911X_USE_16BIT) {
 215                writew(val & 0xFFFF,
 216                        pdata->ioaddr + __smsc_shift(pdata, reg));
 217                writew((val >> 16) & 0xFFFF,
 218                        pdata->ioaddr + __smsc_shift(pdata, reg + 2));
 219                return;
 220        }
 221
 222        BUG();
 223}
 224
 225static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
 226                                      u32 val)
 227{
 228        unsigned long flags;
 229
 230        spin_lock_irqsave(&pdata->dev_lock, flags);
 231        pdata->ops->reg_write(pdata, reg, val);
 232        spin_unlock_irqrestore(&pdata->dev_lock, flags);
 233}
 234
 235/* Writes a packet to the TX_DATA_FIFO */
 236static inline void
 237smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
 238                      unsigned int wordcount)
 239{
 240        unsigned long flags;
 241
 242        spin_lock_irqsave(&pdata->dev_lock, flags);
 243
 244        if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
 245                while (wordcount--)
 246                        __smsc911x_reg_write(pdata, TX_DATA_FIFO,
 247                                             swab32(*buf++));
 248                goto out;
 249        }
 250
 251        if (pdata->config.flags & SMSC911X_USE_32BIT) {
 252                iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
 253                goto out;
 254        }
 255
 256        if (pdata->config.flags & SMSC911X_USE_16BIT) {
 257                while (wordcount--)
 258                        __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
 259                goto out;
 260        }
 261
 262        BUG();
 263out:
 264        spin_unlock_irqrestore(&pdata->dev_lock, flags);
 265}
 266
 267/* Writes a packet to the TX_DATA_FIFO - shifted version */
 268static inline void
 269smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
 270                      unsigned int wordcount)
 271{
 272        unsigned long flags;
 273
 274        spin_lock_irqsave(&pdata->dev_lock, flags);
 275
 276        if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
 277                while (wordcount--)
 278                        __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
 279                                             swab32(*buf++));
 280                goto out;
 281        }
 282
 283        if (pdata->config.flags & SMSC911X_USE_32BIT) {
 284                iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
 285                                                TX_DATA_FIFO), buf, wordcount);
 286                goto out;
 287        }
 288
 289        if (pdata->config.flags & SMSC911X_USE_16BIT) {
 290                while (wordcount--)
 291                        __smsc911x_reg_write_shift(pdata,
 292                                                 TX_DATA_FIFO, *buf++);
 293                goto out;
 294        }
 295
 296        BUG();
 297out:
 298        spin_unlock_irqrestore(&pdata->dev_lock, flags);
 299}
 300
 301/* Reads a packet out of the RX_DATA_FIFO */
 302static inline void
 303smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
 304                     unsigned int wordcount)
 305{
 306        unsigned long flags;
 307
 308        spin_lock_irqsave(&pdata->dev_lock, flags);
 309
 310        if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
 311                while (wordcount--)
 312                        *buf++ = swab32(__smsc911x_reg_read(pdata,
 313                                                            RX_DATA_FIFO));
 314                goto out;
 315        }
 316
 317        if (pdata->config.flags & SMSC911X_USE_32BIT) {
 318                ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
 319                goto out;
 320        }
 321
 322        if (pdata->config.flags & SMSC911X_USE_16BIT) {
 323                while (wordcount--)
 324                        *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
 325                goto out;
 326        }
 327
 328        BUG();
 329out:
 330        spin_unlock_irqrestore(&pdata->dev_lock, flags);
 331}
 332
 333/* Reads a packet out of the RX_DATA_FIFO - shifted version */
 334static inline void
 335smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
 336                     unsigned int wordcount)
 337{
 338        unsigned long flags;
 339
 340        spin_lock_irqsave(&pdata->dev_lock, flags);
 341
 342        if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
 343                while (wordcount--)
 344                        *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
 345                                                            RX_DATA_FIFO));
 346                goto out;
 347        }
 348
 349        if (pdata->config.flags & SMSC911X_USE_32BIT) {
 350                ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
 351                                                RX_DATA_FIFO), buf, wordcount);
 352                goto out;
 353        }
 354
 355        if (pdata->config.flags & SMSC911X_USE_16BIT) {
 356                while (wordcount--)
 357                        *buf++ = __smsc911x_reg_read_shift(pdata,
 358                                                                RX_DATA_FIFO);
 359                goto out;
 360        }
 361
 362        BUG();
 363out:
 364        spin_unlock_irqrestore(&pdata->dev_lock, flags);
 365}
 366
 367/*
 368 * enable regulator and clock resources.
 369 */
 370static int smsc911x_enable_resources(struct platform_device *pdev)
 371{
 372        struct net_device *ndev = platform_get_drvdata(pdev);
 373        struct smsc911x_data *pdata = netdev_priv(ndev);
 374        int ret = 0;
 375
 376        ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
 377                        pdata->supplies);
 378        if (ret)
 379                netdev_err(ndev, "failed to enable regulators %d\n",
 380                                ret);
 381
 382        if (!IS_ERR(pdata->clk)) {
 383                ret = clk_prepare_enable(pdata->clk);
 384                if (ret < 0)
 385                        netdev_err(ndev, "failed to enable clock %d\n", ret);
 386        }
 387
 388        return ret;
 389}
 390
 391/*
 392 * disable resources, currently just regulators.
 393 */
 394static int smsc911x_disable_resources(struct platform_device *pdev)
 395{
 396        struct net_device *ndev = platform_get_drvdata(pdev);
 397        struct smsc911x_data *pdata = netdev_priv(ndev);
 398        int ret = 0;
 399
 400        ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
 401                        pdata->supplies);
 402
 403        if (!IS_ERR(pdata->clk))
 404                clk_disable_unprepare(pdata->clk);
 405
 406        return ret;
 407}
 408
 409/*
 410 * Request resources, currently just regulators.
 411 *
 412 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
 413 * these are not always-on we need to request regulators to be turned on
 414 * before we can try to access the device registers.
 415 */
 416static int smsc911x_request_resources(struct platform_device *pdev)
 417{
 418        struct net_device *ndev = platform_get_drvdata(pdev);
 419        struct smsc911x_data *pdata = netdev_priv(ndev);
 420        int ret = 0;
 421
 422        /* Request regulators */
 423        pdata->supplies[0].supply = "vdd33a";
 424        pdata->supplies[1].supply = "vddvario";
 425        ret = regulator_bulk_get(&pdev->dev,
 426                        ARRAY_SIZE(pdata->supplies),
 427                        pdata->supplies);
 428        if (ret) {
 429                /*
 430                 * Retry on deferrals, else just report the error
 431                 * and try to continue.
 432                 */
 433                if (ret == -EPROBE_DEFER)
 434                        return ret;
 435                netdev_err(ndev, "couldn't get regulators %d\n",
 436                                ret);
 437        }
 438
 439        /* Request optional RESET GPIO */
 440        pdata->reset_gpiod = devm_gpiod_get_optional(&pdev->dev,
 441                                                     "reset",
 442                                                     GPIOD_OUT_LOW);
 443
 444        /* Request clock */
 445        pdata->clk = clk_get(&pdev->dev, NULL);
 446        if (IS_ERR(pdata->clk))
 447                dev_dbg(&pdev->dev, "couldn't get clock %li\n",
 448                        PTR_ERR(pdata->clk));
 449
 450        return ret;
 451}
 452
 453/*
 454 * Free resources, currently just regulators.
 455 *
 456 */
 457static void smsc911x_free_resources(struct platform_device *pdev)
 458{
 459        struct net_device *ndev = platform_get_drvdata(pdev);
 460        struct smsc911x_data *pdata = netdev_priv(ndev);
 461
 462        /* Free regulators */
 463        regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
 464                        pdata->supplies);
 465
 466        /* Free clock */
 467        if (!IS_ERR(pdata->clk)) {
 468                clk_put(pdata->clk);
 469                pdata->clk = NULL;
 470        }
 471}
 472
 473/* waits for MAC not busy, with timeout.  Only called by smsc911x_mac_read
 474 * and smsc911x_mac_write, so assumes mac_lock is held */
 475static int smsc911x_mac_complete(struct smsc911x_data *pdata)
 476{
 477        int i;
 478        u32 val;
 479
 480        SMSC_ASSERT_MAC_LOCK(pdata);
 481
 482        for (i = 0; i < 40; i++) {
 483                val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
 484                if (!(val & MAC_CSR_CMD_CSR_BUSY_))
 485                        return 0;
 486        }
 487        SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
 488                  "MAC_CSR_CMD: 0x%08X", val);
 489        return -EIO;
 490}
 491
 492/* Fetches a MAC register value. Assumes mac_lock is acquired */
 493static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
 494{
 495        unsigned int temp;
 496
 497        SMSC_ASSERT_MAC_LOCK(pdata);
 498
 499        temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
 500        if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
 501                SMSC_WARN(pdata, hw, "MAC busy at entry");
 502                return 0xFFFFFFFF;
 503        }
 504
 505        /* Send the MAC cmd */
 506        smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
 507                MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
 508
 509        /* Workaround for hardware read-after-write restriction */
 510        temp = smsc911x_reg_read(pdata, BYTE_TEST);
 511
 512        /* Wait for the read to complete */
 513        if (likely(smsc911x_mac_complete(pdata) == 0))
 514                return smsc911x_reg_read(pdata, MAC_CSR_DATA);
 515
 516        SMSC_WARN(pdata, hw, "MAC busy after read");
 517        return 0xFFFFFFFF;
 518}
 519
 520/* Set a mac register, mac_lock must be acquired before calling */
 521static void smsc911x_mac_write(struct smsc911x_data *pdata,
 522                               unsigned int offset, u32 val)
 523{
 524        unsigned int temp;
 525
 526        SMSC_ASSERT_MAC_LOCK(pdata);
 527
 528        temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
 529        if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
 530                SMSC_WARN(pdata, hw,
 531                          "smsc911x_mac_write failed, MAC busy at entry");
 532                return;
 533        }
 534
 535        /* Send data to write */
 536        smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
 537
 538        /* Write the actual data */
 539        smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
 540                MAC_CSR_CMD_CSR_BUSY_));
 541
 542        /* Workaround for hardware read-after-write restriction */
 543        temp = smsc911x_reg_read(pdata, BYTE_TEST);
 544
 545        /* Wait for the write to complete */
 546        if (likely(smsc911x_mac_complete(pdata) == 0))
 547                return;
 548
 549        SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
 550}
 551
 552/* Get a phy register */
 553static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
 554{
 555        struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
 556        unsigned long flags;
 557        unsigned int addr;
 558        int i, reg;
 559
 560        pm_runtime_get_sync(bus->parent);
 561        spin_lock_irqsave(&pdata->mac_lock, flags);
 562
 563        /* Confirm MII not busy */
 564        if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
 565                SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
 566                reg = -EIO;
 567                goto out;
 568        }
 569
 570        /* Set the address, index & direction (read from PHY) */
 571        addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
 572        smsc911x_mac_write(pdata, MII_ACC, addr);
 573
 574        /* Wait for read to complete w/ timeout */
 575        for (i = 0; i < 100; i++)
 576                if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
 577                        reg = smsc911x_mac_read(pdata, MII_DATA);
 578                        goto out;
 579                }
 580
 581        SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
 582        reg = -EIO;
 583
 584out:
 585        spin_unlock_irqrestore(&pdata->mac_lock, flags);
 586        pm_runtime_put(bus->parent);
 587        return reg;
 588}
 589
 590/* Set a phy register */
 591static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
 592                           u16 val)
 593{
 594        struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
 595        unsigned long flags;
 596        unsigned int addr;
 597        int i, reg;
 598
 599        pm_runtime_get_sync(bus->parent);
 600        spin_lock_irqsave(&pdata->mac_lock, flags);
 601
 602        /* Confirm MII not busy */
 603        if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
 604                SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
 605                reg = -EIO;
 606                goto out;
 607        }
 608
 609        /* Put the data to write in the MAC */
 610        smsc911x_mac_write(pdata, MII_DATA, val);
 611
 612        /* Set the address, index & direction (write to PHY) */
 613        addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
 614                MII_ACC_MII_WRITE_;
 615        smsc911x_mac_write(pdata, MII_ACC, addr);
 616
 617        /* Wait for write to complete w/ timeout */
 618        for (i = 0; i < 100; i++)
 619                if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
 620                        reg = 0;
 621                        goto out;
 622                }
 623
 624        SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
 625        reg = -EIO;
 626
 627out:
 628        spin_unlock_irqrestore(&pdata->mac_lock, flags);
 629        pm_runtime_put(bus->parent);
 630        return reg;
 631}
 632
 633/* Switch to external phy. Assumes tx and rx are stopped. */
 634static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
 635{
 636        unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
 637
 638        /* Disable phy clocks to the MAC */
 639        hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
 640        hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
 641        smsc911x_reg_write(pdata, HW_CFG, hwcfg);
 642        udelay(10);     /* Enough time for clocks to stop */
 643
 644        /* Switch to external phy */
 645        hwcfg |= HW_CFG_EXT_PHY_EN_;
 646        smsc911x_reg_write(pdata, HW_CFG, hwcfg);
 647
 648        /* Enable phy clocks to the MAC */
 649        hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
 650        hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
 651        smsc911x_reg_write(pdata, HW_CFG, hwcfg);
 652        udelay(10);     /* Enough time for clocks to restart */
 653
 654        hwcfg |= HW_CFG_SMI_SEL_;
 655        smsc911x_reg_write(pdata, HW_CFG, hwcfg);
 656}
 657
 658/* Autodetects and enables external phy if present on supported chips.
 659 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
 660 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
 661static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
 662{
 663        unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
 664
 665        if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
 666                SMSC_TRACE(pdata, hw, "Forcing internal PHY");
 667                pdata->using_extphy = 0;
 668        } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
 669                SMSC_TRACE(pdata, hw, "Forcing external PHY");
 670                smsc911x_phy_enable_external(pdata);
 671                pdata->using_extphy = 1;
 672        } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
 673                SMSC_TRACE(pdata, hw,
 674                           "HW_CFG EXT_PHY_DET set, using external PHY");
 675                smsc911x_phy_enable_external(pdata);
 676                pdata->using_extphy = 1;
 677        } else {
 678                SMSC_TRACE(pdata, hw,
 679                           "HW_CFG EXT_PHY_DET clear, using internal PHY");
 680                pdata->using_extphy = 0;
 681        }
 682}
 683
 684/* Fetches a tx status out of the status fifo */
 685static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
 686{
 687        unsigned int result =
 688            smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
 689
 690        if (result != 0)
 691                result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
 692
 693        return result;
 694}
 695
 696/* Fetches the next rx status */
 697static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
 698{
 699        unsigned int result =
 700            smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
 701
 702        if (result != 0)
 703                result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
 704
 705        return result;
 706}
 707
 708#ifdef USE_PHY_WORK_AROUND
 709static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
 710{
 711        unsigned int tries;
 712        u32 wrsz;
 713        u32 rdsz;
 714        ulong bufp;
 715
 716        for (tries = 0; tries < 10; tries++) {
 717                unsigned int txcmd_a;
 718                unsigned int txcmd_b;
 719                unsigned int status;
 720                unsigned int pktlength;
 721                unsigned int i;
 722
 723                /* Zero-out rx packet memory */
 724                memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
 725
 726                /* Write tx packet to 118 */
 727                txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
 728                txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
 729                txcmd_a |= MIN_PACKET_SIZE;
 730
 731                txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
 732
 733                smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
 734                smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
 735
 736                bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
 737                wrsz = MIN_PACKET_SIZE + 3;
 738                wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
 739                wrsz >>= 2;
 740
 741                pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
 742
 743                /* Wait till transmit is done */
 744                i = 60;
 745                do {
 746                        udelay(5);
 747                        status = smsc911x_tx_get_txstatus(pdata);
 748                } while ((i--) && (!status));
 749
 750                if (!status) {
 751                        SMSC_WARN(pdata, hw,
 752                                  "Failed to transmit during loopback test");
 753                        continue;
 754                }
 755                if (status & TX_STS_ES_) {
 756                        SMSC_WARN(pdata, hw,
 757                                  "Transmit encountered errors during loopback test");
 758                        continue;
 759                }
 760
 761                /* Wait till receive is done */
 762                i = 60;
 763                do {
 764                        udelay(5);
 765                        status = smsc911x_rx_get_rxstatus(pdata);
 766                } while ((i--) && (!status));
 767
 768                if (!status) {
 769                        SMSC_WARN(pdata, hw,
 770                                  "Failed to receive during loopback test");
 771                        continue;
 772                }
 773                if (status & RX_STS_ES_) {
 774                        SMSC_WARN(pdata, hw,
 775                                  "Receive encountered errors during loopback test");
 776                        continue;
 777                }
 778
 779                pktlength = ((status & 0x3FFF0000UL) >> 16);
 780                bufp = (ulong)pdata->loopback_rx_pkt;
 781                rdsz = pktlength + 3;
 782                rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
 783                rdsz >>= 2;
 784
 785                pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
 786
 787                if (pktlength != (MIN_PACKET_SIZE + 4)) {
 788                        SMSC_WARN(pdata, hw, "Unexpected packet size "
 789                                  "during loop back test, size=%d, will retry",
 790                                  pktlength);
 791                } else {
 792                        unsigned int j;
 793                        int mismatch = 0;
 794                        for (j = 0; j < MIN_PACKET_SIZE; j++) {
 795                                if (pdata->loopback_tx_pkt[j]
 796                                    != pdata->loopback_rx_pkt[j]) {
 797                                        mismatch = 1;
 798                                        break;
 799                                }
 800                        }
 801                        if (!mismatch) {
 802                                SMSC_TRACE(pdata, hw, "Successfully verified "
 803                                           "loopback packet");
 804                                return 0;
 805                        } else {
 806                                SMSC_WARN(pdata, hw, "Data mismatch "
 807                                          "during loop back test, will retry");
 808                        }
 809                }
 810        }
 811
 812        return -EIO;
 813}
 814
 815static int smsc911x_phy_reset(struct smsc911x_data *pdata)
 816{
 817        unsigned int temp;
 818        unsigned int i = 100000;
 819
 820        temp = smsc911x_reg_read(pdata, PMT_CTRL);
 821        smsc911x_reg_write(pdata, PMT_CTRL, temp | PMT_CTRL_PHY_RST_);
 822        do {
 823                msleep(1);
 824                temp = smsc911x_reg_read(pdata, PMT_CTRL);
 825        } while ((i--) && (temp & PMT_CTRL_PHY_RST_));
 826
 827        if (unlikely(temp & PMT_CTRL_PHY_RST_)) {
 828                SMSC_WARN(pdata, hw, "PHY reset failed to complete");
 829                return -EIO;
 830        }
 831        /* Extra delay required because the phy may not be completed with
 832        * its reset when BMCR_RESET is cleared. Specs say 256 uS is
 833        * enough delay but using 1ms here to be safe */
 834        msleep(1);
 835
 836        return 0;
 837}
 838
 839static int smsc911x_phy_loopbacktest(struct net_device *dev)
 840{
 841        struct smsc911x_data *pdata = netdev_priv(dev);
 842        struct phy_device *phy_dev = dev->phydev;
 843        int result = -EIO;
 844        unsigned int i, val;
 845        unsigned long flags;
 846
 847        /* Initialise tx packet using broadcast destination address */
 848        eth_broadcast_addr(pdata->loopback_tx_pkt);
 849
 850        /* Use incrementing source address */
 851        for (i = 6; i < 12; i++)
 852                pdata->loopback_tx_pkt[i] = (char)i;
 853
 854        /* Set length type field */
 855        pdata->loopback_tx_pkt[12] = 0x00;
 856        pdata->loopback_tx_pkt[13] = 0x00;
 857
 858        for (i = 14; i < MIN_PACKET_SIZE; i++)
 859                pdata->loopback_tx_pkt[i] = (char)i;
 860
 861        val = smsc911x_reg_read(pdata, HW_CFG);
 862        val &= HW_CFG_TX_FIF_SZ_;
 863        val |= HW_CFG_SF_;
 864        smsc911x_reg_write(pdata, HW_CFG, val);
 865
 866        smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
 867        smsc911x_reg_write(pdata, RX_CFG,
 868                (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
 869
 870        for (i = 0; i < 10; i++) {
 871                /* Set PHY to 10/FD, no ANEG, and loopback mode */
 872                smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr,
 873                                   MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX);
 874
 875                /* Enable MAC tx/rx, FD */
 876                spin_lock_irqsave(&pdata->mac_lock, flags);
 877                smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
 878                                   | MAC_CR_TXEN_ | MAC_CR_RXEN_);
 879                spin_unlock_irqrestore(&pdata->mac_lock, flags);
 880
 881                if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
 882                        result = 0;
 883                        break;
 884                }
 885                pdata->resetcount++;
 886
 887                /* Disable MAC rx */
 888                spin_lock_irqsave(&pdata->mac_lock, flags);
 889                smsc911x_mac_write(pdata, MAC_CR, 0);
 890                spin_unlock_irqrestore(&pdata->mac_lock, flags);
 891
 892                smsc911x_phy_reset(pdata);
 893        }
 894
 895        /* Disable MAC */
 896        spin_lock_irqsave(&pdata->mac_lock, flags);
 897        smsc911x_mac_write(pdata, MAC_CR, 0);
 898        spin_unlock_irqrestore(&pdata->mac_lock, flags);
 899
 900        /* Cancel PHY loopback mode */
 901        smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, MII_BMCR, 0);
 902
 903        smsc911x_reg_write(pdata, TX_CFG, 0);
 904        smsc911x_reg_write(pdata, RX_CFG, 0);
 905
 906        return result;
 907}
 908#endif                          /* USE_PHY_WORK_AROUND */
 909
 910static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
 911{
 912        struct net_device *ndev = pdata->dev;
 913        struct phy_device *phy_dev = ndev->phydev;
 914        u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
 915        u32 flow;
 916        unsigned long flags;
 917
 918        if (phy_dev->duplex == DUPLEX_FULL) {
 919                u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
 920                u16 rmtadv = phy_read(phy_dev, MII_LPA);
 921                u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
 922
 923                if (cap & FLOW_CTRL_RX)
 924                        flow = 0xFFFF0002;
 925                else
 926                        flow = 0;
 927
 928                if (cap & FLOW_CTRL_TX)
 929                        afc |= 0xF;
 930                else
 931                        afc &= ~0xF;
 932
 933                SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
 934                           (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
 935                           (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
 936        } else {
 937                SMSC_TRACE(pdata, hw, "half duplex");
 938                flow = 0;
 939                afc |= 0xF;
 940        }
 941
 942        spin_lock_irqsave(&pdata->mac_lock, flags);
 943        smsc911x_mac_write(pdata, FLOW, flow);
 944        spin_unlock_irqrestore(&pdata->mac_lock, flags);
 945
 946        smsc911x_reg_write(pdata, AFC_CFG, afc);
 947}
 948
 949/* Update link mode if anything has changed.  Called periodically when the
 950 * PHY is in polling mode, even if nothing has changed. */
 951static void smsc911x_phy_adjust_link(struct net_device *dev)
 952{
 953        struct smsc911x_data *pdata = netdev_priv(dev);
 954        struct phy_device *phy_dev = dev->phydev;
 955        unsigned long flags;
 956        int carrier;
 957
 958        if (phy_dev->duplex != pdata->last_duplex) {
 959                unsigned int mac_cr;
 960                SMSC_TRACE(pdata, hw, "duplex state has changed");
 961
 962                spin_lock_irqsave(&pdata->mac_lock, flags);
 963                mac_cr = smsc911x_mac_read(pdata, MAC_CR);
 964                if (phy_dev->duplex) {
 965                        SMSC_TRACE(pdata, hw,
 966                                   "configuring for full duplex mode");
 967                        mac_cr |= MAC_CR_FDPX_;
 968                } else {
 969                        SMSC_TRACE(pdata, hw,
 970                                   "configuring for half duplex mode");
 971                        mac_cr &= ~MAC_CR_FDPX_;
 972                }
 973                smsc911x_mac_write(pdata, MAC_CR, mac_cr);
 974                spin_unlock_irqrestore(&pdata->mac_lock, flags);
 975
 976                smsc911x_phy_update_flowcontrol(pdata);
 977                pdata->last_duplex = phy_dev->duplex;
 978        }
 979
 980        carrier = netif_carrier_ok(dev);
 981        if (carrier != pdata->last_carrier) {
 982                SMSC_TRACE(pdata, hw, "carrier state has changed");
 983                if (carrier) {
 984                        SMSC_TRACE(pdata, hw, "configuring for carrier OK");
 985                        if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
 986                            (!pdata->using_extphy)) {
 987                                /* Restore original GPIO configuration */
 988                                pdata->gpio_setting = pdata->gpio_orig_setting;
 989                                smsc911x_reg_write(pdata, GPIO_CFG,
 990                                        pdata->gpio_setting);
 991                        }
 992                } else {
 993                        SMSC_TRACE(pdata, hw, "configuring for no carrier");
 994                        /* Check global setting that LED1
 995                         * usage is 10/100 indicator */
 996                        pdata->gpio_setting = smsc911x_reg_read(pdata,
 997                                GPIO_CFG);
 998                        if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
 999                            (!pdata->using_extphy)) {
1000                                /* Force 10/100 LED off, after saving
1001                                 * original GPIO configuration */
1002                                pdata->gpio_orig_setting = pdata->gpio_setting;
1003
1004                                pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
1005                                pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1006                                                        | GPIO_CFG_GPIODIR0_
1007                                                        | GPIO_CFG_GPIOD0_);
1008                                smsc911x_reg_write(pdata, GPIO_CFG,
1009                                        pdata->gpio_setting);
1010                        }
1011                }
1012                pdata->last_carrier = carrier;
1013        }
1014}
1015
1016static int smsc911x_mii_probe(struct net_device *dev)
1017{
1018        struct smsc911x_data *pdata = netdev_priv(dev);
1019        struct phy_device *phydev = NULL;
1020        int ret;
1021
1022        /* find the first phy */
1023        phydev = phy_find_first(pdata->mii_bus);
1024        if (!phydev) {
1025                netdev_err(dev, "no PHY found\n");
1026                return -ENODEV;
1027        }
1028
1029        SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1030                   phydev->mdio.addr, phydev->phy_id);
1031
1032        ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1033                                 pdata->config.phy_interface);
1034
1035        if (ret) {
1036                netdev_err(dev, "Could not attach to PHY\n");
1037                return ret;
1038        }
1039
1040        phy_attached_info(phydev);
1041
1042        phy_set_max_speed(phydev, SPEED_100);
1043
1044        /* mask with MAC supported features */
1045        phy_support_asym_pause(phydev);
1046
1047        pdata->last_duplex = -1;
1048        pdata->last_carrier = -1;
1049
1050#ifdef USE_PHY_WORK_AROUND
1051        if (smsc911x_phy_loopbacktest(dev) < 0) {
1052                SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1053                phy_disconnect(phydev);
1054                return -ENODEV;
1055        }
1056        SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1057#endif                          /* USE_PHY_WORK_AROUND */
1058
1059        SMSC_TRACE(pdata, hw, "phy initialised successfully");
1060        return 0;
1061}
1062
1063static int smsc911x_mii_init(struct platform_device *pdev,
1064                             struct net_device *dev)
1065{
1066        struct smsc911x_data *pdata = netdev_priv(dev);
1067        int err = -ENXIO;
1068
1069        pdata->mii_bus = mdiobus_alloc();
1070        if (!pdata->mii_bus) {
1071                err = -ENOMEM;
1072                goto err_out_1;
1073        }
1074
1075        pdata->mii_bus->name = SMSC_MDIONAME;
1076        snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1077                pdev->name, pdev->id);
1078        pdata->mii_bus->priv = pdata;
1079        pdata->mii_bus->read = smsc911x_mii_read;
1080        pdata->mii_bus->write = smsc911x_mii_write;
1081
1082        pdata->mii_bus->parent = &pdev->dev;
1083
1084        switch (pdata->idrev & 0xFFFF0000) {
1085        case 0x01170000:
1086        case 0x01150000:
1087        case 0x117A0000:
1088        case 0x115A0000:
1089                /* External PHY supported, try to autodetect */
1090                smsc911x_phy_initialise_external(pdata);
1091                break;
1092        default:
1093                SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1094                           "using internal PHY");
1095                pdata->using_extphy = 0;
1096                break;
1097        }
1098
1099        if (!pdata->using_extphy) {
1100                /* Mask all PHYs except ID 1 (internal) */
1101                pdata->mii_bus->phy_mask = ~(1 << 1);
1102        }
1103
1104        if (mdiobus_register(pdata->mii_bus)) {
1105                SMSC_WARN(pdata, probe, "Error registering mii bus");
1106                goto err_out_free_bus_2;
1107        }
1108
1109        return 0;
1110
1111err_out_free_bus_2:
1112        mdiobus_free(pdata->mii_bus);
1113err_out_1:
1114        return err;
1115}
1116
1117/* Gets the number of tx statuses in the fifo */
1118static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1119{
1120        return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1121                & TX_FIFO_INF_TSUSED_) >> 16;
1122}
1123
1124/* Reads tx statuses and increments counters where necessary */
1125static void smsc911x_tx_update_txcounters(struct net_device *dev)
1126{
1127        struct smsc911x_data *pdata = netdev_priv(dev);
1128        unsigned int tx_stat;
1129
1130        while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1131                if (unlikely(tx_stat & 0x80000000)) {
1132                        /* In this driver the packet tag is used as the packet
1133                         * length. Since a packet length can never reach the
1134                         * size of 0x8000, this bit is reserved. It is worth
1135                         * noting that the "reserved bit" in the warning above
1136                         * does not reference a hardware defined reserved bit
1137                         * but rather a driver defined one.
1138                         */
1139                        SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1140                } else {
1141                        if (unlikely(tx_stat & TX_STS_ES_)) {
1142                                dev->stats.tx_errors++;
1143                        } else {
1144                                dev->stats.tx_packets++;
1145                                dev->stats.tx_bytes += (tx_stat >> 16);
1146                        }
1147                        if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1148                                dev->stats.collisions += 16;
1149                                dev->stats.tx_aborted_errors += 1;
1150                        } else {
1151                                dev->stats.collisions +=
1152                                    ((tx_stat >> 3) & 0xF);
1153                        }
1154                        if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1155                                dev->stats.tx_carrier_errors += 1;
1156                        if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1157                                dev->stats.collisions++;
1158                                dev->stats.tx_aborted_errors++;
1159                        }
1160                }
1161        }
1162}
1163
1164/* Increments the Rx error counters */
1165static void
1166smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1167{
1168        int crc_err = 0;
1169
1170        if (unlikely(rxstat & RX_STS_ES_)) {
1171                dev->stats.rx_errors++;
1172                if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1173                        dev->stats.rx_crc_errors++;
1174                        crc_err = 1;
1175                }
1176        }
1177        if (likely(!crc_err)) {
1178                if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1179                             (rxstat & RX_STS_LENGTH_ERR_)))
1180                        dev->stats.rx_length_errors++;
1181                if (rxstat & RX_STS_MCAST_)
1182                        dev->stats.multicast++;
1183        }
1184}
1185
1186/* Quickly dumps bad packets */
1187static void
1188smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1189{
1190        if (likely(pktwords >= 4)) {
1191                unsigned int timeout = 500;
1192                unsigned int val;
1193                smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1194                do {
1195                        udelay(1);
1196                        val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1197                } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1198
1199                if (unlikely(timeout == 0))
1200                        SMSC_WARN(pdata, hw, "Timed out waiting for "
1201                                  "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1202        } else {
1203                while (pktwords--)
1204                        smsc911x_reg_read(pdata, RX_DATA_FIFO);
1205        }
1206}
1207
1208/* NAPI poll function */
1209static int smsc911x_poll(struct napi_struct *napi, int budget)
1210{
1211        struct smsc911x_data *pdata =
1212                container_of(napi, struct smsc911x_data, napi);
1213        struct net_device *dev = pdata->dev;
1214        int npackets = 0;
1215
1216        while (npackets < budget) {
1217                unsigned int pktlength;
1218                unsigned int pktwords;
1219                struct sk_buff *skb;
1220                unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1221
1222                if (!rxstat) {
1223                        unsigned int temp;
1224                        /* We processed all packets available.  Tell NAPI it can
1225                         * stop polling then re-enable rx interrupts */
1226                        smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1227                        napi_complete(napi);
1228                        temp = smsc911x_reg_read(pdata, INT_EN);
1229                        temp |= INT_EN_RSFL_EN_;
1230                        smsc911x_reg_write(pdata, INT_EN, temp);
1231                        break;
1232                }
1233
1234                /* Count packet for NAPI scheduling, even if it has an error.
1235                 * Error packets still require cycles to discard */
1236                npackets++;
1237
1238                pktlength = ((rxstat & 0x3FFF0000) >> 16);
1239                pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1240                smsc911x_rx_counterrors(dev, rxstat);
1241
1242                if (unlikely(rxstat & RX_STS_ES_)) {
1243                        SMSC_WARN(pdata, rx_err,
1244                                  "Discarding packet with error bit set");
1245                        /* Packet has an error, discard it and continue with
1246                         * the next */
1247                        smsc911x_rx_fastforward(pdata, pktwords);
1248                        dev->stats.rx_dropped++;
1249                        continue;
1250                }
1251
1252                skb = netdev_alloc_skb(dev, pktwords << 2);
1253                if (unlikely(!skb)) {
1254                        SMSC_WARN(pdata, rx_err,
1255                                  "Unable to allocate skb for rx packet");
1256                        /* Drop the packet and stop this polling iteration */
1257                        smsc911x_rx_fastforward(pdata, pktwords);
1258                        dev->stats.rx_dropped++;
1259                        break;
1260                }
1261
1262                pdata->ops->rx_readfifo(pdata,
1263                                 (unsigned int *)skb->data, pktwords);
1264
1265                /* Align IP on 16B boundary */
1266                skb_reserve(skb, NET_IP_ALIGN);
1267                skb_put(skb, pktlength - 4);
1268                skb->protocol = eth_type_trans(skb, dev);
1269                skb_checksum_none_assert(skb);
1270                netif_receive_skb(skb);
1271
1272                /* Update counters */
1273                dev->stats.rx_packets++;
1274                dev->stats.rx_bytes += (pktlength - 4);
1275        }
1276
1277        /* Return total received packets */
1278        return npackets;
1279}
1280
1281/* Returns hash bit number for given MAC address
1282 * Example:
1283 * 01 00 5E 00 00 01 -> returns bit number 31 */
1284static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1285{
1286        return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1287}
1288
1289static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1290{
1291        /* Performs the multicast & mac_cr update.  This is called when
1292         * safe on the current hardware, and with the mac_lock held */
1293        unsigned int mac_cr;
1294
1295        SMSC_ASSERT_MAC_LOCK(pdata);
1296
1297        mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1298        mac_cr |= pdata->set_bits_mask;
1299        mac_cr &= ~(pdata->clear_bits_mask);
1300        smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1301        smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1302        smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1303        SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1304                   mac_cr, pdata->hashhi, pdata->hashlo);
1305}
1306
1307static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1308{
1309        unsigned int mac_cr;
1310
1311        /* This function is only called for older LAN911x devices
1312         * (revA or revB), where MAC_CR, HASHH and HASHL should not
1313         * be modified during Rx - newer devices immediately update the
1314         * registers.
1315         *
1316         * This is called from interrupt context */
1317
1318        spin_lock(&pdata->mac_lock);
1319
1320        /* Check Rx has stopped */
1321        if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1322                SMSC_WARN(pdata, drv, "Rx not stopped");
1323
1324        /* Perform the update - safe to do now Rx has stopped */
1325        smsc911x_rx_multicast_update(pdata);
1326
1327        /* Re-enable Rx */
1328        mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1329        mac_cr |= MAC_CR_RXEN_;
1330        smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1331
1332        pdata->multicast_update_pending = 0;
1333
1334        spin_unlock(&pdata->mac_lock);
1335}
1336
1337static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata)
1338{
1339        struct net_device *ndev = pdata->dev;
1340        struct phy_device *phy_dev = ndev->phydev;
1341        int rc = 0;
1342
1343        if (!phy_dev)
1344                return rc;
1345
1346        /* If the internal PHY is in General Power-Down mode, all, except the
1347         * management interface, is powered-down and stays in that condition as
1348         * long as Phy register bit 0.11 is HIGH.
1349         *
1350         * In that case, clear the bit 0.11, so the PHY powers up and we can
1351         * access to the phy registers.
1352         */
1353        rc = phy_read(phy_dev, MII_BMCR);
1354        if (rc < 0) {
1355                SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1356                return rc;
1357        }
1358
1359        /* If the PHY general power-down bit is not set is not necessary to
1360         * disable the general power down-mode.
1361         */
1362        if (rc & BMCR_PDOWN) {
1363                rc = phy_write(phy_dev, MII_BMCR, rc & ~BMCR_PDOWN);
1364                if (rc < 0) {
1365                        SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1366                        return rc;
1367                }
1368
1369                usleep_range(1000, 1500);
1370        }
1371
1372        return 0;
1373}
1374
1375static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1376{
1377        struct net_device *ndev = pdata->dev;
1378        struct phy_device *phy_dev = ndev->phydev;
1379        int rc = 0;
1380
1381        if (!phy_dev)
1382                return rc;
1383
1384        rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1385
1386        if (rc < 0) {
1387                SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1388                return rc;
1389        }
1390
1391        /* Only disable if energy detect mode is already enabled */
1392        if (rc & MII_LAN83C185_EDPWRDOWN) {
1393                /* Disable energy detect mode for this SMSC Transceivers */
1394                rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1395                               rc & (~MII_LAN83C185_EDPWRDOWN));
1396
1397                if (rc < 0) {
1398                        SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1399                        return rc;
1400                }
1401                /* Allow PHY to wakeup */
1402                mdelay(2);
1403        }
1404
1405        return 0;
1406}
1407
1408static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1409{
1410        struct net_device *ndev = pdata->dev;
1411        struct phy_device *phy_dev = ndev->phydev;
1412        int rc = 0;
1413
1414        if (!phy_dev)
1415                return rc;
1416
1417        rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1418
1419        if (rc < 0) {
1420                SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1421                return rc;
1422        }
1423
1424        /* Only enable if energy detect mode is already disabled */
1425        if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1426                /* Enable energy detect mode for this SMSC Transceivers */
1427                rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1428                               rc | MII_LAN83C185_EDPWRDOWN);
1429
1430                if (rc < 0) {
1431                        SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1432                        return rc;
1433                }
1434        }
1435        return 0;
1436}
1437
1438static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1439{
1440        unsigned int timeout;
1441        unsigned int temp;
1442        int ret;
1443        unsigned int reset_offset = HW_CFG;
1444        unsigned int reset_mask = HW_CFG_SRST_;
1445
1446        /*
1447         * Make sure to power-up the PHY chip before doing a reset, otherwise
1448         * the reset fails.
1449         */
1450        ret = smsc911x_phy_general_power_up(pdata);
1451        if (ret) {
1452                SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip");
1453                return ret;
1454        }
1455
1456        /*
1457         * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1458         * are initialized in a Energy Detect Power-Down mode that prevents
1459         * the MAC chip to be software reseted. So we have to wakeup the PHY
1460         * before.
1461         */
1462        if (pdata->generation == 4) {
1463                ret = smsc911x_phy_disable_energy_detect(pdata);
1464
1465                if (ret) {
1466                        SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1467                        return ret;
1468                }
1469        }
1470
1471        if ((pdata->idrev & 0xFFFF0000) == LAN9250) {
1472                /* special reset for  LAN9250 */
1473                reset_offset = RESET_CTL;
1474                reset_mask = RESET_CTL_DIGITAL_RST_;
1475        }
1476
1477        /* Reset the LAN911x */
1478        smsc911x_reg_write(pdata, reset_offset, reset_mask);
1479
1480        /* verify reset bit is cleared */
1481        timeout = 10;
1482        do {
1483                udelay(10);
1484                temp = smsc911x_reg_read(pdata, reset_offset);
1485        } while ((--timeout) && (temp & reset_mask));
1486
1487        if (unlikely(temp & reset_mask)) {
1488                SMSC_WARN(pdata, drv, "Failed to complete reset");
1489                return -EIO;
1490        }
1491
1492        if (pdata->generation == 4) {
1493                ret = smsc911x_phy_enable_energy_detect(pdata);
1494
1495                if (ret) {
1496                        SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1497                        return ret;
1498                }
1499        }
1500
1501        return 0;
1502}
1503
1504/* Sets the device MAC address to dev_addr, called with mac_lock held */
1505static void
1506smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, const u8 dev_addr[6])
1507{
1508        u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1509        u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1510            (dev_addr[1] << 8) | dev_addr[0];
1511
1512        SMSC_ASSERT_MAC_LOCK(pdata);
1513
1514        smsc911x_mac_write(pdata, ADDRH, mac_high16);
1515        smsc911x_mac_write(pdata, ADDRL, mac_low32);
1516}
1517
1518static void smsc911x_disable_irq_chip(struct net_device *dev)
1519{
1520        struct smsc911x_data *pdata = netdev_priv(dev);
1521
1522        smsc911x_reg_write(pdata, INT_EN, 0);
1523        smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1524}
1525
1526static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1527{
1528        struct net_device *dev = dev_id;
1529        struct smsc911x_data *pdata = netdev_priv(dev);
1530        u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1531        u32 inten = smsc911x_reg_read(pdata, INT_EN);
1532        int serviced = IRQ_NONE;
1533        u32 temp;
1534
1535        if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1536                temp = smsc911x_reg_read(pdata, INT_EN);
1537                temp &= (~INT_EN_SW_INT_EN_);
1538                smsc911x_reg_write(pdata, INT_EN, temp);
1539                smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1540                pdata->software_irq_signal = 1;
1541                smp_wmb();
1542                serviced = IRQ_HANDLED;
1543        }
1544
1545        if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1546                /* Called when there is a multicast update scheduled and
1547                 * it is now safe to complete the update */
1548                SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1549                smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1550                if (pdata->multicast_update_pending)
1551                        smsc911x_rx_multicast_update_workaround(pdata);
1552                serviced = IRQ_HANDLED;
1553        }
1554
1555        if (intsts & inten & INT_STS_TDFA_) {
1556                temp = smsc911x_reg_read(pdata, FIFO_INT);
1557                temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1558                smsc911x_reg_write(pdata, FIFO_INT, temp);
1559                smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1560                netif_wake_queue(dev);
1561                serviced = IRQ_HANDLED;
1562        }
1563
1564        if (unlikely(intsts & inten & INT_STS_RXE_)) {
1565                SMSC_TRACE(pdata, intr, "RX Error interrupt");
1566                smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1567                serviced = IRQ_HANDLED;
1568        }
1569
1570        if (likely(intsts & inten & INT_STS_RSFL_)) {
1571                if (likely(napi_schedule_prep(&pdata->napi))) {
1572                        /* Disable Rx interrupts */
1573                        temp = smsc911x_reg_read(pdata, INT_EN);
1574                        temp &= (~INT_EN_RSFL_EN_);
1575                        smsc911x_reg_write(pdata, INT_EN, temp);
1576                        /* Schedule a NAPI poll */
1577                        __napi_schedule(&pdata->napi);
1578                } else {
1579                        SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1580                }
1581                serviced = IRQ_HANDLED;
1582        }
1583
1584        return serviced;
1585}
1586
1587static int smsc911x_open(struct net_device *dev)
1588{
1589        struct smsc911x_data *pdata = netdev_priv(dev);
1590        unsigned int timeout;
1591        unsigned int temp;
1592        unsigned int intcfg;
1593        int retval;
1594        int irq_flags;
1595
1596        pm_runtime_get_sync(dev->dev.parent);
1597
1598        /* find and start the given phy */
1599        if (!dev->phydev) {
1600                retval = smsc911x_mii_probe(dev);
1601                if (retval < 0) {
1602                        SMSC_WARN(pdata, probe, "Error starting phy");
1603                        goto out;
1604                }
1605        }
1606
1607        /* Reset the LAN911x */
1608        retval = smsc911x_soft_reset(pdata);
1609        if (retval) {
1610                SMSC_WARN(pdata, hw, "soft reset failed");
1611                goto mii_free_out;
1612        }
1613
1614        smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1615        smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1616
1617        /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1618        spin_lock_irq(&pdata->mac_lock);
1619        smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1620        spin_unlock_irq(&pdata->mac_lock);
1621
1622        /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1623        timeout = 50;
1624        while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1625               --timeout) {
1626                udelay(10);
1627        }
1628
1629        if (unlikely(timeout == 0))
1630                SMSC_WARN(pdata, ifup,
1631                          "Timed out waiting for EEPROM busy bit to clear");
1632
1633        smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1634
1635        /* The soft reset above cleared the device's MAC address,
1636         * restore it from local copy (set in probe) */
1637        spin_lock_irq(&pdata->mac_lock);
1638        smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1639        spin_unlock_irq(&pdata->mac_lock);
1640
1641        /* Initialise irqs, but leave all sources disabled */
1642        smsc911x_disable_irq_chip(dev);
1643
1644        /* Set interrupt deassertion to 100uS */
1645        intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1646
1647        if (pdata->config.irq_polarity) {
1648                SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1649                intcfg |= INT_CFG_IRQ_POL_;
1650        } else {
1651                SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1652        }
1653
1654        if (pdata->config.irq_type) {
1655                SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1656                intcfg |= INT_CFG_IRQ_TYPE_;
1657        } else {
1658                SMSC_TRACE(pdata, ifup, "irq type: open drain");
1659        }
1660
1661        smsc911x_reg_write(pdata, INT_CFG, intcfg);
1662
1663        SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1664        pdata->software_irq_signal = 0;
1665        smp_wmb();
1666
1667        irq_flags = irq_get_trigger_type(dev->irq);
1668        retval = request_irq(dev->irq, smsc911x_irqhandler,
1669                             irq_flags | IRQF_SHARED, dev->name, dev);
1670        if (retval) {
1671                SMSC_WARN(pdata, probe,
1672                          "Unable to claim requested irq: %d", dev->irq);
1673                goto mii_free_out;
1674        }
1675
1676        temp = smsc911x_reg_read(pdata, INT_EN);
1677        temp |= INT_EN_SW_INT_EN_;
1678        smsc911x_reg_write(pdata, INT_EN, temp);
1679
1680        timeout = 1000;
1681        while (timeout--) {
1682                if (pdata->software_irq_signal)
1683                        break;
1684                msleep(1);
1685        }
1686
1687        if (!pdata->software_irq_signal) {
1688                netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1689                            dev->irq);
1690                retval = -ENODEV;
1691                goto irq_stop_out;
1692        }
1693        SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1694                   dev->irq);
1695
1696        netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1697                    (unsigned long)pdata->ioaddr, dev->irq);
1698
1699        /* Reset the last known duplex and carrier */
1700        pdata->last_duplex = -1;
1701        pdata->last_carrier = -1;
1702
1703        /* Bring the PHY up */
1704        phy_start(dev->phydev);
1705
1706        temp = smsc911x_reg_read(pdata, HW_CFG);
1707        /* Preserve TX FIFO size and external PHY configuration */
1708        temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1709        temp |= HW_CFG_SF_;
1710        smsc911x_reg_write(pdata, HW_CFG, temp);
1711
1712        temp = smsc911x_reg_read(pdata, FIFO_INT);
1713        temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1714        temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1715        smsc911x_reg_write(pdata, FIFO_INT, temp);
1716
1717        /* set RX Data offset to 2 bytes for alignment */
1718        smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1719
1720        /* enable NAPI polling before enabling RX interrupts */
1721        napi_enable(&pdata->napi);
1722
1723        temp = smsc911x_reg_read(pdata, INT_EN);
1724        temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1725        smsc911x_reg_write(pdata, INT_EN, temp);
1726
1727        spin_lock_irq(&pdata->mac_lock);
1728        temp = smsc911x_mac_read(pdata, MAC_CR);
1729        temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1730        smsc911x_mac_write(pdata, MAC_CR, temp);
1731        spin_unlock_irq(&pdata->mac_lock);
1732
1733        smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1734
1735        netif_start_queue(dev);
1736        return 0;
1737
1738irq_stop_out:
1739        free_irq(dev->irq, dev);
1740mii_free_out:
1741        phy_disconnect(dev->phydev);
1742        dev->phydev = NULL;
1743out:
1744        pm_runtime_put(dev->dev.parent);
1745        return retval;
1746}
1747
1748/* Entry point for stopping the interface */
1749static int smsc911x_stop(struct net_device *dev)
1750{
1751        struct smsc911x_data *pdata = netdev_priv(dev);
1752        unsigned int temp;
1753
1754        /* Disable all device interrupts */
1755        temp = smsc911x_reg_read(pdata, INT_CFG);
1756        temp &= ~INT_CFG_IRQ_EN_;
1757        smsc911x_reg_write(pdata, INT_CFG, temp);
1758
1759        /* Stop Tx and Rx polling */
1760        netif_stop_queue(dev);
1761        napi_disable(&pdata->napi);
1762
1763        /* At this point all Rx and Tx activity is stopped */
1764        dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1765        smsc911x_tx_update_txcounters(dev);
1766
1767        free_irq(dev->irq, dev);
1768
1769        /* Bring the PHY down */
1770        if (dev->phydev) {
1771                phy_stop(dev->phydev);
1772                phy_disconnect(dev->phydev);
1773                dev->phydev = NULL;
1774        }
1775        netif_carrier_off(dev);
1776        pm_runtime_put(dev->dev.parent);
1777
1778        SMSC_TRACE(pdata, ifdown, "Interface stopped");
1779        return 0;
1780}
1781
1782/* Entry point for transmitting a packet */
1783static netdev_tx_t
1784smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1785{
1786        struct smsc911x_data *pdata = netdev_priv(dev);
1787        unsigned int freespace;
1788        unsigned int tx_cmd_a;
1789        unsigned int tx_cmd_b;
1790        unsigned int temp;
1791        u32 wrsz;
1792        ulong bufp;
1793
1794        freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1795
1796        if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1797                SMSC_WARN(pdata, tx_err,
1798                          "Tx data fifo low, space available: %d", freespace);
1799
1800        /* Word alignment adjustment */
1801        tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1802        tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1803        tx_cmd_a |= (unsigned int)skb->len;
1804
1805        tx_cmd_b = ((unsigned int)skb->len) << 16;
1806        tx_cmd_b |= (unsigned int)skb->len;
1807
1808        smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1809        smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1810
1811        bufp = (ulong)skb->data & (~0x3);
1812        wrsz = (u32)skb->len + 3;
1813        wrsz += (u32)((ulong)skb->data & 0x3);
1814        wrsz >>= 2;
1815
1816        pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1817        freespace -= (skb->len + 32);
1818        skb_tx_timestamp(skb);
1819        dev_consume_skb_any(skb);
1820
1821        if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1822                smsc911x_tx_update_txcounters(dev);
1823
1824        if (freespace < TX_FIFO_LOW_THRESHOLD) {
1825                netif_stop_queue(dev);
1826                temp = smsc911x_reg_read(pdata, FIFO_INT);
1827                temp &= 0x00FFFFFF;
1828                temp |= 0x32000000;
1829                smsc911x_reg_write(pdata, FIFO_INT, temp);
1830        }
1831
1832        return NETDEV_TX_OK;
1833}
1834
1835/* Entry point for getting status counters */
1836static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1837{
1838        struct smsc911x_data *pdata = netdev_priv(dev);
1839        smsc911x_tx_update_txcounters(dev);
1840        dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1841        return &dev->stats;
1842}
1843
1844/* Entry point for setting addressing modes */
1845static void smsc911x_set_multicast_list(struct net_device *dev)
1846{
1847        struct smsc911x_data *pdata = netdev_priv(dev);
1848        unsigned long flags;
1849
1850        if (dev->flags & IFF_PROMISC) {
1851                /* Enabling promiscuous mode */
1852                pdata->set_bits_mask = MAC_CR_PRMS_;
1853                pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1854                pdata->hashhi = 0;
1855                pdata->hashlo = 0;
1856        } else if (dev->flags & IFF_ALLMULTI) {
1857                /* Enabling all multicast mode */
1858                pdata->set_bits_mask = MAC_CR_MCPAS_;
1859                pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1860                pdata->hashhi = 0;
1861                pdata->hashlo = 0;
1862        } else if (!netdev_mc_empty(dev)) {
1863                /* Enabling specific multicast addresses */
1864                unsigned int hash_high = 0;
1865                unsigned int hash_low = 0;
1866                struct netdev_hw_addr *ha;
1867
1868                pdata->set_bits_mask = MAC_CR_HPFILT_;
1869                pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1870
1871                netdev_for_each_mc_addr(ha, dev) {
1872                        unsigned int bitnum = smsc911x_hash(ha->addr);
1873                        unsigned int mask = 0x01 << (bitnum & 0x1F);
1874
1875                        if (bitnum & 0x20)
1876                                hash_high |= mask;
1877                        else
1878                                hash_low |= mask;
1879                }
1880
1881                pdata->hashhi = hash_high;
1882                pdata->hashlo = hash_low;
1883        } else {
1884                /* Enabling local MAC address only */
1885                pdata->set_bits_mask = 0;
1886                pdata->clear_bits_mask =
1887                    (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1888                pdata->hashhi = 0;
1889                pdata->hashlo = 0;
1890        }
1891
1892        spin_lock_irqsave(&pdata->mac_lock, flags);
1893
1894        if (pdata->generation <= 1) {
1895                /* Older hardware revision - cannot change these flags while
1896                 * receiving data */
1897                if (!pdata->multicast_update_pending) {
1898                        unsigned int temp;
1899                        SMSC_TRACE(pdata, hw, "scheduling mcast update");
1900                        pdata->multicast_update_pending = 1;
1901
1902                        /* Request the hardware to stop, then perform the
1903                         * update when we get an RX_STOP interrupt */
1904                        temp = smsc911x_mac_read(pdata, MAC_CR);
1905                        temp &= ~(MAC_CR_RXEN_);
1906                        smsc911x_mac_write(pdata, MAC_CR, temp);
1907                } else {
1908                        /* There is another update pending, this should now
1909                         * use the newer values */
1910                }
1911        } else {
1912                /* Newer hardware revision - can write immediately */
1913                smsc911x_rx_multicast_update(pdata);
1914        }
1915
1916        spin_unlock_irqrestore(&pdata->mac_lock, flags);
1917}
1918
1919#ifdef CONFIG_NET_POLL_CONTROLLER
1920static void smsc911x_poll_controller(struct net_device *dev)
1921{
1922        disable_irq(dev->irq);
1923        smsc911x_irqhandler(0, dev);
1924        enable_irq(dev->irq);
1925}
1926#endif                          /* CONFIG_NET_POLL_CONTROLLER */
1927
1928static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1929{
1930        struct smsc911x_data *pdata = netdev_priv(dev);
1931        struct sockaddr *addr = p;
1932
1933        /* On older hardware revisions we cannot change the mac address
1934         * registers while receiving data.  Newer devices can safely change
1935         * this at any time. */
1936        if (pdata->generation <= 1 && netif_running(dev))
1937                return -EBUSY;
1938
1939        if (!is_valid_ether_addr(addr->sa_data))
1940                return -EADDRNOTAVAIL;
1941
1942        eth_hw_addr_set(dev, addr->sa_data);
1943
1944        spin_lock_irq(&pdata->mac_lock);
1945        smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1946        spin_unlock_irq(&pdata->mac_lock);
1947
1948        netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1949
1950        return 0;
1951}
1952
1953static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1954                                        struct ethtool_drvinfo *info)
1955{
1956        strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1957        strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1958        strlcpy(info->bus_info, dev_name(dev->dev.parent),
1959                sizeof(info->bus_info));
1960}
1961
1962static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1963{
1964        struct smsc911x_data *pdata = netdev_priv(dev);
1965        return pdata->msg_enable;
1966}
1967
1968static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1969{
1970        struct smsc911x_data *pdata = netdev_priv(dev);
1971        pdata->msg_enable = level;
1972}
1973
1974static int smsc911x_ethtool_getregslen(struct net_device *dev)
1975{
1976        return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1977            sizeof(u32);
1978}
1979
1980static void
1981smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1982                         void *buf)
1983{
1984        struct smsc911x_data *pdata = netdev_priv(dev);
1985        struct phy_device *phy_dev = dev->phydev;
1986        unsigned long flags;
1987        unsigned int i;
1988        unsigned int j = 0;
1989        u32 *data = buf;
1990
1991        regs->version = pdata->idrev;
1992        for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1993                data[j++] = smsc911x_reg_read(pdata, i);
1994
1995        for (i = MAC_CR; i <= WUCSR; i++) {
1996                spin_lock_irqsave(&pdata->mac_lock, flags);
1997                data[j++] = smsc911x_mac_read(pdata, i);
1998                spin_unlock_irqrestore(&pdata->mac_lock, flags);
1999        }
2000
2001        for (i = 0; i <= 31; i++)
2002                data[j++] = smsc911x_mii_read(phy_dev->mdio.bus,
2003                                              phy_dev->mdio.addr, i);
2004}
2005
2006static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
2007{
2008        unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
2009        temp &= ~GPIO_CFG_EEPR_EN_;
2010        smsc911x_reg_write(pdata, GPIO_CFG, temp);
2011        msleep(1);
2012}
2013
2014static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
2015{
2016        int timeout = 100;
2017        u32 e2cmd;
2018
2019        SMSC_TRACE(pdata, drv, "op 0x%08x", op);
2020        if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
2021                SMSC_WARN(pdata, drv, "Busy at start");
2022                return -EBUSY;
2023        }
2024
2025        e2cmd = op | E2P_CMD_EPC_BUSY_;
2026        smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
2027
2028        do {
2029                msleep(1);
2030                e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
2031        } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
2032
2033        if (!timeout) {
2034                SMSC_TRACE(pdata, drv, "TIMED OUT");
2035                return -EAGAIN;
2036        }
2037
2038        if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
2039                SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
2040                return -EINVAL;
2041        }
2042
2043        return 0;
2044}
2045
2046static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
2047                                         u8 address, u8 *data)
2048{
2049        u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2050        int ret;
2051
2052        SMSC_TRACE(pdata, drv, "address 0x%x", address);
2053        ret = smsc911x_eeprom_send_cmd(pdata, op);
2054
2055        if (!ret)
2056                data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2057
2058        return ret;
2059}
2060
2061static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2062                                          u8 address, u8 data)
2063{
2064        u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2065        int ret;
2066
2067        SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2068        ret = smsc911x_eeprom_send_cmd(pdata, op);
2069
2070        if (!ret) {
2071                op = E2P_CMD_EPC_CMD_WRITE_ | address;
2072                smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2073
2074                /* Workaround for hardware read-after-write restriction */
2075                smsc911x_reg_read(pdata, BYTE_TEST);
2076
2077                ret = smsc911x_eeprom_send_cmd(pdata, op);
2078        }
2079
2080        return ret;
2081}
2082
2083static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2084{
2085        return SMSC911X_EEPROM_SIZE;
2086}
2087
2088static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2089                                       struct ethtool_eeprom *eeprom, u8 *data)
2090{
2091        struct smsc911x_data *pdata = netdev_priv(dev);
2092        u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2093        int len;
2094        int i;
2095
2096        smsc911x_eeprom_enable_access(pdata);
2097
2098        len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2099        for (i = 0; i < len; i++) {
2100                int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2101                if (ret < 0) {
2102                        eeprom->len = 0;
2103                        return ret;
2104                }
2105        }
2106
2107        memcpy(data, &eeprom_data[eeprom->offset], len);
2108        eeprom->len = len;
2109        return 0;
2110}
2111
2112static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2113                                       struct ethtool_eeprom *eeprom, u8 *data)
2114{
2115        int ret;
2116        struct smsc911x_data *pdata = netdev_priv(dev);
2117
2118        smsc911x_eeprom_enable_access(pdata);
2119        smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2120        ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2121        smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2122
2123        /* Single byte write, according to man page */
2124        eeprom->len = 1;
2125
2126        return ret;
2127}
2128
2129static const struct ethtool_ops smsc911x_ethtool_ops = {
2130        .get_link = ethtool_op_get_link,
2131        .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2132        .nway_reset = phy_ethtool_nway_reset,
2133        .get_msglevel = smsc911x_ethtool_getmsglevel,
2134        .set_msglevel = smsc911x_ethtool_setmsglevel,
2135        .get_regs_len = smsc911x_ethtool_getregslen,
2136        .get_regs = smsc911x_ethtool_getregs,
2137        .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2138        .get_eeprom = smsc911x_ethtool_get_eeprom,
2139        .set_eeprom = smsc911x_ethtool_set_eeprom,
2140        .get_ts_info = ethtool_op_get_ts_info,
2141        .get_link_ksettings = phy_ethtool_get_link_ksettings,
2142        .set_link_ksettings = phy_ethtool_set_link_ksettings,
2143};
2144
2145static const struct net_device_ops smsc911x_netdev_ops = {
2146        .ndo_open               = smsc911x_open,
2147        .ndo_stop               = smsc911x_stop,
2148        .ndo_start_xmit         = smsc911x_hard_start_xmit,
2149        .ndo_get_stats          = smsc911x_get_stats,
2150        .ndo_set_rx_mode        = smsc911x_set_multicast_list,
2151        .ndo_eth_ioctl          = phy_do_ioctl_running,
2152        .ndo_validate_addr      = eth_validate_addr,
2153        .ndo_set_mac_address    = smsc911x_set_mac_address,
2154#ifdef CONFIG_NET_POLL_CONTROLLER
2155        .ndo_poll_controller    = smsc911x_poll_controller,
2156#endif
2157};
2158
2159/* copies the current mac address from hardware to dev->dev_addr */
2160static void smsc911x_read_mac_address(struct net_device *dev)
2161{
2162        struct smsc911x_data *pdata = netdev_priv(dev);
2163        u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2164        u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2165        u8 addr[ETH_ALEN];
2166
2167        addr[0] = (u8)(mac_low32);
2168        addr[1] = (u8)(mac_low32 >> 8);
2169        addr[2] = (u8)(mac_low32 >> 16);
2170        addr[3] = (u8)(mac_low32 >> 24);
2171        addr[4] = (u8)(mac_high16);
2172        addr[5] = (u8)(mac_high16 >> 8);
2173        eth_hw_addr_set(dev, addr);
2174}
2175
2176/* Initializing private device structures, only called from probe */
2177static int smsc911x_init(struct net_device *dev)
2178{
2179        struct smsc911x_data *pdata = netdev_priv(dev);
2180        unsigned int byte_test, mask;
2181        unsigned int to = 100;
2182
2183        SMSC_TRACE(pdata, probe, "Driver Parameters:");
2184        SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2185                   (unsigned long)pdata->ioaddr);
2186        SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2187        SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2188
2189        spin_lock_init(&pdata->dev_lock);
2190        spin_lock_init(&pdata->mac_lock);
2191
2192        if (pdata->ioaddr == NULL) {
2193                SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2194                return -ENODEV;
2195        }
2196
2197        /*
2198         * poll the READY bit in PMT_CTRL. Any other access to the device is
2199         * forbidden while this bit isn't set. Try for 100ms
2200         *
2201         * Note that this test is done before the WORD_SWAP register is
2202         * programmed. So in some configurations the READY bit is at 16 before
2203         * WORD_SWAP is written to. This issue is worked around by waiting
2204         * until either bit 0 or bit 16 gets set in PMT_CTRL.
2205         *
2206         * SMSC has confirmed that checking bit 16 (marked as reserved in
2207         * the datasheet) is fine since these bits "will either never be set
2208         * or can only go high after READY does (so also indicate the device
2209         * is ready)".
2210         */
2211
2212        mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2213        while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2214                udelay(1000);
2215
2216        if (to == 0) {
2217                netdev_err(dev, "Device not READY in 100ms aborting\n");
2218                return -ENODEV;
2219        }
2220
2221        /* Check byte ordering */
2222        byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2223        SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2224        if (byte_test == 0x43218765) {
2225                SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2226                           "applying WORD_SWAP");
2227                smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2228
2229                /* 1 dummy read of BYTE_TEST is needed after a write to
2230                 * WORD_SWAP before its contents are valid */
2231                byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2232
2233                byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2234        }
2235
2236        if (byte_test != 0x87654321) {
2237                SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2238                if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2239                        SMSC_WARN(pdata, probe,
2240                                  "top 16 bits equal to bottom 16 bits");
2241                        SMSC_TRACE(pdata, probe,
2242                                   "This may mean the chip is set "
2243                                   "for 32 bit while the bus is reading 16 bit");
2244                }
2245                return -ENODEV;
2246        }
2247
2248        /* Default generation to zero (all workarounds apply) */
2249        pdata->generation = 0;
2250
2251        pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2252        switch (pdata->idrev & 0xFFFF0000) {
2253        case LAN9118:
2254        case LAN9117:
2255        case LAN9116:
2256        case LAN9115:
2257        case LAN89218:
2258                /* LAN911[5678] family */
2259                pdata->generation = pdata->idrev & 0x0000FFFF;
2260                break;
2261
2262        case LAN9218:
2263        case LAN9217:
2264        case LAN9216:
2265        case LAN9215:
2266                /* LAN921[5678] family */
2267                pdata->generation = 3;
2268                break;
2269
2270        case LAN9210:
2271        case LAN9211:
2272        case LAN9220:
2273        case LAN9221:
2274        case LAN9250:
2275                /* LAN9210/LAN9211/LAN9220/LAN9221/LAN9250 */
2276                pdata->generation = 4;
2277                break;
2278
2279        default:
2280                SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2281                          pdata->idrev);
2282                return -ENODEV;
2283        }
2284
2285        SMSC_TRACE(pdata, probe,
2286                   "LAN911x identified, idrev: 0x%08X, generation: %d",
2287                   pdata->idrev, pdata->generation);
2288
2289        if (pdata->generation == 0)
2290                SMSC_WARN(pdata, probe,
2291                          "This driver is not intended for this chip revision");
2292
2293        /* workaround for platforms without an eeprom, where the mac address
2294         * is stored elsewhere and set by the bootloader.  This saves the
2295         * mac address before resetting the device */
2296        if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2297                spin_lock_irq(&pdata->mac_lock);
2298                smsc911x_read_mac_address(dev);
2299                spin_unlock_irq(&pdata->mac_lock);
2300        }
2301
2302        /* Reset the LAN911x */
2303        if (smsc911x_phy_reset(pdata) || smsc911x_soft_reset(pdata))
2304                return -ENODEV;
2305
2306        dev->flags |= IFF_MULTICAST;
2307        netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2308        dev->netdev_ops = &smsc911x_netdev_ops;
2309        dev->ethtool_ops = &smsc911x_ethtool_ops;
2310
2311        return 0;
2312}
2313
2314static int smsc911x_drv_remove(struct platform_device *pdev)
2315{
2316        struct net_device *dev;
2317        struct smsc911x_data *pdata;
2318        struct resource *res;
2319
2320        dev = platform_get_drvdata(pdev);
2321        BUG_ON(!dev);
2322        pdata = netdev_priv(dev);
2323        BUG_ON(!pdata);
2324        BUG_ON(!pdata->ioaddr);
2325
2326        SMSC_TRACE(pdata, ifdown, "Stopping driver");
2327
2328        unregister_netdev(dev);
2329
2330        mdiobus_unregister(pdata->mii_bus);
2331        mdiobus_free(pdata->mii_bus);
2332
2333        res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2334                                           "smsc911x-memory");
2335        if (!res)
2336                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2337
2338        release_mem_region(res->start, resource_size(res));
2339
2340        iounmap(pdata->ioaddr);
2341
2342        (void)smsc911x_disable_resources(pdev);
2343        smsc911x_free_resources(pdev);
2344
2345        free_netdev(dev);
2346
2347        pm_runtime_disable(&pdev->dev);
2348
2349        return 0;
2350}
2351
2352/* standard register acces */
2353static const struct smsc911x_ops standard_smsc911x_ops = {
2354        .reg_read = __smsc911x_reg_read,
2355        .reg_write = __smsc911x_reg_write,
2356        .rx_readfifo = smsc911x_rx_readfifo,
2357        .tx_writefifo = smsc911x_tx_writefifo,
2358};
2359
2360/* shifted register access */
2361static const struct smsc911x_ops shifted_smsc911x_ops = {
2362        .reg_read = __smsc911x_reg_read_shift,
2363        .reg_write = __smsc911x_reg_write_shift,
2364        .rx_readfifo = smsc911x_rx_readfifo_shift,
2365        .tx_writefifo = smsc911x_tx_writefifo_shift,
2366};
2367
2368static int smsc911x_probe_config(struct smsc911x_platform_config *config,
2369                                 struct device *dev)
2370{
2371        int phy_interface;
2372        u32 width = 0;
2373        int err;
2374
2375        phy_interface = device_get_phy_mode(dev);
2376        if (phy_interface < 0)
2377                phy_interface = PHY_INTERFACE_MODE_NA;
2378        config->phy_interface = phy_interface;
2379
2380        device_get_mac_address(dev, config->mac);
2381
2382        err = device_property_read_u32(dev, "reg-io-width", &width);
2383        if (err == -ENXIO)
2384                return err;
2385        if (!err && width == 4)
2386                config->flags |= SMSC911X_USE_32BIT;
2387        else
2388                config->flags |= SMSC911X_USE_16BIT;
2389
2390        device_property_read_u32(dev, "reg-shift", &config->shift);
2391
2392        if (device_property_present(dev, "smsc,irq-active-high"))
2393                config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2394
2395        if (device_property_present(dev, "smsc,irq-push-pull"))
2396                config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2397
2398        if (device_property_present(dev, "smsc,force-internal-phy"))
2399                config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2400
2401        if (device_property_present(dev, "smsc,force-external-phy"))
2402                config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2403
2404        if (device_property_present(dev, "smsc,save-mac-address"))
2405                config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2406
2407        return 0;
2408}
2409
2410static int smsc911x_drv_probe(struct platform_device *pdev)
2411{
2412        struct net_device *dev;
2413        struct smsc911x_data *pdata;
2414        struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2415        struct resource *res;
2416        int res_size, irq;
2417        int retval;
2418
2419        res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2420                                           "smsc911x-memory");
2421        if (!res)
2422                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2423        if (!res) {
2424                pr_warn("Could not allocate resource\n");
2425                retval = -ENODEV;
2426                goto out_0;
2427        }
2428        res_size = resource_size(res);
2429
2430        irq = platform_get_irq(pdev, 0);
2431        if (irq == -EPROBE_DEFER) {
2432                retval = -EPROBE_DEFER;
2433                goto out_0;
2434        } else if (irq <= 0) {
2435                pr_warn("Could not allocate irq resource\n");
2436                retval = -ENODEV;
2437                goto out_0;
2438        }
2439
2440        if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2441                retval = -EBUSY;
2442                goto out_0;
2443        }
2444
2445        dev = alloc_etherdev(sizeof(struct smsc911x_data));
2446        if (!dev) {
2447                retval = -ENOMEM;
2448                goto out_release_io_1;
2449        }
2450
2451        SET_NETDEV_DEV(dev, &pdev->dev);
2452
2453        pdata = netdev_priv(dev);
2454        dev->irq = irq;
2455        pdata->ioaddr = ioremap(res->start, res_size);
2456        if (!pdata->ioaddr) {
2457                retval = -ENOMEM;
2458                goto out_ioremap_fail;
2459        }
2460
2461        pdata->dev = dev;
2462        pdata->msg_enable = ((1 << debug) - 1);
2463
2464        platform_set_drvdata(pdev, dev);
2465
2466        retval = smsc911x_request_resources(pdev);
2467        if (retval)
2468                goto out_request_resources_fail;
2469
2470        retval = smsc911x_enable_resources(pdev);
2471        if (retval)
2472                goto out_enable_resources_fail;
2473
2474        if (pdata->ioaddr == NULL) {
2475                SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2476                retval = -ENOMEM;
2477                goto out_disable_resources;
2478        }
2479
2480        retval = smsc911x_probe_config(&pdata->config, &pdev->dev);
2481        if (retval && config) {
2482                /* copy config parameters across to pdata */
2483                memcpy(&pdata->config, config, sizeof(pdata->config));
2484                retval = 0;
2485        }
2486
2487        if (retval) {
2488                SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2489                goto out_disable_resources;
2490        }
2491
2492        /* assume standard, non-shifted, access to HW registers */
2493        pdata->ops = &standard_smsc911x_ops;
2494        /* apply the right access if shifting is needed */
2495        if (pdata->config.shift)
2496                pdata->ops = &shifted_smsc911x_ops;
2497
2498        pm_runtime_enable(&pdev->dev);
2499        pm_runtime_get_sync(&pdev->dev);
2500
2501        retval = smsc911x_init(dev);
2502        if (retval < 0)
2503                goto out_init_fail;
2504
2505        netif_carrier_off(dev);
2506
2507        retval = smsc911x_mii_init(pdev, dev);
2508        if (retval) {
2509                SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2510                goto out_init_fail;
2511        }
2512
2513        retval = register_netdev(dev);
2514        if (retval) {
2515                SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2516                goto out_init_fail;
2517        } else {
2518                SMSC_TRACE(pdata, probe,
2519                           "Network interface: \"%s\"", dev->name);
2520        }
2521
2522        spin_lock_irq(&pdata->mac_lock);
2523
2524        /* Check if mac address has been specified when bringing interface up */
2525        if (is_valid_ether_addr(dev->dev_addr)) {
2526                smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2527                SMSC_TRACE(pdata, probe,
2528                           "MAC Address is specified by configuration");
2529        } else if (is_valid_ether_addr(pdata->config.mac)) {
2530                eth_hw_addr_set(dev, pdata->config.mac);
2531                SMSC_TRACE(pdata, probe,
2532                           "MAC Address specified by platform data");
2533        } else {
2534                /* Try reading mac address from device. if EEPROM is present
2535                 * it will already have been set */
2536                smsc_get_mac(dev);
2537
2538                if (is_valid_ether_addr(dev->dev_addr)) {
2539                        /* eeprom values are valid  so use them */
2540                        SMSC_TRACE(pdata, probe,
2541                                   "Mac Address is read from LAN911x EEPROM");
2542                } else {
2543                        /* eeprom values are invalid, generate random MAC */
2544                        eth_hw_addr_random(dev);
2545                        smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2546                        SMSC_TRACE(pdata, probe,
2547                                   "MAC Address is set to eth_random_addr");
2548                }
2549        }
2550
2551        spin_unlock_irq(&pdata->mac_lock);
2552        pm_runtime_put(&pdev->dev);
2553
2554        netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2555
2556        return 0;
2557
2558out_init_fail:
2559        pm_runtime_put(&pdev->dev);
2560        pm_runtime_disable(&pdev->dev);
2561out_disable_resources:
2562        (void)smsc911x_disable_resources(pdev);
2563out_enable_resources_fail:
2564        smsc911x_free_resources(pdev);
2565out_request_resources_fail:
2566        iounmap(pdata->ioaddr);
2567out_ioremap_fail:
2568        free_netdev(dev);
2569out_release_io_1:
2570        release_mem_region(res->start, resource_size(res));
2571out_0:
2572        return retval;
2573}
2574
2575#ifdef CONFIG_PM
2576/* This implementation assumes the devices remains powered on its VDDVARIO
2577 * pins during suspend. */
2578
2579/* TODO: implement freeze/thaw callbacks for hibernation.*/
2580
2581static int smsc911x_suspend(struct device *dev)
2582{
2583        struct net_device *ndev = dev_get_drvdata(dev);
2584        struct smsc911x_data *pdata = netdev_priv(ndev);
2585
2586        if (netif_running(ndev)) {
2587                netif_stop_queue(ndev);
2588                netif_device_detach(ndev);
2589        }
2590
2591        /* enable wake on LAN, energy detection and the external PME
2592         * signal. */
2593        smsc911x_reg_write(pdata, PMT_CTRL,
2594                PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2595                PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2596
2597        pm_runtime_disable(dev);
2598        pm_runtime_set_suspended(dev);
2599
2600        return 0;
2601}
2602
2603static int smsc911x_resume(struct device *dev)
2604{
2605        struct net_device *ndev = dev_get_drvdata(dev);
2606        struct smsc911x_data *pdata = netdev_priv(ndev);
2607        unsigned int to = 100;
2608
2609        pm_runtime_enable(dev);
2610        pm_runtime_resume(dev);
2611
2612        /* Note 3.11 from the datasheet:
2613         *      "When the LAN9220 is in a power saving state, a write of any
2614         *       data to the BYTE_TEST register will wake-up the device."
2615         */
2616        smsc911x_reg_write(pdata, BYTE_TEST, 0);
2617
2618        /* poll the READY bit in PMT_CTRL. Any other access to the device is
2619         * forbidden while this bit isn't set. Try for 100ms and return -EIO
2620         * if it failed. */
2621        while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2622                udelay(1000);
2623
2624        if (to == 0)
2625                return -EIO;
2626
2627        if (netif_running(ndev)) {
2628                netif_device_attach(ndev);
2629                netif_start_queue(ndev);
2630        }
2631
2632        return 0;
2633}
2634
2635static const struct dev_pm_ops smsc911x_pm_ops = {
2636        .suspend        = smsc911x_suspend,
2637        .resume         = smsc911x_resume,
2638};
2639
2640#define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2641
2642#else
2643#define SMSC911X_PM_OPS NULL
2644#endif
2645
2646#ifdef CONFIG_OF
2647static const struct of_device_id smsc911x_dt_ids[] = {
2648        { .compatible = "smsc,lan9115", },
2649        { /* sentinel */ }
2650};
2651MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2652#endif
2653
2654#ifdef CONFIG_ACPI
2655static const struct acpi_device_id smsc911x_acpi_match[] = {
2656        { "ARMH9118", 0 },
2657        { }
2658};
2659MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match);
2660#endif
2661
2662static struct platform_driver smsc911x_driver = {
2663        .probe = smsc911x_drv_probe,
2664        .remove = smsc911x_drv_remove,
2665        .driver = {
2666                .name   = SMSC_CHIPNAME,
2667                .pm     = SMSC911X_PM_OPS,
2668                .of_match_table = of_match_ptr(smsc911x_dt_ids),
2669                .acpi_match_table = ACPI_PTR(smsc911x_acpi_match),
2670        },
2671};
2672
2673/* Entry point for loading the module */
2674static int __init smsc911x_init_module(void)
2675{
2676        SMSC_INITIALIZE();
2677        return platform_driver_register(&smsc911x_driver);
2678}
2679
2680/* entry point for unloading the module */
2681static void __exit smsc911x_cleanup_module(void)
2682{
2683        platform_driver_unregister(&smsc911x_driver);
2684}
2685
2686module_init(smsc911x_init_module);
2687module_exit(smsc911x_cleanup_module);
2688