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7#include <linux/module.h>
8#include "mt76x02.h"
9
10#define MT76x02_CCK_RATE(_idx, _rate) { \
11 .bitrate = _rate, \
12 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \
13 .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \
14 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (8 + (_idx)), \
15}
16
17struct ieee80211_rate mt76x02_rates[] = {
18 MT76x02_CCK_RATE(0, 10),
19 MT76x02_CCK_RATE(1, 20),
20 MT76x02_CCK_RATE(2, 55),
21 MT76x02_CCK_RATE(3, 110),
22 OFDM_RATE(0, 60),
23 OFDM_RATE(1, 90),
24 OFDM_RATE(2, 120),
25 OFDM_RATE(3, 180),
26 OFDM_RATE(4, 240),
27 OFDM_RATE(5, 360),
28 OFDM_RATE(6, 480),
29 OFDM_RATE(7, 540),
30};
31EXPORT_SYMBOL_GPL(mt76x02_rates);
32
33static const struct ieee80211_iface_limit mt76x02_if_limits[] = {
34 {
35 .max = 1,
36 .types = BIT(NL80211_IFTYPE_ADHOC)
37 }, {
38 .max = 8,
39 .types = BIT(NL80211_IFTYPE_STATION) |
40#ifdef CONFIG_MAC80211_MESH
41 BIT(NL80211_IFTYPE_MESH_POINT) |
42#endif
43 BIT(NL80211_IFTYPE_P2P_CLIENT) |
44 BIT(NL80211_IFTYPE_P2P_GO) |
45 BIT(NL80211_IFTYPE_AP)
46 },
47};
48
49static const struct ieee80211_iface_limit mt76x02u_if_limits[] = {
50 {
51 .max = 1,
52 .types = BIT(NL80211_IFTYPE_ADHOC)
53 }, {
54 .max = 2,
55 .types = BIT(NL80211_IFTYPE_STATION) |
56#ifdef CONFIG_MAC80211_MESH
57 BIT(NL80211_IFTYPE_MESH_POINT) |
58#endif
59 BIT(NL80211_IFTYPE_P2P_CLIENT) |
60 BIT(NL80211_IFTYPE_P2P_GO) |
61 BIT(NL80211_IFTYPE_AP)
62 },
63};
64
65static const struct ieee80211_iface_combination mt76x02_if_comb[] = {
66 {
67 .limits = mt76x02_if_limits,
68 .n_limits = ARRAY_SIZE(mt76x02_if_limits),
69 .max_interfaces = 8,
70 .num_different_channels = 1,
71 .beacon_int_infra_match = true,
72 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
73 BIT(NL80211_CHAN_WIDTH_20) |
74 BIT(NL80211_CHAN_WIDTH_40) |
75 BIT(NL80211_CHAN_WIDTH_80),
76 }
77};
78
79static const struct ieee80211_iface_combination mt76x02u_if_comb[] = {
80 {
81 .limits = mt76x02u_if_limits,
82 .n_limits = ARRAY_SIZE(mt76x02u_if_limits),
83 .max_interfaces = 2,
84 .num_different_channels = 1,
85 .beacon_int_infra_match = true,
86 }
87};
88
89static void
90mt76x02_led_set_config(struct mt76_dev *mdev, u8 delay_on,
91 u8 delay_off)
92{
93 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev,
94 mt76);
95 u32 val;
96
97 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xff) |
98 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
99 FIELD_PREP(MT_LED_STATUS_ON, delay_on);
100
101 mt76_wr(dev, MT_LED_S0(mdev->led_pin), val);
102 mt76_wr(dev, MT_LED_S1(mdev->led_pin), val);
103
104 val = MT_LED_CTRL_REPLAY(mdev->led_pin) |
105 MT_LED_CTRL_KICK(mdev->led_pin);
106 if (mdev->led_al)
107 val |= MT_LED_CTRL_POLARITY(mdev->led_pin);
108 mt76_wr(dev, MT_LED_CTRL, val);
109}
110
111static int
112mt76x02_led_set_blink(struct led_classdev *led_cdev,
113 unsigned long *delay_on,
114 unsigned long *delay_off)
115{
116 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev,
117 led_cdev);
118 u8 delta_on, delta_off;
119
120 delta_off = max_t(u8, *delay_off / 10, 1);
121 delta_on = max_t(u8, *delay_on / 10, 1);
122
123 mt76x02_led_set_config(mdev, delta_on, delta_off);
124
125 return 0;
126}
127
128static void
129mt76x02_led_set_brightness(struct led_classdev *led_cdev,
130 enum led_brightness brightness)
131{
132 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev,
133 led_cdev);
134
135 if (!brightness)
136 mt76x02_led_set_config(mdev, 0, 0xff);
137 else
138 mt76x02_led_set_config(mdev, 0xff, 0);
139}
140
141void mt76x02_init_device(struct mt76x02_dev *dev)
142{
143 struct ieee80211_hw *hw = mt76_hw(dev);
144 struct wiphy *wiphy = hw->wiphy;
145
146 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt76x02_mac_work);
147
148 hw->queues = 4;
149 hw->max_rates = 1;
150 hw->max_report_rates = 7;
151 hw->max_rate_tries = 1;
152 hw->extra_tx_headroom = 2;
153
154 if (mt76_is_usb(&dev->mt76)) {
155 hw->extra_tx_headroom += sizeof(struct mt76x02_txwi) +
156 MT_DMA_HDR_LEN;
157 wiphy->iface_combinations = mt76x02u_if_comb;
158 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02u_if_comb);
159 } else {
160 INIT_DELAYED_WORK(&dev->wdt_work, mt76x02_wdt_work);
161
162 mt76x02_dfs_init_detector(dev);
163
164 wiphy->reg_notifier = mt76x02_regd_notifier;
165 wiphy->iface_combinations = mt76x02_if_comb;
166 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02_if_comb);
167
168
169 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
170 dev->mt76.led_cdev.brightness_set =
171 mt76x02_led_set_brightness;
172 dev->mt76.led_cdev.blink_set = mt76x02_led_set_blink;
173 }
174 }
175
176 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
177
178 hw->sta_data_size = sizeof(struct mt76x02_sta);
179 hw->vif_data_size = sizeof(struct mt76x02_vif);
180
181 ieee80211_hw_set(hw, SUPPORTS_HT_CCK_RATES);
182 ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
183 ieee80211_hw_set(hw, NEEDS_UNIQUE_STA_ADDR);
184
185 dev->mt76.global_wcid.idx = 255;
186 dev->mt76.global_wcid.hw_key_idx = -1;
187 dev->slottime = 9;
188
189 if (is_mt76x2(dev)) {
190 dev->mphy.sband_2g.sband.ht_cap.cap |=
191 IEEE80211_HT_CAP_LDPC_CODING;
192 dev->mphy.sband_5g.sband.ht_cap.cap |=
193 IEEE80211_HT_CAP_LDPC_CODING;
194 dev->mphy.chainmask = 0x202;
195 dev->mphy.antenna_mask = 3;
196 } else {
197 dev->mphy.chainmask = 0x101;
198 dev->mphy.antenna_mask = 1;
199 }
200}
201EXPORT_SYMBOL_GPL(mt76x02_init_device);
202
203void mt76x02_configure_filter(struct ieee80211_hw *hw,
204 unsigned int changed_flags,
205 unsigned int *total_flags, u64 multicast)
206{
207 struct mt76x02_dev *dev = hw->priv;
208 u32 flags = 0;
209
210#define MT76_FILTER(_flag, _hw) do { \
211 flags |= *total_flags & FIF_##_flag; \
212 dev->mt76.rxfilter &= ~(_hw); \
213 dev->mt76.rxfilter |= !(flags & FIF_##_flag) * (_hw); \
214 } while (0)
215
216 mutex_lock(&dev->mt76.mutex);
217
218 dev->mt76.rxfilter &= ~MT_RX_FILTR_CFG_OTHER_BSS;
219
220 MT76_FILTER(FCSFAIL, MT_RX_FILTR_CFG_CRC_ERR);
221 MT76_FILTER(PLCPFAIL, MT_RX_FILTR_CFG_PHY_ERR);
222 MT76_FILTER(CONTROL, MT_RX_FILTR_CFG_ACK |
223 MT_RX_FILTR_CFG_CTS |
224 MT_RX_FILTR_CFG_CFEND |
225 MT_RX_FILTR_CFG_CFACK |
226 MT_RX_FILTR_CFG_BA |
227 MT_RX_FILTR_CFG_CTRL_RSV);
228 MT76_FILTER(PSPOLL, MT_RX_FILTR_CFG_PSPOLL);
229
230 *total_flags = flags;
231 mt76_wr(dev, MT_RX_FILTR_CFG, dev->mt76.rxfilter);
232
233 mutex_unlock(&dev->mt76.mutex);
234}
235EXPORT_SYMBOL_GPL(mt76x02_configure_filter);
236
237int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
238 struct ieee80211_sta *sta)
239{
240 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
241 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
242 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
243 int idx = 0;
244
245 memset(msta, 0, sizeof(*msta));
246
247 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT76x02_N_WCIDS);
248 if (idx < 0)
249 return -ENOSPC;
250
251 msta->vif = mvif;
252 msta->wcid.sta = 1;
253 msta->wcid.idx = idx;
254 msta->wcid.hw_key_idx = -1;
255 mt76x02_mac_wcid_setup(dev, idx, mvif->idx, sta->addr);
256 mt76x02_mac_wcid_set_drop(dev, idx, false);
257 ewma_pktlen_init(&msta->pktlen);
258
259 if (vif->type == NL80211_IFTYPE_AP)
260 set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
261
262 return 0;
263}
264EXPORT_SYMBOL_GPL(mt76x02_sta_add);
265
266void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
267 struct ieee80211_sta *sta)
268{
269 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
270 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
271 int idx = wcid->idx;
272
273 mt76x02_mac_wcid_set_drop(dev, idx, true);
274 mt76x02_mac_wcid_setup(dev, idx, 0, NULL);
275}
276EXPORT_SYMBOL_GPL(mt76x02_sta_remove);
277
278static void
279mt76x02_vif_init(struct mt76x02_dev *dev, struct ieee80211_vif *vif,
280 unsigned int idx)
281{
282 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
283 struct mt76_txq *mtxq;
284
285 memset(mvif, 0, sizeof(*mvif));
286
287 mvif->idx = idx;
288 mvif->group_wcid.idx = MT_VIF_WCID(idx);
289 mvif->group_wcid.hw_key_idx = -1;
290 mt76_packet_id_init(&mvif->group_wcid);
291
292 mtxq = (struct mt76_txq *)vif->txq->drv_priv;
293 mtxq->wcid = &mvif->group_wcid;
294}
295
296int
297mt76x02_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
298{
299 struct mt76x02_dev *dev = hw->priv;
300 unsigned int idx = 0;
301
302
303 if (!dev->mt76.vif_mask &&
304 (((vif->addr[0] ^ dev->mphy.macaddr[0]) & ~GENMASK(4, 1)) ||
305 memcmp(vif->addr + 1, dev->mphy.macaddr + 1, ETH_ALEN - 1)))
306 mt76x02_mac_setaddr(dev, vif->addr);
307
308 if (vif->addr[0] & BIT(1))
309 idx = 1 + (((dev->mphy.macaddr[0] ^ vif->addr[0]) >> 2) & 7);
310
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321
322
323
324 if (vif->type == NL80211_IFTYPE_STATION)
325 idx += 8;
326
327
328 if (dev->mt76.vif_mask & BIT(idx) ||
329 (vif->type != NL80211_IFTYPE_STATION && idx > 7))
330 return -EBUSY;
331
332 dev->mt76.vif_mask |= BIT(idx);
333
334 mt76x02_vif_init(dev, vif, idx);
335 return 0;
336}
337EXPORT_SYMBOL_GPL(mt76x02_add_interface);
338
339void mt76x02_remove_interface(struct ieee80211_hw *hw,
340 struct ieee80211_vif *vif)
341{
342 struct mt76x02_dev *dev = hw->priv;
343 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
344
345 dev->mt76.vif_mask &= ~BIT(mvif->idx);
346 mt76_packet_id_flush(&dev->mt76, &mvif->group_wcid);
347}
348EXPORT_SYMBOL_GPL(mt76x02_remove_interface);
349
350int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
351 struct ieee80211_ampdu_params *params)
352{
353 enum ieee80211_ampdu_mlme_action action = params->action;
354 struct ieee80211_sta *sta = params->sta;
355 struct mt76x02_dev *dev = hw->priv;
356 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
357 struct ieee80211_txq *txq = sta->txq[params->tid];
358 u16 tid = params->tid;
359 u16 ssn = params->ssn;
360 struct mt76_txq *mtxq;
361 int ret = 0;
362
363 if (!txq)
364 return -EINVAL;
365
366 mtxq = (struct mt76_txq *)txq->drv_priv;
367
368 mutex_lock(&dev->mt76.mutex);
369 switch (action) {
370 case IEEE80211_AMPDU_RX_START:
371 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid,
372 ssn, params->buf_size);
373 mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, BIT(16 + tid));
374 break;
375 case IEEE80211_AMPDU_RX_STOP:
376 mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
377 mt76_clear(dev, MT_WCID_ADDR(msta->wcid.idx) + 4,
378 BIT(16 + tid));
379 break;
380 case IEEE80211_AMPDU_TX_OPERATIONAL:
381 mtxq->aggr = true;
382 mtxq->send_bar = false;
383 ieee80211_send_bar(vif, sta->addr, tid, mtxq->agg_ssn);
384 break;
385 case IEEE80211_AMPDU_TX_STOP_FLUSH:
386 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
387 mtxq->aggr = false;
388 break;
389 case IEEE80211_AMPDU_TX_START:
390 mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
391 ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
392 break;
393 case IEEE80211_AMPDU_TX_STOP_CONT:
394 mtxq->aggr = false;
395 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
396 break;
397 }
398 mutex_unlock(&dev->mt76.mutex);
399
400 return ret;
401}
402EXPORT_SYMBOL_GPL(mt76x02_ampdu_action);
403
404int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
405 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
406 struct ieee80211_key_conf *key)
407{
408 struct mt76x02_dev *dev = hw->priv;
409 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
410 struct mt76x02_sta *msta;
411 struct mt76_wcid *wcid;
412 int idx = key->keyidx;
413 int ret;
414
415
416 switch (key->cipher) {
417 case WLAN_CIPHER_SUITE_WEP40:
418 case WLAN_CIPHER_SUITE_WEP104:
419 case WLAN_CIPHER_SUITE_TKIP:
420 case WLAN_CIPHER_SUITE_CCMP:
421 break;
422 default:
423 return -EOPNOTSUPP;
424 }
425
426
427
428
429
430 if ((vif->type == NL80211_IFTYPE_ADHOC ||
431 vif->type == NL80211_IFTYPE_MESH_POINT) &&
432 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
433 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
434 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
435 return -EOPNOTSUPP;
436
437
438
439
440
441
442 if (mt76_is_usb(&dev->mt76) &&
443 vif->type == NL80211_IFTYPE_AP &&
444 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
445 return -EOPNOTSUPP;
446
447
448 if (is_mt76x0(dev) && !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
449 return -EOPNOTSUPP;
450
451 msta = sta ? (struct mt76x02_sta *)sta->drv_priv : NULL;
452 wcid = msta ? &msta->wcid : &mvif->group_wcid;
453
454 if (cmd == SET_KEY) {
455 key->hw_key_idx = wcid->idx;
456 wcid->hw_key_idx = idx;
457 if (key->flags & IEEE80211_KEY_FLAG_RX_MGMT) {
458 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
459 wcid->sw_iv = true;
460 }
461 } else {
462 if (idx == wcid->hw_key_idx) {
463 wcid->hw_key_idx = -1;
464 wcid->sw_iv = false;
465 }
466
467 key = NULL;
468 }
469 mt76_wcid_key_setup(&dev->mt76, wcid, key);
470
471 if (!msta) {
472 if (key || wcid->hw_key_idx == idx) {
473 ret = mt76x02_mac_wcid_set_key(dev, wcid->idx, key);
474 if (ret)
475 return ret;
476 }
477
478 return mt76x02_mac_shared_key_setup(dev, mvif->idx, idx, key);
479 }
480
481 return mt76x02_mac_wcid_set_key(dev, msta->wcid.idx, key);
482}
483EXPORT_SYMBOL_GPL(mt76x02_set_key);
484
485int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
486 u16 queue, const struct ieee80211_tx_queue_params *params)
487{
488 struct mt76x02_dev *dev = hw->priv;
489 u8 cw_min = 5, cw_max = 10, qid;
490 u32 val;
491
492 qid = dev->mphy.q_tx[queue]->hw_idx;
493
494 if (params->cw_min)
495 cw_min = fls(params->cw_min);
496 if (params->cw_max)
497 cw_max = fls(params->cw_max);
498
499 val = FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop) |
500 FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) |
501 FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) |
502 FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max);
503 mt76_wr(dev, MT_EDCA_CFG_AC(qid), val);
504
505 val = mt76_rr(dev, MT_WMM_TXOP(qid));
506 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(qid));
507 val |= params->txop << MT_WMM_TXOP_SHIFT(qid);
508 mt76_wr(dev, MT_WMM_TXOP(qid), val);
509
510 val = mt76_rr(dev, MT_WMM_AIFSN);
511 val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(qid));
512 val |= params->aifs << MT_WMM_AIFSN_SHIFT(qid);
513 mt76_wr(dev, MT_WMM_AIFSN, val);
514
515 val = mt76_rr(dev, MT_WMM_CWMIN);
516 val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(qid));
517 val |= cw_min << MT_WMM_CWMIN_SHIFT(qid);
518 mt76_wr(dev, MT_WMM_CWMIN, val);
519
520 val = mt76_rr(dev, MT_WMM_CWMAX);
521 val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(qid));
522 val |= cw_max << MT_WMM_CWMAX_SHIFT(qid);
523 mt76_wr(dev, MT_WMM_CWMAX, val);
524
525 return 0;
526}
527EXPORT_SYMBOL_GPL(mt76x02_conf_tx);
528
529void mt76x02_set_tx_ackto(struct mt76x02_dev *dev)
530{
531 u8 ackto, sifs, slottime = dev->slottime;
532
533
534 slottime += 3 * dev->coverage_class;
535 mt76_rmw_field(dev, MT_BKOFF_SLOT_CFG,
536 MT_BKOFF_SLOT_CFG_SLOTTIME, slottime);
537
538 sifs = mt76_get_field(dev, MT_XIFS_TIME_CFG,
539 MT_XIFS_TIME_CFG_OFDM_SIFS);
540
541 ackto = slottime + sifs;
542 mt76_rmw_field(dev, MT_TX_TIMEOUT_CFG,
543 MT_TX_TIMEOUT_CFG_ACKTO, ackto);
544}
545EXPORT_SYMBOL_GPL(mt76x02_set_tx_ackto);
546
547void mt76x02_set_coverage_class(struct ieee80211_hw *hw,
548 s16 coverage_class)
549{
550 struct mt76x02_dev *dev = hw->priv;
551
552 mutex_lock(&dev->mt76.mutex);
553 dev->coverage_class = max_t(s16, coverage_class, 0);
554 mt76x02_set_tx_ackto(dev);
555 mutex_unlock(&dev->mt76.mutex);
556}
557EXPORT_SYMBOL_GPL(mt76x02_set_coverage_class);
558
559int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val)
560{
561 struct mt76x02_dev *dev = hw->priv;
562
563 if (val != ~0 && val > 0xffff)
564 return -EINVAL;
565
566 mutex_lock(&dev->mt76.mutex);
567 mt76x02_mac_set_rts_thresh(dev, val);
568 mutex_unlock(&dev->mt76.mutex);
569
570 return 0;
571}
572EXPORT_SYMBOL_GPL(mt76x02_set_rts_threshold);
573
574void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
575 struct ieee80211_vif *vif,
576 struct ieee80211_sta *sta)
577{
578 struct mt76x02_dev *dev = hw->priv;
579 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
580 struct ieee80211_sta_rates *rates = rcu_dereference(sta->rates);
581 struct ieee80211_tx_rate rate = {};
582
583 if (!rates)
584 return;
585
586 rate.idx = rates->rate[0].idx;
587 rate.flags = rates->rate[0].flags;
588 mt76x02_mac_wcid_set_rate(dev, &msta->wcid, &rate);
589}
590EXPORT_SYMBOL_GPL(mt76x02_sta_rate_tbl_update);
591
592void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len)
593{
594 int hdrlen;
595
596 if (!len)
597 return;
598
599 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
600 memmove(skb->data + len, skb->data, hdrlen);
601 skb_pull(skb, len);
602}
603EXPORT_SYMBOL_GPL(mt76x02_remove_hdr_pad);
604
605void mt76x02_sw_scan_complete(struct ieee80211_hw *hw,
606 struct ieee80211_vif *vif)
607{
608 struct mt76x02_dev *dev = hw->priv;
609
610 clear_bit(MT76_SCANNING, &dev->mphy.state);
611 if (dev->cal.gain_init_done) {
612
613 dev->cal.low_gain = -1;
614 ieee80211_queue_delayed_work(hw, &dev->cal_work, 0);
615 }
616}
617EXPORT_SYMBOL_GPL(mt76x02_sw_scan_complete);
618
619void mt76x02_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta,
620 bool ps)
621{
622 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
623 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
624 int idx = msta->wcid.idx;
625
626 mt76_stop_tx_queues(&dev->mphy, sta, true);
627 if (mt76_is_mmio(mdev))
628 mt76x02_mac_wcid_set_drop(dev, idx, ps);
629}
630EXPORT_SYMBOL_GPL(mt76x02_sta_ps);
631
632void mt76x02_bss_info_changed(struct ieee80211_hw *hw,
633 struct ieee80211_vif *vif,
634 struct ieee80211_bss_conf *info,
635 u32 changed)
636{
637 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
638 struct mt76x02_dev *dev = hw->priv;
639
640 mutex_lock(&dev->mt76.mutex);
641
642 if (changed & BSS_CHANGED_BSSID)
643 mt76x02_mac_set_bssid(dev, mvif->idx, info->bssid);
644
645 if (changed & BSS_CHANGED_HT || changed & BSS_CHANGED_ERP_CTS_PROT)
646 mt76x02_mac_set_tx_protection(dev, info->use_cts_prot,
647 info->ht_operation_mode);
648
649 if (changed & BSS_CHANGED_BEACON_INT) {
650 mt76_rmw_field(dev, MT_BEACON_TIME_CFG,
651 MT_BEACON_TIME_CFG_INTVAL,
652 info->beacon_int << 4);
653 dev->mt76.beacon_int = info->beacon_int;
654 }
655
656 if (changed & BSS_CHANGED_BEACON_ENABLED)
657 mt76x02_mac_set_beacon_enable(dev, vif, info->enable_beacon);
658
659 if (changed & BSS_CHANGED_ERP_PREAMBLE)
660 mt76x02_mac_set_short_preamble(dev, info->use_short_preamble);
661
662 if (changed & BSS_CHANGED_ERP_SLOT) {
663 int slottime = info->use_short_slot ? 9 : 20;
664
665 dev->slottime = slottime;
666 mt76x02_set_tx_ackto(dev);
667 }
668
669 mutex_unlock(&dev->mt76.mutex);
670}
671EXPORT_SYMBOL_GPL(mt76x02_bss_info_changed);
672
673void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev)
674{
675 struct ieee80211_hw *hw = mt76_hw(dev);
676 struct wiphy *wiphy = hw->wiphy;
677 int i;
678
679 for (i = 0; i < ARRAY_SIZE(dev->macaddr_list); i++) {
680 u8 *addr = dev->macaddr_list[i].addr;
681
682 memcpy(addr, dev->mphy.macaddr, ETH_ALEN);
683
684 if (!i)
685 continue;
686
687 addr[0] |= BIT(1);
688 addr[0] ^= ((i - 1) << 2);
689 }
690 wiphy->addresses = dev->macaddr_list;
691 wiphy->n_addresses = ARRAY_SIZE(dev->macaddr_list);
692}
693EXPORT_SYMBOL_GPL(mt76x02_config_mac_addr_list);
694
695MODULE_LICENSE("Dual BSD/GPL");
696
