1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Support for Intel Camera Imaging ISP subsystem. 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 */ 15 16#ifndef __IA_CSS_PIPE_PUBLIC_H 17#define __IA_CSS_PIPE_PUBLIC_H 18 19/* @file 20 * This file contains the public interface for CSS pipes. 21 */ 22 23#include <type_support.h> 24#include <ia_css_err.h> 25#include <ia_css_types.h> 26#include <ia_css_frame_public.h> 27#include <ia_css_buffer.h> 28/* ISP2401 */ 29#include <ia_css_acc_types.h> 30 31enum { 32 IA_CSS_PIPE_OUTPUT_STAGE_0 = 0, 33 IA_CSS_PIPE_OUTPUT_STAGE_1, 34 IA_CSS_PIPE_MAX_OUTPUT_STAGE, 35}; 36 37/* Enumeration of pipe modes. This mode can be used to create 38 * an image pipe for this mode. These pipes can be combined 39 * to configure and run streams on the ISP. 40 * 41 * For example, one can create a preview and capture pipe to 42 * create a continuous capture stream. 43 */ 44enum ia_css_pipe_mode { 45 IA_CSS_PIPE_MODE_PREVIEW, /** Preview pipe */ 46 IA_CSS_PIPE_MODE_VIDEO, /** Video pipe */ 47 IA_CSS_PIPE_MODE_CAPTURE, /** Still capture pipe */ 48 IA_CSS_PIPE_MODE_ACC, /** Accelerated pipe */ 49 IA_CSS_PIPE_MODE_COPY, /** Copy pipe, only used for embedded/image data copying */ 50 IA_CSS_PIPE_MODE_YUVPP, /** YUV post processing pipe, used for all use cases with YUV input, 51 for SoC sensor and external ISP */ 52}; 53 54/* Temporary define */ 55#define IA_CSS_PIPE_MODE_NUM (IA_CSS_PIPE_MODE_YUVPP + 1) 56 57/** 58 * Enumeration of pipe versions. 59 * the order should match with definition in sh_css_defs.h 60 */ 61enum ia_css_pipe_version { 62 IA_CSS_PIPE_VERSION_1 = 1, /** ISP1.0 pipe */ 63 IA_CSS_PIPE_VERSION_2_2 = 2, /** ISP2.2 pipe */ 64 IA_CSS_PIPE_VERSION_2_6_1 = 3, /** ISP2.6.1 pipe */ 65 IA_CSS_PIPE_VERSION_2_7 = 4 /** ISP2.7 pipe */ 66}; 67 68/** 69 * Pipe configuration structure. 70 * Resolution properties are filled by Driver, kernel configurations are 71 * set by AIC 72 */ 73struct ia_css_pipe_config { 74 enum ia_css_pipe_mode mode; 75 /** mode, indicates which mode the pipe should use. */ 76 enum ia_css_pipe_version isp_pipe_version; 77 /** pipe version, indicates which imaging pipeline the pipe should use. */ 78 struct ia_css_resolution input_effective_res; 79 /** input effective resolution */ 80 struct ia_css_resolution bayer_ds_out_res; 81 /** bayer down scaling */ 82 struct ia_css_resolution capt_pp_in_res; 83 /** capture post processing input resolution */ 84 struct ia_css_resolution vf_pp_in_res; 85 86 /** ISP2401: view finder post processing input resolution */ 87 struct ia_css_resolution output_system_in_res; 88 /** For IPU3 only: use output_system_in_res to specify what input resolution 89 will OSYS receive, this resolution is equal to the output resolution of GDC 90 if not determined CSS will set output_system_in_res with main osys output pin resolution 91 All other IPUs may ignore this property */ 92 struct ia_css_resolution dvs_crop_out_res; 93 /** dvs crop, video only, not in use yet. Use dvs_envelope below. */ 94 struct ia_css_frame_info output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; 95 /** output of YUV scaling */ 96 struct ia_css_frame_info vf_output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; 97 /** output of VF YUV scaling */ 98 struct ia_css_fw_info *acc_extension; 99 /** Pipeline extension accelerator */ 100 struct ia_css_fw_info **acc_stages; 101 /** Standalone accelerator stages */ 102 u32 num_acc_stages; 103 /** Number of standalone accelerator stages */ 104 struct ia_css_capture_config default_capture_config; 105 /** Default capture config for initial capture pipe configuration. */ 106 struct ia_css_resolution dvs_envelope; /** temporary */ 107 enum ia_css_frame_delay dvs_frame_delay; 108 /** indicates the DVS loop delay in frame periods */ 109 int acc_num_execs; 110 /** For acceleration pipes only: determine how many times the pipe 111 should be run. Setting this to -1 means it will run until 112 stopped. */ 113 bool enable_dz; 114 /** Disabling digital zoom for a pipeline, if this is set to false, 115 then setting a zoom factor will have no effect. 116 In some use cases this provides better performance. */ 117 bool enable_dpc; 118 /** Disabling "Defect Pixel Correction" for a pipeline, if this is set 119 to false. In some use cases this provides better performance. */ 120 bool enable_vfpp_bci; 121 /** Enabling BCI mode will cause yuv_scale binary to be picked up 122 instead of vf_pp. This only applies to viewfinder post 123 processing stages. */ 124 125/* ISP2401 */ 126 bool enable_luma_only; 127 /** Enabling of monochrome mode for a pipeline. If enabled only luma processing 128 will be done. */ 129 bool enable_tnr; 130 /** Enabling of TNR (temporal noise reduction). This is only applicable to video 131 pipes. Non video-pipes should always set this parameter to false. */ 132 133 struct ia_css_isp_config *p_isp_config; 134 /** Pointer to ISP configuration */ 135 struct ia_css_resolution gdc_in_buffer_res; 136 /** GDC in buffer resolution. */ 137 struct ia_css_point gdc_in_buffer_offset; 138 /** GDC in buffer offset - indicates the pixel coordinates of the first valid pixel inside the buffer */ 139 140/* ISP2401 */ 141 struct ia_css_coordinate internal_frame_origin_bqs_on_sctbl; 142 /** Origin of internal frame positioned on shading table at shading correction in ISP. 143 NOTE: Shading table is larger than or equal to internal frame. 144 Shading table has shading gains and internal frame has bayer data. 145 The origin of internal frame is used in shading correction in ISP 146 to retrieve shading gains which correspond to bayer data. */ 147}; 148 149/** 150 * Default settings for newly created pipe configurations. 151 */ 152#define DEFAULT_PIPE_CONFIG { \ 153 .mode = IA_CSS_PIPE_MODE_PREVIEW, \ 154 .isp_pipe_version = 1, \ 155 .output_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ 156 .vf_output_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ 157 .default_capture_config = DEFAULT_CAPTURE_CONFIG, \ 158 .dvs_frame_delay = IA_CSS_FRAME_DELAY_1, \ 159 .acc_num_execs = -1, \ 160} 161 162/* Pipe info, this struct describes properties of a pipe after it's stream has 163 * been created. 164 * ~~~** DO NOT ADD NEW FIELD **~~~ This structure will be deprecated. 165 * - On the Behalf of CSS-API Committee. 166 */ 167struct ia_css_pipe_info { 168 struct ia_css_frame_info output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; 169 /** Info about output resolution. This contains the stride which 170 should be used for memory allocation. */ 171 struct ia_css_frame_info vf_output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; 172 /** Info about viewfinder output resolution (optional). This contains 173 the stride that should be used for memory allocation. */ 174 struct ia_css_frame_info raw_output_info; 175 /** Raw output resolution. This indicates the resolution of the 176 RAW bayer output for pipes that support this. Currently, only the 177 still capture pipes support this feature. When this resolution is 178 smaller than the input resolution, cropping will be performed by 179 the ISP. The first cropping that will be performed is on the upper 180 left corner where we crop 8 lines and 8 columns to remove the 181 pixels normally used to initialize the ISP filters. 182 This is why the raw output resolution should normally be set to 183 the input resolution - 8x8. */ 184 /* ISP2401 */ 185 struct ia_css_resolution output_system_in_res_info; 186 /** For IPU3 only. Info about output system in resolution which is considered 187 as gdc out resolution. */ 188 struct ia_css_shading_info shading_info; 189 /** After an image pipe is created, this field will contain the info 190 for the shading correction. */ 191 struct ia_css_grid_info grid_info; 192 /** After an image pipe is created, this field will contain the grid 193 info for 3A and DVS. */ 194 int num_invalid_frames; 195 /** The very first frames in a started stream do not contain valid data. 196 In this field, the CSS-firmware communicates to the host-driver how 197 many initial frames will contain invalid data; this allows the 198 host-driver to discard those initial invalid frames and start it's 199 output at the first valid frame. */ 200}; 201 202/** 203 * Defaults for ia_css_pipe_info structs. 204 */ 205#define DEFAULT_PIPE_INFO {\ 206 .output_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ 207 .vf_output_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ 208 .raw_output_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO, \ 209 .shading_info = DEFAULT_SHADING_INFO, \ 210 .grid_info = DEFAULT_GRID_INFO, \ 211} 212 213/* @brief Load default pipe configuration 214 * @param[out] pipe_config The pipe configuration. 215 * @return None 216 * 217 * This function will load the default pipe configuration: 218@code 219 struct ia_css_pipe_config def_config = { 220 IA_CSS_PIPE_MODE_PREVIEW, // mode 221 1, // isp_pipe_version 222 {0, 0}, // bayer_ds_out_res 223 {0, 0}, // capt_pp_in_res 224 {0, 0}, // vf_pp_in_res 225 {0, 0}, // dvs_crop_out_res 226 {{0, 0}, 0, 0, 0, 0}, // output_info 227 {{0, 0}, 0, 0, 0, 0}, // second_output_info 228 {{0, 0}, 0, 0, 0, 0}, // vf_output_info 229 {{0, 0}, 0, 0, 0, 0}, // second_vf_output_info 230 NULL, // acc_extension 231 NULL, // acc_stages 232 0, // num_acc_stages 233 { 234 IA_CSS_CAPTURE_MODE_RAW, // mode 235 false, // enable_xnr 236 false // enable_raw_output 237 }, // default_capture_config 238 {0, 0}, // dvs_envelope 239 1, // dvs_frame_delay 240 -1, // acc_num_execs 241 true, // enable_dz 242 NULL, // p_isp_config 243 }; 244@endcode 245 */ 246void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config); 247 248/* @brief Create a pipe 249 * @param[in] config The pipe configuration. 250 * @param[out] pipe The pipe. 251 * @return 0 or the error code. 252 * 253 * This function will create a pipe with the given 254 * configuration. 255 */ 256int 257ia_css_pipe_create(const struct ia_css_pipe_config *config, 258 struct ia_css_pipe **pipe); 259 260/* @brief Destroy a pipe 261 * @param[in] pipe The pipe. 262 * @return 0 or the error code. 263 * 264 * This function will destroy a given pipe. 265 */ 266int 267ia_css_pipe_destroy(struct ia_css_pipe *pipe); 268 269/* @brief Provides information about a pipe 270 * @param[in] pipe The pipe. 271 * @param[out] pipe_info The pipe information. 272 * @return 0 or -EINVAL. 273 * 274 * This function will provide information about a given pipe. 275 */ 276int 277ia_css_pipe_get_info(const struct ia_css_pipe *pipe, 278 struct ia_css_pipe_info *pipe_info); 279 280/* @brief Configure a pipe with filter coefficients. 281 * @param[in] pipe The pipe. 282 * @param[in] config The pointer to ISP configuration. 283 * @return 0 or error code upon error. 284 * 285 * This function configures the filter coefficients for an image 286 * pipe. 287 */ 288int 289ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, 290 struct ia_css_isp_config *config); 291 292/* @brief Controls when the Event generator raises an IRQ to the Host. 293 * 294 * @param[in] pipe The pipe. 295 * @param[in] or_mask Binary or of enum ia_css_event_irq_mask_type. Each pipe 296 related event that is part of this mask will directly 297 raise an IRQ to the Host when the event occurs in the 298 CSS. 299 * @param[in] and_mask Binary or of enum ia_css_event_irq_mask_type. An event 300 IRQ for the Host is only raised after all pipe related 301 events have occurred at least once for all the active 302 pipes. Events are remembered and don't need to occurred 303 at the same moment in time. There is no control over 304 the order of these events. Once an IRQ has been raised 305 all remembered events are reset. 306 * @return 0. 307 * 308 Controls when the Event generator in the CSS raises an IRQ to the Host. 309 The main purpose of this function is to reduce the amount of interrupts 310 between the CSS and the Host. This will help saving power as it wakes up the 311 Host less often. In case both or_mask and and_mask are 312 IA_CSS_EVENT_TYPE_NONE for all pipes, no event IRQ's will be raised. An 313 exception holds for IA_CSS_EVENT_TYPE_PORT_EOF, for this event an IRQ is always 314 raised. 315 Note that events are still queued and the Host can poll for them. The 316 or_mask and and_mask may be active at the same time\n 317 \n 318 Default values, for all pipe id's, after ia_css_init:\n 319 or_mask = IA_CSS_EVENT_TYPE_ALL\n 320 and_mask = IA_CSS_EVENT_TYPE_NONE\n 321 \n 322 Examples\n 323 \code 324 ia_css_pipe_set_irq_mask(h_pipe, 325 IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE | 326 IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE , 327 IA_CSS_EVENT_TYPE_NONE); 328 \endcode 329 The event generator will only raise an interrupt to the Host when there are 330 3A or DIS statistics available from the preview pipe. It will not generate 331 an interrupt for any other event of the preview pipe e.g when there is an 332 output frame available. 333 334 \code 335 ia_css_pipe_set_irq_mask(h_pipe_preview, 336 IA_CSS_EVENT_TYPE_NONE, 337 IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE | 338 IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE ); 339 340 ia_css_pipe_set_irq_mask(h_pipe_capture, 341 IA_CSS_EVENT_TYPE_NONE, 342 IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE ); 343 \endcode 344 The event generator will only raise an interrupt to the Host when there is 345 both a frame done and 3A event available from the preview pipe AND when there 346 is a frame done available from the capture pipe. Note that these events 347 may occur at different moments in time. Also the order of the events is not 348 relevant. 349 350 \code 351 ia_css_pipe_set_irq_mask(h_pipe_preview, 352 IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, 353 IA_CSS_EVENT_TYPE_ALL ); 354 355 ia_css_pipe_set_irq_mask(h_pipe_capture, 356 IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, 357 IA_CSS_EVENT_TYPE_ALL ); 358 \endcode 359 The event generator will only raise an interrupt to the Host when there is an 360 output frame from the preview pipe OR an output frame from the capture pipe. 361 All other events (3A, VF output, pipeline done) will not raise an interrupt 362 to the Host. These events are not lost but always stored in the event queue. 363 */ 364int 365ia_css_pipe_set_irq_mask(struct ia_css_pipe *pipe, 366 unsigned int or_mask, 367 unsigned int and_mask); 368 369/* @brief Reads the current event IRQ mask from the CSS. 370 * 371 * @param[in] pipe The pipe. 372 * @param[out] or_mask Current or_mask. The bits in this mask are a binary or 373 of enum ia_css_event_irq_mask_type. Pointer may be NULL. 374 * @param[out] and_mask Current and_mask.The bits in this mask are a binary or 375 of enum ia_css_event_irq_mask_type. Pointer may be NULL. 376 * @return 0. 377 * 378 Reads the current event IRQ mask from the CSS. Reading returns the actual 379 values as used by the SP and not any mirrored values stored at the Host.\n 380\n 381Precondition:\n 382SP must be running.\n 383 384*/ 385int 386ia_css_event_get_irq_mask(const struct ia_css_pipe *pipe, 387 unsigned int *or_mask, 388 unsigned int *and_mask); 389 390/* @brief Queue a buffer for an image pipe. 391 * 392 * @param[in] pipe The pipe that will own the buffer. 393 * @param[in] buffer Pointer to the buffer. 394 * Note that the caller remains owner of the buffer 395 * structure. Only the data pointer within it will 396 * be passed into the internal queues. 397 * @return IA_CSS_INTERNAL_ERROR in case of unexpected errors, 398 * 0 otherwise. 399 * 400 * This function adds a buffer (which has a certain buffer type) to the queue 401 * for this type. This queue is owned by the image pipe. After this function 402 * completes successfully, the buffer is now owned by the image pipe and should 403 * no longer be accessed by any other code until it gets dequeued. The image 404 * pipe will dequeue buffers from this queue, use them and return them to the 405 * host code via an interrupt. Buffers will be consumed in the same order they 406 * get queued, but may be returned to the host out of order. 407 */ 408int 409ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, 410 const struct ia_css_buffer *buffer); 411 412/* @brief Dequeue a buffer from an image pipe. 413 * 414 * @param[in] pipe The pipeline that the buffer queue belongs to. 415 * @param[in,out] buffer The buffer is used to lookup the type which determines 416 * which internal queue to use. 417 * The resulting buffer pointer is written into the dta 418 * field. 419 * @return IA_CSS_ERR_NO_BUFFER if the queue is empty or 420 * 0 otherwise. 421 * 422 * This function dequeues a buffer from a buffer queue. The queue is indicated 423 * by the buffer type argument. This function can be called after an interrupt 424 * has been generated that signalled that a new buffer was available and can 425 * be used in a polling-like situation where the NO_BUFFER return value is used 426 * to determine whether a buffer was available or not. 427 */ 428int 429ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, 430 struct ia_css_buffer *buffer); 431 432/* @brief Set the state (Enable or Disable) of the Extension stage in the 433 * given pipe. 434 * @param[in] pipe Pipe handle. 435 * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle) 436 * @param[in] enable Enable Flag (1 to enable ; 0 to disable) 437 * 438 * @return 439 * 0 : Success 440 * -EINVAL : Invalid Parameters 441 * -EBUSY : Inactive QOS Pipe 442 * (No active stream with this pipe) 443 * 444 * This function will request state change (enable or disable) for the Extension 445 * stage (firmware handle) in the given pipe. 446 * 447 * Note: 448 * 1. Extension can be enabled/disabled only on QOS Extensions 449 * 2. Extension can be enabled/disabled only with an active QOS Pipe 450 * 3. Initial(Default) state of QOS Extensions is Disabled 451 * 4. State change cannot be guaranteed immediately OR on frame boundary 452 * 453 */ 454int 455ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, 456 u32 fw_handle, 457 bool enable); 458 459/* @brief Get the state (Enable or Disable) of the Extension stage in the 460 * given pipe. 461 * @param[in] pipe Pipe handle. 462 * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle) 463 * @param[out] *enable Enable Flag 464 * 465 * @return 466 * 0 : Success 467 * -EINVAL : Invalid Parameters 468 * -EBUSY : Inactive QOS Pipe 469 * (No active stream with this pipe) 470 * 471 * This function will query the state of the Extension stage (firmware handle) 472 * in the given Pipe. 473 * 474 * Note: 475 * 1. Extension state can be queried only on QOS Extensions 476 * 2. Extension can be enabled/disabled only with an active QOS Pipe 477 * 3. Initial(Default) state of QOS Extensions is Disabled. 478 * 479 */ 480int 481ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, 482 u32 fw_handle, 483 bool *enable); 484 485/* ISP2401 */ 486/* @brief Update mapped CSS and ISP arguments for QoS pipe during SP runtime. 487 * @param[in] pipe Pipe handle. 488 * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle). 489 * @param[in] css_seg Parameter memory descriptors for CSS segments. 490 * @param[in] isp_seg Parameter memory descriptors for ISP segments. 491 * 492 * @return 493 * 0 : Success 494 * -EINVAL : Invalid Parameters 495 * -EBUSY : Inactive QOS Pipe 496 * (No active stream with this pipe) 497 * 498 * \deprecated{This interface is used to temporarily support a late-developed, 499 * specific use-case on a specific IPU2 platform. It will not be supported or 500 * maintained on IPU3 or further.} 501 */ 502int 503ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, 504 u32 fw_handle, 505 struct ia_css_isp_param_css_segments *css_seg, 506 struct ia_css_isp_param_isp_segments *isp_seg); 507 508/* @brief Get selected configuration settings 509 * @param[in] pipe The pipe. 510 * @param[out] config Configuration settings. 511 * @return None 512 */ 513void 514ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, 515 struct ia_css_isp_config *config); 516 517/* @brief Set the scaler lut on this pipe. A copy of lut is made in the inuit 518 * address space. So the LUT can be freed by caller. 519 * @param[in] pipe Pipe handle. 520 * @param[in] lut Look up tabel 521 * 522 * @return 523 * 0 : Success 524 * -EINVAL : Invalid Parameters 525 * 526 * Note: 527 * 1) Note that both GDC's are programmed with the same table. 528 * 2) Current implementation ignores the pipe and overrides the 529 * global lut. This will be fixed in the future 530 * 3) This function must be called before stream start 531 * 532 */ 533int 534ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, 535 const void *lut); 536/* @brief Checking of DVS statistics ability 537 * @param[in] pipe_info The pipe info. 538 * @return true - has DVS statistics ability 539 * false - otherwise 540 */ 541bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info); 542 543/* ISP2401 */ 544/* @brief Override the frameformat set on the output pins. 545 * @param[in] pipe Pipe handle. 546 * @param[in] output_pin Pin index to set the format on 547 * 0 - main output pin 548 * 1 - display output pin 549 * @param[in] format Format to set 550 * 551 * @return 552 * 0 : Success 553 * -EINVAL : Invalid Parameters 554 * -EINVAL : Pipe misses binary info 555 * 556 * Note: 557 * 1) This is an optional function to override the formats set in the pipe. 558 * 2) Only overriding with IA_CSS_FRAME_FORMAT_NV12_TILEY is currently allowed. 559 * 3) This function is only to be used on pipes that use the output system. 560 * 4) If this function is used, it MUST be called after ia_css_pipe_create. 561 * 5) If this function is used, this function MUST be called before ia_css_stream_start. 562 */ 563int 564ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, 565 int output_pin, 566 enum ia_css_frame_format format); 567 568#endif /* __IA_CSS_PIPE_PUBLIC_H */ 569