linux/drivers/usb/chipidea/otg.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * otg.c - ChipIdea USB IP core OTG driver
   4 *
   5 * Copyright (C) 2013 Freescale Semiconductor, Inc.
   6 *
   7 * Author: Peter Chen
   8 */
   9
  10/*
  11 * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
  12 * are also included.
  13 */
  14
  15#include <linux/usb/otg.h>
  16#include <linux/usb/gadget.h>
  17#include <linux/usb/chipidea.h>
  18
  19#include "ci.h"
  20#include "bits.h"
  21#include "otg.h"
  22#include "otg_fsm.h"
  23
  24/**
  25 * hw_read_otgsc - returns otgsc register bits value.
  26 * @ci: the controller
  27 * @mask: bitfield mask
  28 */
  29u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
  30{
  31        struct ci_hdrc_cable *cable;
  32        u32 val = hw_read(ci, OP_OTGSC, mask);
  33
  34        /*
  35         * If using extcon framework for VBUS and/or ID signal
  36         * detection overwrite OTGSC register value
  37         */
  38        cable = &ci->platdata->vbus_extcon;
  39        if (!IS_ERR(cable->edev) || ci->role_switch) {
  40                if (cable->changed)
  41                        val |= OTGSC_BSVIS;
  42                else
  43                        val &= ~OTGSC_BSVIS;
  44
  45                if (cable->connected)
  46                        val |= OTGSC_BSV;
  47                else
  48                        val &= ~OTGSC_BSV;
  49
  50                if (cable->enabled)
  51                        val |= OTGSC_BSVIE;
  52                else
  53                        val &= ~OTGSC_BSVIE;
  54        }
  55
  56        cable = &ci->platdata->id_extcon;
  57        if (!IS_ERR(cable->edev) || ci->role_switch) {
  58                if (cable->changed)
  59                        val |= OTGSC_IDIS;
  60                else
  61                        val &= ~OTGSC_IDIS;
  62
  63                if (cable->connected)
  64                        val &= ~OTGSC_ID; /* host */
  65                else
  66                        val |= OTGSC_ID; /* device */
  67
  68                if (cable->enabled)
  69                        val |= OTGSC_IDIE;
  70                else
  71                        val &= ~OTGSC_IDIE;
  72        }
  73
  74        return val & mask;
  75}
  76
  77/**
  78 * hw_write_otgsc - updates target bits of OTGSC register.
  79 * @ci: the controller
  80 * @mask: bitfield mask
  81 * @data: to be written
  82 */
  83void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
  84{
  85        struct ci_hdrc_cable *cable;
  86
  87        cable = &ci->platdata->vbus_extcon;
  88        if (!IS_ERR(cable->edev) || ci->role_switch) {
  89                if (data & mask & OTGSC_BSVIS)
  90                        cable->changed = false;
  91
  92                /* Don't enable vbus interrupt if using external notifier */
  93                if (data & mask & OTGSC_BSVIE) {
  94                        cable->enabled = true;
  95                        data &= ~OTGSC_BSVIE;
  96                } else if (mask & OTGSC_BSVIE) {
  97                        cable->enabled = false;
  98                }
  99        }
 100
 101        cable = &ci->platdata->id_extcon;
 102        if (!IS_ERR(cable->edev) || ci->role_switch) {
 103                if (data & mask & OTGSC_IDIS)
 104                        cable->changed = false;
 105
 106                /* Don't enable id interrupt if using external notifier */
 107                if (data & mask & OTGSC_IDIE) {
 108                        cable->enabled = true;
 109                        data &= ~OTGSC_IDIE;
 110                } else if (mask & OTGSC_IDIE) {
 111                        cable->enabled = false;
 112                }
 113        }
 114
 115        hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
 116}
 117
 118/**
 119 * ci_otg_role - pick role based on ID pin state
 120 * @ci: the controller
 121 */
 122enum ci_role ci_otg_role(struct ci_hdrc *ci)
 123{
 124        enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
 125                ? CI_ROLE_GADGET
 126                : CI_ROLE_HOST;
 127
 128        return role;
 129}
 130
 131void ci_handle_vbus_change(struct ci_hdrc *ci)
 132{
 133        if (!ci->is_otg)
 134                return;
 135
 136        if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active)
 137                usb_gadget_vbus_connect(&ci->gadget);
 138        else if (!hw_read_otgsc(ci, OTGSC_BSV) && ci->vbus_active)
 139                usb_gadget_vbus_disconnect(&ci->gadget);
 140}
 141
 142/**
 143 * hw_wait_vbus_lower_bsv - When we switch to device mode, the vbus value
 144 *                          should be lower than OTGSC_BSV before connecting
 145 *                          to host.
 146 *
 147 * @ci: the controller
 148 *
 149 * This function returns an error code if timeout
 150 */
 151static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
 152{
 153        unsigned long elapse = jiffies + msecs_to_jiffies(5000);
 154        u32 mask = OTGSC_BSV;
 155
 156        while (hw_read_otgsc(ci, mask)) {
 157                if (time_after(jiffies, elapse)) {
 158                        dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
 159                                        mask);
 160                        return -ETIMEDOUT;
 161                }
 162                msleep(20);
 163        }
 164
 165        return 0;
 166}
 167
 168static void ci_handle_id_switch(struct ci_hdrc *ci)
 169{
 170        enum ci_role role = ci_otg_role(ci);
 171
 172        if (role != ci->role) {
 173                dev_dbg(ci->dev, "switching from %s to %s\n",
 174                        ci_role(ci)->name, ci->roles[role]->name);
 175
 176                if (ci->vbus_active && ci->role == CI_ROLE_GADGET)
 177                        /*
 178                         * vbus disconnect event is lost due to role
 179                         * switch occurs during system suspend.
 180                         */
 181                        usb_gadget_vbus_disconnect(&ci->gadget);
 182
 183                ci_role_stop(ci);
 184
 185                if (role == CI_ROLE_GADGET &&
 186                                IS_ERR(ci->platdata->vbus_extcon.edev))
 187                        /*
 188                         * Wait vbus lower than OTGSC_BSV before connecting
 189                         * to host. If connecting status is from an external
 190                         * connector instead of register, we don't need to
 191                         * care vbus on the board, since it will not affect
 192                         * external connector status.
 193                         */
 194                        hw_wait_vbus_lower_bsv(ci);
 195
 196                ci_role_start(ci, role);
 197                /* vbus change may have already occurred */
 198                if (role == CI_ROLE_GADGET)
 199                        ci_handle_vbus_change(ci);
 200        }
 201}
 202/**
 203 * ci_otg_work - perform otg (vbus/id) event handle
 204 * @work: work struct
 205 */
 206static void ci_otg_work(struct work_struct *work)
 207{
 208        struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
 209
 210        if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) {
 211                enable_irq(ci->irq);
 212                return;
 213        }
 214
 215        pm_runtime_get_sync(ci->dev);
 216
 217        if (ci->id_event) {
 218                ci->id_event = false;
 219                ci_handle_id_switch(ci);
 220        }
 221
 222        if (ci->b_sess_valid_event) {
 223                ci->b_sess_valid_event = false;
 224                ci_handle_vbus_change(ci);
 225        }
 226
 227        pm_runtime_put_sync(ci->dev);
 228
 229        enable_irq(ci->irq);
 230}
 231
 232
 233/**
 234 * ci_hdrc_otg_init - initialize otg struct
 235 * @ci: the controller
 236 */
 237int ci_hdrc_otg_init(struct ci_hdrc *ci)
 238{
 239        INIT_WORK(&ci->work, ci_otg_work);
 240        ci->wq = create_freezable_workqueue("ci_otg");
 241        if (!ci->wq) {
 242                dev_err(ci->dev, "can't create workqueue\n");
 243                return -ENODEV;
 244        }
 245
 246        if (ci_otg_is_fsm_mode(ci))
 247                return ci_hdrc_otg_fsm_init(ci);
 248
 249        return 0;
 250}
 251
 252/**
 253 * ci_hdrc_otg_destroy - destroy otg struct
 254 * @ci: the controller
 255 */
 256void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
 257{
 258        if (ci->wq) {
 259                flush_workqueue(ci->wq);
 260                destroy_workqueue(ci->wq);
 261        }
 262        /* Disable all OTG irq and clear status */
 263        hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
 264                                                OTGSC_INT_STATUS_BITS);
 265        if (ci_otg_is_fsm_mode(ci))
 266                ci_hdrc_otg_fsm_remove(ci);
 267}
 268