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11#include <linux/bitops.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/of_device.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/watchdog.h>
21
22#define FTWDT010_WDCOUNTER 0x0
23#define FTWDT010_WDLOAD 0x4
24#define FTWDT010_WDRESTART 0x8
25#define FTWDT010_WDCR 0xC
26
27#define WDRESTART_MAGIC 0x5AB9
28
29#define WDCR_CLOCK_5MHZ BIT(4)
30#define WDCR_WDEXT BIT(3)
31#define WDCR_WDINTR BIT(2)
32#define WDCR_SYS_RST BIT(1)
33#define WDCR_ENABLE BIT(0)
34
35#define WDT_CLOCK 5000000
36
37struct ftwdt010_wdt {
38 struct watchdog_device wdd;
39 struct device *dev;
40 void __iomem *base;
41 bool has_irq;
42};
43
44static inline
45struct ftwdt010_wdt *to_ftwdt010_wdt(struct watchdog_device *wdd)
46{
47 return container_of(wdd, struct ftwdt010_wdt, wdd);
48}
49
50static int ftwdt010_wdt_start(struct watchdog_device *wdd)
51{
52 struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
53 u32 enable;
54
55 writel(wdd->timeout * WDT_CLOCK, gwdt->base + FTWDT010_WDLOAD);
56 writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART);
57
58 enable = WDCR_CLOCK_5MHZ | WDCR_SYS_RST;
59 writel(enable, gwdt->base + FTWDT010_WDCR);
60 if (gwdt->has_irq)
61 enable |= WDCR_WDINTR;
62 enable |= WDCR_ENABLE;
63 writel(enable, gwdt->base + FTWDT010_WDCR);
64
65 return 0;
66}
67
68static int ftwdt010_wdt_stop(struct watchdog_device *wdd)
69{
70 struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
71
72 writel(0, gwdt->base + FTWDT010_WDCR);
73
74 return 0;
75}
76
77static int ftwdt010_wdt_ping(struct watchdog_device *wdd)
78{
79 struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
80
81 writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART);
82
83 return 0;
84}
85
86static int ftwdt010_wdt_set_timeout(struct watchdog_device *wdd,
87 unsigned int timeout)
88{
89 wdd->timeout = timeout;
90 if (watchdog_active(wdd))
91 ftwdt010_wdt_start(wdd);
92
93 return 0;
94}
95
96static irqreturn_t ftwdt010_wdt_interrupt(int irq, void *data)
97{
98 struct ftwdt010_wdt *gwdt = data;
99
100 watchdog_notify_pretimeout(&gwdt->wdd);
101
102 return IRQ_HANDLED;
103}
104
105static const struct watchdog_ops ftwdt010_wdt_ops = {
106 .start = ftwdt010_wdt_start,
107 .stop = ftwdt010_wdt_stop,
108 .ping = ftwdt010_wdt_ping,
109 .set_timeout = ftwdt010_wdt_set_timeout,
110 .owner = THIS_MODULE,
111};
112
113static const struct watchdog_info ftwdt010_wdt_info = {
114 .options = WDIOF_KEEPALIVEPING
115 | WDIOF_MAGICCLOSE
116 | WDIOF_SETTIMEOUT,
117 .identity = KBUILD_MODNAME,
118};
119
120
121static int ftwdt010_wdt_probe(struct platform_device *pdev)
122{
123 struct device *dev = &pdev->dev;
124 struct ftwdt010_wdt *gwdt;
125 unsigned int reg;
126 int irq;
127 int ret;
128
129 gwdt = devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL);
130 if (!gwdt)
131 return -ENOMEM;
132
133 gwdt->base = devm_platform_ioremap_resource(pdev, 0);
134 if (IS_ERR(gwdt->base))
135 return PTR_ERR(gwdt->base);
136
137 gwdt->dev = dev;
138 gwdt->wdd.info = &ftwdt010_wdt_info;
139 gwdt->wdd.ops = &ftwdt010_wdt_ops;
140 gwdt->wdd.min_timeout = 1;
141 gwdt->wdd.max_timeout = 0xFFFFFFFF / WDT_CLOCK;
142 gwdt->wdd.parent = dev;
143
144
145
146
147
148 gwdt->wdd.timeout = 13U;
149 watchdog_init_timeout(&gwdt->wdd, 0, dev);
150
151 reg = readw(gwdt->base + FTWDT010_WDCR);
152 if (reg & WDCR_ENABLE) {
153
154 reg &= ~WDCR_ENABLE;
155 writel(reg, gwdt->base + FTWDT010_WDCR);
156 }
157
158 irq = platform_get_irq(pdev, 0);
159 if (irq) {
160 ret = devm_request_irq(dev, irq, ftwdt010_wdt_interrupt, 0,
161 "watchdog bark", gwdt);
162 if (ret)
163 return ret;
164 gwdt->has_irq = true;
165 }
166
167 ret = devm_watchdog_register_device(dev, &gwdt->wdd);
168 if (ret)
169 return ret;
170
171
172 platform_set_drvdata(pdev, gwdt);
173 dev_info(dev, "FTWDT010 watchdog driver enabled\n");
174
175 return 0;
176}
177
178static int __maybe_unused ftwdt010_wdt_suspend(struct device *dev)
179{
180 struct ftwdt010_wdt *gwdt = dev_get_drvdata(dev);
181 unsigned int reg;
182
183 reg = readw(gwdt->base + FTWDT010_WDCR);
184 reg &= ~WDCR_ENABLE;
185 writel(reg, gwdt->base + FTWDT010_WDCR);
186
187 return 0;
188}
189
190static int __maybe_unused ftwdt010_wdt_resume(struct device *dev)
191{
192 struct ftwdt010_wdt *gwdt = dev_get_drvdata(dev);
193 unsigned int reg;
194
195 if (watchdog_active(&gwdt->wdd)) {
196 reg = readw(gwdt->base + FTWDT010_WDCR);
197 reg |= WDCR_ENABLE;
198 writel(reg, gwdt->base + FTWDT010_WDCR);
199 }
200
201 return 0;
202}
203
204static const struct dev_pm_ops ftwdt010_wdt_dev_pm_ops = {
205 SET_SYSTEM_SLEEP_PM_OPS(ftwdt010_wdt_suspend,
206 ftwdt010_wdt_resume)
207};
208
209#ifdef CONFIG_OF
210static const struct of_device_id ftwdt010_wdt_match[] = {
211 { .compatible = "faraday,ftwdt010" },
212 { .compatible = "cortina,gemini-watchdog" },
213 {},
214};
215MODULE_DEVICE_TABLE(of, ftwdt010_wdt_match);
216#endif
217
218static struct platform_driver ftwdt010_wdt_driver = {
219 .probe = ftwdt010_wdt_probe,
220 .driver = {
221 .name = "ftwdt010-wdt",
222 .of_match_table = of_match_ptr(ftwdt010_wdt_match),
223 .pm = &ftwdt010_wdt_dev_pm_ops,
224 },
225};
226module_platform_driver(ftwdt010_wdt_driver);
227MODULE_AUTHOR("Linus Walleij");
228MODULE_DESCRIPTION("Watchdog driver for Faraday Technology FTWDT010");
229MODULE_LICENSE("GPL");
230
