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8#ifndef __LINUX_MFD_IQS62X_H
9#define __LINUX_MFD_IQS62X_H
10
11#define IQS620_PROD_NUM 0x41
12#define IQS621_PROD_NUM 0x46
13#define IQS622_PROD_NUM 0x42
14#define IQS624_PROD_NUM 0x43
15#define IQS625_PROD_NUM 0x4E
16
17#define IQS621_ALS_FLAGS 0x16
18#define IQS622_ALS_FLAGS 0x14
19
20#define IQS624_HALL_UI 0x70
21#define IQS624_HALL_UI_WHL_EVENT BIT(4)
22#define IQS624_HALL_UI_INT_EVENT BIT(3)
23#define IQS624_HALL_UI_AUTO_CAL BIT(2)
24
25#define IQS624_INTERVAL_DIV 0x7D
26
27#define IQS620_GLBL_EVENT_MASK 0xD7
28#define IQS620_GLBL_EVENT_MASK_PMU BIT(6)
29
30#define IQS62X_NUM_KEYS 16
31#define IQS62X_NUM_EVENTS (IQS62X_NUM_KEYS + 6)
32
33#define IQS62X_EVENT_SIZE 10
34
35enum iqs62x_ui_sel {
36 IQS62X_UI_PROX,
37 IQS62X_UI_SAR1,
38};
39
40enum iqs62x_event_reg {
41 IQS62X_EVENT_NONE,
42 IQS62X_EVENT_SYS,
43 IQS62X_EVENT_PROX,
44 IQS62X_EVENT_HYST,
45 IQS62X_EVENT_HALL,
46 IQS62X_EVENT_ALS,
47 IQS62X_EVENT_IR,
48 IQS62X_EVENT_WHEEL,
49 IQS62X_EVENT_INTER,
50 IQS62X_EVENT_UI_LO,
51 IQS62X_EVENT_UI_HI,
52};
53
54enum iqs62x_event_flag {
55
56 IQS62X_EVENT_PROX_CH0_T,
57 IQS62X_EVENT_PROX_CH0_P,
58 IQS62X_EVENT_PROX_CH1_T,
59 IQS62X_EVENT_PROX_CH1_P,
60 IQS62X_EVENT_PROX_CH2_T,
61 IQS62X_EVENT_PROX_CH2_P,
62 IQS62X_EVENT_HYST_POS_T,
63 IQS62X_EVENT_HYST_POS_P,
64 IQS62X_EVENT_HYST_NEG_T,
65 IQS62X_EVENT_HYST_NEG_P,
66 IQS62X_EVENT_SAR1_ACT,
67 IQS62X_EVENT_SAR1_QRD,
68 IQS62X_EVENT_SAR1_MOVE,
69 IQS62X_EVENT_SAR1_HALT,
70 IQS62X_EVENT_WHEEL_UP,
71 IQS62X_EVENT_WHEEL_DN,
72
73
74 IQS62X_EVENT_HALL_N_T,
75 IQS62X_EVENT_HALL_N_P,
76 IQS62X_EVENT_HALL_S_T,
77 IQS62X_EVENT_HALL_S_P,
78
79
80 IQS62X_EVENT_SYS_RESET,
81 IQS62X_EVENT_SYS_ATI,
82};
83
84struct iqs62x_event_data {
85 u16 ui_data;
86 u8 als_flags;
87 u8 ir_flags;
88 u8 interval;
89};
90
91struct iqs62x_event_desc {
92 enum iqs62x_event_reg reg;
93 u8 mask;
94 u8 val;
95};
96
97struct iqs62x_dev_desc {
98 const char *dev_name;
99 const struct mfd_cell *sub_devs;
100 int num_sub_devs;
101 u8 prod_num;
102 u8 sw_num;
103 const u8 *cal_regs;
104 int num_cal_regs;
105 u8 prox_mask;
106 u8 sar_mask;
107 u8 hall_mask;
108 u8 hyst_mask;
109 u8 temp_mask;
110 u8 als_mask;
111 u8 ir_mask;
112 u8 prox_settings;
113 u8 als_flags;
114 u8 hall_flags;
115 u8 hyst_shift;
116 u8 interval;
117 u8 interval_div;
118 const char *fw_name;
119 const enum iqs62x_event_reg (*event_regs)[IQS62X_EVENT_SIZE];
120};
121
122struct iqs62x_core {
123 const struct iqs62x_dev_desc *dev_desc;
124 struct i2c_client *client;
125 struct regmap *regmap;
126 struct blocking_notifier_head nh;
127 struct list_head fw_blk_head;
128 struct completion ati_done;
129 struct completion fw_done;
130 enum iqs62x_ui_sel ui_sel;
131 unsigned long event_cache;
132};
133
134extern const struct iqs62x_event_desc iqs62x_events[IQS62X_NUM_EVENTS];
135
136#endif
137