1
2
3
4#ifndef MLX5_CORE_EQ_H
5#define MLX5_CORE_EQ_H
6
7#define MLX5_NUM_CMD_EQE (32)
8#define MLX5_NUM_ASYNC_EQE (0x1000)
9#define MLX5_NUM_SPARE_EQE (0x80)
10
11struct mlx5_eq;
12struct mlx5_core_dev;
13
14struct mlx5_eq_param {
15 u8 irq_index;
16 int nent;
17 u64 mask[4];
18 cpumask_var_t affinity;
19};
20
21struct mlx5_eq *
22mlx5_eq_create_generic(struct mlx5_core_dev *dev, struct mlx5_eq_param *param);
23int
24mlx5_eq_destroy_generic(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
25int mlx5_eq_enable(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
26 struct notifier_block *nb);
27void mlx5_eq_disable(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
28 struct notifier_block *nb);
29
30struct mlx5_eqe *mlx5_eq_get_eqe(struct mlx5_eq *eq, u32 cc);
31void mlx5_eq_update_ci(struct mlx5_eq *eq, u32 cc, bool arm);
32
33
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38
39
40
41static inline u32 mlx5_eq_update_cc(struct mlx5_eq *eq, u32 cc)
42{
43 if (unlikely(cc >= MLX5_NUM_SPARE_EQE)) {
44 mlx5_eq_update_ci(eq, cc, 0);
45 cc = 0;
46 }
47 return cc;
48}
49
50struct mlx5_nb {
51 struct notifier_block nb;
52 u8 event_type;
53};
54
55#define mlx5_nb_cof(ptr, type, member) \
56 (container_of(container_of(ptr, struct mlx5_nb, nb), type, member))
57
58#define MLX5_NB_INIT(name, handler, event) do { \
59 (name)->nb.notifier_call = handler; \
60 (name)->event_type = MLX5_EVENT_TYPE_##event; \
61} while (0)
62
63#endif
64