1
2
3
4
5
6
7
8
9#ifndef _SAS_H_
10#define _SAS_H_
11
12#include <linux/types.h>
13#include <asm/byteorder.h>
14
15#define SAS_ADDR_SIZE 8
16#define HASHED_SAS_ADDR_SIZE 3
17#define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa)))
18
19#define SMP_REQUEST 0x40
20#define SMP_RESPONSE 0x41
21
22#define SSP_DATA 0x01
23#define SSP_XFER_RDY 0x05
24#define SSP_COMMAND 0x06
25#define SSP_RESPONSE 0x07
26#define SSP_TASK 0x16
27
28#define SMP_REPORT_GENERAL 0x00
29#define SMP_REPORT_MANUF_INFO 0x01
30#define SMP_READ_GPIO_REG 0x02
31#define SMP_DISCOVER 0x10
32#define SMP_REPORT_PHY_ERR_LOG 0x11
33#define SMP_REPORT_PHY_SATA 0x12
34#define SMP_REPORT_ROUTE_INFO 0x13
35#define SMP_WRITE_GPIO_REG 0x82
36#define SMP_CONF_ROUTE_INFO 0x90
37#define SMP_PHY_CONTROL 0x91
38#define SMP_PHY_TEST_FUNCTION 0x92
39
40#define SMP_RESP_FUNC_ACC 0x00
41#define SMP_RESP_FUNC_UNK 0x01
42#define SMP_RESP_FUNC_FAILED 0x02
43#define SMP_RESP_INV_FRM_LEN 0x03
44#define SMP_RESP_NO_PHY 0x10
45#define SMP_RESP_NO_INDEX 0x11
46#define SMP_RESP_PHY_NO_SATA 0x12
47#define SMP_RESP_PHY_UNK_OP 0x13
48#define SMP_RESP_PHY_UNK_TESTF 0x14
49#define SMP_RESP_PHY_TEST_INPROG 0x15
50#define SMP_RESP_PHY_VACANT 0x16
51
52
53#define TMF_ABORT_TASK 0x01
54#define TMF_ABORT_TASK_SET 0x02
55#define TMF_CLEAR_TASK_SET 0x04
56#define TMF_LU_RESET 0x08
57#define TMF_CLEAR_ACA 0x40
58#define TMF_QUERY_TASK 0x80
59
60
61#define TMF_RESP_FUNC_COMPLETE 0x00
62#define TMF_RESP_INVALID_FRAME 0x02
63#define TMF_RESP_FUNC_ESUPP 0x04
64#define TMF_RESP_FUNC_FAILED 0x05
65#define TMF_RESP_FUNC_SUCC 0x08
66#define TMF_RESP_NO_LUN 0x09
67#define TMF_RESP_OVERLAPPED_TAG 0x0A
68
69enum sas_oob_mode {
70 OOB_NOT_CONNECTED,
71 SATA_OOB_MODE,
72 SAS_OOB_MODE
73};
74
75
76enum sas_device_type {
77
78 SAS_PHY_UNUSED = 0,
79 SAS_END_DEVICE = 1,
80 SAS_EDGE_EXPANDER_DEVICE = 2,
81 SAS_FANOUT_EXPANDER_DEVICE = 3,
82
83 SAS_HA = 4,
84 SAS_SATA_DEV = 5,
85 SAS_SATA_PM = 7,
86 SAS_SATA_PM_PORT = 8,
87 SAS_SATA_PENDING = 9,
88};
89
90enum sas_protocol {
91 SAS_PROTOCOL_NONE = 0,
92 SAS_PROTOCOL_SATA = 0x01,
93 SAS_PROTOCOL_SMP = 0x02,
94 SAS_PROTOCOL_STP = 0x04,
95 SAS_PROTOCOL_SSP = 0x08,
96 SAS_PROTOCOL_ALL = 0x0E,
97 SAS_PROTOCOL_STP_ALL = SAS_PROTOCOL_STP|SAS_PROTOCOL_SATA,
98};
99
100
101enum phy_func {
102 PHY_FUNC_NOP,
103 PHY_FUNC_LINK_RESET,
104 PHY_FUNC_HARD_RESET,
105 PHY_FUNC_DISABLE,
106 PHY_FUNC_CLEAR_ERROR_LOG = 5,
107 PHY_FUNC_CLEAR_AFFIL,
108 PHY_FUNC_TX_SATA_PS_SIGNAL,
109 PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10,
110 PHY_FUNC_SET_LINK_RATE,
111 PHY_FUNC_GET_EVENTS,
112};
113
114
115
116
117enum sas_prim {
118 SAS_PRIM_AIP_NORMAL = 1,
119 SAS_PRIM_AIP_R0 = 2,
120 SAS_PRIM_AIP_R1 = 3,
121 SAS_PRIM_AIP_R2 = 4,
122 SAS_PRIM_AIP_WC = 5,
123 SAS_PRIM_AIP_WD = 6,
124 SAS_PRIM_AIP_WP = 7,
125 SAS_PRIM_AIP_RWP = 8,
126
127 SAS_PRIM_BC_CH = 9,
128 SAS_PRIM_BC_RCH0 = 10,
129 SAS_PRIM_BC_RCH1 = 11,
130 SAS_PRIM_BC_R0 = 12,
131 SAS_PRIM_BC_R1 = 13,
132 SAS_PRIM_BC_R2 = 14,
133 SAS_PRIM_BC_R3 = 15,
134 SAS_PRIM_BC_R4 = 16,
135
136 SAS_PRIM_NOTIFY_ENSP= 17,
137 SAS_PRIM_NOTIFY_R0 = 18,
138 SAS_PRIM_NOTIFY_R1 = 19,
139 SAS_PRIM_NOTIFY_R2 = 20,
140
141 SAS_PRIM_CLOSE_CLAF = 21,
142 SAS_PRIM_CLOSE_NORM = 22,
143 SAS_PRIM_CLOSE_R0 = 23,
144 SAS_PRIM_CLOSE_R1 = 24,
145
146 SAS_PRIM_OPEN_RTRY = 25,
147 SAS_PRIM_OPEN_RJCT = 26,
148 SAS_PRIM_OPEN_ACPT = 27,
149
150 SAS_PRIM_DONE = 28,
151 SAS_PRIM_BREAK = 29,
152
153 SATA_PRIM_DMAT = 33,
154 SATA_PRIM_PMNAK = 34,
155 SATA_PRIM_PMACK = 35,
156 SATA_PRIM_PMREQ_S = 36,
157 SATA_PRIM_PMREQ_P = 37,
158 SATA_SATA_R_ERR = 38,
159};
160
161enum sas_open_rej_reason {
162
163 SAS_OREJ_UNKNOWN = 0,
164 SAS_OREJ_BAD_DEST = 1,
165 SAS_OREJ_CONN_RATE = 2,
166 SAS_OREJ_EPROTO = 3,
167 SAS_OREJ_RESV_AB0 = 4,
168 SAS_OREJ_RESV_AB1 = 5,
169 SAS_OREJ_RESV_AB2 = 6,
170 SAS_OREJ_RESV_AB3 = 7,
171 SAS_OREJ_WRONG_DEST= 8,
172 SAS_OREJ_STP_NORES = 9,
173
174
175 SAS_OREJ_NO_DEST = 10,
176 SAS_OREJ_PATH_BLOCKED = 11,
177 SAS_OREJ_RSVD_CONT0 = 12,
178 SAS_OREJ_RSVD_CONT1 = 13,
179 SAS_OREJ_RSVD_INIT0 = 14,
180 SAS_OREJ_RSVD_INIT1 = 15,
181 SAS_OREJ_RSVD_STOP0 = 16,
182 SAS_OREJ_RSVD_STOP1 = 17,
183 SAS_OREJ_RSVD_RETRY = 18,
184};
185
186enum sas_gpio_reg_type {
187 SAS_GPIO_REG_CFG = 0,
188 SAS_GPIO_REG_RX = 1,
189 SAS_GPIO_REG_RX_GP = 2,
190 SAS_GPIO_REG_TX = 3,
191 SAS_GPIO_REG_TX_GP = 4,
192};
193
194struct dev_to_host_fis {
195 u8 fis_type;
196 u8 flags;
197 u8 status;
198 u8 error;
199
200 u8 lbal;
201 union { u8 lbam; u8 byte_count_low; };
202 union { u8 lbah; u8 byte_count_high; };
203 u8 device;
204
205 u8 lbal_exp;
206 u8 lbam_exp;
207 u8 lbah_exp;
208 u8 _r_a;
209
210 union { u8 sector_count; u8 interrupt_reason; };
211 u8 sector_count_exp;
212 u8 _r_b;
213 u8 _r_c;
214
215 u32 _r_d;
216} __attribute__ ((packed));
217
218struct host_to_dev_fis {
219 u8 fis_type;
220 u8 flags;
221 u8 command;
222 u8 features;
223
224 u8 lbal;
225 union { u8 lbam; u8 byte_count_low; };
226 union { u8 lbah; u8 byte_count_high; };
227 u8 device;
228
229 u8 lbal_exp;
230 u8 lbam_exp;
231 u8 lbah_exp;
232 u8 features_exp;
233
234 union { u8 sector_count; u8 interrupt_reason; };
235 u8 sector_count_exp;
236 u8 _r_a;
237 u8 control;
238
239 u32 _r_b;
240} __attribute__ ((packed));
241
242
243
244#ifdef __LITTLE_ENDIAN_BITFIELD
245struct sas_identify_frame {
246
247 u8 frame_type:4;
248 u8 dev_type:3;
249 u8 _un0:1;
250
251
252 u8 _un1;
253
254
255 union {
256 struct {
257 u8 _un20:1;
258 u8 smp_iport:1;
259 u8 stp_iport:1;
260 u8 ssp_iport:1;
261 u8 _un247:4;
262 };
263 u8 initiator_bits;
264 };
265
266
267 union {
268 struct {
269 u8 _un30:1;
270 u8 smp_tport:1;
271 u8 stp_tport:1;
272 u8 ssp_tport:1;
273 u8 _un347:4;
274 };
275 u8 target_bits;
276 };
277
278
279 u8 _un4_11[8];
280
281
282 u8 sas_addr[SAS_ADDR_SIZE];
283
284
285 u8 phy_id;
286
287 u8 _un21_27[7];
288
289 __be32 crc;
290} __attribute__ ((packed));
291
292struct ssp_frame_hdr {
293 u8 frame_type;
294 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
295 u8 _r_a;
296 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
297 __be16 _r_b;
298
299 u8 changing_data_ptr:1;
300 u8 retransmit:1;
301 u8 retry_data_frames:1;
302 u8 _r_c:5;
303
304 u8 num_fill_bytes:2;
305 u8 _r_d:6;
306
307 u32 _r_e;
308 __be16 tag;
309 __be16 tptt;
310 __be32 data_offs;
311} __attribute__ ((packed));
312
313struct ssp_response_iu {
314 u8 _r_a[10];
315
316 u8 datapres:2;
317 u8 _r_b:6;
318
319 u8 status;
320
321 u32 _r_c;
322
323 __be32 sense_data_len;
324 __be32 response_data_len;
325
326 union {
327 DECLARE_FLEX_ARRAY(u8, resp_data);
328 DECLARE_FLEX_ARRAY(u8, sense_data);
329 };
330} __attribute__ ((packed));
331
332struct ssp_command_iu {
333 u8 lun[8];
334 u8 _r_a;
335
336 union {
337 struct {
338 u8 attr:3;
339 u8 prio:4;
340 u8 efb:1;
341 };
342 u8 efb_prio_attr;
343 };
344
345 u8 _r_b;
346
347 u8 _r_c:2;
348 u8 add_cdb_len:6;
349
350 u8 cdb[16];
351 u8 add_cdb[];
352} __attribute__ ((packed));
353
354struct xfer_rdy_iu {
355 __be32 requested_offset;
356 __be32 write_data_len;
357 __be32 _r_a;
358} __attribute__ ((packed));
359
360struct ssp_tmf_iu {
361 u8 lun[8];
362 u16 _r_a;
363 u8 tmf;
364 u8 _r_b;
365 __be16 tag;
366 u8 _r_c[14];
367} __attribute__ ((packed));
368
369
370
371struct report_general_resp {
372 __be16 change_count;
373 __be16 route_indexes;
374 u8 _r_a;
375 u8 num_phys;
376
377 u8 conf_route_table:1;
378 u8 configuring:1;
379 u8 config_others:1;
380 u8 orej_retry_supp:1;
381 u8 stp_cont_awt:1;
382 u8 self_config:1;
383 u8 zone_config:1;
384 u8 t2t_supp:1;
385
386 u8 _r_c;
387
388 u8 enclosure_logical_id[8];
389
390 u8 _r_d[12];
391} __attribute__ ((packed));
392
393struct discover_resp {
394 u8 _r_a[5];
395
396 u8 phy_id;
397 __be16 _r_b;
398
399 u8 _r_c:4;
400 u8 attached_dev_type:3;
401 u8 _r_d:1;
402
403 u8 linkrate:4;
404 u8 _r_e:4;
405
406 u8 attached_sata_host:1;
407 u8 iproto:3;
408 u8 _r_f:4;
409
410 u8 attached_sata_dev:1;
411 u8 tproto:3;
412 u8 _r_g:3;
413 u8 attached_sata_ps:1;
414
415 u8 sas_addr[8];
416 u8 attached_sas_addr[8];
417 u8 attached_phy_id;
418
419 u8 _r_h[7];
420
421 u8 hmin_linkrate:4;
422 u8 pmin_linkrate:4;
423 u8 hmax_linkrate:4;
424 u8 pmax_linkrate:4;
425
426 u8 change_count;
427
428 u8 pptv:4;
429 u8 _r_i:3;
430 u8 virtual:1;
431
432 u8 routing_attr:4;
433 u8 _r_j:4;
434
435 u8 conn_type;
436 u8 conn_el_index;
437 u8 conn_phy_link;
438
439 u8 _r_k[8];
440} __attribute__ ((packed));
441
442struct report_phy_sata_resp {
443 u8 _r_a[5];
444
445 u8 phy_id;
446 u8 _r_b;
447
448 u8 affil_valid:1;
449 u8 affil_supp:1;
450 u8 _r_c:6;
451
452 u32 _r_d;
453
454 u8 stp_sas_addr[8];
455
456 struct dev_to_host_fis fis;
457
458 u32 _r_e;
459
460 u8 affil_stp_ini_addr[8];
461
462 __be32 crc;
463} __attribute__ ((packed));
464
465struct smp_resp {
466 u8 frame_type;
467 u8 function;
468 u8 result;
469 u8 reserved;
470 union {
471 struct report_general_resp rg;
472 struct discover_resp disc;
473 struct report_phy_sata_resp rps;
474 };
475} __attribute__ ((packed));
476
477#elif defined(__BIG_ENDIAN_BITFIELD)
478struct sas_identify_frame {
479
480 u8 _un0:1;
481 u8 dev_type:3;
482 u8 frame_type:4;
483
484
485 u8 _un1;
486
487
488 union {
489 struct {
490 u8 _un247:4;
491 u8 ssp_iport:1;
492 u8 stp_iport:1;
493 u8 smp_iport:1;
494 u8 _un20:1;
495 };
496 u8 initiator_bits;
497 };
498
499
500 union {
501 struct {
502 u8 _un347:4;
503 u8 ssp_tport:1;
504 u8 stp_tport:1;
505 u8 smp_tport:1;
506 u8 _un30:1;
507 };
508 u8 target_bits;
509 };
510
511
512 u8 _un4_11[8];
513
514
515 u8 sas_addr[SAS_ADDR_SIZE];
516
517
518 u8 phy_id;
519
520 u8 _un21_27[7];
521
522 __be32 crc;
523} __attribute__ ((packed));
524
525struct ssp_frame_hdr {
526 u8 frame_type;
527 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
528 u8 _r_a;
529 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
530 __be16 _r_b;
531
532 u8 _r_c:5;
533 u8 retry_data_frames:1;
534 u8 retransmit:1;
535 u8 changing_data_ptr:1;
536
537 u8 _r_d:6;
538 u8 num_fill_bytes:2;
539
540 u32 _r_e;
541 __be16 tag;
542 __be16 tptt;
543 __be32 data_offs;
544} __attribute__ ((packed));
545
546struct ssp_response_iu {
547 u8 _r_a[10];
548
549 u8 _r_b:6;
550 u8 datapres:2;
551
552 u8 status;
553
554 u32 _r_c;
555
556 __be32 sense_data_len;
557 __be32 response_data_len;
558
559 union {
560 DECLARE_FLEX_ARRAY(u8, resp_data);
561 DECLARE_FLEX_ARRAY(u8, sense_data);
562 };
563} __attribute__ ((packed));
564
565struct ssp_command_iu {
566 u8 lun[8];
567 u8 _r_a;
568
569 union {
570 struct {
571 u8 efb:1;
572 u8 prio:4;
573 u8 attr:3;
574 };
575 u8 efb_prio_attr;
576 };
577
578 u8 _r_b;
579
580 u8 add_cdb_len:6;
581 u8 _r_c:2;
582
583 u8 cdb[16];
584 u8 add_cdb[];
585} __attribute__ ((packed));
586
587struct xfer_rdy_iu {
588 __be32 requested_offset;
589 __be32 write_data_len;
590 __be32 _r_a;
591} __attribute__ ((packed));
592
593struct ssp_tmf_iu {
594 u8 lun[8];
595 u16 _r_a;
596 u8 tmf;
597 u8 _r_b;
598 __be16 tag;
599 u8 _r_c[14];
600} __attribute__ ((packed));
601
602
603
604struct report_general_resp {
605 __be16 change_count;
606 __be16 route_indexes;
607 u8 _r_a;
608 u8 num_phys;
609
610 u8 t2t_supp:1;
611 u8 zone_config:1;
612 u8 self_config:1;
613 u8 stp_cont_awt:1;
614 u8 orej_retry_supp:1;
615 u8 config_others:1;
616 u8 configuring:1;
617 u8 conf_route_table:1;
618
619 u8 _r_c;
620
621 u8 enclosure_logical_id[8];
622
623 u8 _r_d[12];
624} __attribute__ ((packed));
625
626struct discover_resp {
627 u8 _r_a[5];
628
629 u8 phy_id;
630 __be16 _r_b;
631
632 u8 _r_d:1;
633 u8 attached_dev_type:3;
634 u8 _r_c:4;
635
636 u8 _r_e:4;
637 u8 linkrate:4;
638
639 u8 _r_f:4;
640 u8 iproto:3;
641 u8 attached_sata_host:1;
642
643 u8 attached_sata_ps:1;
644 u8 _r_g:3;
645 u8 tproto:3;
646 u8 attached_sata_dev:1;
647
648 u8 sas_addr[8];
649 u8 attached_sas_addr[8];
650 u8 attached_phy_id;
651
652 u8 _r_h[7];
653
654 u8 pmin_linkrate:4;
655 u8 hmin_linkrate:4;
656 u8 pmax_linkrate:4;
657 u8 hmax_linkrate:4;
658
659 u8 change_count;
660
661 u8 virtual:1;
662 u8 _r_i:3;
663 u8 pptv:4;
664
665 u8 _r_j:4;
666 u8 routing_attr:4;
667
668 u8 conn_type;
669 u8 conn_el_index;
670 u8 conn_phy_link;
671
672 u8 _r_k[8];
673} __attribute__ ((packed));
674
675struct report_phy_sata_resp {
676 u8 _r_a[5];
677
678 u8 phy_id;
679 u8 _r_b;
680
681 u8 _r_c:6;
682 u8 affil_supp:1;
683 u8 affil_valid:1;
684
685 u32 _r_d;
686
687 u8 stp_sas_addr[8];
688
689 struct dev_to_host_fis fis;
690
691 u32 _r_e;
692
693 u8 affil_stp_ini_addr[8];
694
695 __be32 crc;
696} __attribute__ ((packed));
697
698struct smp_resp {
699 u8 frame_type;
700 u8 function;
701 u8 result;
702 u8 reserved;
703 union {
704 struct report_general_resp rg;
705 struct discover_resp disc;
706 struct report_phy_sata_resp rps;
707 };
708} __attribute__ ((packed));
709
710#else
711#error "Bitfield order not defined!"
712#endif
713
714#endif
715
