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24#ifndef _UAPI__SOUND_ASOUND_H
25#define _UAPI__SOUND_ASOUND_H
26
27#if defined(__KERNEL__) || defined(__linux__)
28#include <linux/types.h>
29#include <asm/byteorder.h>
30#else
31#include <endian.h>
32#include <sys/ioctl.h>
33#endif
34
35#ifndef __KERNEL__
36#include <stdlib.h>
37#include <time.h>
38#endif
39
40
41
42
43
44#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
45#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
46#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
47#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
48#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
49 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
50 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
51 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
52
53
54
55
56
57
58
59struct snd_aes_iec958 {
60 unsigned char status[24];
61 unsigned char subcode[147];
62 unsigned char pad;
63 unsigned char dig_subframe[4];
64};
65
66
67
68
69
70
71
72struct snd_cea_861_aud_if {
73 unsigned char db1_ct_cc;
74 unsigned char db2_sf_ss;
75 unsigned char db3;
76 unsigned char db4_ca;
77 unsigned char db5_dminh_lsv;
78};
79
80
81
82
83
84
85
86#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
87
88enum {
89 SNDRV_HWDEP_IFACE_OPL2 = 0,
90 SNDRV_HWDEP_IFACE_OPL3,
91 SNDRV_HWDEP_IFACE_OPL4,
92 SNDRV_HWDEP_IFACE_SB16CSP,
93 SNDRV_HWDEP_IFACE_EMU10K1,
94 SNDRV_HWDEP_IFACE_YSS225,
95 SNDRV_HWDEP_IFACE_ICS2115,
96 SNDRV_HWDEP_IFACE_SSCAPE,
97 SNDRV_HWDEP_IFACE_VX,
98 SNDRV_HWDEP_IFACE_MIXART,
99 SNDRV_HWDEP_IFACE_USX2Y,
100 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE,
101 SNDRV_HWDEP_IFACE_BLUETOOTH,
102 SNDRV_HWDEP_IFACE_USX2Y_PCM,
103 SNDRV_HWDEP_IFACE_PCXHR,
104 SNDRV_HWDEP_IFACE_SB_RC,
105 SNDRV_HWDEP_IFACE_HDA,
106 SNDRV_HWDEP_IFACE_USB_STREAM,
107 SNDRV_HWDEP_IFACE_FW_DICE,
108 SNDRV_HWDEP_IFACE_FW_FIREWORKS,
109 SNDRV_HWDEP_IFACE_FW_BEBOB,
110 SNDRV_HWDEP_IFACE_FW_OXFW,
111 SNDRV_HWDEP_IFACE_FW_DIGI00X,
112 SNDRV_HWDEP_IFACE_FW_TASCAM,
113 SNDRV_HWDEP_IFACE_LINE6,
114 SNDRV_HWDEP_IFACE_FW_MOTU,
115 SNDRV_HWDEP_IFACE_FW_FIREFACE,
116
117
118 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE
119};
120
121struct snd_hwdep_info {
122 unsigned int device;
123 int card;
124 unsigned char id[64];
125 unsigned char name[80];
126 int iface;
127 unsigned char reserved[64];
128};
129
130
131struct snd_hwdep_dsp_status {
132 unsigned int version;
133 unsigned char id[32];
134 unsigned int num_dsps;
135 unsigned int dsp_loaded;
136 unsigned int chip_ready;
137 unsigned char reserved[16];
138};
139
140struct snd_hwdep_dsp_image {
141 unsigned int index;
142 unsigned char name[64];
143 unsigned char __user *image;
144 size_t length;
145 unsigned long driver_data;
146};
147
148#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
149#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
150#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
151#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
152
153
154
155
156
157
158
159#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 15)
160
161typedef unsigned long snd_pcm_uframes_t;
162typedef signed long snd_pcm_sframes_t;
163
164enum {
165 SNDRV_PCM_CLASS_GENERIC = 0,
166 SNDRV_PCM_CLASS_MULTI,
167 SNDRV_PCM_CLASS_MODEM,
168 SNDRV_PCM_CLASS_DIGITIZER,
169
170 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
171};
172
173enum {
174 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0,
175 SNDRV_PCM_SUBCLASS_MULTI_MIX,
176
177 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
178};
179
180enum {
181 SNDRV_PCM_STREAM_PLAYBACK = 0,
182 SNDRV_PCM_STREAM_CAPTURE,
183 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
184};
185
186typedef int __bitwise snd_pcm_access_t;
187#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0)
188#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1)
189#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2)
190#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3)
191#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4)
192#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
193
194typedef int __bitwise snd_pcm_format_t;
195#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
196#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
197#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
198#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
199#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
200#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
201#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6)
202#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7)
203#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8)
204#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9)
205#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
206#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
207#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
208#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
209#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14)
210#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15)
211#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16)
212#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17)
213#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18)
214#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19)
215#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
216#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
217#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
218#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
219#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
220#define SNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25)
221#define SNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26)
222#define SNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27)
223#define SNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28)
224
225#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
226#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32)
227#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33)
228#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34)
229#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35)
230#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36)
231#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37)
232#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38)
233#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39)
234#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40)
235#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41)
236#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42)
237#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43)
238#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44)
239#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45)
240#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46)
241#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47)
242#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48)
243#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49)
244#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50)
245#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51)
246#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52)
247#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE
248#define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8
249
250#ifdef SNDRV_LITTLE_ENDIAN
251#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
252#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
253#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
254#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
255#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
256#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
257#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
258#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
259#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
260#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE
261#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE
262#endif
263#ifdef SNDRV_BIG_ENDIAN
264#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
265#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
266#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
267#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
268#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
269#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
270#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
271#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
272#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
273#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE
274#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE
275#endif
276
277typedef int __bitwise snd_pcm_subformat_t;
278#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
279#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
280
281#define SNDRV_PCM_INFO_MMAP 0x00000001
282#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002
283#define SNDRV_PCM_INFO_DOUBLE 0x00000004
284#define SNDRV_PCM_INFO_BATCH 0x00000010
285#define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020
286#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
287#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
288#define SNDRV_PCM_INFO_COMPLEX 0x00000400
289#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000
290#define SNDRV_PCM_INFO_OVERRANGE 0x00020000
291#define SNDRV_PCM_INFO_RESUME 0x00040000
292#define SNDRV_PCM_INFO_PAUSE 0x00080000
293#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000
294#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000
295#define SNDRV_PCM_INFO_SYNC_START 0x00400000
296#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000
297#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000
298#define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000
299#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000
300#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000
301#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000
302#define SNDRV_PCM_INFO_EXPLICIT_SYNC 0x10000000
303
304#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000
305#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
306
307#if (__BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64)) || defined __KERNEL__
308#define __SND_STRUCT_TIME64
309#endif
310
311typedef int __bitwise snd_pcm_state_t;
312#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0)
313#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1)
314#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2)
315#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3)
316#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4)
317#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5)
318#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6)
319#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7)
320#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8)
321#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
322
323enum {
324 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
325 SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000,
326 SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000,
327 SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000,
328 SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000,
329#ifdef __SND_STRUCT_TIME64
330 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_NEW,
331 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW,
332#else
333 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_OLD,
334 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD,
335#endif
336};
337
338union snd_pcm_sync_id {
339 unsigned char id[16];
340 unsigned short id16[8];
341 unsigned int id32[4];
342};
343
344struct snd_pcm_info {
345 unsigned int device;
346 unsigned int subdevice;
347 int stream;
348 int card;
349 unsigned char id[64];
350 unsigned char name[80];
351 unsigned char subname[32];
352 int dev_class;
353 int dev_subclass;
354 unsigned int subdevices_count;
355 unsigned int subdevices_avail;
356 union snd_pcm_sync_id sync;
357 unsigned char reserved[64];
358};
359
360typedef int snd_pcm_hw_param_t;
361#define SNDRV_PCM_HW_PARAM_ACCESS 0
362#define SNDRV_PCM_HW_PARAM_FORMAT 1
363#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2
364#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
365#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
366
367#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8
368#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9
369#define SNDRV_PCM_HW_PARAM_CHANNELS 10
370#define SNDRV_PCM_HW_PARAM_RATE 11
371#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12
372
373
374#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13
375
376
377#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14
378
379
380#define SNDRV_PCM_HW_PARAM_PERIODS 15
381
382
383#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16
384
385
386#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17
387#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18
388#define SNDRV_PCM_HW_PARAM_TICK_TIME 19
389#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
390#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
391
392#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0)
393#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1)
394#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2)
395
396struct snd_interval {
397 unsigned int min, max;
398 unsigned int openmin:1,
399 openmax:1,
400 integer:1,
401 empty:1;
402};
403
404#define SNDRV_MASK_MAX 256
405
406struct snd_mask {
407 __u32 bits[(SNDRV_MASK_MAX+31)/32];
408};
409
410struct snd_pcm_hw_params {
411 unsigned int flags;
412 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
413 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
414 struct snd_mask mres[5];
415 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
416 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
417 struct snd_interval ires[9];
418 unsigned int rmask;
419 unsigned int cmask;
420 unsigned int info;
421 unsigned int msbits;
422 unsigned int rate_num;
423 unsigned int rate_den;
424 snd_pcm_uframes_t fifo_size;
425 unsigned char reserved[64];
426};
427
428enum {
429 SNDRV_PCM_TSTAMP_NONE = 0,
430 SNDRV_PCM_TSTAMP_ENABLE,
431 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
432};
433
434struct snd_pcm_sw_params {
435 int tstamp_mode;
436 unsigned int period_step;
437 unsigned int sleep_min;
438 snd_pcm_uframes_t avail_min;
439 snd_pcm_uframes_t xfer_align;
440 snd_pcm_uframes_t start_threshold;
441 snd_pcm_uframes_t stop_threshold;
442 snd_pcm_uframes_t silence_threshold;
443 snd_pcm_uframes_t silence_size;
444 snd_pcm_uframes_t boundary;
445 unsigned int proto;
446 unsigned int tstamp_type;
447 unsigned char reserved[56];
448};
449
450struct snd_pcm_channel_info {
451 unsigned int channel;
452 __kernel_off_t offset;
453 unsigned int first;
454 unsigned int step;
455};
456
457enum {
458
459
460
461
462 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0,
463
464
465 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1,
466 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2,
467 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3,
468 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4,
469 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5,
470 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED
471};
472
473#ifndef __KERNEL__
474
475typedef struct { unsigned char pad[sizeof(time_t) - sizeof(int)]; } __time_pad;
476
477struct snd_pcm_status {
478 snd_pcm_state_t state;
479 __time_pad pad1;
480 struct timespec trigger_tstamp;
481 struct timespec tstamp;
482 snd_pcm_uframes_t appl_ptr;
483 snd_pcm_uframes_t hw_ptr;
484 snd_pcm_sframes_t delay;
485 snd_pcm_uframes_t avail;
486 snd_pcm_uframes_t avail_max;
487 snd_pcm_uframes_t overrange;
488 snd_pcm_state_t suspended_state;
489 __u32 audio_tstamp_data;
490 struct timespec audio_tstamp;
491 struct timespec driver_tstamp;
492 __u32 audio_tstamp_accuracy;
493 unsigned char reserved[52-2*sizeof(struct timespec)];
494};
495#endif
496
497
498
499
500
501
502#ifdef __SND_STRUCT_TIME64
503#define __snd_pcm_mmap_status64 snd_pcm_mmap_status
504#define __snd_pcm_mmap_control64 snd_pcm_mmap_control
505#define __snd_pcm_sync_ptr64 snd_pcm_sync_ptr
506#ifdef __KERNEL__
507#define __snd_timespec64 __kernel_timespec
508#else
509#define __snd_timespec64 timespec
510#endif
511struct __snd_timespec {
512 __s32 tv_sec;
513 __s32 tv_nsec;
514};
515#else
516#define __snd_pcm_mmap_status snd_pcm_mmap_status
517#define __snd_pcm_mmap_control snd_pcm_mmap_control
518#define __snd_pcm_sync_ptr snd_pcm_sync_ptr
519#define __snd_timespec timespec
520struct __snd_timespec64 {
521 __s64 tv_sec;
522 __s64 tv_nsec;
523};
524
525#endif
526
527struct __snd_pcm_mmap_status {
528 snd_pcm_state_t state;
529 int pad1;
530 snd_pcm_uframes_t hw_ptr;
531 struct __snd_timespec tstamp;
532 snd_pcm_state_t suspended_state;
533 struct __snd_timespec audio_tstamp;
534};
535
536struct __snd_pcm_mmap_control {
537 snd_pcm_uframes_t appl_ptr;
538 snd_pcm_uframes_t avail_min;
539};
540
541#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0)
542#define SNDRV_PCM_SYNC_PTR_APPL (1<<1)
543#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2)
544
545struct __snd_pcm_sync_ptr {
546 unsigned int flags;
547 union {
548 struct __snd_pcm_mmap_status status;
549 unsigned char reserved[64];
550 } s;
551 union {
552 struct __snd_pcm_mmap_control control;
553 unsigned char reserved[64];
554 } c;
555};
556
557#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN)
558typedef char __pad_before_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)];
559typedef char __pad_after_uframe[0];
560#endif
561
562#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN)
563typedef char __pad_before_uframe[0];
564typedef char __pad_after_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)];
565#endif
566
567struct __snd_pcm_mmap_status64 {
568 snd_pcm_state_t state;
569 __u32 pad1;
570 __pad_before_uframe __pad1;
571 snd_pcm_uframes_t hw_ptr;
572 __pad_after_uframe __pad2;
573 struct __snd_timespec64 tstamp;
574 snd_pcm_state_t suspended_state;
575 __u32 pad3;
576 struct __snd_timespec64 audio_tstamp;
577};
578
579struct __snd_pcm_mmap_control64 {
580 __pad_before_uframe __pad1;
581 snd_pcm_uframes_t appl_ptr;
582 __pad_before_uframe __pad2;
583
584 __pad_before_uframe __pad3;
585 snd_pcm_uframes_t avail_min;
586 __pad_after_uframe __pad4;
587};
588
589struct __snd_pcm_sync_ptr64 {
590 __u32 flags;
591 __u32 pad1;
592 union {
593 struct __snd_pcm_mmap_status64 status;
594 unsigned char reserved[64];
595 } s;
596 union {
597 struct __snd_pcm_mmap_control64 control;
598 unsigned char reserved[64];
599 } c;
600};
601
602struct snd_xferi {
603 snd_pcm_sframes_t result;
604 void __user *buf;
605 snd_pcm_uframes_t frames;
606};
607
608struct snd_xfern {
609 snd_pcm_sframes_t result;
610 void __user * __user *bufs;
611 snd_pcm_uframes_t frames;
612};
613
614enum {
615 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,
616 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
617 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
618 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
619};
620
621
622enum {
623 SNDRV_CHMAP_UNKNOWN = 0,
624 SNDRV_CHMAP_NA,
625 SNDRV_CHMAP_MONO,
626
627 SNDRV_CHMAP_FL,
628 SNDRV_CHMAP_FR,
629 SNDRV_CHMAP_RL,
630 SNDRV_CHMAP_RR,
631 SNDRV_CHMAP_FC,
632 SNDRV_CHMAP_LFE,
633 SNDRV_CHMAP_SL,
634 SNDRV_CHMAP_SR,
635 SNDRV_CHMAP_RC,
636
637 SNDRV_CHMAP_FLC,
638 SNDRV_CHMAP_FRC,
639 SNDRV_CHMAP_RLC,
640 SNDRV_CHMAP_RRC,
641 SNDRV_CHMAP_FLW,
642 SNDRV_CHMAP_FRW,
643 SNDRV_CHMAP_FLH,
644 SNDRV_CHMAP_FCH,
645 SNDRV_CHMAP_FRH,
646 SNDRV_CHMAP_TC,
647 SNDRV_CHMAP_TFL,
648 SNDRV_CHMAP_TFR,
649 SNDRV_CHMAP_TFC,
650 SNDRV_CHMAP_TRL,
651 SNDRV_CHMAP_TRR,
652 SNDRV_CHMAP_TRC,
653
654 SNDRV_CHMAP_TFLC,
655 SNDRV_CHMAP_TFRC,
656 SNDRV_CHMAP_TSL,
657 SNDRV_CHMAP_TSR,
658 SNDRV_CHMAP_LLFE,
659 SNDRV_CHMAP_RLFE,
660 SNDRV_CHMAP_BC,
661 SNDRV_CHMAP_BLC,
662 SNDRV_CHMAP_BRC,
663 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
664};
665
666#define SNDRV_CHMAP_POSITION_MASK 0xffff
667#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
668#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
669
670#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
671#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
672#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
673#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
674#define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int)
675#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
676#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
677#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
678#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
679#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
680#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
681#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
682#define __SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct __snd_pcm_sync_ptr)
683#define __SNDRV_PCM_IOCTL_SYNC_PTR64 _IOWR('A', 0x23, struct __snd_pcm_sync_ptr64)
684#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
685#define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status)
686#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
687#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
688#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
689#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
690#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
691#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
692#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
693#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
694#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
695#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
696#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
697#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
698#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
699#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
700#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
701#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
702#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
703
704
705
706
707
708
709
710
711
712
713
714#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 2)
715
716enum {
717 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
718 SNDRV_RAWMIDI_STREAM_INPUT,
719 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
720};
721
722#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
723#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
724#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
725
726struct snd_rawmidi_info {
727 unsigned int device;
728 unsigned int subdevice;
729 int stream;
730 int card;
731 unsigned int flags;
732 unsigned char id[64];
733 unsigned char name[80];
734 unsigned char subname[32];
735 unsigned int subdevices_count;
736 unsigned int subdevices_avail;
737 unsigned char reserved[64];
738};
739
740#define SNDRV_RAWMIDI_MODE_FRAMING_MASK (7<<0)
741#define SNDRV_RAWMIDI_MODE_FRAMING_SHIFT 0
742#define SNDRV_RAWMIDI_MODE_FRAMING_NONE (0<<0)
743#define SNDRV_RAWMIDI_MODE_FRAMING_TSTAMP (1<<0)
744#define SNDRV_RAWMIDI_MODE_CLOCK_MASK (7<<3)
745#define SNDRV_RAWMIDI_MODE_CLOCK_SHIFT 3
746#define SNDRV_RAWMIDI_MODE_CLOCK_NONE (0<<3)
747#define SNDRV_RAWMIDI_MODE_CLOCK_REALTIME (1<<3)
748#define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC (2<<3)
749#define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC_RAW (3<<3)
750
751#define SNDRV_RAWMIDI_FRAMING_DATA_LENGTH 16
752
753struct snd_rawmidi_framing_tstamp {
754
755
756
757 __u8 frame_type;
758 __u8 length;
759 __u8 reserved[2];
760 __u32 tv_nsec;
761 __u64 tv_sec;
762 __u8 data[SNDRV_RAWMIDI_FRAMING_DATA_LENGTH];
763} __packed;
764
765struct snd_rawmidi_params {
766 int stream;
767 size_t buffer_size;
768 size_t avail_min;
769 unsigned int no_active_sensing: 1;
770 unsigned int mode;
771 unsigned char reserved[12];
772};
773
774#ifndef __KERNEL__
775struct snd_rawmidi_status {
776 int stream;
777 __time_pad pad1;
778 struct timespec tstamp;
779 size_t avail;
780 size_t xruns;
781 unsigned char reserved[16];
782};
783#endif
784
785#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
786#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
787#define SNDRV_RAWMIDI_IOCTL_USER_PVERSION _IOW('W', 0x02, int)
788#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
789#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
790#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
791#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
792
793
794
795
796
797#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
798
799enum {
800 SNDRV_TIMER_CLASS_NONE = -1,
801 SNDRV_TIMER_CLASS_SLAVE = 0,
802 SNDRV_TIMER_CLASS_GLOBAL,
803 SNDRV_TIMER_CLASS_CARD,
804 SNDRV_TIMER_CLASS_PCM,
805 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
806};
807
808
809enum {
810 SNDRV_TIMER_SCLASS_NONE = 0,
811 SNDRV_TIMER_SCLASS_APPLICATION,
812 SNDRV_TIMER_SCLASS_SEQUENCER,
813 SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
814 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
815};
816
817
818#define SNDRV_TIMER_GLOBAL_SYSTEM 0
819#define SNDRV_TIMER_GLOBAL_RTC 1
820#define SNDRV_TIMER_GLOBAL_HPET 2
821#define SNDRV_TIMER_GLOBAL_HRTIMER 3
822
823
824#define SNDRV_TIMER_FLG_SLAVE (1<<0)
825
826struct snd_timer_id {
827 int dev_class;
828 int dev_sclass;
829 int card;
830 int device;
831 int subdevice;
832};
833
834struct snd_timer_ginfo {
835 struct snd_timer_id tid;
836 unsigned int flags;
837 int card;
838 unsigned char id[64];
839 unsigned char name[80];
840 unsigned long reserved0;
841 unsigned long resolution;
842 unsigned long resolution_min;
843 unsigned long resolution_max;
844 unsigned int clients;
845 unsigned char reserved[32];
846};
847
848struct snd_timer_gparams {
849 struct snd_timer_id tid;
850 unsigned long period_num;
851 unsigned long period_den;
852 unsigned char reserved[32];
853};
854
855struct snd_timer_gstatus {
856 struct snd_timer_id tid;
857 unsigned long resolution;
858 unsigned long resolution_num;
859 unsigned long resolution_den;
860 unsigned char reserved[32];
861};
862
863struct snd_timer_select {
864 struct snd_timer_id id;
865 unsigned char reserved[32];
866};
867
868struct snd_timer_info {
869 unsigned int flags;
870 int card;
871 unsigned char id[64];
872 unsigned char name[80];
873 unsigned long reserved0;
874 unsigned long resolution;
875 unsigned char reserved[64];
876};
877
878#define SNDRV_TIMER_PSFLG_AUTO (1<<0)
879#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1)
880#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2)
881
882struct snd_timer_params {
883 unsigned int flags;
884 unsigned int ticks;
885 unsigned int queue_size;
886 unsigned int reserved0;
887 unsigned int filter;
888 unsigned char reserved[60];
889};
890
891#ifndef __KERNEL__
892struct snd_timer_status {
893 struct timespec tstamp;
894 unsigned int resolution;
895 unsigned int lost;
896 unsigned int overrun;
897 unsigned int queue;
898 unsigned char reserved[64];
899};
900#endif
901
902#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
903#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
904#define SNDRV_TIMER_IOCTL_TREAD_OLD _IOW('T', 0x02, int)
905#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
906#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
907#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
908#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
909#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
910#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
911#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
912
913#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
914#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
915#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
916#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
917#define SNDRV_TIMER_IOCTL_TREAD64 _IOW('T', 0xa4, int)
918
919#if __BITS_PER_LONG == 64
920#define SNDRV_TIMER_IOCTL_TREAD SNDRV_TIMER_IOCTL_TREAD_OLD
921#else
922#define SNDRV_TIMER_IOCTL_TREAD ((sizeof(__kernel_long_t) >= sizeof(time_t)) ? \
923 SNDRV_TIMER_IOCTL_TREAD_OLD : \
924 SNDRV_TIMER_IOCTL_TREAD64)
925#endif
926
927struct snd_timer_read {
928 unsigned int resolution;
929 unsigned int ticks;
930};
931
932enum {
933 SNDRV_TIMER_EVENT_RESOLUTION = 0,
934 SNDRV_TIMER_EVENT_TICK,
935 SNDRV_TIMER_EVENT_START,
936 SNDRV_TIMER_EVENT_STOP,
937 SNDRV_TIMER_EVENT_CONTINUE,
938 SNDRV_TIMER_EVENT_PAUSE,
939 SNDRV_TIMER_EVENT_EARLY,
940 SNDRV_TIMER_EVENT_SUSPEND,
941 SNDRV_TIMER_EVENT_RESUME,
942
943 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
944 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
945 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
946 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
947 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
948 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
949};
950
951#ifndef __KERNEL__
952struct snd_timer_tread {
953 int event;
954 __time_pad pad1;
955 struct timespec tstamp;
956 unsigned int val;
957 __time_pad pad2;
958};
959#endif
960
961
962
963
964
965
966
967#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8)
968
969struct snd_ctl_card_info {
970 int card;
971 int pad;
972 unsigned char id[16];
973 unsigned char driver[16];
974 unsigned char name[32];
975 unsigned char longname[80];
976 unsigned char reserved_[16];
977 unsigned char mixername[80];
978 unsigned char components[128];
979};
980
981typedef int __bitwise snd_ctl_elem_type_t;
982#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0)
983#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
984#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2)
985#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3)
986#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4)
987#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
988#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6)
989#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
990
991typedef int __bitwise snd_ctl_elem_iface_t;
992#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
993#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1)
994#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2)
995#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3)
996#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
997#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5)
998#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6)
999#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
1000
1001#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
1002#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
1003#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
1004#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2)
1005
1006#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4)
1007#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5)
1008#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
1009#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6)
1010#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8)
1011#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9)
1012#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10)
1013#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28)
1014#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29)
1015
1016
1017
1018#define SNDRV_CTL_POWER_D0 0x0000
1019#define SNDRV_CTL_POWER_D1 0x0100
1020#define SNDRV_CTL_POWER_D2 0x0200
1021#define SNDRV_CTL_POWER_D3 0x0300
1022#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000)
1023#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001)
1024
1025#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44
1026
1027struct snd_ctl_elem_id {
1028 unsigned int numid;
1029 snd_ctl_elem_iface_t iface;
1030 unsigned int device;
1031 unsigned int subdevice;
1032 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
1033 unsigned int index;
1034};
1035
1036struct snd_ctl_elem_list {
1037 unsigned int offset;
1038 unsigned int space;
1039 unsigned int used;
1040 unsigned int count;
1041 struct snd_ctl_elem_id __user *pids;
1042 unsigned char reserved[50];
1043};
1044
1045struct snd_ctl_elem_info {
1046 struct snd_ctl_elem_id id;
1047 snd_ctl_elem_type_t type;
1048 unsigned int access;
1049 unsigned int count;
1050 __kernel_pid_t owner;
1051 union {
1052 struct {
1053 long min;
1054 long max;
1055 long step;
1056 } integer;
1057 struct {
1058 long long min;
1059 long long max;
1060 long long step;
1061 } integer64;
1062 struct {
1063 unsigned int items;
1064 unsigned int item;
1065 char name[64];
1066 __u64 names_ptr;
1067 unsigned int names_length;
1068 } enumerated;
1069 unsigned char reserved[128];
1070 } value;
1071 unsigned char reserved[64];
1072};
1073
1074struct snd_ctl_elem_value {
1075 struct snd_ctl_elem_id id;
1076 unsigned int indirect: 1;
1077 union {
1078 union {
1079 long value[128];
1080 long *value_ptr;
1081 } integer;
1082 union {
1083 long long value[64];
1084 long long *value_ptr;
1085 } integer64;
1086 union {
1087 unsigned int item[128];
1088 unsigned int *item_ptr;
1089 } enumerated;
1090 union {
1091 unsigned char data[512];
1092 unsigned char *data_ptr;
1093 } bytes;
1094 struct snd_aes_iec958 iec958;
1095 } value;
1096 unsigned char reserved[128];
1097};
1098
1099struct snd_ctl_tlv {
1100 unsigned int numid;
1101 unsigned int length;
1102 unsigned int tlv[0];
1103};
1104
1105#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
1106#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
1107#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
1108#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
1109#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
1110#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
1111#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
1112#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
1113#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
1114#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
1115#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
1116#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
1117#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
1118#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
1119#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
1120#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
1121#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
1122#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
1123#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
1124#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
1125#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
1126#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
1127#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
1128#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
1129#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
1130
1131
1132
1133
1134
1135enum sndrv_ctl_event_type {
1136 SNDRV_CTL_EVENT_ELEM = 0,
1137 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
1138};
1139
1140#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0)
1141#define SNDRV_CTL_EVENT_MASK_INFO (1<<1)
1142#define SNDRV_CTL_EVENT_MASK_ADD (1<<2)
1143#define SNDRV_CTL_EVENT_MASK_TLV (1<<3)
1144#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U)
1145
1146struct snd_ctl_event {
1147 int type;
1148 union {
1149 struct {
1150 unsigned int mask;
1151 struct snd_ctl_elem_id id;
1152 } elem;
1153 unsigned char data8[60];
1154 } data;
1155};
1156
1157
1158
1159
1160
1161#define SNDRV_CTL_NAME_NONE ""
1162#define SNDRV_CTL_NAME_PLAYBACK "Playback "
1163#define SNDRV_CTL_NAME_CAPTURE "Capture "
1164
1165#define SNDRV_CTL_NAME_IEC958_NONE ""
1166#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
1167#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
1168#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
1169#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
1170#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
1171#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
1172#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
1173#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
1174
1175#endif
1176