LXR linux/arch/arm/mach-omap1/io.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * linux/arch/arm/mach-omap1/io.c
   4 *
   5 * OMAP1 I/O mapping code
   6 */
   7
   8#include <linux/module.h>
   9#include <linux/kernel.h>
  10#include <linux/init.h>
  11#include <linux/io.h>
  12
  13#include <asm/tlb.h>
  14#include <asm/mach/map.h>
  15
  16#include <mach/mux.h>
  17#include <mach/tc.h>
  18#include <linux/omap-dma.h>
  19
  20#include "iomap.h"
  21#include "common.h"
  22#include "clock.h"
  23
  24/*
  25 * The machine specific code may provide the extra mapping besides the
  26 * default mapping provided here.
  27 */
  28static struct map_desc omap_io_desc[] __initdata = {
  29        {
  30                .virtual        = OMAP1_IO_VIRT,
  31                .pfn            = __phys_to_pfn(OMAP1_IO_PHYS),
  32                .length         = OMAP1_IO_SIZE,
  33                .type           = MT_DEVICE
  34        }
  35};
  36
  37#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
  38static struct map_desc omap7xx_io_desc[] __initdata = {
  39        {
  40                .virtual        = OMAP7XX_DSP_BASE,
  41                .pfn            = __phys_to_pfn(OMAP7XX_DSP_START),
  42                .length         = OMAP7XX_DSP_SIZE,
  43                .type           = MT_DEVICE
  44        }, {
  45                .virtual        = OMAP7XX_DSPREG_BASE,
  46                .pfn            = __phys_to_pfn(OMAP7XX_DSPREG_START),
  47                .length         = OMAP7XX_DSPREG_SIZE,
  48                .type           = MT_DEVICE
  49        }
  50};
  51#endif
  52
  53#ifdef CONFIG_ARCH_OMAP15XX
  54static struct map_desc omap1510_io_desc[] __initdata = {
  55        {
  56                .virtual        = OMAP1510_DSP_BASE,
  57                .pfn            = __phys_to_pfn(OMAP1510_DSP_START),
  58                .length         = OMAP1510_DSP_SIZE,
  59                .type           = MT_DEVICE
  60        }, {
  61                .virtual        = OMAP1510_DSPREG_BASE,
  62                .pfn            = __phys_to_pfn(OMAP1510_DSPREG_START),
  63                .length         = OMAP1510_DSPREG_SIZE,
  64                .type           = MT_DEVICE
  65        }
  66};
  67#endif
  68
  69#if defined(CONFIG_ARCH_OMAP16XX)
  70static struct map_desc omap16xx_io_desc[] __initdata = {
  71        {
  72                .virtual        = OMAP16XX_DSP_BASE,
  73                .pfn            = __phys_to_pfn(OMAP16XX_DSP_START),
  74                .length         = OMAP16XX_DSP_SIZE,
  75                .type           = MT_DEVICE
  76        }, {
  77                .virtual        = OMAP16XX_DSPREG_BASE,
  78                .pfn            = __phys_to_pfn(OMAP16XX_DSPREG_START),
  79                .length         = OMAP16XX_DSPREG_SIZE,
  80                .type           = MT_DEVICE
  81        }
  82};
  83#endif
  84
  85/*
  86 * Maps common IO regions for omap1
  87 */
  88static void __init omap1_map_common_io(void)
  89{
  90        iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
  91}
  92
  93#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
  94void __init omap7xx_map_io(void)
  95{
  96        omap1_map_common_io();
  97        iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc));
  98}
  99#endif
 100
 101#ifdef CONFIG_ARCH_OMAP15XX
 102void __init omap15xx_map_io(void)
 103{
 104        omap1_map_common_io();
 105        iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
 106}
 107#endif
 108
 109#if defined(CONFIG_ARCH_OMAP16XX)
 110void __init omap16xx_map_io(void)
 111{
 112        omap1_map_common_io();
 113        iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc));
 114}
 115#endif
 116
 117/*
 118 * Common low-level hardware init for omap1.
 119 */
 120void __init omap1_init_early(void)
 121{
 122        omap_check_revision();
 123
 124        /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
 125         * on a Posted Write in the TIPB Bridge".
 126         */
 127        omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
 128        omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
 129
 130        /* Must init clocks early to assure that timer interrupt works
 131         */
 132        omap1_clk_init();
 133        omap1_mux_init();
 134}
 135
 136void __init omap1_init_late(void)
 137{
 138        omap_serial_wakeup_init();
 139}
 140
 141/*
 142 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
 143 */
 144
 145u8 omap_readb(u32 pa)
 146{
 147        return __raw_readb(OMAP1_IO_ADDRESS(pa));
 148}
 149EXPORT_SYMBOL(omap_readb);
 150
 151u16 omap_readw(u32 pa)
 152{
 153        return __raw_readw(OMAP1_IO_ADDRESS(pa));
 154}
 155EXPORT_SYMBOL(omap_readw);
 156
 157u32 omap_readl(u32 pa)
 158{
 159        return __raw_readl(OMAP1_IO_ADDRESS(pa));
 160}
 161EXPORT_SYMBOL(omap_readl);
 162
 163void omap_writeb(u8 v, u32 pa)
 164{
 165        __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
 166}
 167EXPORT_SYMBOL(omap_writeb);
 168
 169void omap_writew(u16 v, u32 pa)
 170{
 171        __raw_writew(v, OMAP1_IO_ADDRESS(pa));
 172}
 173EXPORT_SYMBOL(omap_writew);
 174
 175void omap_writel(u32 v, u32 pa)
 176{
 177        __raw_writel(v, OMAP1_IO_ADDRESS(pa));
 178}
 179EXPORT_SYMBOL(omap_writel);
 180