LXR linux/drivers/crypto/qat/qat_common/adf

   1// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
   2/* Copyright(c) 2014 - 2020 Intel Corporation */
   3#include <linux/types.h>
   4#include <linux/mutex.h>
   5#include <linux/slab.h>
   6#include <linux/iopoll.h>
   7#include <linux/pci.h>
   8#include <linux/dma-mapping.h>
   9#include "adf_accel_devices.h"
  10#include "adf_common_drv.h"
  11#include "icp_qat_fw_init_admin.h"
  12
  13#define ADF_ADMIN_MAILBOX_STRIDE 0x1000
  14#define ADF_ADMINMSG_LEN 32
  15#define ADF_CONST_TABLE_SIZE 1024
  16#define ADF_ADMIN_POLL_DELAY_US 20
  17#define ADF_ADMIN_POLL_TIMEOUT_US (5 * USEC_PER_SEC)
  18
  19static const u8 const_tab[1024] __aligned(1024) = {
  200x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  210x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  220x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  230x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  240x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  250x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  260x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00,
  270x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  280x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
  290x00, 0x00, 0x00, 0x03, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x01,
  300x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
  310x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x13, 0x02, 0x00, 0x00,
  320x00, 0x00, 0x00, 0x00, 0x13, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x13,
  330x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00,
  340x00, 0x00, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00,
  350x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  360x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  370x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  380x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  390x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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  410x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  420x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
  430x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  440x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, 0xfe, 0xdc, 0xba, 0x98, 0x76,
  450x54, 0x32, 0x10, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  460x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x67, 0x45, 0x23, 0x01, 0xef, 0xcd, 0xab,
  470x89, 0x98, 0xba, 0xdc, 0xfe, 0x10, 0x32, 0x54, 0x76, 0xc3, 0xd2, 0xe1, 0xf0,
  480x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  490x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
  500x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc1, 0x05, 0x9e,
  510xd8, 0x36, 0x7c, 0xd5, 0x07, 0x30, 0x70, 0xdd, 0x17, 0xf7, 0x0e, 0x59, 0x39,
  520xff, 0xc0, 0x0b, 0x31, 0x68, 0x58, 0x15, 0x11, 0x64, 0xf9, 0x8f, 0xa7, 0xbe,
  530xfa, 0x4f, 0xa4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  540x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6a, 0x09, 0xe6, 0x67, 0xbb, 0x67, 0xae,
  550x85, 0x3c, 0x6e, 0xf3, 0x72, 0xa5, 0x4f, 0xf5, 0x3a, 0x51, 0x0e, 0x52, 0x7f,
  560x9b, 0x05, 0x68, 0x8c, 0x1f, 0x83, 0xd9, 0xab, 0x5b, 0xe0, 0xcd, 0x19, 0x05,
  570x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  580x00, 0x00, 0xcb, 0xbb, 0x9d, 0x5d, 0xc1, 0x05, 0x9e, 0xd8, 0x62, 0x9a, 0x29,
  590x2a, 0x36, 0x7c, 0xd5, 0x07, 0x91, 0x59, 0x01, 0x5a, 0x30, 0x70, 0xdd, 0x17,
  600x15, 0x2f, 0xec, 0xd8, 0xf7, 0x0e, 0x59, 0x39, 0x67, 0x33, 0x26, 0x67, 0xff,
  610xc0, 0x0b, 0x31, 0x8e, 0xb4, 0x4a, 0x87, 0x68, 0x58, 0x15, 0x11, 0xdb, 0x0c,
  620x2e, 0x0d, 0x64, 0xf9, 0x8f, 0xa7, 0x47, 0xb5, 0x48, 0x1d, 0xbe, 0xfa, 0x4f,
  630xa4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  640x00, 0x00, 0x00, 0x00, 0x6a, 0x09, 0xe6, 0x67, 0xf3, 0xbc, 0xc9, 0x08, 0xbb,
  650x67, 0xae, 0x85, 0x84, 0xca, 0xa7, 0x3b, 0x3c, 0x6e, 0xf3, 0x72, 0xfe, 0x94,
  660xf8, 0x2b, 0xa5, 0x4f, 0xf5, 0x3a, 0x5f, 0x1d, 0x36, 0xf1, 0x51, 0x0e, 0x52,
  670x7f, 0xad, 0xe6, 0x82, 0xd1, 0x9b, 0x05, 0x68, 0x8c, 0x2b, 0x3e, 0x6c, 0x1f,
  680x1f, 0x83, 0xd9, 0xab, 0xfb, 0x41, 0xbd, 0x6b, 0x5b, 0xe0, 0xcd, 0x19, 0x13,
  690x7e, 0x21, 0x79, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  700x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  710x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00,
  720x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x18,
  730x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  740x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x01, 0x00,
  750x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  760x15, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x02, 0x00, 0x00, 0x00,
  770x00, 0x00, 0x00, 0x14, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x02,
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  840x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x01, 0x00, 0x00, 0x00,
  850x00, 0x00, 0x00, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x01,
  860x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  870x00, 0x2B, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,
  880x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  890x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00,
  900x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
  910x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  920x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  930x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  940x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  950x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  960x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  970x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  980x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
  99
 100struct adf_admin_comms {
 101        dma_addr_t phy_addr;
 102        dma_addr_t const_tbl_addr;
 103        void *virt_addr;
 104        void *virt_tbl_addr;
 105        void __iomem *mailbox_addr;
 106        struct mutex lock;      /* protects adf_admin_comms struct */
 107};
 108
 109static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae,
 110                                  void *in, void *out)
 111{
 112        int ret;
 113        u32 status;
 114        struct adf_admin_comms *admin = accel_dev->admin;
 115        int offset = ae * ADF_ADMINMSG_LEN * 2;
 116        void __iomem *mailbox = admin->mailbox_addr;
 117        int mb_offset = ae * ADF_ADMIN_MAILBOX_STRIDE;
 118        struct icp_qat_fw_init_admin_req *request = in;
 119
 120        mutex_lock(&admin->lock);
 121
 122        if (ADF_CSR_RD(mailbox, mb_offset) == 1) {
 123                mutex_unlock(&admin->lock);
 124                return -EAGAIN;
 125        }
 126
 127        memcpy(admin->virt_addr + offset, in, ADF_ADMINMSG_LEN);
 128        ADF_CSR_WR(mailbox, mb_offset, 1);
 129
 130        ret = read_poll_timeout(ADF_CSR_RD, status, status == 0,
 131                                ADF_ADMIN_POLL_DELAY_US,
 132                                ADF_ADMIN_POLL_TIMEOUT_US, true,
 133                                mailbox, mb_offset);
 134        if (ret < 0) {
 135                /* Response timeout */
 136                dev_err(&GET_DEV(accel_dev),
 137                        "Failed to send admin msg %d to accelerator %d\n",
 138                        request->cmd_id, ae);
 139        } else {
 140                /* Response received from admin message, we can now
 141                 * make response data available in "out" parameter.
 142                 */
 143                memcpy(out, admin->virt_addr + offset +
 144                       ADF_ADMINMSG_LEN, ADF_ADMINMSG_LEN);
 145        }
 146
 147        mutex_unlock(&admin->lock);
 148        return ret;
 149}
 150
 151static int adf_send_admin(struct adf_accel_dev *accel_dev,
 152                          struct icp_qat_fw_init_admin_req *req,
 153                          struct icp_qat_fw_init_admin_resp *resp,
 154                          const unsigned long ae_mask)
 155{
 156        u32 ae;
 157
 158        for_each_set_bit(ae, &ae_mask, ICP_QAT_HW_AE_DELIMITER)
 159                if (adf_put_admin_msg_sync(accel_dev, ae, req, resp) ||
 160                    resp->status)
 161                        return -EFAULT;
 162
 163        return 0;
 164}
 165
 166static int adf_init_ae(struct adf_accel_dev *accel_dev)
 167{
 168        struct icp_qat_fw_init_admin_req req;
 169        struct icp_qat_fw_init_admin_resp resp;
 170        struct adf_hw_device_data *hw_device = accel_dev->hw_device;
 171        u32 ae_mask = hw_device->ae_mask;
 172
 173        memset(&req, 0, sizeof(req));
 174        memset(&resp, 0, sizeof(resp));
 175        req.cmd_id = ICP_QAT_FW_INIT_AE;
 176
 177        return adf_send_admin(accel_dev, &req, &resp, ae_mask);
 178}
 179
 180static int adf_set_fw_constants(struct adf_accel_dev *accel_dev)
 181{
 182        struct icp_qat_fw_init_admin_req req;
 183        struct icp_qat_fw_init_admin_resp resp;
 184        struct adf_hw_device_data *hw_device = accel_dev->hw_device;
 185        u32 ae_mask = hw_device->admin_ae_mask ?: hw_device->ae_mask;
 186
 187        memset(&req, 0, sizeof(req));
 188        memset(&resp, 0, sizeof(resp));
 189        req.cmd_id = ICP_QAT_FW_CONSTANTS_CFG;
 190
 191        req.init_cfg_sz = ADF_CONST_TABLE_SIZE;
 192        req.init_cfg_ptr = accel_dev->admin->const_tbl_addr;
 193
 194        return adf_send_admin(accel_dev, &req, &resp, ae_mask);
 195}
 196
 197static int adf_get_dc_capabilities(struct adf_accel_dev *accel_dev,
 198                                   u32 *capabilities)
 199{
 200        struct adf_hw_device_data *hw_device = accel_dev->hw_device;
 201        struct icp_qat_fw_init_admin_resp resp;
 202        struct icp_qat_fw_init_admin_req req;
 203        unsigned long ae_mask;
 204        unsigned long ae;
 205        int ret;
 206
 207        /* Target only service accelerator engines */
 208        ae_mask = hw_device->ae_mask & ~hw_device->admin_ae_mask;
 209
 210        memset(&req, 0, sizeof(req));
 211        memset(&resp, 0, sizeof(resp));
 212        req.cmd_id = ICP_QAT_FW_COMP_CAPABILITY_GET;
 213
 214        *capabilities = 0;
 215        for_each_set_bit(ae, &ae_mask, GET_MAX_ACCELENGINES(accel_dev)) {
 216                ret = adf_send_admin(accel_dev, &req, &resp, 1ULL << ae);
 217                if (ret)
 218                        return ret;
 219
 220                *capabilities |= resp.extended_features;
 221        }
 222
 223        return 0;
 224}
 225
 226/**
 227 * adf_send_admin_init() - Function sends init message to FW
 228 * @accel_dev: Pointer to acceleration device.
 229 *
 230 * Function sends admin init message to the FW
 231 *
 232 * Return: 0 on success, error code otherwise.
 233 */
 234int adf_send_admin_init(struct adf_accel_dev *accel_dev)
 235{
 236        u32 dc_capabilities = 0;
 237        int ret;
 238
 239        ret = adf_get_dc_capabilities(accel_dev, &dc_capabilities);
 240        if (ret) {
 241                dev_err(&GET_DEV(accel_dev), "Cannot get dc capabilities\n");
 242                return ret;
 243        }
 244        accel_dev->hw_device->extended_dc_capabilities = dc_capabilities;
 245
 246        ret = adf_set_fw_constants(accel_dev);
 247        if (ret)
 248                return ret;
 249
 250        return adf_init_ae(accel_dev);
 251}
 252EXPORT_SYMBOL_GPL(adf_send_admin_init);
 253
 254int adf_init_admin_comms(struct adf_accel_dev *accel_dev)
 255{
 256        struct adf_admin_comms *admin;
 257        struct adf_hw_device_data *hw_data = accel_dev->hw_device;
 258        void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev);
 259        struct admin_info admin_csrs_info;
 260        u32 mailbox_offset, adminmsg_u, adminmsg_l;
 261        void __iomem *mailbox;
 262        u64 reg_val;
 263
 264        admin = kzalloc_node(sizeof(*accel_dev->admin), GFP_KERNEL,
 265                             dev_to_node(&GET_DEV(accel_dev)));
 266        if (!admin)
 267                return -ENOMEM;
 268        admin->virt_addr = dma_alloc_coherent(&GET_DEV(accel_dev), PAGE_SIZE,
 269                                              &admin->phy_addr, GFP_KERNEL);
 270        if (!admin->virt_addr) {
 271                dev_err(&GET_DEV(accel_dev), "Failed to allocate dma buff\n");
 272                kfree(admin);
 273                return -ENOMEM;
 274        }
 275
 276        admin->virt_tbl_addr = dma_alloc_coherent(&GET_DEV(accel_dev),
 277                                                  PAGE_SIZE,
 278                                                  &admin->const_tbl_addr,
 279                                                  GFP_KERNEL);
 280        if (!admin->virt_tbl_addr) {
 281                dev_err(&GET_DEV(accel_dev), "Failed to allocate const_tbl\n");
 282                dma_free_coherent(&GET_DEV(accel_dev), PAGE_SIZE,
 283                                  admin->virt_addr, admin->phy_addr);
 284                kfree(admin);
 285                return -ENOMEM;
 286        }
 287
 288        memcpy(admin->virt_tbl_addr, const_tab, sizeof(const_tab));
 289        hw_data->get_admin_info(&admin_csrs_info);
 290
 291        mailbox_offset = admin_csrs_info.mailbox_offset;
 292        mailbox = pmisc_addr + mailbox_offset;
 293        adminmsg_u = admin_csrs_info.admin_msg_ur;
 294        adminmsg_l = admin_csrs_info.admin_msg_lr;
 295
 296        reg_val = (u64)admin->phy_addr;
 297        ADF_CSR_WR(pmisc_addr, adminmsg_u, upper_32_bits(reg_val));
 298        ADF_CSR_WR(pmisc_addr, adminmsg_l, lower_32_bits(reg_val));
 299
 300        mutex_init(&admin->lock);
 301        admin->mailbox_addr = mailbox;
 302        accel_dev->admin = admin;
 303        return 0;
 304}
 305EXPORT_SYMBOL_GPL(adf_init_admin_comms);
 306
 307void adf_exit_admin_comms(struct adf_accel_dev *accel_dev)
 308{
 309        struct adf_admin_comms *admin = accel_dev->admin;
 310
 311        if (!admin)
 312                return;
 313
 314        if (admin->virt_addr)
 315                dma_free_coherent(&GET_DEV(accel_dev), PAGE_SIZE,
 316                                  admin->virt_addr, admin->phy_addr);
 317        if (admin->virt_tbl_addr)
 318                dma_free_coherent(&GET_DEV(accel_dev), PAGE_SIZE,
 319                                  admin->virt_tbl_addr, admin->const_tbl_addr);
 320
 321        mutex_destroy(&admin->lock);
 322        kfree(admin);
 323        accel_dev->admin = NULL;
 324}
 325EXPORT_SYMBOL_GPL(adf_exit_admin_comms);
 326