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26#ifndef DC_LINK_H_
27#define DC_LINK_H_
28
29#include "dc.h"
30#include "dc_types.h"
31#include "grph_object_defs.h"
32
33struct link_resource;
34
35enum dc_link_fec_state {
36 dc_link_fec_not_ready,
37 dc_link_fec_ready,
38 dc_link_fec_enabled
39};
40
41struct dc_link_status {
42 bool link_active;
43 struct dpcd_caps *dpcd_caps;
44};
45
46
47struct link_mst_stream_allocation {
48
49 const struct stream_encoder *stream_enc;
50#if defined(CONFIG_DRM_AMD_DC_DCN)
51
52 const struct hpo_dp_stream_encoder *hpo_dp_stream_enc;
53#endif
54
55 uint8_t vcp_id;
56
57 uint8_t slot_count;
58};
59
60
61struct link_mst_stream_allocation_table {
62
63 int stream_count;
64
65 struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
66};
67
68struct time_stamp {
69 uint64_t edp_poweroff;
70 uint64_t edp_poweron;
71};
72
73struct link_trace {
74 struct time_stamp time_stamp;
75};
76
77
78struct psr_settings {
79 bool psr_feature_enabled;
80 bool psr_allow_active;
81 enum dc_psr_version psr_version;
82
83
84
85
86
87
88 bool psr_frame_capture_indication_req;
89 unsigned int psr_sdp_transmit_line_num_deadline;
90 unsigned int psr_power_opt;
91};
92
93
94
95
96
97struct dc_link {
98 struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
99 unsigned int sink_count;
100 struct dc_sink *local_sink;
101 unsigned int link_index;
102 enum dc_connection_type type;
103 enum signal_type connector_signal;
104 enum dc_irq_source irq_source_hpd;
105 enum dc_irq_source irq_source_hpd_rx;
106 bool is_hpd_filter_disabled;
107 bool dp_ss_off;
108 bool link_state_valid;
109 bool aux_access_disabled;
110 bool sync_lt_in_progress;
111 enum lttpr_mode lttpr_mode;
112 bool is_internal_display;
113
114
115
116 bool is_dig_mapping_flexible;
117 bool hpd_status;
118 bool is_hpd_pending;
119
120 bool edp_sink_present;
121
122
123
124
125 struct dc_link_settings reported_link_cap;
126 struct dc_link_settings verified_link_cap;
127 struct dc_link_settings cur_link_settings;
128 struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
129 struct dc_link_settings preferred_link_setting;
130
131
132
133
134 struct dc_link_training_overrides preferred_training_settings;
135 struct dp_audio_test_data audio_test_data;
136
137 uint8_t ddc_hw_inst;
138
139 uint8_t hpd_src;
140
141 uint8_t link_enc_hw_inst;
142
143
144
145
146 enum engine_id eng_id;
147
148 bool test_pattern_enabled;
149 union compliance_test_state compliance_test_state;
150
151 void *priv;
152
153 struct ddc_service *ddc;
154
155 bool aux_mode;
156
157
158
159 const struct dc *dc;
160
161 struct dc_context *ctx;
162
163 struct panel_cntl *panel_cntl;
164 struct link_encoder *link_enc;
165 struct graphics_object_id link_id;
166
167
168
169
170 enum display_endpoint_type ep_type;
171 union ddi_channel_mapping ddi_channel_mapping;
172 struct connector_device_tag_info device_tag;
173 struct dpcd_caps dpcd_caps;
174 uint32_t dongle_max_pix_clk;
175 unsigned short chip_caps;
176 unsigned int dpcd_sink_count;
177#if defined(CONFIG_DRM_AMD_DC_HDCP)
178 struct hdcp_caps hdcp_caps;
179#endif
180 enum edp_revision edp_revision;
181 union dpcd_sink_ext_caps dpcd_sink_ext_caps;
182
183 struct psr_settings psr_settings;
184
185
186 struct dc_lane_settings bios_forced_drive_settings;
187
188
189 uint8_t vendor_specific_lttpr_link_rate_wa;
190 bool apply_vendor_specific_lttpr_link_rate_wa;
191
192
193 struct link_flags {
194 bool dp_keep_receiver_powered;
195 bool dp_skip_DID2;
196 bool dp_skip_reset_segment;
197 bool dp_mot_reset_segment;
198
199 bool dpia_mst_dsc_always_on;
200 } wa_flags;
201 struct link_mst_stream_allocation_table mst_stream_alloc_table;
202
203 struct dc_link_status link_status;
204
205 struct link_trace link_trace;
206 struct gpio *hpd_gpio;
207 enum dc_link_fec_state fec_state;
208};
209
210const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
211
212
213
214
215
216
217
218
219static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
220{
221 return dc->links[link_index];
222}
223
224static inline void get_edp_links(const struct dc *dc,
225 struct dc_link **edp_links,
226 int *edp_num)
227{
228 int i;
229
230 *edp_num = 0;
231 for (i = 0; i < dc->link_count; i++) {
232
233 if (!dc->links[i])
234 continue;
235 if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP) {
236 edp_links[*edp_num] = dc->links[i];
237 if (++(*edp_num) == MAX_NUM_EDP)
238 return;
239 }
240 }
241}
242
243static inline bool dc_get_edp_link_panel_inst(const struct dc *dc,
244 const struct dc_link *link,
245 unsigned int *inst_out)
246{
247 struct dc_link *edp_links[MAX_NUM_EDP];
248 int edp_num;
249
250 if (link->connector_signal != SIGNAL_TYPE_EDP)
251 return false;
252 get_edp_links(dc, edp_links, &edp_num);
253 if ((edp_num > 1) && (link->link_index > edp_links[0]->link_index))
254 *inst_out = 1;
255 else
256 *inst_out = 0;
257 return true;
258}
259
260
261
262
263
264bool dc_link_set_backlight_level(const struct dc_link *dc_link,
265 uint32_t backlight_pwm_u16_16,
266 uint32_t frame_ramp);
267
268
269bool dc_link_set_backlight_level_nits(struct dc_link *link,
270 bool isHDR,
271 uint32_t backlight_millinits,
272 uint32_t transition_time_in_ms);
273
274bool dc_link_get_backlight_level_nits(struct dc_link *link,
275 uint32_t *backlight_millinits,
276 uint32_t *backlight_millinits_peak);
277
278bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
279
280bool dc_link_read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits);
281bool dc_link_set_default_brightness_aux(struct dc_link *link);
282
283int dc_link_get_backlight_level(const struct dc_link *dc_link);
284
285int dc_link_get_target_backlight_pwm(const struct dc_link *link);
286
287bool dc_link_set_psr_allow_active(struct dc_link *dc_link, const bool *enable,
288 bool wait, bool force_static, const unsigned int *power_opts);
289
290bool dc_link_get_psr_state(const struct dc_link *dc_link, enum dc_psr_state *state);
291
292bool dc_link_setup_psr(struct dc_link *dc_link,
293 const struct dc_stream_state *stream, struct psr_config *psr_config,
294 struct psr_context *psr_context);
295
296void dc_link_get_psr_residency(const struct dc_link *link, uint32_t *residency);
297
298void dc_link_blank_all_dp_displays(struct dc *dc);
299
300void dc_link_blank_dp_stream(struct dc_link *link, bool hw_init);
301
302
303
304
305
306
307
308enum dc_detect_reason {
309 DETECT_REASON_BOOT,
310 DETECT_REASON_HPD,
311 DETECT_REASON_HPDRX,
312 DETECT_REASON_FALLBACK,
313 DETECT_REASON_RETRAIN,
314};
315
316bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
317bool dc_link_get_hpd_state(struct dc_link *dc_link);
318enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
319#if defined(CONFIG_DRM_AMD_DC_DCN)
320enum dc_status dc_link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
321enum dc_status dc_link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
322#endif
323
324
325
326
327
328
329
330bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
331 union hpd_irq_data *hpd_irq_dpcd_data, bool *out_link_loss,
332 bool defer_handling, bool *has_left_work);
333
334
335
336
337
338
339bool dc_link_wait_for_t12(struct dc_link *link);
340
341void dc_link_dp_handle_automated_test(struct dc_link *link);
342void dc_link_dp_handle_link_loss(struct dc_link *link);
343bool dc_link_dp_allow_hpd_rx_irq(const struct dc_link *link);
344
345struct dc_sink_init_data;
346
347struct dc_sink *dc_link_add_remote_sink(
348 struct dc_link *dc_link,
349 const uint8_t *edid,
350 int len,
351 struct dc_sink_init_data *init_data);
352
353void dc_link_remove_remote_sink(
354 struct dc_link *link,
355 struct dc_sink *sink);
356
357
358
359void dc_link_dp_set_drive_settings(
360 struct dc_link *link,
361 const struct link_resource *link_res,
362 struct link_training_settings *lt_settings);
363
364bool dc_link_dp_perform_link_training_skip_aux(
365 struct dc_link *link,
366 const struct link_resource *link_res,
367 const struct dc_link_settings *link_setting);
368
369enum link_training_result dc_link_dp_perform_link_training(
370 struct dc_link *link,
371 const struct link_resource *link_res,
372 const struct dc_link_settings *link_settings,
373 bool skip_video_pattern);
374
375bool dc_link_dp_sync_lt_begin(struct dc_link *link);
376
377enum link_training_result dc_link_dp_sync_lt_attempt(
378 struct dc_link *link,
379 const struct link_resource *link_res,
380 struct dc_link_settings *link_setting,
381 struct dc_link_training_overrides *lt_settings);
382
383bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
384
385void dc_link_dp_enable_hpd(const struct dc_link *link);
386
387void dc_link_dp_disable_hpd(const struct dc_link *link);
388
389bool dc_link_dp_set_test_pattern(
390 struct dc_link *link,
391 enum dp_test_pattern test_pattern,
392 enum dp_test_pattern_color_space test_pattern_color_space,
393 const struct link_training_settings *p_link_settings,
394 const unsigned char *p_custom_pattern,
395 unsigned int cust_pattern_size);
396
397bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct dc_link_settings *max_link_enc_cap);
398
399void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
400
401bool dc_link_is_dp_sink_present(struct dc_link *link);
402
403bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type);
404
405
406
407
408#ifdef CONFIG_DRM_AMD_DC_HDCP
409bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
410bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
411#endif
412void dc_link_set_drive_settings(struct dc *dc,
413 struct link_training_settings *lt_settings,
414 const struct dc_link *link);
415void dc_link_set_preferred_link_settings(struct dc *dc,
416 struct dc_link_settings *link_setting,
417 struct dc_link *link);
418void dc_link_set_preferred_training_settings(struct dc *dc,
419 struct dc_link_settings *link_setting,
420 struct dc_link_training_overrides *lt_overrides,
421 struct dc_link *link,
422 bool skip_immediate_retrain);
423void dc_link_enable_hpd(const struct dc_link *link);
424void dc_link_disable_hpd(const struct dc_link *link);
425void dc_link_set_test_pattern(struct dc_link *link,
426 enum dp_test_pattern test_pattern,
427 enum dp_test_pattern_color_space test_pattern_color_space,
428 const struct link_training_settings *p_link_settings,
429 const unsigned char *p_custom_pattern,
430 unsigned int cust_pattern_size);
431uint32_t dc_link_bandwidth_kbps(
432 const struct dc_link *link,
433 const struct dc_link_settings *link_setting);
434
435const struct dc_link_settings *dc_link_get_link_cap(
436 const struct dc_link *link);
437
438void dc_link_overwrite_extended_receiver_cap(
439 struct dc_link *link);
440
441bool dc_submit_i2c(
442 struct dc *dc,
443 uint32_t link_index,
444 struct i2c_command *cmd);
445
446bool dc_submit_i2c_oem(
447 struct dc *dc,
448 struct i2c_command *cmd);
449
450uint32_t dc_bandwidth_in_kbps_from_timing(
451 const struct dc_crtc_timing *timing);
452
453bool dc_link_is_fec_supported(const struct dc_link *link);
454bool dc_link_should_enable_fec(const struct dc_link *link);
455
456#if defined(CONFIG_DRM_AMD_DC_DCN)
457uint32_t dc_link_bw_kbps_from_raw_frl_link_rate_data(uint8_t bw);
458enum dp_link_encoding dc_link_dp_mst_decide_link_encoding_format(const struct dc_link *link);
459#endif
460
461const struct link_resource *dc_link_get_cur_link_res(const struct dc_link *link);
462
463void dc_get_cur_link_res_map(const struct dc *dc, uint32_t *map);
464
465void dc_restore_link_res_map(const struct dc *dc, uint32_t *map);
466#endif
467