1
2
3
4
5
6
7#include <linux/module.h>
8#include "mt76x02.h"
9
10#define MT76x02_CCK_RATE(_idx, _rate) { \
11 .bitrate = _rate, \
12 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \
13 .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \
14 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (8 + (_idx)), \
15}
16
17struct ieee80211_rate mt76x02_rates[] = {
18 MT76x02_CCK_RATE(0, 10),
19 MT76x02_CCK_RATE(1, 20),
20 MT76x02_CCK_RATE(2, 55),
21 MT76x02_CCK_RATE(3, 110),
22 OFDM_RATE(0, 60),
23 OFDM_RATE(1, 90),
24 OFDM_RATE(2, 120),
25 OFDM_RATE(3, 180),
26 OFDM_RATE(4, 240),
27 OFDM_RATE(5, 360),
28 OFDM_RATE(6, 480),
29 OFDM_RATE(7, 540),
30};
31EXPORT_SYMBOL_GPL(mt76x02_rates);
32
33static const struct ieee80211_iface_limit mt76x02_if_limits[] = {
34 {
35 .max = 1,
36 .types = BIT(NL80211_IFTYPE_ADHOC)
37 }, {
38 .max = 8,
39 .types = BIT(NL80211_IFTYPE_STATION) |
40#ifdef CONFIG_MAC80211_MESH
41 BIT(NL80211_IFTYPE_MESH_POINT) |
42#endif
43 BIT(NL80211_IFTYPE_P2P_CLIENT) |
44 BIT(NL80211_IFTYPE_P2P_GO) |
45 BIT(NL80211_IFTYPE_AP)
46 },
47};
48
49static const struct ieee80211_iface_limit mt76x02u_if_limits[] = {
50 {
51 .max = 1,
52 .types = BIT(NL80211_IFTYPE_ADHOC)
53 }, {
54 .max = 2,
55 .types = BIT(NL80211_IFTYPE_STATION) |
56#ifdef CONFIG_MAC80211_MESH
57 BIT(NL80211_IFTYPE_MESH_POINT) |
58#endif
59 BIT(NL80211_IFTYPE_P2P_CLIENT) |
60 BIT(NL80211_IFTYPE_P2P_GO) |
61 BIT(NL80211_IFTYPE_AP)
62 },
63};
64
65static const struct ieee80211_iface_combination mt76x02_if_comb[] = {
66 {
67 .limits = mt76x02_if_limits,
68 .n_limits = ARRAY_SIZE(mt76x02_if_limits),
69 .max_interfaces = 8,
70 .num_different_channels = 1,
71 .beacon_int_infra_match = true,
72 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
73 BIT(NL80211_CHAN_WIDTH_20) |
74 BIT(NL80211_CHAN_WIDTH_40) |
75 BIT(NL80211_CHAN_WIDTH_80),
76 }
77};
78
79static const struct ieee80211_iface_combination mt76x02u_if_comb[] = {
80 {
81 .limits = mt76x02u_if_limits,
82 .n_limits = ARRAY_SIZE(mt76x02u_if_limits),
83 .max_interfaces = 2,
84 .num_different_channels = 1,
85 .beacon_int_infra_match = true,
86 }
87};
88
89static void
90mt76x02_led_set_config(struct mt76_dev *mdev, u8 delay_on,
91 u8 delay_off)
92{
93 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev,
94 mt76);
95 u32 val;
96
97 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xff) |
98 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
99 FIELD_PREP(MT_LED_STATUS_ON, delay_on);
100
101 mt76_wr(dev, MT_LED_S0(mdev->led_pin), val);
102 mt76_wr(dev, MT_LED_S1(mdev->led_pin), val);
103
104 val = MT_LED_CTRL_REPLAY(mdev->led_pin) |
105 MT_LED_CTRL_KICK(mdev->led_pin);
106 if (mdev->led_al)
107 val |= MT_LED_CTRL_POLARITY(mdev->led_pin);
108 mt76_wr(dev, MT_LED_CTRL, val);
109}
110
111static int
112mt76x02_led_set_blink(struct led_classdev *led_cdev,
113 unsigned long *delay_on,
114 unsigned long *delay_off)
115{
116 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev,
117 led_cdev);
118 u8 delta_on, delta_off;
119
120 delta_off = max_t(u8, *delay_off / 10, 1);
121 delta_on = max_t(u8, *delay_on / 10, 1);
122
123 mt76x02_led_set_config(mdev, delta_on, delta_off);
124
125 return 0;
126}
127
128static void
129mt76x02_led_set_brightness(struct led_classdev *led_cdev,
130 enum led_brightness brightness)
131{
132 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev,
133 led_cdev);
134
135 if (!brightness)
136 mt76x02_led_set_config(mdev, 0, 0xff);
137 else
138 mt76x02_led_set_config(mdev, 0xff, 0);
139}
140
141int mt76x02_init_device(struct mt76x02_dev *dev)
142{
143 struct ieee80211_hw *hw = mt76_hw(dev);
144 struct wiphy *wiphy = hw->wiphy;
145
146 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt76x02_mac_work);
147
148 hw->queues = 4;
149 hw->max_rates = 1;
150 hw->max_report_rates = 7;
151 hw->max_rate_tries = 1;
152 hw->extra_tx_headroom = 2;
153
154 if (mt76_is_usb(&dev->mt76)) {
155 hw->extra_tx_headroom += sizeof(struct mt76x02_txwi) +
156 MT_DMA_HDR_LEN;
157 wiphy->iface_combinations = mt76x02u_if_comb;
158 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02u_if_comb);
159 } else {
160 INIT_DELAYED_WORK(&dev->wdt_work, mt76x02_wdt_work);
161
162 mt76x02_dfs_init_detector(dev);
163
164 wiphy->reg_notifier = mt76x02_regd_notifier;
165 wiphy->iface_combinations = mt76x02_if_comb;
166 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02_if_comb);
167
168
169 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
170 dev->mt76.led_cdev.brightness_set =
171 mt76x02_led_set_brightness;
172 dev->mt76.led_cdev.blink_set = mt76x02_led_set_blink;
173 }
174 }
175
176 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
177
178 hw->sta_data_size = sizeof(struct mt76x02_sta);
179 hw->vif_data_size = sizeof(struct mt76x02_vif);
180
181 ieee80211_hw_set(hw, SUPPORTS_HT_CCK_RATES);
182 ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
183 ieee80211_hw_set(hw, NEEDS_UNIQUE_STA_ADDR);
184
185 dev->mt76.global_wcid.idx = 255;
186 dev->mt76.global_wcid.hw_key_idx = -1;
187 dev->slottime = 9;
188
189 if (is_mt76x2(dev)) {
190 dev->mphy.sband_2g.sband.ht_cap.cap |=
191 IEEE80211_HT_CAP_LDPC_CODING;
192 dev->mphy.sband_5g.sband.ht_cap.cap |=
193 IEEE80211_HT_CAP_LDPC_CODING;
194 dev->mphy.chainmask = 0x202;
195 dev->mphy.antenna_mask = 3;
196 } else {
197 dev->mphy.chainmask = 0x101;
198 dev->mphy.antenna_mask = 1;
199 }
200
201 return 0;
202}
203EXPORT_SYMBOL_GPL(mt76x02_init_device);
204
205void mt76x02_configure_filter(struct ieee80211_hw *hw,
206 unsigned int changed_flags,
207 unsigned int *total_flags, u64 multicast)
208{
209 struct mt76x02_dev *dev = hw->priv;
210 u32 flags = 0;
211
212#define MT76_FILTER(_flag, _hw) do { \
213 flags |= *total_flags & FIF_##_flag; \
214 dev->mt76.rxfilter &= ~(_hw); \
215 dev->mt76.rxfilter |= !(flags & FIF_##_flag) * (_hw); \
216 } while (0)
217
218 mutex_lock(&dev->mt76.mutex);
219
220 dev->mt76.rxfilter &= ~MT_RX_FILTR_CFG_OTHER_BSS;
221
222 MT76_FILTER(FCSFAIL, MT_RX_FILTR_CFG_CRC_ERR);
223 MT76_FILTER(PLCPFAIL, MT_RX_FILTR_CFG_PHY_ERR);
224 MT76_FILTER(CONTROL, MT_RX_FILTR_CFG_ACK |
225 MT_RX_FILTR_CFG_CTS |
226 MT_RX_FILTR_CFG_CFEND |
227 MT_RX_FILTR_CFG_CFACK |
228 MT_RX_FILTR_CFG_BA |
229 MT_RX_FILTR_CFG_CTRL_RSV);
230 MT76_FILTER(PSPOLL, MT_RX_FILTR_CFG_PSPOLL);
231
232 *total_flags = flags;
233 mt76_wr(dev, MT_RX_FILTR_CFG, dev->mt76.rxfilter);
234
235 mutex_unlock(&dev->mt76.mutex);
236}
237EXPORT_SYMBOL_GPL(mt76x02_configure_filter);
238
239int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
240 struct ieee80211_sta *sta)
241{
242 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
243 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
244 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
245 int idx = 0;
246
247 memset(msta, 0, sizeof(*msta));
248
249 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT76x02_N_WCIDS);
250 if (idx < 0)
251 return -ENOSPC;
252
253 msta->vif = mvif;
254 msta->wcid.sta = 1;
255 msta->wcid.idx = idx;
256 msta->wcid.hw_key_idx = -1;
257 mt76x02_mac_wcid_setup(dev, idx, mvif->idx, sta->addr);
258 mt76x02_mac_wcid_set_drop(dev, idx, false);
259 ewma_pktlen_init(&msta->pktlen);
260
261 if (vif->type == NL80211_IFTYPE_AP)
262 set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
263
264 return 0;
265}
266EXPORT_SYMBOL_GPL(mt76x02_sta_add);
267
268void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
269 struct ieee80211_sta *sta)
270{
271 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
272 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
273 int idx = wcid->idx;
274
275 mt76x02_mac_wcid_set_drop(dev, idx, true);
276 mt76x02_mac_wcid_setup(dev, idx, 0, NULL);
277}
278EXPORT_SYMBOL_GPL(mt76x02_sta_remove);
279
280static void
281mt76x02_vif_init(struct mt76x02_dev *dev, struct ieee80211_vif *vif,
282 unsigned int idx)
283{
284 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
285 struct mt76_txq *mtxq;
286
287 memset(mvif, 0, sizeof(*mvif));
288
289 mvif->idx = idx;
290 mvif->group_wcid.idx = MT_VIF_WCID(idx);
291 mvif->group_wcid.hw_key_idx = -1;
292 mt76_packet_id_init(&mvif->group_wcid);
293
294 mtxq = (struct mt76_txq *)vif->txq->drv_priv;
295 mtxq->wcid = &mvif->group_wcid;
296}
297
298int
299mt76x02_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
300{
301 struct mt76x02_dev *dev = hw->priv;
302 unsigned int idx = 0;
303
304
305 if (!dev->mt76.vif_mask &&
306 (((vif->addr[0] ^ dev->mphy.macaddr[0]) & ~GENMASK(4, 1)) ||
307 memcmp(vif->addr + 1, dev->mphy.macaddr + 1, ETH_ALEN - 1)))
308 mt76x02_mac_setaddr(dev, vif->addr);
309
310 if (vif->addr[0] & BIT(1))
311 idx = 1 + (((dev->mphy.macaddr[0] ^ vif->addr[0]) >> 2) & 7);
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326 if (vif->type == NL80211_IFTYPE_STATION)
327 idx += 8;
328
329
330 if (dev->mt76.vif_mask & BIT(idx) ||
331 (vif->type != NL80211_IFTYPE_STATION && idx > 7))
332 return -EBUSY;
333
334 dev->mt76.vif_mask |= BIT(idx);
335
336 mt76x02_vif_init(dev, vif, idx);
337 return 0;
338}
339EXPORT_SYMBOL_GPL(mt76x02_add_interface);
340
341void mt76x02_remove_interface(struct ieee80211_hw *hw,
342 struct ieee80211_vif *vif)
343{
344 struct mt76x02_dev *dev = hw->priv;
345 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
346
347 dev->mt76.vif_mask &= ~BIT(mvif->idx);
348 mt76_packet_id_flush(&dev->mt76, &mvif->group_wcid);
349}
350EXPORT_SYMBOL_GPL(mt76x02_remove_interface);
351
352int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
353 struct ieee80211_ampdu_params *params)
354{
355 enum ieee80211_ampdu_mlme_action action = params->action;
356 struct ieee80211_sta *sta = params->sta;
357 struct mt76x02_dev *dev = hw->priv;
358 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
359 struct ieee80211_txq *txq = sta->txq[params->tid];
360 u16 tid = params->tid;
361 u16 ssn = params->ssn;
362 struct mt76_txq *mtxq;
363 int ret = 0;
364
365 if (!txq)
366 return -EINVAL;
367
368 mtxq = (struct mt76_txq *)txq->drv_priv;
369
370 mutex_lock(&dev->mt76.mutex);
371 switch (action) {
372 case IEEE80211_AMPDU_RX_START:
373 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid,
374 ssn, params->buf_size);
375 mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, BIT(16 + tid));
376 break;
377 case IEEE80211_AMPDU_RX_STOP:
378 mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
379 mt76_clear(dev, MT_WCID_ADDR(msta->wcid.idx) + 4,
380 BIT(16 + tid));
381 break;
382 case IEEE80211_AMPDU_TX_OPERATIONAL:
383 mtxq->aggr = true;
384 mtxq->send_bar = false;
385 ieee80211_send_bar(vif, sta->addr, tid, mtxq->agg_ssn);
386 break;
387 case IEEE80211_AMPDU_TX_STOP_FLUSH:
388 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
389 mtxq->aggr = false;
390 break;
391 case IEEE80211_AMPDU_TX_START:
392 mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
393 ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
394 break;
395 case IEEE80211_AMPDU_TX_STOP_CONT:
396 mtxq->aggr = false;
397 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
398 break;
399 }
400 mutex_unlock(&dev->mt76.mutex);
401
402 return ret;
403}
404EXPORT_SYMBOL_GPL(mt76x02_ampdu_action);
405
406int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
407 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
408 struct ieee80211_key_conf *key)
409{
410 struct mt76x02_dev *dev = hw->priv;
411 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
412 struct mt76x02_sta *msta;
413 struct mt76_wcid *wcid;
414 int idx = key->keyidx;
415 int ret;
416
417
418 switch (key->cipher) {
419 case WLAN_CIPHER_SUITE_WEP40:
420 case WLAN_CIPHER_SUITE_WEP104:
421 case WLAN_CIPHER_SUITE_TKIP:
422 case WLAN_CIPHER_SUITE_CCMP:
423 break;
424 default:
425 return -EOPNOTSUPP;
426 }
427
428
429
430
431
432 if ((vif->type == NL80211_IFTYPE_ADHOC ||
433 vif->type == NL80211_IFTYPE_MESH_POINT) &&
434 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
435 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
436 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
437 return -EOPNOTSUPP;
438
439
440
441
442
443
444 if (mt76_is_usb(&dev->mt76) &&
445 vif->type == NL80211_IFTYPE_AP &&
446 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
447 return -EOPNOTSUPP;
448
449
450 if (is_mt76x0(dev) && !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
451 return -EOPNOTSUPP;
452
453 msta = sta ? (struct mt76x02_sta *)sta->drv_priv : NULL;
454 wcid = msta ? &msta->wcid : &mvif->group_wcid;
455
456 if (cmd == SET_KEY) {
457 key->hw_key_idx = wcid->idx;
458 wcid->hw_key_idx = idx;
459 if (key->flags & IEEE80211_KEY_FLAG_RX_MGMT) {
460 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
461 wcid->sw_iv = true;
462 }
463 } else {
464 if (idx == wcid->hw_key_idx) {
465 wcid->hw_key_idx = -1;
466 wcid->sw_iv = false;
467 }
468
469 key = NULL;
470 }
471 mt76_wcid_key_setup(&dev->mt76, wcid, key);
472
473 if (!msta) {
474 if (key || wcid->hw_key_idx == idx) {
475 ret = mt76x02_mac_wcid_set_key(dev, wcid->idx, key);
476 if (ret)
477 return ret;
478 }
479
480 return mt76x02_mac_shared_key_setup(dev, mvif->idx, idx, key);
481 }
482
483 return mt76x02_mac_wcid_set_key(dev, msta->wcid.idx, key);
484}
485EXPORT_SYMBOL_GPL(mt76x02_set_key);
486
487int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
488 u16 queue, const struct ieee80211_tx_queue_params *params)
489{
490 struct mt76x02_dev *dev = hw->priv;
491 u8 cw_min = 5, cw_max = 10, qid;
492 u32 val;
493
494 qid = dev->mphy.q_tx[queue]->hw_idx;
495
496 if (params->cw_min)
497 cw_min = fls(params->cw_min);
498 if (params->cw_max)
499 cw_max = fls(params->cw_max);
500
501 val = FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop) |
502 FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) |
503 FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) |
504 FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max);
505 mt76_wr(dev, MT_EDCA_CFG_AC(qid), val);
506
507 val = mt76_rr(dev, MT_WMM_TXOP(qid));
508 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(qid));
509 val |= params->txop << MT_WMM_TXOP_SHIFT(qid);
510 mt76_wr(dev, MT_WMM_TXOP(qid), val);
511
512 val = mt76_rr(dev, MT_WMM_AIFSN);
513 val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(qid));
514 val |= params->aifs << MT_WMM_AIFSN_SHIFT(qid);
515 mt76_wr(dev, MT_WMM_AIFSN, val);
516
517 val = mt76_rr(dev, MT_WMM_CWMIN);
518 val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(qid));
519 val |= cw_min << MT_WMM_CWMIN_SHIFT(qid);
520 mt76_wr(dev, MT_WMM_CWMIN, val);
521
522 val = mt76_rr(dev, MT_WMM_CWMAX);
523 val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(qid));
524 val |= cw_max << MT_WMM_CWMAX_SHIFT(qid);
525 mt76_wr(dev, MT_WMM_CWMAX, val);
526
527 return 0;
528}
529EXPORT_SYMBOL_GPL(mt76x02_conf_tx);
530
531void mt76x02_set_tx_ackto(struct mt76x02_dev *dev)
532{
533 u8 ackto, sifs, slottime = dev->slottime;
534
535
536 slottime += 3 * dev->coverage_class;
537 mt76_rmw_field(dev, MT_BKOFF_SLOT_CFG,
538 MT_BKOFF_SLOT_CFG_SLOTTIME, slottime);
539
540 sifs = mt76_get_field(dev, MT_XIFS_TIME_CFG,
541 MT_XIFS_TIME_CFG_OFDM_SIFS);
542
543 ackto = slottime + sifs;
544 mt76_rmw_field(dev, MT_TX_TIMEOUT_CFG,
545 MT_TX_TIMEOUT_CFG_ACKTO, ackto);
546}
547EXPORT_SYMBOL_GPL(mt76x02_set_tx_ackto);
548
549void mt76x02_set_coverage_class(struct ieee80211_hw *hw,
550 s16 coverage_class)
551{
552 struct mt76x02_dev *dev = hw->priv;
553
554 mutex_lock(&dev->mt76.mutex);
555 dev->coverage_class = max_t(s16, coverage_class, 0);
556 mt76x02_set_tx_ackto(dev);
557 mutex_unlock(&dev->mt76.mutex);
558}
559EXPORT_SYMBOL_GPL(mt76x02_set_coverage_class);
560
561int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val)
562{
563 struct mt76x02_dev *dev = hw->priv;
564
565 if (val != ~0 && val > 0xffff)
566 return -EINVAL;
567
568 mutex_lock(&dev->mt76.mutex);
569 mt76x02_mac_set_rts_thresh(dev, val);
570 mutex_unlock(&dev->mt76.mutex);
571
572 return 0;
573}
574EXPORT_SYMBOL_GPL(mt76x02_set_rts_threshold);
575
576void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
577 struct ieee80211_vif *vif,
578 struct ieee80211_sta *sta)
579{
580 struct mt76x02_dev *dev = hw->priv;
581 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
582 struct ieee80211_sta_rates *rates = rcu_dereference(sta->rates);
583 struct ieee80211_tx_rate rate = {};
584
585 if (!rates)
586 return;
587
588 rate.idx = rates->rate[0].idx;
589 rate.flags = rates->rate[0].flags;
590 mt76x02_mac_wcid_set_rate(dev, &msta->wcid, &rate);
591}
592EXPORT_SYMBOL_GPL(mt76x02_sta_rate_tbl_update);
593
594void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len)
595{
596 int hdrlen;
597
598 if (!len)
599 return;
600
601 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
602 memmove(skb->data + len, skb->data, hdrlen);
603 skb_pull(skb, len);
604}
605EXPORT_SYMBOL_GPL(mt76x02_remove_hdr_pad);
606
607void mt76x02_sw_scan_complete(struct ieee80211_hw *hw,
608 struct ieee80211_vif *vif)
609{
610 struct mt76x02_dev *dev = hw->priv;
611
612 clear_bit(MT76_SCANNING, &dev->mphy.state);
613 if (dev->cal.gain_init_done) {
614
615 dev->cal.low_gain = -1;
616 ieee80211_queue_delayed_work(hw, &dev->cal_work, 0);
617 }
618}
619EXPORT_SYMBOL_GPL(mt76x02_sw_scan_complete);
620
621void mt76x02_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta,
622 bool ps)
623{
624 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
625 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
626 int idx = msta->wcid.idx;
627
628 mt76_stop_tx_queues(&dev->mphy, sta, true);
629 if (mt76_is_mmio(mdev))
630 mt76x02_mac_wcid_set_drop(dev, idx, ps);
631}
632EXPORT_SYMBOL_GPL(mt76x02_sta_ps);
633
634void mt76x02_bss_info_changed(struct ieee80211_hw *hw,
635 struct ieee80211_vif *vif,
636 struct ieee80211_bss_conf *info,
637 u32 changed)
638{
639 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
640 struct mt76x02_dev *dev = hw->priv;
641
642 mutex_lock(&dev->mt76.mutex);
643
644 if (changed & BSS_CHANGED_BSSID)
645 mt76x02_mac_set_bssid(dev, mvif->idx, info->bssid);
646
647 if (changed & BSS_CHANGED_HT || changed & BSS_CHANGED_ERP_CTS_PROT)
648 mt76x02_mac_set_tx_protection(dev, info->use_cts_prot,
649 info->ht_operation_mode);
650
651 if (changed & BSS_CHANGED_BEACON_INT) {
652 mt76_rmw_field(dev, MT_BEACON_TIME_CFG,
653 MT_BEACON_TIME_CFG_INTVAL,
654 info->beacon_int << 4);
655 dev->mt76.beacon_int = info->beacon_int;
656 }
657
658 if (changed & BSS_CHANGED_BEACON_ENABLED)
659 mt76x02_mac_set_beacon_enable(dev, vif, info->enable_beacon);
660
661 if (changed & BSS_CHANGED_ERP_PREAMBLE)
662 mt76x02_mac_set_short_preamble(dev, info->use_short_preamble);
663
664 if (changed & BSS_CHANGED_ERP_SLOT) {
665 int slottime = info->use_short_slot ? 9 : 20;
666
667 dev->slottime = slottime;
668 mt76x02_set_tx_ackto(dev);
669 }
670
671 mutex_unlock(&dev->mt76.mutex);
672}
673EXPORT_SYMBOL_GPL(mt76x02_bss_info_changed);
674
675void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev)
676{
677 struct ieee80211_hw *hw = mt76_hw(dev);
678 struct wiphy *wiphy = hw->wiphy;
679 int i;
680
681 for (i = 0; i < ARRAY_SIZE(dev->macaddr_list); i++) {
682 u8 *addr = dev->macaddr_list[i].addr;
683
684 memcpy(addr, dev->mphy.macaddr, ETH_ALEN);
685
686 if (!i)
687 continue;
688
689 addr[0] |= BIT(1);
690 addr[0] ^= ((i - 1) << 2);
691 }
692 wiphy->addresses = dev->macaddr_list;
693 wiphy->n_addresses = ARRAY_SIZE(dev->macaddr_list);
694}
695EXPORT_SYMBOL_GPL(mt76x02_config_mac_addr_list);
696
697MODULE_LICENSE("Dual BSD/GPL");
698
