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12#include <linux/blkdev.h>
13#include <linux/kthread.h>
14#include <linux/sched.h>
15#include <linux/vmalloc.h>
16
17#include "rtsx.h"
18#include "ms.h"
19
20static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
21{
22 struct ms_info *ms_card = &chip->ms_card;
23
24 ms_card->err_code = err_code;
25}
26
27static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
28{
29 struct ms_info *ms_card = &chip->ms_card;
30
31 return (ms_card->err_code == err_code);
32}
33
34static int ms_parse_err_code(struct rtsx_chip *chip)
35{
36 return STATUS_FAIL;
37}
38
39static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
40 u8 tpc, u8 cnt, u8 cfg)
41{
42 struct ms_info *ms_card = &chip->ms_card;
43 int retval;
44 u8 *ptr;
45
46 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
47
48 rtsx_init_cmd(chip);
49
50 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
51 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
52 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
53 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
54 0x01, PINGPONG_BUFFER);
55
56 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
57 0xFF, MS_TRANSFER_START | trans_mode);
58 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
59 MS_TRANSFER_END, MS_TRANSFER_END);
60
61 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
62
63 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
64 if (retval < 0) {
65 rtsx_clear_ms_error(chip);
66 ms_set_err_code(chip, MS_TO_ERROR);
67 return ms_parse_err_code(chip);
68 }
69
70 ptr = rtsx_get_cmd_data(chip) + 1;
71
72 if (!(tpc & 0x08)) {
73 if (*ptr & MS_CRC16_ERR) {
74 ms_set_err_code(chip, MS_CRC16_ERROR);
75 return ms_parse_err_code(chip);
76 }
77 } else {
78 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
79 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
80 ms_set_err_code(chip, MS_CMD_NK);
81 return ms_parse_err_code(chip);
82 }
83 }
84 }
85
86 if (*ptr & MS_RDY_TIMEOUT) {
87 rtsx_clear_ms_error(chip);
88 ms_set_err_code(chip, MS_TO_ERROR);
89 return ms_parse_err_code(chip);
90 }
91
92 return STATUS_SUCCESS;
93}
94
95static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
96 u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
97 int use_sg, void *buf, int buf_len)
98{
99 int retval;
100 u8 val, err_code = 0;
101 enum dma_data_direction dir;
102
103 if (!buf || !buf_len)
104 return STATUS_FAIL;
105
106 if (trans_mode == MS_TM_AUTO_READ) {
107 dir = DMA_FROM_DEVICE;
108 err_code = MS_FLASH_READ_ERROR;
109 } else if (trans_mode == MS_TM_AUTO_WRITE) {
110 dir = DMA_TO_DEVICE;
111 err_code = MS_FLASH_WRITE_ERROR;
112 } else {
113 return STATUS_FAIL;
114 }
115
116 rtsx_init_cmd(chip);
117
118 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
119 rtsx_add_cmd(chip, WRITE_REG_CMD,
120 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
121 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
122 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
123
124 if (mode_2k) {
125 rtsx_add_cmd(chip, WRITE_REG_CMD,
126 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
127 } else {
128 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
129 }
130
131 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
132
133 rtsx_add_cmd(chip, WRITE_REG_CMD,
134 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
135 rtsx_add_cmd(chip, CHECK_REG_CMD,
136 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
137
138 rtsx_send_cmd_no_wait(chip);
139
140 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
141 use_sg, dir, chip->mspro_timeout);
142 if (retval < 0) {
143 ms_set_err_code(chip, err_code);
144 if (retval == -ETIMEDOUT)
145 retval = STATUS_TIMEDOUT;
146 else
147 retval = STATUS_FAIL;
148
149 return retval;
150 }
151
152 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
153 if (retval)
154 return retval;
155
156 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT))
157 return STATUS_FAIL;
158
159 return STATUS_SUCCESS;
160}
161
162static int ms_write_bytes(struct rtsx_chip *chip,
163 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
164{
165 struct ms_info *ms_card = &chip->ms_card;
166 int retval, i;
167
168 if (!data || data_len < cnt)
169 return STATUS_ERROR;
170
171 rtsx_init_cmd(chip);
172
173 for (i = 0; i < cnt; i++) {
174 rtsx_add_cmd(chip, WRITE_REG_CMD,
175 PPBUF_BASE2 + i, 0xFF, data[i]);
176 }
177 if (cnt % 2)
178 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
179
180 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
181 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
182 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
183 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
184 0x01, PINGPONG_BUFFER);
185
186 rtsx_add_cmd(chip, WRITE_REG_CMD,
187 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
188 rtsx_add_cmd(chip, CHECK_REG_CMD,
189 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
190
191 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
192 if (retval < 0) {
193 u8 val = 0;
194
195 rtsx_read_register(chip, MS_TRANS_CFG, &val);
196 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
197
198 rtsx_clear_ms_error(chip);
199
200 if (!(tpc & 0x08)) {
201 if (val & MS_CRC16_ERR) {
202 ms_set_err_code(chip, MS_CRC16_ERROR);
203 return ms_parse_err_code(chip);
204 }
205 } else {
206 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
207 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
208 ms_set_err_code(chip, MS_CMD_NK);
209 return ms_parse_err_code(chip);
210 }
211 }
212 }
213
214 if (val & MS_RDY_TIMEOUT) {
215 ms_set_err_code(chip, MS_TO_ERROR);
216 return ms_parse_err_code(chip);
217 }
218
219 ms_set_err_code(chip, MS_TO_ERROR);
220 return ms_parse_err_code(chip);
221 }
222
223 return STATUS_SUCCESS;
224}
225
226static int ms_read_bytes(struct rtsx_chip *chip,
227 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
228{
229 struct ms_info *ms_card = &chip->ms_card;
230 int retval, i;
231 u8 *ptr;
232
233 if (!data)
234 return STATUS_ERROR;
235
236 rtsx_init_cmd(chip);
237
238 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
239 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
240 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
241 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
242 0x01, PINGPONG_BUFFER);
243
244 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
245 MS_TRANSFER_START | MS_TM_READ_BYTES);
246 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
247 MS_TRANSFER_END, MS_TRANSFER_END);
248
249 for (i = 0; i < data_len - 1; i++)
250 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
251
252 if (data_len % 2)
253 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
254 else
255 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
256 0, 0);
257
258 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
259 if (retval < 0) {
260 u8 val = 0;
261
262 rtsx_read_register(chip, MS_TRANS_CFG, &val);
263 rtsx_clear_ms_error(chip);
264
265 if (!(tpc & 0x08)) {
266 if (val & MS_CRC16_ERR) {
267 ms_set_err_code(chip, MS_CRC16_ERROR);
268 return ms_parse_err_code(chip);
269 }
270 } else {
271 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
272 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
273 ms_set_err_code(chip, MS_CMD_NK);
274 return ms_parse_err_code(chip);
275 }
276 }
277 }
278
279 if (val & MS_RDY_TIMEOUT) {
280 ms_set_err_code(chip, MS_TO_ERROR);
281 return ms_parse_err_code(chip);
282 }
283
284 ms_set_err_code(chip, MS_TO_ERROR);
285 return ms_parse_err_code(chip);
286 }
287
288 ptr = rtsx_get_cmd_data(chip) + 1;
289
290 for (i = 0; i < data_len; i++)
291 data[i] = ptr[i];
292
293 if (tpc == PRO_READ_SHORT_DATA && data_len == 8) {
294 dev_dbg(rtsx_dev(chip), "Read format progress:\n");
295 print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
296 cnt);
297 }
298
299 return STATUS_SUCCESS;
300}
301
302static int ms_set_rw_reg_addr(struct rtsx_chip *chip, u8 read_start,
303 u8 read_cnt, u8 write_start, u8 write_cnt)
304{
305 int retval, i;
306 u8 data[4];
307
308 data[0] = read_start;
309 data[1] = read_cnt;
310 data[2] = write_start;
311 data[3] = write_cnt;
312
313 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
314 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
315 NO_WAIT_INT, data, 4);
316 if (retval == STATUS_SUCCESS)
317 return STATUS_SUCCESS;
318 rtsx_clear_ms_error(chip);
319 }
320
321 return STATUS_FAIL;
322}
323
324static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
325{
326 u8 data[2];
327
328 data[0] = cmd;
329 data[1] = 0;
330
331 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
332}
333
334static int ms_set_init_para(struct rtsx_chip *chip)
335{
336 struct ms_info *ms_card = &chip->ms_card;
337 int retval;
338
339 if (CHK_HG8BIT(ms_card)) {
340 if (chip->asic_code)
341 ms_card->ms_clock = chip->asic_ms_hg_clk;
342 else
343 ms_card->ms_clock = chip->fpga_ms_hg_clk;
344
345 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
346 if (chip->asic_code)
347 ms_card->ms_clock = chip->asic_ms_4bit_clk;
348 else
349 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
350
351 } else {
352 if (chip->asic_code)
353 ms_card->ms_clock = chip->asic_ms_1bit_clk;
354 else
355 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
356 }
357
358 retval = switch_clock(chip, ms_card->ms_clock);
359 if (retval != STATUS_SUCCESS)
360 return STATUS_FAIL;
361
362 retval = select_card(chip, MS_CARD);
363 if (retval != STATUS_SUCCESS)
364 return STATUS_FAIL;
365
366 return STATUS_SUCCESS;
367}
368
369static int ms_switch_clock(struct rtsx_chip *chip)
370{
371 struct ms_info *ms_card = &chip->ms_card;
372 int retval;
373
374 retval = select_card(chip, MS_CARD);
375 if (retval != STATUS_SUCCESS)
376 return STATUS_FAIL;
377
378 retval = switch_clock(chip, ms_card->ms_clock);
379 if (retval != STATUS_SUCCESS)
380 return STATUS_FAIL;
381
382 return STATUS_SUCCESS;
383}
384
385static int ms_pull_ctl_disable(struct rtsx_chip *chip)
386{
387 int retval;
388
389 if (CHECK_PID(chip, 0x5208)) {
390 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
391 MS_D1_PD | MS_D2_PD | MS_CLK_PD |
392 MS_D6_PD);
393 if (retval)
394 return retval;
395
396 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
397 MS_D3_PD | MS_D0_PD | MS_BS_PD |
398 XD_D4_PD);
399 if (retval)
400 return retval;
401
402 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
403 MS_D7_PD | XD_CE_PD | XD_CLE_PD |
404 XD_CD_PU);
405 if (retval)
406 return retval;
407
408 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
409 XD_RDY_PD | SD_D3_PD | SD_D2_PD |
410 XD_ALE_PD);
411 if (retval)
412 return retval;
413
414 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
415 MS_INS_PU | SD_WP_PD | SD_CD_PU |
416 SD_CMD_PD);
417 if (retval)
418 return retval;
419
420 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
421 MS_D5_PD | MS_D4_PD);
422 if (retval)
423 return retval;
424
425 } else if (CHECK_PID(chip, 0x5288)) {
426 if (CHECK_BARO_PKG(chip, QFN)) {
427 retval = rtsx_write_register(chip, CARD_PULL_CTL1,
428 0xFF, 0x55);
429 if (retval)
430 return retval;
431
432 retval = rtsx_write_register(chip, CARD_PULL_CTL2,
433 0xFF, 0x55);
434 if (retval)
435 return retval;
436
437 retval = rtsx_write_register(chip, CARD_PULL_CTL3,
438 0xFF, 0x4B);
439 if (retval)
440 return retval;
441
442 retval = rtsx_write_register(chip, CARD_PULL_CTL4,
443 0xFF, 0x69);
444 if (retval)
445 return retval;
446 }
447 }
448
449 return STATUS_SUCCESS;
450}
451
452static int ms_pull_ctl_enable(struct rtsx_chip *chip)
453{
454 int retval;
455
456 rtsx_init_cmd(chip);
457
458 if (CHECK_PID(chip, 0x5208)) {
459 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
460 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
461 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
462 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
463 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
464 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
465 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
466 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
467 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
468 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
469 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
470 MS_D5_PD | MS_D4_PD);
471 } else if (CHECK_PID(chip, 0x5288)) {
472 if (CHECK_BARO_PKG(chip, QFN)) {
473 rtsx_add_cmd(chip, WRITE_REG_CMD,
474 CARD_PULL_CTL1, 0xFF, 0x55);
475 rtsx_add_cmd(chip, WRITE_REG_CMD,
476 CARD_PULL_CTL2, 0xFF, 0x45);
477 rtsx_add_cmd(chip, WRITE_REG_CMD,
478 CARD_PULL_CTL3, 0xFF, 0x4B);
479 rtsx_add_cmd(chip, WRITE_REG_CMD,
480 CARD_PULL_CTL4, 0xFF, 0x29);
481 }
482 }
483
484 retval = rtsx_send_cmd(chip, MS_CARD, 100);
485 if (retval < 0)
486 return STATUS_FAIL;
487
488 return STATUS_SUCCESS;
489}
490
491static int ms_prepare_reset(struct rtsx_chip *chip)
492{
493 struct ms_info *ms_card = &chip->ms_card;
494 int retval;
495 u8 oc_mask = 0;
496
497 ms_card->ms_type = 0;
498 ms_card->check_ms_flow = 0;
499 ms_card->switch_8bit_fail = 0;
500 ms_card->delay_write.delay_write_flag = 0;
501
502 ms_card->pro_under_formatting = 0;
503
504 retval = ms_power_off_card3v3(chip);
505 if (retval != STATUS_SUCCESS)
506 return STATUS_FAIL;
507
508 if (!chip->ft2_fast_mode)
509 wait_timeout(250);
510
511 retval = enable_card_clock(chip, MS_CARD);
512 if (retval != STATUS_SUCCESS)
513 return STATUS_FAIL;
514
515 if (chip->asic_code) {
516 retval = ms_pull_ctl_enable(chip);
517 if (retval != STATUS_SUCCESS)
518 return STATUS_FAIL;
519 } else {
520 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
521 FPGA_MS_PULL_CTL_BIT | 0x20, 0);
522 if (retval)
523 return retval;
524 }
525
526 if (!chip->ft2_fast_mode) {
527 retval = card_power_on(chip, MS_CARD);
528 if (retval != STATUS_SUCCESS)
529 return STATUS_FAIL;
530
531 wait_timeout(150);
532
533#ifdef SUPPORT_OCP
534 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
535 oc_mask = MS_OC_NOW | MS_OC_EVER;
536 else
537 oc_mask = SD_OC_NOW | SD_OC_EVER;
538
539 if (chip->ocp_stat & oc_mask) {
540 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
541 chip->ocp_stat);
542 return STATUS_FAIL;
543 }
544#endif
545 }
546
547 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
548 MS_OUTPUT_EN);
549 if (retval)
550 return retval;
551
552 if (chip->asic_code) {
553 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
554 SAMPLE_TIME_RISING |
555 PUSH_TIME_DEFAULT |
556 NO_EXTEND_TOGGLE |
557 MS_BUS_WIDTH_1);
558 if (retval)
559 return retval;
560
561 } else {
562 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
563 SAMPLE_TIME_FALLING |
564 PUSH_TIME_DEFAULT |
565 NO_EXTEND_TOGGLE |
566 MS_BUS_WIDTH_1);
567 if (retval)
568 return retval;
569 }
570 retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
571 NO_WAIT_INT | NO_AUTO_READ_INT_REG);
572 if (retval)
573 return retval;
574
575 retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
576 MS_STOP | MS_CLR_ERR);
577 if (retval)
578 return retval;
579
580 retval = ms_set_init_para(chip);
581 if (retval != STATUS_SUCCESS)
582 return STATUS_FAIL;
583
584 return STATUS_SUCCESS;
585}
586
587static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
588{
589 struct ms_info *ms_card = &chip->ms_card;
590 int retval, i;
591 u8 val;
592
593 retval = ms_set_rw_reg_addr(chip, PRO_STATUS_REG, 6, SYSTEM_PARAM, 1);
594 if (retval != STATUS_SUCCESS)
595 return STATUS_FAIL;
596
597 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
598 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
599 6, NO_WAIT_INT);
600 if (retval == STATUS_SUCCESS)
601 break;
602 }
603 if (i == MS_MAX_RETRY_COUNT)
604 return STATUS_FAIL;
605
606 retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
607 if (retval)
608 return retval;
609
610 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
611 if (val != 0x01) {
612 if (val != 0x02)
613 ms_card->check_ms_flow = 1;
614
615 return STATUS_FAIL;
616 }
617
618 retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
619 if (retval)
620 return retval;
621
622 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
623 if (val != 0) {
624 ms_card->check_ms_flow = 1;
625 return STATUS_FAIL;
626 }
627
628 retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
629 if (retval)
630 return retval;
631
632 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
633 if (val == 0) {
634 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
635 if (retval)
636 return retval;
637
638 if (val & WRT_PRTCT)
639 chip->card_wp |= MS_CARD;
640 else
641 chip->card_wp &= ~MS_CARD;
642
643 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
644 chip->card_wp |= MS_CARD;
645 } else {
646 ms_card->check_ms_flow = 1;
647 return STATUS_FAIL;
648 }
649
650 ms_card->ms_type |= TYPE_MSPRO;
651
652 retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
653 if (retval)
654 return retval;
655
656 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
657 if (val == 0) {
658 ms_card->ms_type &= 0x0F;
659 } else if (val == 7) {
660 if (switch_8bit_bus)
661 ms_card->ms_type |= MS_HG;
662 else
663 ms_card->ms_type &= 0x0F;
664
665 } else {
666 return STATUS_FAIL;
667 }
668
669 return STATUS_SUCCESS;
670}
671
672static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
673{
674 int retval, i, k;
675 u8 val;
676
677
678 k = 0;
679 do {
680 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
681 ms_set_err_code(chip, MS_NO_CARD);
682 return STATUS_FAIL;
683 }
684
685 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
686 retval = ms_read_bytes(chip, GET_INT, 1,
687 NO_WAIT_INT, &val, 1);
688 if (retval == STATUS_SUCCESS)
689 break;
690 }
691 if (i == MS_MAX_RETRY_COUNT)
692 return STATUS_FAIL;
693
694 if (k > 100)
695 return STATUS_FAIL;
696
697 k++;
698 wait_timeout(100);
699 } while (!(val & INT_REG_CED));
700
701 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
702 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
703 if (retval == STATUS_SUCCESS)
704 break;
705 }
706 if (i == MS_MAX_RETRY_COUNT)
707 return STATUS_FAIL;
708
709 if (val & INT_REG_ERR) {
710 if (val & INT_REG_CMDNK)
711 chip->card_wp |= (MS_CARD);
712 else
713 return STATUS_FAIL;
714 }
715
716
717 return STATUS_SUCCESS;
718}
719
720static int ms_switch_parallel_bus(struct rtsx_chip *chip)
721{
722 int retval, i;
723 u8 data[2];
724
725 data[0] = PARALLEL_4BIT_IF;
726 data[1] = 0;
727 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
728 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
729 data, 2);
730 if (retval == STATUS_SUCCESS)
731 break;
732 }
733 if (retval != STATUS_SUCCESS)
734 return STATUS_FAIL;
735
736 return STATUS_SUCCESS;
737}
738
739static int ms_switch_8bit_bus(struct rtsx_chip *chip)
740{
741 struct ms_info *ms_card = &chip->ms_card;
742 int retval, i;
743 u8 data[2];
744
745 data[0] = PARALLEL_8BIT_IF;
746 data[1] = 0;
747 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
748 retval = ms_write_bytes(chip, WRITE_REG, 1,
749 NO_WAIT_INT, data, 2);
750 if (retval == STATUS_SUCCESS)
751 break;
752 }
753 if (retval != STATUS_SUCCESS)
754 return STATUS_FAIL;
755
756 retval = rtsx_write_register(chip, MS_CFG, 0x98,
757 MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
758 if (retval)
759 return retval;
760
761 ms_card->ms_type |= MS_8BIT;
762 retval = ms_set_init_para(chip);
763 if (retval != STATUS_SUCCESS)
764 return STATUS_FAIL;
765
766 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
767 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
768 1, NO_WAIT_INT);
769 if (retval != STATUS_SUCCESS)
770 return STATUS_FAIL;
771 }
772
773 return STATUS_SUCCESS;
774}
775
776static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
777{
778 struct ms_info *ms_card = &chip->ms_card;
779 int retval, i;
780
781 for (i = 0; i < 3; i++) {
782 retval = ms_prepare_reset(chip);
783 if (retval != STATUS_SUCCESS)
784 return STATUS_FAIL;
785
786 retval = ms_identify_media_type(chip, switch_8bit_bus);
787 if (retval != STATUS_SUCCESS)
788 return STATUS_FAIL;
789
790 retval = ms_confirm_cpu_startup(chip);
791 if (retval != STATUS_SUCCESS)
792 return STATUS_FAIL;
793
794 retval = ms_switch_parallel_bus(chip);
795 if (retval != STATUS_SUCCESS) {
796 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
797 ms_set_err_code(chip, MS_NO_CARD);
798 return STATUS_FAIL;
799 }
800 continue;
801 } else {
802 break;
803 }
804 }
805
806 if (retval != STATUS_SUCCESS)
807 return STATUS_FAIL;
808
809
810 retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
811 if (retval)
812 return retval;
813
814 retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
815 PUSH_TIME_ODD);
816 if (retval)
817 return retval;
818
819 retval = ms_set_init_para(chip);
820 if (retval != STATUS_SUCCESS)
821 return STATUS_FAIL;
822
823
824 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
825 retval = ms_switch_8bit_bus(chip);
826 if (retval != STATUS_SUCCESS) {
827 ms_card->switch_8bit_fail = 1;
828 return STATUS_FAIL;
829 }
830 }
831
832 return STATUS_SUCCESS;
833}
834
835#ifdef XC_POWERCLASS
836static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
837{
838 int retval;
839 u8 buf[6];
840
841 ms_cleanup_work(chip);
842
843 retval = ms_set_rw_reg_addr(chip, 0, 0, PRO_DATA_COUNT1, 6);
844 if (retval != STATUS_SUCCESS)
845 return STATUS_FAIL;
846
847 buf[0] = 0;
848 buf[1] = mode;
849 buf[2] = 0;
850 buf[3] = 0;
851 buf[4] = 0;
852 buf[5] = 0;
853
854 retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
855 if (retval != STATUS_SUCCESS)
856 return STATUS_FAIL;
857
858 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
859 if (retval != STATUS_SUCCESS)
860 return STATUS_FAIL;
861
862 retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
863 if (retval)
864 return retval;
865
866 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR))
867 return STATUS_FAIL;
868
869 return STATUS_SUCCESS;
870}
871#endif
872
873static int ms_read_attribute_info(struct rtsx_chip *chip)
874{
875 struct ms_info *ms_card = &chip->ms_card;
876 int retval, i;
877 u8 val, *buf, class_code, device_type, sub_class, data[16];
878 u16 total_blk = 0, blk_size = 0;
879#ifdef SUPPORT_MSXC
880 u32 xc_total_blk = 0, xc_blk_size = 0;
881#endif
882 u32 sys_info_addr = 0, sys_info_size;
883#ifdef SUPPORT_PCGL_1P18
884 u32 model_name_addr = 0, model_name_size;
885 int found_sys_info = 0, found_model_name = 0;
886#endif
887
888 retval = ms_set_rw_reg_addr(chip, PRO_INT_REG, 2, PRO_SYSTEM_PARAM, 7);
889 if (retval != STATUS_SUCCESS)
890 return STATUS_FAIL;
891
892 if (CHK_MS8BIT(ms_card))
893 data[0] = PARALLEL_8BIT_IF;
894 else
895 data[0] = PARALLEL_4BIT_IF;
896
897 data[1] = 0;
898
899 data[2] = 0x40;
900 data[3] = 0;
901 data[4] = 0;
902 data[5] = 0;
903 data[6] = 0;
904 data[7] = 0;
905
906 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
907 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
908 data, 8);
909 if (retval == STATUS_SUCCESS)
910 break;
911 }
912 if (retval != STATUS_SUCCESS)
913 return STATUS_FAIL;
914
915 buf = kmalloc(64 * 512, GFP_KERNEL);
916 if (!buf)
917 return STATUS_ERROR;
918
919 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
920 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
921 if (retval != STATUS_SUCCESS)
922 continue;
923
924 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
925 if (retval != STATUS_SUCCESS) {
926 kfree(buf);
927 return STATUS_FAIL;
928 }
929 if (!(val & MS_INT_BREQ)) {
930 kfree(buf);
931 return STATUS_FAIL;
932 }
933 retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
934 PRO_READ_LONG_DATA, 0x40, WAIT_INT,
935 0, 0, buf, 64 * 512);
936 if (retval == STATUS_SUCCESS)
937 break;
938
939 rtsx_clear_ms_error(chip);
940 }
941 if (retval != STATUS_SUCCESS) {
942 kfree(buf);
943 return STATUS_FAIL;
944 }
945
946 i = 0;
947 do {
948 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
949 if (retval != STATUS_SUCCESS) {
950 kfree(buf);
951 return STATUS_FAIL;
952 }
953
954 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
955 break;
956
957 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
958 PRO_READ_LONG_DATA, 0, WAIT_INT);
959 if (retval != STATUS_SUCCESS) {
960 kfree(buf);
961 return STATUS_FAIL;
962 }
963
964 i++;
965 } while (i < 1024);
966
967 if (buf[0] != 0xa5 && buf[1] != 0xc3) {
968
969 kfree(buf);
970 return STATUS_FAIL;
971 }
972
973 if (buf[4] < 1 || buf[4] > 12) {
974 kfree(buf);
975 return STATUS_FAIL;
976 }
977
978 for (i = 0; i < buf[4]; i++) {
979 int cur_addr_off = 16 + i * 12;
980
981#ifdef SUPPORT_MSXC
982 if (buf[cur_addr_off + 8] == 0x10 ||
983 buf[cur_addr_off + 8] == 0x13) {
984#else
985 if (buf[cur_addr_off + 8] == 0x10) {
986#endif
987 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
988 ((u32)buf[cur_addr_off + 1] << 16) |
989 ((u32)buf[cur_addr_off + 2] << 8) |
990 buf[cur_addr_off + 3];
991 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
992 ((u32)buf[cur_addr_off + 5] << 16) |
993 ((u32)buf[cur_addr_off + 6] << 8) |
994 buf[cur_addr_off + 7];
995 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
996 sys_info_addr, sys_info_size);
997 if (sys_info_size != 96) {
998 kfree(buf);
999 return STATUS_FAIL;
1000 }
1001 if (sys_info_addr < 0x1A0) {
1002 kfree(buf);
1003 return STATUS_FAIL;
1004 }
1005 if ((sys_info_size + sys_info_addr) > 0x8000) {
1006 kfree(buf);
1007 return STATUS_FAIL;
1008 }
1009
1010#ifdef SUPPORT_MSXC
1011 if (buf[cur_addr_off + 8] == 0x13)
1012 ms_card->ms_type |= MS_XC;
1013#endif
1014#ifdef SUPPORT_PCGL_1P18
1015 found_sys_info = 1;
1016#else
1017 break;
1018#endif
1019 }
1020#ifdef SUPPORT_PCGL_1P18
1021 if (buf[cur_addr_off + 8] == 0x15) {
1022 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1023 ((u32)buf[cur_addr_off + 1] << 16) |
1024 ((u32)buf[cur_addr_off + 2] << 8) |
1025 buf[cur_addr_off + 3];
1026 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
1027 ((u32)buf[cur_addr_off + 5] << 16) |
1028 ((u32)buf[cur_addr_off + 6] << 8) |
1029 buf[cur_addr_off + 7];
1030 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
1031 model_name_addr, model_name_size);
1032 if (model_name_size != 48) {
1033 kfree(buf);
1034 return STATUS_FAIL;
1035 }
1036 if (model_name_addr < 0x1A0) {
1037 kfree(buf);
1038 return STATUS_FAIL;
1039 }
1040 if ((model_name_size + model_name_addr) > 0x8000) {
1041 kfree(buf);
1042 return STATUS_FAIL;
1043 }
1044
1045 found_model_name = 1;
1046 }
1047
1048 if (found_sys_info && found_model_name)
1049 break;
1050#endif
1051 }
1052
1053 if (i == buf[4]) {
1054 kfree(buf);
1055 return STATUS_FAIL;
1056 }
1057
1058 class_code = buf[sys_info_addr + 0];
1059 device_type = buf[sys_info_addr + 56];
1060 sub_class = buf[sys_info_addr + 46];
1061#ifdef SUPPORT_MSXC
1062 if (CHK_MSXC(ms_card)) {
1063 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1064 ((u32)buf[sys_info_addr + 7] << 16) |
1065 ((u32)buf[sys_info_addr + 8] << 8) |
1066 buf[sys_info_addr + 9];
1067 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1068 ((u32)buf[sys_info_addr + 33] << 16) |
1069 ((u32)buf[sys_info_addr + 34] << 8) |
1070 buf[sys_info_addr + 35];
1071 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1072 xc_total_blk, xc_blk_size);
1073 } else {
1074 total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1075 buf[sys_info_addr + 7];
1076 blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1077 buf[sys_info_addr + 3];
1078 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1079 total_blk, blk_size);
1080 }
1081#else
1082 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1083 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1084 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1085 total_blk, blk_size);
1086#endif
1087
1088 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1089 class_code, device_type, sub_class);
1090
1091 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1092#ifdef SUPPORT_PCGL_1P18
1093 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1094#endif
1095
1096 kfree(buf);
1097
1098#ifdef SUPPORT_MSXC
1099 if (CHK_MSXC(ms_card)) {
1100 if (class_code != 0x03)
1101 return STATUS_FAIL;
1102 } else {
1103 if (class_code != 0x02)
1104 return STATUS_FAIL;
1105 }
1106#else
1107 if (class_code != 0x02)
1108 return STATUS_FAIL;
1109#endif
1110
1111 if (device_type != 0x00) {
1112 if (device_type == 0x01 || device_type == 0x02 ||
1113 device_type == 0x03) {
1114 chip->card_wp |= MS_CARD;
1115 } else {
1116 return STATUS_FAIL;
1117 }
1118 }
1119
1120 if (sub_class & 0xC0)
1121 return STATUS_FAIL;
1122
1123 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1124 class_code, device_type, sub_class);
1125
1126#ifdef SUPPORT_MSXC
1127 if (CHK_MSXC(ms_card)) {
1128 chip->capacity[chip->card2lun[MS_CARD]] =
1129 ms_card->capacity = xc_total_blk * xc_blk_size;
1130 } else {
1131 chip->capacity[chip->card2lun[MS_CARD]] =
1132 ms_card->capacity = total_blk * blk_size;
1133 }
1134#else
1135 ms_card->capacity = total_blk * blk_size;
1136 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1137#endif
1138
1139 return STATUS_SUCCESS;
1140}
1141
1142#ifdef SUPPORT_MAGIC_GATE
1143static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1144 int type, u8 mg_entry_num);
1145#endif
1146
1147static int reset_ms_pro(struct rtsx_chip *chip)
1148{
1149 struct ms_info *ms_card = &chip->ms_card;
1150 int retval;
1151#ifdef XC_POWERCLASS
1152 u8 change_power_class;
1153
1154 if (chip->ms_power_class_en & 0x02)
1155 change_power_class = 2;
1156 else if (chip->ms_power_class_en & 0x01)
1157 change_power_class = 1;
1158 else
1159 change_power_class = 0;
1160#endif
1161
1162#ifdef XC_POWERCLASS
1163retry:
1164#endif
1165 retval = ms_pro_reset_flow(chip, 1);
1166 if (retval != STATUS_SUCCESS) {
1167 if (ms_card->switch_8bit_fail) {
1168 retval = ms_pro_reset_flow(chip, 0);
1169 if (retval != STATUS_SUCCESS)
1170 return STATUS_FAIL;
1171 } else {
1172 return STATUS_FAIL;
1173 }
1174 }
1175
1176 retval = ms_read_attribute_info(chip);
1177 if (retval != STATUS_SUCCESS)
1178 return STATUS_FAIL;
1179
1180#ifdef XC_POWERCLASS
1181 if (CHK_HG8BIT(ms_card))
1182 change_power_class = 0;
1183
1184 if (change_power_class && CHK_MSXC(ms_card)) {
1185 u8 power_class_en = chip->ms_power_class_en;
1186
1187 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1188 power_class_en);
1189 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1190 change_power_class);
1191
1192 if (change_power_class)
1193 power_class_en &= (1 << (change_power_class - 1));
1194 else
1195 power_class_en = 0;
1196
1197 if (power_class_en) {
1198 u8 power_class_mode =
1199 (ms_card->raw_sys_info[46] & 0x18) >> 3;
1200 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1201 power_class_mode);
1202 if (change_power_class > power_class_mode)
1203 change_power_class = power_class_mode;
1204 if (change_power_class) {
1205 retval = msxc_change_power(chip,
1206 change_power_class);
1207 if (retval != STATUS_SUCCESS) {
1208 change_power_class--;
1209 goto retry;
1210 }
1211 }
1212 }
1213 }
1214#endif
1215
1216#ifdef SUPPORT_MAGIC_GATE
1217 retval = mg_set_tpc_para_sub(chip, 0, 0);
1218 if (retval != STATUS_SUCCESS)
1219 return STATUS_FAIL;
1220#endif
1221
1222 if (CHK_HG8BIT(ms_card))
1223 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1224 else
1225 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1226
1227 return STATUS_SUCCESS;
1228}
1229
1230static int ms_read_status_reg(struct rtsx_chip *chip)
1231{
1232 int retval;
1233 u8 val[2];
1234
1235 retval = ms_set_rw_reg_addr(chip, STATUS_REG0, 2, 0, 0);
1236 if (retval != STATUS_SUCCESS)
1237 return STATUS_FAIL;
1238
1239 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1240 if (retval != STATUS_SUCCESS)
1241 return STATUS_FAIL;
1242
1243 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1244 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1245 return STATUS_FAIL;
1246 }
1247
1248 return STATUS_SUCCESS;
1249}
1250
1251static int ms_read_extra_data(struct rtsx_chip *chip,
1252 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1253{
1254 struct ms_info *ms_card = &chip->ms_card;
1255 int retval, i;
1256 u8 val, data[10];
1257
1258 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1259 SYSTEM_PARAM, 6);
1260 if (retval != STATUS_SUCCESS)
1261 return STATUS_FAIL;
1262
1263 if (CHK_MS4BIT(ms_card)) {
1264
1265 data[0] = 0x88;
1266 } else {
1267
1268 data[0] = 0x80;
1269 }
1270 data[1] = 0;
1271 data[2] = (u8)(block_addr >> 8);
1272 data[3] = (u8)block_addr;
1273 data[4] = 0x40;
1274 data[5] = page_num;
1275
1276 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1277 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1278 data, 6);
1279 if (retval == STATUS_SUCCESS)
1280 break;
1281 }
1282 if (i == MS_MAX_RETRY_COUNT)
1283 return STATUS_FAIL;
1284
1285 ms_set_err_code(chip, MS_NO_ERROR);
1286
1287 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1288 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1289 if (retval == STATUS_SUCCESS)
1290 break;
1291 }
1292 if (i == MS_MAX_RETRY_COUNT)
1293 return STATUS_FAIL;
1294
1295 ms_set_err_code(chip, MS_NO_ERROR);
1296 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1297 if (retval != STATUS_SUCCESS)
1298 return STATUS_FAIL;
1299
1300 if (val & INT_REG_CMDNK) {
1301 ms_set_err_code(chip, MS_CMD_NK);
1302 return STATUS_FAIL;
1303 }
1304 if (val & INT_REG_CED) {
1305 if (val & INT_REG_ERR) {
1306 retval = ms_read_status_reg(chip);
1307 if (retval != STATUS_SUCCESS)
1308 return STATUS_FAIL;
1309
1310 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG,
1311 MS_EXTRA_SIZE, SYSTEM_PARAM,
1312 6);
1313 if (retval != STATUS_SUCCESS)
1314 return STATUS_FAIL;
1315 }
1316 }
1317
1318 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1319 data, MS_EXTRA_SIZE);
1320 if (retval != STATUS_SUCCESS)
1321 return STATUS_FAIL;
1322
1323 if (buf && buf_len) {
1324 if (buf_len > MS_EXTRA_SIZE)
1325 buf_len = MS_EXTRA_SIZE;
1326 memcpy(buf, data, buf_len);
1327 }
1328
1329 return STATUS_SUCCESS;
1330}
1331
1332static int ms_write_extra_data(struct rtsx_chip *chip, u16 block_addr,
1333 u8 page_num, u8 *buf, int buf_len)
1334{
1335 struct ms_info *ms_card = &chip->ms_card;
1336 int retval, i;
1337 u8 val, data[16];
1338
1339 if (!buf || buf_len < MS_EXTRA_SIZE)
1340 return STATUS_FAIL;
1341
1342 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1343 SYSTEM_PARAM, 6 + MS_EXTRA_SIZE);
1344 if (retval != STATUS_SUCCESS)
1345 return STATUS_FAIL;
1346
1347 if (CHK_MS4BIT(ms_card))
1348 data[0] = 0x88;
1349 else
1350 data[0] = 0x80;
1351
1352 data[1] = 0;
1353 data[2] = (u8)(block_addr >> 8);
1354 data[3] = (u8)block_addr;
1355 data[4] = 0x40;
1356 data[5] = page_num;
1357
1358 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1359 data[i] = buf[i - 6];
1360
1361 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1362 NO_WAIT_INT, data, 16);
1363 if (retval != STATUS_SUCCESS)
1364 return STATUS_FAIL;
1365
1366 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1367 if (retval != STATUS_SUCCESS)
1368 return STATUS_FAIL;
1369
1370 ms_set_err_code(chip, MS_NO_ERROR);
1371 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1372 if (retval != STATUS_SUCCESS)
1373 return STATUS_FAIL;
1374
1375 if (val & INT_REG_CMDNK) {
1376 ms_set_err_code(chip, MS_CMD_NK);
1377 return STATUS_FAIL;
1378 }
1379 if (val & INT_REG_CED) {
1380 if (val & INT_REG_ERR) {
1381 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1382 return STATUS_FAIL;
1383 }
1384 }
1385
1386 return STATUS_SUCCESS;
1387}
1388
1389static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1390{
1391 struct ms_info *ms_card = &chip->ms_card;
1392 int retval;
1393 u8 val, data[6];
1394
1395 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1396 SYSTEM_PARAM, 6);
1397 if (retval != STATUS_SUCCESS)
1398 return STATUS_FAIL;
1399
1400 if (CHK_MS4BIT(ms_card))
1401 data[0] = 0x88;
1402 else
1403 data[0] = 0x80;
1404
1405 data[1] = 0;
1406 data[2] = (u8)(block_addr >> 8);
1407 data[3] = (u8)block_addr;
1408 data[4] = 0x20;
1409 data[5] = page_num;
1410
1411 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1412 if (retval != STATUS_SUCCESS)
1413 return STATUS_FAIL;
1414
1415 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1416 if (retval != STATUS_SUCCESS)
1417 return STATUS_FAIL;
1418
1419 ms_set_err_code(chip, MS_NO_ERROR);
1420 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1421 if (retval != STATUS_SUCCESS)
1422 return STATUS_FAIL;
1423
1424 if (val & INT_REG_CMDNK) {
1425 ms_set_err_code(chip, MS_CMD_NK);
1426 return STATUS_FAIL;
1427 }
1428
1429 if (val & INT_REG_CED) {
1430 if (val & INT_REG_ERR) {
1431 if (!(val & INT_REG_BREQ)) {
1432 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1433 return STATUS_FAIL;
1434 }
1435 retval = ms_read_status_reg(chip);
1436 if (retval != STATUS_SUCCESS)
1437 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1438
1439 } else {
1440 if (!(val & INT_REG_BREQ)) {
1441 ms_set_err_code(chip, MS_BREQ_ERROR);
1442 return STATUS_FAIL;
1443 }
1444 }
1445 }
1446
1447 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1448 0, NO_WAIT_INT);
1449 if (retval != STATUS_SUCCESS)
1450 return STATUS_FAIL;
1451
1452 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR))
1453 return STATUS_FAIL;
1454
1455 return STATUS_SUCCESS;
1456}
1457
1458static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1459{
1460 struct ms_info *ms_card = &chip->ms_card;
1461 int retval;
1462 u8 val, data[8], extra[MS_EXTRA_SIZE];
1463
1464 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1465 if (retval != STATUS_SUCCESS)
1466 return STATUS_FAIL;
1467
1468 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1469 SYSTEM_PARAM, 7);
1470 if (retval != STATUS_SUCCESS)
1471 return STATUS_FAIL;
1472
1473 ms_set_err_code(chip, MS_NO_ERROR);
1474
1475 if (CHK_MS4BIT(ms_card))
1476 data[0] = 0x88;
1477 else
1478 data[0] = 0x80;
1479
1480 data[1] = 0;
1481 data[2] = (u8)(phy_blk >> 8);
1482 data[3] = (u8)phy_blk;
1483 data[4] = 0x80;
1484 data[5] = 0;
1485 data[6] = extra[0] & 0x7F;
1486 data[7] = 0xFF;
1487
1488 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1489 if (retval != STATUS_SUCCESS)
1490 return STATUS_FAIL;
1491
1492 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1493 if (retval != STATUS_SUCCESS)
1494 return STATUS_FAIL;
1495
1496 ms_set_err_code(chip, MS_NO_ERROR);
1497 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1498 if (retval != STATUS_SUCCESS)
1499 return STATUS_FAIL;
1500
1501 if (val & INT_REG_CMDNK) {
1502 ms_set_err_code(chip, MS_CMD_NK);
1503 return STATUS_FAIL;
1504 }
1505
1506 if (val & INT_REG_CED) {
1507 if (val & INT_REG_ERR) {
1508 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1509 return STATUS_FAIL;
1510 }
1511 }
1512
1513 return STATUS_SUCCESS;
1514}
1515
1516static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1517{
1518 struct ms_info *ms_card = &chip->ms_card;
1519 int retval, i = 0;
1520 u8 val, data[6];
1521
1522 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1523 SYSTEM_PARAM, 6);
1524 if (retval != STATUS_SUCCESS)
1525 return STATUS_FAIL;
1526
1527 ms_set_err_code(chip, MS_NO_ERROR);
1528
1529 if (CHK_MS4BIT(ms_card))
1530 data[0] = 0x88;
1531 else
1532 data[0] = 0x80;
1533
1534 data[1] = 0;
1535 data[2] = (u8)(phy_blk >> 8);
1536 data[3] = (u8)phy_blk;
1537 data[4] = 0;
1538 data[5] = 0;
1539
1540 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1541 if (retval != STATUS_SUCCESS)
1542 return STATUS_FAIL;
1543
1544ERASE_RTY:
1545 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1546 if (retval != STATUS_SUCCESS)
1547 return STATUS_FAIL;
1548
1549 ms_set_err_code(chip, MS_NO_ERROR);
1550 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1551 if (retval != STATUS_SUCCESS)
1552 return STATUS_FAIL;
1553
1554 if (val & INT_REG_CMDNK) {
1555 if (i < 3) {
1556 i++;
1557 goto ERASE_RTY;
1558 }
1559
1560 ms_set_err_code(chip, MS_CMD_NK);
1561 ms_set_bad_block(chip, phy_blk);
1562 return STATUS_FAIL;
1563 }
1564
1565 if (val & INT_REG_CED) {
1566 if (val & INT_REG_ERR) {
1567 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1568 return STATUS_FAIL;
1569 }
1570 }
1571
1572 return STATUS_SUCCESS;
1573}
1574
1575static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1576{
1577 if (!extra || extra_len < MS_EXTRA_SIZE)
1578 return;
1579
1580 memset(extra, 0xFF, MS_EXTRA_SIZE);
1581
1582 if (type == set_PS_NG) {
1583
1584 extra[0] = 0xB8;
1585 } else {
1586
1587 extra[0] = 0x98;
1588 }
1589
1590 extra[2] = (u8)(log_blk >> 8);
1591 extra[3] = (u8)log_blk;
1592}
1593
1594static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1595 u8 start_page, u8 end_page)
1596{
1597 int retval;
1598 u8 extra[MS_EXTRA_SIZE], i;
1599
1600 memset(extra, 0xff, MS_EXTRA_SIZE);
1601
1602 extra[0] = 0xf8;
1603 extra[1] = 0xff;
1604 extra[2] = (u8)(log_blk >> 8);
1605 extra[3] = (u8)log_blk;
1606
1607 for (i = start_page; i < end_page; i++) {
1608 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1609 ms_set_err_code(chip, MS_NO_CARD);
1610 return STATUS_FAIL;
1611 }
1612
1613 retval = ms_write_extra_data(chip, phy_blk, i,
1614 extra, MS_EXTRA_SIZE);
1615 if (retval != STATUS_SUCCESS)
1616 return STATUS_FAIL;
1617 }
1618
1619 return STATUS_SUCCESS;
1620}
1621
1622static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1623 u16 log_blk, u8 start_page, u8 end_page)
1624{
1625 struct ms_info *ms_card = &chip->ms_card;
1626 bool uncorrect_flag = false;
1627 int retval, rty_cnt;
1628 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1629
1630 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1631 old_blk, new_blk, log_blk);
1632 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1633 start_page, end_page);
1634
1635 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1636 if (retval != STATUS_SUCCESS)
1637 return STATUS_FAIL;
1638
1639 retval = ms_read_status_reg(chip);
1640 if (retval != STATUS_SUCCESS)
1641 return STATUS_FAIL;
1642
1643 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1644 if (retval)
1645 return retval;
1646
1647 if (val & BUF_FULL) {
1648 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1649 if (retval != STATUS_SUCCESS)
1650 return STATUS_FAIL;
1651
1652 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1653 if (retval != STATUS_SUCCESS)
1654 return STATUS_FAIL;
1655
1656 if (!(val & INT_REG_CED)) {
1657 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1658 return STATUS_FAIL;
1659 }
1660 }
1661
1662 for (i = start_page; i < end_page; i++) {
1663 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1664 ms_set_err_code(chip, MS_NO_CARD);
1665 return STATUS_FAIL;
1666 }
1667
1668 retval = ms_read_extra_data(chip, old_blk, i, extra,
1669 MS_EXTRA_SIZE);
1670 if (retval != STATUS_SUCCESS)
1671 return STATUS_FAIL;
1672
1673 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG,
1674 MS_EXTRA_SIZE, SYSTEM_PARAM, 6);
1675 if (retval != STATUS_SUCCESS)
1676 return STATUS_FAIL;
1677
1678 ms_set_err_code(chip, MS_NO_ERROR);
1679
1680 if (CHK_MS4BIT(ms_card))
1681 data[0] = 0x88;
1682 else
1683 data[0] = 0x80;
1684
1685 data[1] = 0;
1686 data[2] = (u8)(old_blk >> 8);
1687 data[3] = (u8)old_blk;
1688 data[4] = 0x20;
1689 data[5] = i;
1690
1691 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1692 data, 6);
1693 if (retval != STATUS_SUCCESS)
1694 return STATUS_FAIL;
1695
1696 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1697 if (retval != STATUS_SUCCESS)
1698 return STATUS_FAIL;
1699
1700 ms_set_err_code(chip, MS_NO_ERROR);
1701 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1702 if (retval != STATUS_SUCCESS)
1703 return STATUS_FAIL;
1704
1705 if (val & INT_REG_CMDNK) {
1706 ms_set_err_code(chip, MS_CMD_NK);
1707 return STATUS_FAIL;
1708 }
1709
1710 if (val & INT_REG_CED) {
1711 if (val & INT_REG_ERR) {
1712 retval = ms_read_status_reg(chip);
1713 if (retval != STATUS_SUCCESS) {
1714 uncorrect_flag = true;
1715 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1716 } else {
1717 uncorrect_flag = false;
1718 }
1719
1720 retval = ms_transfer_tpc(chip,
1721 MS_TM_NORMAL_READ,
1722 READ_PAGE_DATA,
1723 0, NO_WAIT_INT);
1724 if (retval != STATUS_SUCCESS)
1725 return STATUS_FAIL;
1726
1727 if (uncorrect_flag) {
1728 ms_set_page_status(log_blk, set_PS_NG,
1729 extra,
1730 MS_EXTRA_SIZE);
1731 if (i == 0)
1732 extra[0] &= 0xEF;
1733
1734 ms_write_extra_data(chip, old_blk, i,
1735 extra,
1736 MS_EXTRA_SIZE);
1737 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
1738 i, extra[0]);
1739 MS_SET_BAD_BLOCK_FLG(ms_card);
1740
1741 ms_set_page_status(log_blk,
1742 set_PS_error, extra,
1743 MS_EXTRA_SIZE);
1744 ms_write_extra_data(chip, new_blk, i,
1745 extra,
1746 MS_EXTRA_SIZE);
1747 continue;
1748 }
1749
1750 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
1751 rty_cnt++) {
1752 retval = ms_transfer_tpc(
1753 chip,
1754 MS_TM_NORMAL_WRITE,
1755 WRITE_PAGE_DATA,
1756 0, NO_WAIT_INT);
1757 if (retval == STATUS_SUCCESS)
1758 break;
1759 }
1760 if (rty_cnt == MS_MAX_RETRY_COUNT)
1761 return STATUS_FAIL;
1762 }
1763
1764 if (!(val & INT_REG_BREQ)) {
1765 ms_set_err_code(chip, MS_BREQ_ERROR);
1766 return STATUS_FAIL;
1767 }
1768 }
1769
1770 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1771 SYSTEM_PARAM, (6 + MS_EXTRA_SIZE));
1772
1773 ms_set_err_code(chip, MS_NO_ERROR);
1774
1775 if (CHK_MS4BIT(ms_card))
1776 data[0] = 0x88;
1777 else
1778 data[0] = 0x80;
1779
1780 data[1] = 0;
1781 data[2] = (u8)(new_blk >> 8);
1782 data[3] = (u8)new_blk;
1783 data[4] = 0x20;
1784 data[5] = i;
1785
1786 if ((extra[0] & 0x60) != 0x60)
1787 data[6] = extra[0];
1788 else
1789 data[6] = 0xF8;
1790
1791 data[6 + 1] = 0xFF;
1792 data[6 + 2] = (u8)(log_blk >> 8);
1793 data[6 + 3] = (u8)log_blk;
1794
1795 for (j = 4; j <= MS_EXTRA_SIZE; j++)
1796 data[6 + j] = 0xFF;
1797
1798 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1799 NO_WAIT_INT, data, 16);
1800 if (retval != STATUS_SUCCESS)
1801 return STATUS_FAIL;
1802
1803 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1804 if (retval != STATUS_SUCCESS)
1805 return STATUS_FAIL;
1806
1807 ms_set_err_code(chip, MS_NO_ERROR);
1808 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1809 if (retval != STATUS_SUCCESS)
1810 return STATUS_FAIL;
1811
1812 if (val & INT_REG_CMDNK) {
1813 ms_set_err_code(chip, MS_CMD_NK);
1814 return STATUS_FAIL;
1815 }
1816
1817 if (val & INT_REG_CED) {
1818 if (val & INT_REG_ERR) {
1819 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1820 return STATUS_FAIL;
1821 }
1822 }
1823
1824 if (i == 0) {
1825 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG,
1826 MS_EXTRA_SIZE, SYSTEM_PARAM,
1827 7);
1828 if (retval != STATUS_SUCCESS)
1829 return STATUS_FAIL;
1830
1831 ms_set_err_code(chip, MS_NO_ERROR);
1832
1833 if (CHK_MS4BIT(ms_card))
1834 data[0] = 0x88;
1835 else
1836 data[0] = 0x80;
1837
1838 data[1] = 0;
1839 data[2] = (u8)(old_blk >> 8);
1840 data[3] = (u8)old_blk;
1841 data[4] = 0x80;
1842 data[5] = 0;
1843 data[6] = 0xEF;
1844 data[7] = 0xFF;
1845
1846 retval = ms_write_bytes(chip, WRITE_REG, 7,
1847 NO_WAIT_INT, data, 8);
1848 if (retval != STATUS_SUCCESS)
1849 return STATUS_FAIL;
1850
1851 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1852 if (retval != STATUS_SUCCESS)
1853 return STATUS_FAIL;
1854
1855 ms_set_err_code(chip, MS_NO_ERROR);
1856 retval = ms_read_bytes(chip, GET_INT, 1,
1857 NO_WAIT_INT, &val, 1);
1858 if (retval != STATUS_SUCCESS)
1859 return STATUS_FAIL;
1860
1861 if (val & INT_REG_CMDNK) {
1862 ms_set_err_code(chip, MS_CMD_NK);
1863 return STATUS_FAIL;
1864 }
1865
1866 if (val & INT_REG_CED) {
1867 if (val & INT_REG_ERR) {
1868 ms_set_err_code(chip,
1869 MS_FLASH_WRITE_ERROR);
1870 return STATUS_FAIL;
1871 }
1872 }
1873 }
1874 }
1875
1876 return STATUS_SUCCESS;
1877}
1878
1879static int reset_ms(struct rtsx_chip *chip)
1880{
1881 struct ms_info *ms_card = &chip->ms_card;
1882 int retval;
1883 u16 i, reg_addr, block_size;
1884 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
1885#ifndef SUPPORT_MAGIC_GATE
1886 u16 eblock_cnt;
1887#endif
1888
1889 retval = ms_prepare_reset(chip);
1890 if (retval != STATUS_SUCCESS)
1891 return STATUS_FAIL;
1892
1893 ms_card->ms_type |= TYPE_MS;
1894
1895 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
1896 if (retval != STATUS_SUCCESS)
1897 return STATUS_FAIL;
1898
1899 retval = ms_read_status_reg(chip);
1900 if (retval != STATUS_SUCCESS)
1901 return STATUS_FAIL;
1902
1903 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1904 if (retval)
1905 return retval;
1906
1907 if (val & WRT_PRTCT)
1908 chip->card_wp |= MS_CARD;
1909 else
1910 chip->card_wp &= ~MS_CARD;
1911
1912 i = 0;
1913
1914RE_SEARCH:
1915
1916 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
1917 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1918 ms_set_err_code(chip, MS_NO_CARD);
1919 return STATUS_FAIL;
1920 }
1921
1922 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
1923 if (retval != STATUS_SUCCESS) {
1924 i++;
1925 continue;
1926 }
1927
1928 if (extra[0] & BLOCK_OK) {
1929 if (!(extra[1] & NOT_BOOT_BLOCK)) {
1930 ms_card->boot_block = i;
1931 break;
1932 }
1933 }
1934 i++;
1935 }
1936
1937 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
1938 dev_dbg(rtsx_dev(chip), "No boot block found!");
1939 return STATUS_FAIL;
1940 }
1941
1942 for (j = 0; j < 3; j++) {
1943 retval = ms_read_page(chip, ms_card->boot_block, j);
1944 if (retval != STATUS_SUCCESS) {
1945 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1946 i = ms_card->boot_block + 1;
1947 ms_set_err_code(chip, MS_NO_ERROR);
1948 goto RE_SEARCH;
1949 }
1950 }
1951 }
1952
1953 retval = ms_read_page(chip, ms_card->boot_block, 0);
1954 if (retval != STATUS_SUCCESS)
1955 return STATUS_FAIL;
1956
1957
1958 rtsx_init_cmd(chip);
1959
1960 for (i = 0; i < 96; i++)
1961 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
1962
1963 retval = rtsx_send_cmd(chip, MS_CARD, 100);
1964 if (retval < 0)
1965 return STATUS_FAIL;
1966
1967 ptr = rtsx_get_cmd_data(chip);
1968 memcpy(ms_card->raw_sys_info, ptr, 96);
1969
1970
1971 rtsx_init_cmd(chip);
1972
1973 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
1974 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
1975
1976 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
1977 reg_addr++)
1978 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1979
1980 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
1981 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1982
1983 rtsx_add_cmd(chip, READ_REG_CMD, MS_device_type, 0, 0);
1984 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_support, 0, 0);
1985
1986 retval = rtsx_send_cmd(chip, MS_CARD, 100);
1987 if (retval < 0)
1988 return STATUS_FAIL;
1989
1990 ptr = rtsx_get_cmd_data(chip);
1991
1992 dev_dbg(rtsx_dev(chip), "Boot block data:\n");
1993 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
1994
1995
1996
1997
1998 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
1999 i = ms_card->boot_block + 1;
2000 goto RE_SEARCH;
2001 }
2002
2003
2004
2005
2006 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
2007 i = ms_card->boot_block + 1;
2008 goto RE_SEARCH;
2009 }
2010
2011 if (ptr[14] == 1 || ptr[14] == 3)
2012 chip->card_wp |= MS_CARD;
2013
2014
2015 block_size = ((u16)ptr[6] << 8) | ptr[7];
2016 if (block_size == 0x0010) {
2017
2018 ms_card->block_shift = 5;
2019 ms_card->page_off = 0x1F;
2020 } else if (block_size == 0x0008) {
2021
2022 ms_card->block_shift = 4;
2023 ms_card->page_off = 0x0F;
2024 }
2025
2026
2027 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
2028
2029#ifdef SUPPORT_MAGIC_GATE
2030 j = ptr[10];
2031
2032 if (ms_card->block_shift == 4) {
2033 if (j < 2) {
2034 ms_card->capacity = 0x1EE0;
2035 } else {
2036 ms_card->capacity = 0x3DE0;
2037 }
2038 } else {
2039 if (j < 5) {
2040 ms_card->capacity = 0x7BC0;
2041 } else if (j < 0xA) {
2042 ms_card->capacity = 0xF7C0;
2043 } else if (j < 0x11) {
2044 ms_card->capacity = 0x1EF80;
2045 } else {
2046 ms_card->capacity = 0x3DF00;
2047 }
2048 }
2049#else
2050
2051 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2052
2053 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2054#endif
2055
2056 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2057
2058
2059 if (ptr[15]) {
2060 retval = ms_set_rw_reg_addr(chip, 0, 0, SYSTEM_PARAM, 1);
2061 if (retval != STATUS_SUCCESS)
2062 return STATUS_FAIL;
2063
2064 retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
2065 if (retval)
2066 return retval;
2067
2068 retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2069 if (retval)
2070 return retval;
2071
2072 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2073 NO_WAIT_INT);
2074 if (retval != STATUS_SUCCESS)
2075 return STATUS_FAIL;
2076
2077 retval = rtsx_write_register(chip, MS_CFG,
2078 0x58 | MS_NO_CHECK_INT,
2079 MS_BUS_WIDTH_4 |
2080 PUSH_TIME_ODD |
2081 MS_NO_CHECK_INT);
2082 if (retval)
2083 return retval;
2084
2085 ms_card->ms_type |= MS_4BIT;
2086 }
2087
2088 if (CHK_MS4BIT(ms_card))
2089 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2090 else
2091 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2092
2093 return STATUS_SUCCESS;
2094}
2095
2096static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2097{
2098 struct ms_info *ms_card = &chip->ms_card;
2099 int size, i, seg_no, retval;
2100 u16 defect_block, reg_addr;
2101 u8 val1, val2;
2102
2103 ms_card->segment_cnt = ms_card->total_block >> 9;
2104 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2105 ms_card->segment_cnt);
2106
2107 size = ms_card->segment_cnt * sizeof(struct zone_entry);
2108 ms_card->segment = vzalloc(size);
2109 if (!ms_card->segment)
2110 return STATUS_FAIL;
2111
2112 retval = ms_read_page(chip, ms_card->boot_block, 1);
2113 if (retval != STATUS_SUCCESS)
2114 goto INIT_FAIL;
2115
2116 reg_addr = PPBUF_BASE2;
2117 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2118 int block_no;
2119
2120 retval = rtsx_read_register(chip, reg_addr++, &val1);
2121 if (retval != STATUS_SUCCESS)
2122 goto INIT_FAIL;
2123
2124 retval = rtsx_read_register(chip, reg_addr++, &val2);
2125 if (retval != STATUS_SUCCESS)
2126 goto INIT_FAIL;
2127
2128 defect_block = ((u16)val1 << 8) | val2;
2129 if (defect_block == 0xFFFF)
2130 break;
2131
2132 seg_no = defect_block / 512;
2133
2134 block_no = ms_card->segment[seg_no].disable_count++;
2135 ms_card->segment[seg_no].defect_list[block_no] = defect_block;
2136 }
2137
2138 for (i = 0; i < ms_card->segment_cnt; i++) {
2139 ms_card->segment[i].build_flag = 0;
2140 ms_card->segment[i].l2p_table = NULL;
2141 ms_card->segment[i].free_table = NULL;
2142 ms_card->segment[i].get_index = 0;
2143 ms_card->segment[i].set_index = 0;
2144 ms_card->segment[i].unused_blk_cnt = 0;
2145
2146 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2147 i, ms_card->segment[i].disable_count);
2148 }
2149
2150 return STATUS_SUCCESS;
2151
2152INIT_FAIL:
2153 vfree(ms_card->segment);
2154 ms_card->segment = NULL;
2155
2156 return STATUS_FAIL;
2157}
2158
2159static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2160{
2161 struct ms_info *ms_card = &chip->ms_card;
2162 struct zone_entry *segment;
2163
2164 if (!ms_card->segment)
2165 return 0xFFFF;
2166
2167 segment = &ms_card->segment[seg_no];
2168
2169 if (segment->l2p_table)
2170 return segment->l2p_table[log_off];
2171
2172 return 0xFFFF;
2173}
2174
2175static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2176 int seg_no, u16 log_off, u16 phy_blk)
2177{
2178 struct ms_info *ms_card = &chip->ms_card;
2179 struct zone_entry *segment;
2180
2181 if (!ms_card->segment)
2182 return;
2183
2184 segment = &ms_card->segment[seg_no];
2185 if (segment->l2p_table)
2186 segment->l2p_table[log_off] = phy_blk;
2187}
2188
2189static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2190{
2191 struct ms_info *ms_card = &chip->ms_card;
2192 struct zone_entry *segment;
2193 int seg_no;
2194
2195 seg_no = (int)phy_blk >> 9;
2196 segment = &ms_card->segment[seg_no];
2197
2198 segment->free_table[segment->set_index++] = phy_blk;
2199 if (segment->set_index >= MS_FREE_TABLE_CNT)
2200 segment->set_index = 0;
2201
2202 segment->unused_blk_cnt++;
2203}
2204
2205static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2206{
2207 struct ms_info *ms_card = &chip->ms_card;
2208 struct zone_entry *segment;
2209 u16 phy_blk;
2210
2211 segment = &ms_card->segment[seg_no];
2212
2213 if (segment->unused_blk_cnt <= 0)
2214 return 0xFFFF;
2215
2216 phy_blk = segment->free_table[segment->get_index];
2217 segment->free_table[segment->get_index++] = 0xFFFF;
2218 if (segment->get_index >= MS_FREE_TABLE_CNT)
2219 segment->get_index = 0;
2220
2221 segment->unused_blk_cnt--;
2222
2223 return phy_blk;
2224}
2225
2226static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2227 2974, 3470, 3966, 4462, 4958,
2228 5454, 5950, 6446, 6942, 7438,
2229 7934};
2230
2231static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2232 u16 log_off, u8 us1, u8 us2)
2233{
2234 struct ms_info *ms_card = &chip->ms_card;
2235 struct zone_entry *segment;
2236 int seg_no;
2237 u16 tmp_blk;
2238
2239 seg_no = (int)phy_blk >> 9;
2240 segment = &ms_card->segment[seg_no];
2241 tmp_blk = segment->l2p_table[log_off];
2242
2243 if (us1 != us2) {
2244 if (us1 == 0) {
2245 if (!(chip->card_wp & MS_CARD))
2246 ms_erase_block(chip, tmp_blk);
2247
2248 ms_set_unused_block(chip, tmp_blk);
2249 segment->l2p_table[log_off] = phy_blk;
2250 } else {
2251 if (!(chip->card_wp & MS_CARD))
2252 ms_erase_block(chip, phy_blk);
2253
2254 ms_set_unused_block(chip, phy_blk);
2255 }
2256 } else {
2257 if (phy_blk < tmp_blk) {
2258 if (!(chip->card_wp & MS_CARD))
2259 ms_erase_block(chip, phy_blk);
2260
2261 ms_set_unused_block(chip, phy_blk);
2262 } else {
2263 if (!(chip->card_wp & MS_CARD))
2264 ms_erase_block(chip, tmp_blk);
2265
2266 ms_set_unused_block(chip, tmp_blk);
2267 segment->l2p_table[log_off] = phy_blk;
2268 }
2269 }
2270
2271 return STATUS_SUCCESS;
2272}
2273
2274static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2275{
2276 struct ms_info *ms_card = &chip->ms_card;
2277 struct zone_entry *segment;
2278 bool defect_flag;
2279 int retval, table_size, disable_cnt, i;
2280 u16 start, end, phy_blk, log_blk, tmp_blk, idx;
2281 u8 extra[MS_EXTRA_SIZE], us1, us2;
2282
2283 dev_dbg(rtsx_dev(chip), "%s: %d\n", __func__, seg_no);
2284
2285 if (!ms_card->segment) {
2286 retval = ms_init_l2p_tbl(chip);
2287 if (retval != STATUS_SUCCESS)
2288 return retval;
2289 }
2290
2291 if (ms_card->segment[seg_no].build_flag) {
2292 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2293 seg_no);
2294 return STATUS_SUCCESS;
2295 }
2296
2297 if (seg_no == 0)
2298 table_size = 494;
2299 else
2300 table_size = 496;
2301
2302 segment = &ms_card->segment[seg_no];
2303
2304 if (!segment->l2p_table) {
2305 segment->l2p_table = vmalloc(array_size(table_size, 2));
2306 if (!segment->l2p_table)
2307 goto BUILD_FAIL;
2308 }
2309 memset((u8 *)(segment->l2p_table), 0xff, array_size(table_size, 2));
2310
2311 if (!segment->free_table) {
2312 segment->free_table = vmalloc(array_size(MS_FREE_TABLE_CNT, 2));
2313 if (!segment->free_table)
2314 goto BUILD_FAIL;
2315 }
2316 memset((u8 *)(segment->free_table), 0xff, array_size(MS_FREE_TABLE_CNT, 2));
2317
2318 start = (u16)seg_no << 9;
2319 end = (u16)(seg_no + 1) << 9;
2320
2321 disable_cnt = segment->disable_count;
2322
2323 segment->get_index = 0;
2324 segment->set_index = 0;
2325 segment->unused_blk_cnt = 0;
2326
2327 for (phy_blk = start; phy_blk < end; phy_blk++) {
2328 if (disable_cnt) {
2329 defect_flag = false;
2330 for (i = 0; i < segment->disable_count; i++) {
2331 if (phy_blk == segment->defect_list[i]) {
2332 defect_flag = true;
2333 break;
2334 }
2335 }
2336 if (defect_flag) {
2337 disable_cnt--;
2338 continue;
2339 }
2340 }
2341
2342 retval = ms_read_extra_data(chip, phy_blk, 0,
2343 extra, MS_EXTRA_SIZE);
2344 if (retval != STATUS_SUCCESS) {
2345 dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2346 ms_set_bad_block(chip, phy_blk);
2347 continue;
2348 }
2349
2350 if (seg_no == ms_card->segment_cnt - 1) {
2351 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2352 if (!(chip->card_wp & MS_CARD)) {
2353 retval = ms_erase_block(chip, phy_blk);
2354 if (retval != STATUS_SUCCESS)
2355 continue;
2356 extra[2] = 0xff;
2357 extra[3] = 0xff;
2358 }
2359 }
2360 }
2361
2362 if (!(extra[0] & BLOCK_OK))
2363 continue;
2364 if (!(extra[1] & NOT_BOOT_BLOCK))
2365 continue;
2366 if ((extra[0] & PAGE_OK) != PAGE_OK)
2367 continue;
2368
2369 log_blk = ((u16)extra[2] << 8) | extra[3];
2370
2371 if (log_blk == 0xFFFF) {
2372 if (!(chip->card_wp & MS_CARD)) {
2373 retval = ms_erase_block(chip, phy_blk);
2374 if (retval != STATUS_SUCCESS)
2375 continue;
2376 }
2377 ms_set_unused_block(chip, phy_blk);
2378 continue;
2379 }
2380
2381 if (log_blk < ms_start_idx[seg_no] ||
2382 log_blk >= ms_start_idx[seg_no + 1]) {
2383 if (!(chip->card_wp & MS_CARD)) {
2384 retval = ms_erase_block(chip, phy_blk);
2385 if (retval != STATUS_SUCCESS)
2386 continue;
2387 }
2388 ms_set_unused_block(chip, phy_blk);
2389 continue;
2390 }
2391
2392 idx = log_blk - ms_start_idx[seg_no];
2393
2394 if (segment->l2p_table[idx] == 0xFFFF) {
2395 segment->l2p_table[idx] = phy_blk;
2396 continue;
2397 }
2398
2399 us1 = extra[0] & 0x10;
2400 tmp_blk = segment->l2p_table[idx];
2401 retval = ms_read_extra_data(chip, tmp_blk, 0,
2402 extra, MS_EXTRA_SIZE);
2403 if (retval != STATUS_SUCCESS)
2404 continue;
2405 us2 = extra[0] & 0x10;
2406
2407 (void)ms_arbitrate_l2p(chip, phy_blk,
2408 log_blk - ms_start_idx[seg_no], us1, us2);
2409 }
2410
2411 segment->build_flag = 1;
2412
2413 dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2414 segment->unused_blk_cnt);
2415
2416
2417 if (seg_no == ms_card->segment_cnt - 1) {
2418 if (segment->unused_blk_cnt < 2)
2419 chip->card_wp |= MS_CARD;
2420 } else {
2421 if (segment->unused_blk_cnt < 1)
2422 chip->card_wp |= MS_CARD;
2423 }
2424
2425 if (chip->card_wp & MS_CARD)
2426 return STATUS_SUCCESS;
2427
2428 for (log_blk = ms_start_idx[seg_no];
2429 log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2430 idx = log_blk - ms_start_idx[seg_no];
2431 if (segment->l2p_table[idx] == 0xFFFF) {
2432 phy_blk = ms_get_unused_block(chip, seg_no);
2433 if (phy_blk == 0xFFFF) {
2434 chip->card_wp |= MS_CARD;
2435 return STATUS_SUCCESS;
2436 }
2437 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2438 if (retval != STATUS_SUCCESS)
2439 goto BUILD_FAIL;
2440
2441 segment->l2p_table[idx] = phy_blk;
2442 if (seg_no == ms_card->segment_cnt - 1) {
2443 if (segment->unused_blk_cnt < 2) {
2444 chip->card_wp |= MS_CARD;
2445 return STATUS_SUCCESS;
2446 }
2447 } else {
2448 if (segment->unused_blk_cnt < 1) {
2449 chip->card_wp |= MS_CARD;
2450 return STATUS_SUCCESS;
2451 }
2452 }
2453 }
2454 }
2455
2456
2457 if (seg_no == 0) {
2458 for (log_blk = 0; log_blk < 494; log_blk++) {
2459 tmp_blk = segment->l2p_table[log_blk];
2460 if (tmp_blk < ms_card->boot_block) {
2461 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2462
2463 if (chip->card_wp & MS_CARD)
2464 break;
2465
2466 phy_blk = ms_get_unused_block(chip, 0);
2467 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2468 log_blk, 0,
2469 ms_card->page_off + 1);
2470 if (retval != STATUS_SUCCESS)
2471 return STATUS_FAIL;
2472
2473 segment->l2p_table[log_blk] = phy_blk;
2474
2475 retval = ms_set_bad_block(chip, tmp_blk);
2476 if (retval != STATUS_SUCCESS)
2477 return STATUS_FAIL;
2478 }
2479 }
2480 }
2481
2482 return STATUS_SUCCESS;
2483
2484BUILD_FAIL:
2485 segment->build_flag = 0;
2486 vfree(segment->l2p_table);
2487 segment->l2p_table = NULL;
2488 vfree(segment->free_table);
2489 segment->free_table = NULL;
2490
2491 return STATUS_FAIL;
2492}
2493
2494int reset_ms_card(struct rtsx_chip *chip)
2495{
2496 struct ms_info *ms_card = &chip->ms_card;
2497 int seg_no = ms_card->total_block / 512 - 1;
2498 int retval;
2499
2500 memset(ms_card, 0, sizeof(struct ms_info));
2501
2502 retval = enable_card_clock(chip, MS_CARD);
2503 if (retval != STATUS_SUCCESS)
2504 return STATUS_FAIL;
2505
2506 retval = select_card(chip, MS_CARD);
2507 if (retval != STATUS_SUCCESS)
2508 return STATUS_FAIL;
2509
2510 ms_card->ms_type = 0;
2511
2512 retval = reset_ms_pro(chip);
2513 if (retval != STATUS_SUCCESS) {
2514 if (ms_card->check_ms_flow) {
2515 retval = reset_ms(chip);
2516 if (retval != STATUS_SUCCESS)
2517 return STATUS_FAIL;
2518 } else {
2519 return STATUS_FAIL;
2520 }
2521 }
2522
2523 retval = ms_set_init_para(chip);
2524 if (retval != STATUS_SUCCESS)
2525 return STATUS_FAIL;
2526
2527 if (!CHK_MSPRO(ms_card)) {
2528
2529
2530
2531 retval = ms_build_l2p_tbl(chip, seg_no);
2532 if (retval != STATUS_SUCCESS)
2533 return STATUS_FAIL;
2534 }
2535
2536 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2537
2538 return STATUS_SUCCESS;
2539}
2540
2541static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2542 u32 start_sec, u16 sec_cnt, u8 cmd)
2543{
2544 int retval, i;
2545 u8 data[8];
2546
2547 data[0] = cmd;
2548 data[1] = (u8)(sec_cnt >> 8);
2549 data[2] = (u8)sec_cnt;
2550 data[3] = (u8)(start_sec >> 24);
2551 data[4] = (u8)(start_sec >> 16);
2552 data[5] = (u8)(start_sec >> 8);
2553 data[6] = (u8)start_sec;
2554 data[7] = 0;
2555
2556 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2557 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2558 WAIT_INT, data, 8);
2559 if (retval == STATUS_SUCCESS)
2560 break;
2561 }
2562 if (i == MS_MAX_RETRY_COUNT)
2563 return STATUS_FAIL;
2564
2565 return STATUS_SUCCESS;
2566}
2567
2568void mspro_stop_seq_mode(struct rtsx_chip *chip)
2569{
2570 struct ms_info *ms_card = &chip->ms_card;
2571 int retval;
2572
2573 if (ms_card->seq_mode) {
2574 retval = ms_switch_clock(chip);
2575 if (retval != STATUS_SUCCESS)
2576 return;
2577
2578 ms_card->seq_mode = 0;
2579 ms_card->total_sec_cnt = 0;
2580 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2581
2582 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2583 }
2584}
2585
2586static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2587{
2588 struct ms_info *ms_card = &chip->ms_card;
2589 int retval;
2590
2591 if (chip->asic_code) {
2592 if (ms_card->ms_clock > 30)
2593 ms_card->ms_clock -= 20;
2594 } else {
2595 if (ms_card->ms_clock == CLK_80)
2596 ms_card->ms_clock = CLK_60;
2597 else if (ms_card->ms_clock == CLK_60)
2598 ms_card->ms_clock = CLK_40;
2599 }
2600
2601 retval = ms_switch_clock(chip);
2602 if (retval != STATUS_SUCCESS)
2603 return STATUS_FAIL;
2604
2605 return STATUS_SUCCESS;
2606}
2607
2608static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2609 struct rtsx_chip *chip, u32 start_sector,
2610 u16 sector_cnt)
2611{
2612 struct ms_info *ms_card = &chip->ms_card;
2613 bool mode_2k = false;
2614 int retval;
2615 u16 count;
2616 u8 val, trans_mode, rw_tpc, rw_cmd;
2617
2618 ms_set_err_code(chip, MS_NO_ERROR);
2619
2620 ms_card->cleanup_counter = 0;
2621
2622 if (CHK_MSHG(ms_card)) {
2623 if ((start_sector % 4) || (sector_cnt % 4)) {
2624 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2625 rw_tpc = PRO_READ_LONG_DATA;
2626 rw_cmd = PRO_READ_DATA;
2627 } else {
2628 rw_tpc = PRO_WRITE_LONG_DATA;
2629 rw_cmd = PRO_WRITE_DATA;
2630 }
2631 } else {
2632 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2633 rw_tpc = PRO_READ_QUAD_DATA;
2634 rw_cmd = PRO_READ_2K_DATA;
2635 } else {
2636 rw_tpc = PRO_WRITE_QUAD_DATA;
2637 rw_cmd = PRO_WRITE_2K_DATA;
2638 }
2639 mode_2k = true;
2640 }
2641 } else {
2642 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2643 rw_tpc = PRO_READ_LONG_DATA;
2644 rw_cmd = PRO_READ_DATA;
2645 } else {
2646 rw_tpc = PRO_WRITE_LONG_DATA;
2647 rw_cmd = PRO_WRITE_DATA;
2648 }
2649 }
2650
2651 retval = ms_switch_clock(chip);
2652 if (retval != STATUS_SUCCESS)
2653 return STATUS_FAIL;
2654
2655 if (srb->sc_data_direction == DMA_FROM_DEVICE)
2656 trans_mode = MS_TM_AUTO_READ;
2657 else
2658 trans_mode = MS_TM_AUTO_WRITE;
2659
2660 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
2661 if (retval)
2662 return retval;
2663
2664 if (ms_card->seq_mode) {
2665 if (ms_card->pre_dir != srb->sc_data_direction ||
2666 ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) !=
2667 start_sector) ||
2668 (mode_2k && (ms_card->seq_mode & MODE_512_SEQ)) ||
2669 (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ)) ||
2670 !(val & MS_INT_BREQ) ||
2671 ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
2672 ms_card->seq_mode = 0;
2673 ms_card->total_sec_cnt = 0;
2674 if (val & MS_INT_BREQ) {
2675 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2676 if (retval != STATUS_SUCCESS)
2677 return STATUS_FAIL;
2678
2679 rtsx_write_register(chip, RBCTL, RB_FLUSH,
2680 RB_FLUSH);
2681 }
2682 }
2683 }
2684
2685 if (!ms_card->seq_mode) {
2686 ms_card->total_sec_cnt = 0;
2687 if (sector_cnt >= SEQ_START_CRITERIA) {
2688 if ((ms_card->capacity - start_sector) > 0xFE00)
2689 count = 0xFE00;
2690 else
2691 count = (u16)(ms_card->capacity - start_sector);
2692
2693 if (count > sector_cnt) {
2694 if (mode_2k)
2695 ms_card->seq_mode = MODE_2K_SEQ;
2696 else
2697 ms_card->seq_mode = MODE_512_SEQ;
2698 }
2699 } else {
2700 count = sector_cnt;
2701 }
2702 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
2703 if (retval != STATUS_SUCCESS) {
2704 ms_card->seq_mode = 0;
2705 return STATUS_FAIL;
2706 }
2707 }
2708
2709 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
2710 WAIT_INT, mode_2k, scsi_sg_count(srb),
2711 scsi_sglist(srb), scsi_bufflen(srb));
2712 if (retval != STATUS_SUCCESS) {
2713 ms_card->seq_mode = 0;
2714 rtsx_read_register(chip, MS_TRANS_CFG, &val);
2715 rtsx_clear_ms_error(chip);
2716
2717 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2718 chip->rw_need_retry = 0;
2719 dev_dbg(rtsx_dev(chip), "No card exist, exit %s\n",
2720 __func__);
2721 return STATUS_FAIL;
2722 }
2723
2724 if (val & MS_INT_BREQ)
2725 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2726
2727 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
2728 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
2729 chip->rw_need_retry = 1;
2730 ms_auto_tune_clock(chip);
2731 }
2732
2733 return retval;
2734 }
2735
2736 if (ms_card->seq_mode) {
2737 ms_card->pre_sec_addr = start_sector;
2738 ms_card->pre_sec_cnt = sector_cnt;
2739 ms_card->pre_dir = srb->sc_data_direction;
2740 ms_card->total_sec_cnt += sector_cnt;
2741 }
2742
2743 return STATUS_SUCCESS;
2744}
2745
2746static int mspro_read_format_progress(struct rtsx_chip *chip,
2747 const int short_data_len)
2748{
2749 struct ms_info *ms_card = &chip->ms_card;
2750 int retval, i;
2751 u32 total_progress, cur_progress;
2752 u8 cnt, tmp;
2753 u8 data[8];
2754
2755 dev_dbg(rtsx_dev(chip), "%s, short_data_len = %d\n", __func__,
2756 short_data_len);
2757
2758 retval = ms_switch_clock(chip);
2759 if (retval != STATUS_SUCCESS) {
2760 ms_card->format_status = FORMAT_FAIL;
2761 return STATUS_FAIL;
2762 }
2763
2764 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2765 if (retval != STATUS_SUCCESS) {
2766 ms_card->format_status = FORMAT_FAIL;
2767 return STATUS_FAIL;
2768 }
2769
2770 if (!(tmp & MS_INT_BREQ)) {
2771 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK |
2772 MS_INT_ERR)) == MS_INT_CED) {
2773 ms_card->format_status = FORMAT_SUCCESS;
2774 return STATUS_SUCCESS;
2775 }
2776 ms_card->format_status = FORMAT_FAIL;
2777 return STATUS_FAIL;
2778 }
2779
2780 if (short_data_len >= 256)
2781 cnt = 0;
2782 else
2783 cnt = (u8)short_data_len;
2784
2785 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
2786 MS_NO_CHECK_INT);
2787 if (retval != STATUS_SUCCESS) {
2788 ms_card->format_status = FORMAT_FAIL;
2789 return STATUS_FAIL;
2790 }
2791
2792 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
2793 data, 8);
2794 if (retval != STATUS_SUCCESS) {
2795 ms_card->format_status = FORMAT_FAIL;
2796 return STATUS_FAIL;
2797 }
2798
2799 total_progress = (data[0] << 24) | (data[1] << 16) |
2800 (data[2] << 8) | data[3];
2801 cur_progress = (data[4] << 24) | (data[5] << 16) |
2802 (data[6] << 8) | data[7];
2803
2804 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
2805 total_progress, cur_progress);
2806
2807 if (total_progress == 0) {
2808 ms_card->progress = 0;
2809 } else {
2810 u64 ulltmp = (u64)cur_progress * (u64)65535;
2811
2812 do_div(ulltmp, total_progress);
2813 ms_card->progress = (u16)ulltmp;
2814 }
2815 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
2816
2817 for (i = 0; i < 5000; i++) {
2818 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2819 if (retval != STATUS_SUCCESS) {
2820 ms_card->format_status = FORMAT_FAIL;
2821 return STATUS_FAIL;
2822 }
2823 if (tmp & (MS_INT_CED | MS_INT_CMDNK |
2824 MS_INT_BREQ | MS_INT_ERR))
2825 break;
2826
2827 wait_timeout(1);
2828 }
2829
2830 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
2831 if (retval != STATUS_SUCCESS) {
2832 ms_card->format_status = FORMAT_FAIL;
2833 return STATUS_FAIL;
2834 }
2835
2836 if (i == 5000) {
2837 ms_card->format_status = FORMAT_FAIL;
2838 return STATUS_FAIL;
2839 }
2840
2841 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
2842 ms_card->format_status = FORMAT_FAIL;
2843 return STATUS_FAIL;
2844 }
2845
2846 if (tmp & MS_INT_CED) {
2847 ms_card->format_status = FORMAT_SUCCESS;
2848 ms_card->pro_under_formatting = 0;
2849 } else if (tmp & MS_INT_BREQ) {
2850 ms_card->format_status = FORMAT_IN_PROGRESS;
2851 } else {
2852 ms_card->format_status = FORMAT_FAIL;
2853 ms_card->pro_under_formatting = 0;
2854 return STATUS_FAIL;
2855 }
2856
2857 return STATUS_SUCCESS;
2858}
2859
2860void mspro_polling_format_status(struct rtsx_chip *chip)
2861{
2862 struct ms_info *ms_card = &chip->ms_card;
2863 int i;
2864
2865 if (ms_card->pro_under_formatting &&
2866 (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
2867 rtsx_set_stat(chip, RTSX_STAT_RUN);
2868
2869 for (i = 0; i < 65535; i++) {
2870 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
2871 if (ms_card->format_status != FORMAT_IN_PROGRESS)
2872 break;
2873 }
2874 }
2875}
2876
2877int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
2878 int short_data_len, bool quick_format)
2879{
2880 struct ms_info *ms_card = &chip->ms_card;
2881 int retval, i;
2882 u8 buf[8], tmp;
2883 u16 para;
2884
2885 retval = ms_switch_clock(chip);
2886 if (retval != STATUS_SUCCESS)
2887 return STATUS_FAIL;
2888
2889 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, PRO_TPC_PARM, 0x01);
2890 if (retval != STATUS_SUCCESS)
2891 return STATUS_FAIL;
2892
2893 memset(buf, 0, 2);
2894 switch (short_data_len) {
2895 case 32:
2896 buf[0] = 0;
2897 break;
2898 case 64:
2899 buf[0] = 1;
2900 break;
2901 case 128:
2902 buf[0] = 2;
2903 break;
2904 case 256:
2905 default:
2906 buf[0] = 3;
2907 break;
2908 }
2909
2910 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2911 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
2912 NO_WAIT_INT, buf, 2);
2913 if (retval == STATUS_SUCCESS)
2914 break;
2915 }
2916 if (i == MS_MAX_RETRY_COUNT)
2917 return STATUS_FAIL;
2918
2919 if (quick_format)
2920 para = 0x0000;
2921 else
2922 para = 0x0001;
2923
2924 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
2925 if (retval != STATUS_SUCCESS)
2926 return STATUS_FAIL;
2927
2928 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2929 if (retval)
2930 return retval;
2931
2932 if (tmp & (MS_INT_CMDNK | MS_INT_ERR))
2933 return STATUS_FAIL;
2934
2935 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
2936 ms_card->pro_under_formatting = 1;
2937 ms_card->progress = 0;
2938 ms_card->format_status = FORMAT_IN_PROGRESS;
2939 return STATUS_SUCCESS;
2940 }
2941
2942 if (tmp & MS_INT_CED) {
2943 ms_card->pro_under_formatting = 0;
2944 ms_card->progress = 0;
2945 ms_card->format_status = FORMAT_SUCCESS;
2946 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
2947 return STATUS_SUCCESS;
2948 }
2949
2950 return STATUS_FAIL;
2951}
2952
2953static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
2954 u16 log_blk, u8 start_page, u8 end_page,
2955 u8 *buf, unsigned int *index,
2956 unsigned int *offset)
2957{
2958 struct ms_info *ms_card = &chip->ms_card;
2959 int retval, i;
2960 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
2961 u8 *ptr;
2962
2963 retval = ms_read_extra_data(chip, phy_blk, start_page,
2964 extra, MS_EXTRA_SIZE);
2965 if (retval == STATUS_SUCCESS) {
2966 if ((extra[1] & 0x30) != 0x30) {
2967 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2968 return STATUS_FAIL;
2969 }
2970 }
2971
2972 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
2973 SYSTEM_PARAM, 6);
2974 if (retval != STATUS_SUCCESS)
2975 return STATUS_FAIL;
2976
2977 if (CHK_MS4BIT(ms_card))
2978 data[0] = 0x88;
2979 else
2980 data[0] = 0x80;
2981
2982 data[1] = 0;
2983 data[2] = (u8)(phy_blk >> 8);
2984 data[3] = (u8)phy_blk;
2985 data[4] = 0;
2986 data[5] = start_page;
2987
2988 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2989 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
2990 data, 6);
2991 if (retval == STATUS_SUCCESS)
2992 break;
2993 }
2994 if (i == MS_MAX_RETRY_COUNT)
2995 return STATUS_FAIL;
2996
2997 ms_set_err_code(chip, MS_NO_ERROR);
2998
2999 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
3000 if (retval != STATUS_SUCCESS)
3001 return STATUS_FAIL;
3002
3003 ptr = buf;
3004
3005 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3006 ms_set_err_code(chip, MS_NO_ERROR);
3007
3008 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3009 ms_set_err_code(chip, MS_NO_CARD);
3010 return STATUS_FAIL;
3011 }
3012
3013 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3014 if (retval != STATUS_SUCCESS)
3015 return STATUS_FAIL;
3016
3017 if (val & INT_REG_CMDNK) {
3018 ms_set_err_code(chip, MS_CMD_NK);
3019 return STATUS_FAIL;
3020 }
3021 if (val & INT_REG_ERR) {
3022 if (val & INT_REG_BREQ) {
3023 retval = ms_read_status_reg(chip);
3024 if (retval != STATUS_SUCCESS) {
3025 if (!(chip->card_wp & MS_CARD)) {
3026 reset_ms(chip);
3027 ms_set_page_status
3028 (log_blk, set_PS_NG,
3029 extra,
3030 MS_EXTRA_SIZE);
3031 ms_write_extra_data
3032 (chip, phy_blk,
3033 page_addr, extra,
3034 MS_EXTRA_SIZE);
3035 }
3036 ms_set_err_code(chip,
3037 MS_FLASH_READ_ERROR);
3038 return STATUS_FAIL;
3039 }
3040 } else {
3041 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3042 return STATUS_FAIL;
3043 }
3044 } else {
3045 if (!(val & INT_REG_BREQ)) {
3046 ms_set_err_code(chip, MS_BREQ_ERROR);
3047 return STATUS_FAIL;
3048 }
3049 }
3050
3051 if (page_addr == (end_page - 1)) {
3052 if (!(val & INT_REG_CED)) {
3053 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3054 if (retval != STATUS_SUCCESS)
3055 return STATUS_FAIL;
3056 }
3057
3058 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
3059 &val, 1);
3060 if (retval != STATUS_SUCCESS)
3061 return STATUS_FAIL;
3062
3063 if (!(val & INT_REG_CED)) {
3064 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3065 return STATUS_FAIL;
3066 }
3067
3068 trans_cfg = NO_WAIT_INT;
3069 } else {
3070 trans_cfg = WAIT_INT;
3071 }
3072
3073 rtsx_init_cmd(chip);
3074
3075 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3076 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3077 0xFF, trans_cfg);
3078 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3079 0x01, RING_BUFFER);
3080
3081 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3082
3083 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3084 MS_TRANSFER_START | MS_TM_NORMAL_READ);
3085 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3086 MS_TRANSFER_END, MS_TRANSFER_END);
3087
3088 rtsx_send_cmd_no_wait(chip);
3089
3090 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3091 scsi_sg_count(chip->srb),
3092 index, offset,
3093 DMA_FROM_DEVICE,
3094 chip->ms_timeout);
3095 if (retval < 0) {
3096 if (retval == -ETIMEDOUT) {
3097 ms_set_err_code(chip, MS_TO_ERROR);
3098 rtsx_clear_ms_error(chip);
3099 return STATUS_TIMEDOUT;
3100 }
3101
3102 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3103 if (retval != STATUS_SUCCESS) {
3104 ms_set_err_code(chip, MS_TO_ERROR);
3105 rtsx_clear_ms_error(chip);
3106 return STATUS_TIMEDOUT;
3107 }
3108 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3109 ms_set_err_code(chip, MS_CRC16_ERROR);
3110 rtsx_clear_ms_error(chip);
3111 return STATUS_FAIL;
3112 }
3113 }
3114
3115 if (scsi_sg_count(chip->srb) == 0)
3116 ptr += 512;
3117 }
3118
3119 return STATUS_SUCCESS;
3120}
3121
3122static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3123 u16 new_blk, u16 log_blk, u8 start_page,
3124 u8 end_page, u8 *buf, unsigned int *index,
3125 unsigned int *offset)
3126{
3127 struct ms_info *ms_card = &chip->ms_card;
3128 int retval, i;
3129 u8 page_addr, val, data[16];
3130 u8 *ptr;
3131
3132 if (!start_page) {
3133 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
3134 SYSTEM_PARAM, 7);
3135 if (retval != STATUS_SUCCESS)
3136 return STATUS_FAIL;
3137
3138 if (CHK_MS4BIT(ms_card))
3139 data[0] = 0x88;
3140 else
3141 data[0] = 0x80;
3142
3143 data[1] = 0;
3144 data[2] = (u8)(old_blk >> 8);
3145 data[3] = (u8)old_blk;
3146 data[4] = 0x80;
3147 data[5] = 0;
3148 data[6] = 0xEF;
3149 data[7] = 0xFF;
3150
3151 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3152 data, 8);
3153 if (retval != STATUS_SUCCESS)
3154 return STATUS_FAIL;
3155
3156 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3157 if (retval != STATUS_SUCCESS)
3158 return STATUS_FAIL;
3159
3160 ms_set_err_code(chip, MS_NO_ERROR);
3161 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3162 NO_WAIT_INT);
3163 if (retval != STATUS_SUCCESS)
3164 return STATUS_FAIL;
3165 }
3166
3167 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
3168 SYSTEM_PARAM, (6 + MS_EXTRA_SIZE));
3169 if (retval != STATUS_SUCCESS)
3170 return STATUS_FAIL;
3171
3172 ms_set_err_code(chip, MS_NO_ERROR);
3173
3174 if (CHK_MS4BIT(ms_card))
3175 data[0] = 0x88;
3176 else
3177 data[0] = 0x80;
3178
3179 data[1] = 0;
3180 data[2] = (u8)(new_blk >> 8);
3181 data[3] = (u8)new_blk;
3182 if ((end_page - start_page) == 1)
3183 data[4] = 0x20;
3184 else
3185 data[4] = 0;
3186
3187 data[5] = start_page;
3188 data[6] = 0xF8;
3189 data[7] = 0xFF;
3190 data[8] = (u8)(log_blk >> 8);
3191 data[9] = (u8)log_blk;
3192
3193 for (i = 0x0A; i < 0x10; i++)
3194 data[i] = 0xFF;
3195
3196 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3197 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3198 NO_WAIT_INT, data, 16);
3199 if (retval == STATUS_SUCCESS)
3200 break;
3201 }
3202 if (i == MS_MAX_RETRY_COUNT)
3203 return STATUS_FAIL;
3204
3205 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3206 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3207 if (retval == STATUS_SUCCESS)
3208 break;
3209 }
3210 if (i == MS_MAX_RETRY_COUNT)
3211 return STATUS_FAIL;
3212
3213 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3214 if (retval != STATUS_SUCCESS)
3215 return STATUS_FAIL;
3216
3217 ptr = buf;
3218 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3219 ms_set_err_code(chip, MS_NO_ERROR);
3220
3221 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3222 ms_set_err_code(chip, MS_NO_CARD);
3223 return STATUS_FAIL;
3224 }
3225
3226 if (val & INT_REG_CMDNK) {
3227 ms_set_err_code(chip, MS_CMD_NK);
3228 return STATUS_FAIL;
3229 }
3230 if (val & INT_REG_ERR) {
3231 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3232 return STATUS_FAIL;
3233 }
3234 if (!(val & INT_REG_BREQ)) {
3235 ms_set_err_code(chip, MS_BREQ_ERROR);
3236 return STATUS_FAIL;
3237 }
3238
3239 udelay(30);
3240
3241 rtsx_init_cmd(chip);
3242
3243 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3244 0xFF, WRITE_PAGE_DATA);
3245 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3246 0xFF, WAIT_INT);
3247 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3248 0x01, RING_BUFFER);
3249
3250 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3251
3252 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3253 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3254 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3255 MS_TRANSFER_END, MS_TRANSFER_END);
3256
3257 rtsx_send_cmd_no_wait(chip);
3258
3259 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3260 scsi_sg_count(chip->srb),
3261 index, offset,
3262 DMA_TO_DEVICE,
3263 chip->ms_timeout);
3264 if (retval < 0) {
3265 ms_set_err_code(chip, MS_TO_ERROR);
3266 rtsx_clear_ms_error(chip);
3267
3268 if (retval == -ETIMEDOUT)
3269 return STATUS_TIMEDOUT;
3270 return STATUS_FAIL;
3271 }
3272
3273 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3274 if (retval != STATUS_SUCCESS)
3275 return STATUS_FAIL;
3276
3277 if ((end_page - start_page) == 1) {
3278 if (!(val & INT_REG_CED)) {
3279 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3280 return STATUS_FAIL;
3281 }
3282 } else {
3283 if (page_addr == (end_page - 1)) {
3284 if (!(val & INT_REG_CED)) {
3285 retval = ms_send_cmd(chip, BLOCK_END,
3286 WAIT_INT);
3287 if (retval != STATUS_SUCCESS)
3288 return STATUS_FAIL;
3289 }
3290
3291 retval = ms_read_bytes(chip, GET_INT, 1,
3292 NO_WAIT_INT, &val, 1);
3293 if (retval != STATUS_SUCCESS)
3294 return STATUS_FAIL;
3295 }
3296
3297 if (page_addr == (end_page - 1) ||
3298 page_addr == ms_card->page_off) {
3299 if (!(val & INT_REG_CED)) {
3300 ms_set_err_code(chip,
3301 MS_FLASH_WRITE_ERROR);
3302 return STATUS_FAIL;
3303 }
3304 }
3305 }
3306
3307 if (scsi_sg_count(chip->srb) == 0)
3308 ptr += 512;
3309 }
3310
3311 return STATUS_SUCCESS;
3312}
3313
3314static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3315 u16 log_blk, u8 page_off)
3316{
3317 struct ms_info *ms_card = &chip->ms_card;
3318 int retval, seg_no;
3319
3320 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3321 page_off, ms_card->page_off + 1);
3322 if (retval != STATUS_SUCCESS)
3323 return STATUS_FAIL;
3324
3325 seg_no = old_blk >> 9;
3326
3327 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3328 MS_CLR_BAD_BLOCK_FLG(ms_card);
3329 ms_set_bad_block(chip, old_blk);
3330 } else {
3331 retval = ms_erase_block(chip, old_blk);
3332 if (retval == STATUS_SUCCESS)
3333 ms_set_unused_block(chip, old_blk);
3334 }
3335
3336 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3337
3338 return STATUS_SUCCESS;
3339}
3340
3341static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3342 u16 log_blk, u8 start_page)
3343{
3344 int retval;
3345
3346 if (start_page) {
3347 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3348 0, start_page);
3349 if (retval != STATUS_SUCCESS)
3350 return STATUS_FAIL;
3351 }
3352
3353 return STATUS_SUCCESS;
3354}
3355
3356#ifdef MS_DELAY_WRITE
3357int ms_delay_write(struct rtsx_chip *chip)
3358{
3359 struct ms_info *ms_card = &chip->ms_card;
3360 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3361 int retval;
3362
3363 if (delay_write->delay_write_flag) {
3364 retval = ms_set_init_para(chip);
3365 if (retval != STATUS_SUCCESS)
3366 return STATUS_FAIL;
3367
3368 delay_write->delay_write_flag = 0;
3369 retval = ms_finish_write(chip,
3370 delay_write->old_phyblock,
3371 delay_write->new_phyblock,
3372 delay_write->logblock,
3373 delay_write->pageoff);
3374 if (retval != STATUS_SUCCESS)
3375 return STATUS_FAIL;
3376 }
3377
3378 return STATUS_SUCCESS;
3379}
3380#endif
3381
3382static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3383{
3384 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3385 set_sense_type(chip, SCSI_LUN(srb),
3386 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3387 else
3388 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3389}
3390
3391static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3392 u32 start_sector, u16 sector_cnt)
3393{
3394 struct ms_info *ms_card = &chip->ms_card;
3395 unsigned int lun = SCSI_LUN(srb);
3396 int retval, seg_no;
3397 unsigned int index = 0, offset = 0;
3398 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3399 u8 start_page, end_page = 0, page_cnt;
3400 u8 *ptr;
3401#ifdef MS_DELAY_WRITE
3402 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3403#endif
3404
3405 ms_set_err_code(chip, MS_NO_ERROR);
3406
3407 ms_card->cleanup_counter = 0;
3408
3409 ptr = (u8 *)scsi_sglist(srb);
3410
3411 retval = ms_switch_clock(chip);
3412 if (retval != STATUS_SUCCESS) {
3413 ms_rw_fail(srb, chip);
3414 return STATUS_FAIL;
3415 }
3416
3417 log_blk = (u16)(start_sector >> ms_card->block_shift);
3418 start_page = (u8)(start_sector & ms_card->page_off);
3419
3420 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3421 if (log_blk < ms_start_idx[seg_no + 1])
3422 break;
3423 }
3424
3425 if (ms_card->segment[seg_no].build_flag == 0) {
3426 retval = ms_build_l2p_tbl(chip, seg_no);
3427 if (retval != STATUS_SUCCESS) {
3428 chip->card_fail |= MS_CARD;
3429 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3430 return STATUS_FAIL;
3431 }
3432 }
3433
3434 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3435#ifdef MS_DELAY_WRITE
3436 if (delay_write->delay_write_flag &&
3437 delay_write->logblock == log_blk &&
3438 start_page > delay_write->pageoff) {
3439 delay_write->delay_write_flag = 0;
3440 retval = ms_copy_page(chip,
3441 delay_write->old_phyblock,
3442 delay_write->new_phyblock,
3443 log_blk,
3444 delay_write->pageoff, start_page);
3445 if (retval != STATUS_SUCCESS) {
3446 set_sense_type(chip, lun,
3447 SENSE_TYPE_MEDIA_WRITE_ERR);
3448 return STATUS_FAIL;
3449 }
3450 old_blk = delay_write->old_phyblock;
3451 new_blk = delay_write->new_phyblock;
3452 } else if (delay_write->delay_write_flag &&
3453 (delay_write->logblock == log_blk) &&
3454 (start_page == delay_write->pageoff)) {
3455 delay_write->delay_write_flag = 0;
3456 old_blk = delay_write->old_phyblock;
3457 new_blk = delay_write->new_phyblock;
3458 } else {
3459 retval = ms_delay_write(chip);
3460 if (retval != STATUS_SUCCESS) {
3461 set_sense_type(chip, lun,
3462 SENSE_TYPE_MEDIA_WRITE_ERR);
3463 return STATUS_FAIL;
3464 }
3465#endif
3466 old_blk = ms_get_l2p_tbl
3467 (chip, seg_no,
3468 log_blk - ms_start_idx[seg_no]);
3469 new_blk = ms_get_unused_block(chip, seg_no);
3470 if (old_blk == 0xFFFF || new_blk == 0xFFFF) {
3471 set_sense_type(chip, lun,
3472 SENSE_TYPE_MEDIA_WRITE_ERR);
3473 return STATUS_FAIL;
3474 }
3475
3476 retval = ms_prepare_write(chip, old_blk, new_blk,
3477 log_blk, start_page);
3478 if (retval != STATUS_SUCCESS) {
3479 if (detect_card_cd(chip, MS_CARD) !=
3480 STATUS_SUCCESS) {
3481 set_sense_type
3482 (chip, lun,
3483 SENSE_TYPE_MEDIA_NOT_PRESENT);
3484 return STATUS_FAIL;
3485 }
3486 set_sense_type(chip, lun,
3487 SENSE_TYPE_MEDIA_WRITE_ERR);
3488 return STATUS_FAIL;
3489 }
3490#ifdef MS_DELAY_WRITE
3491 }
3492#endif
3493 } else {
3494#ifdef MS_DELAY_WRITE
3495 retval = ms_delay_write(chip);
3496 if (retval != STATUS_SUCCESS) {
3497 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3498 set_sense_type(chip, lun,
3499 SENSE_TYPE_MEDIA_NOT_PRESENT);
3500 return STATUS_FAIL;
3501 }
3502 set_sense_type(chip, lun,
3503 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3504 return STATUS_FAIL;
3505 }
3506#endif
3507 old_blk = ms_get_l2p_tbl(chip, seg_no,
3508 log_blk - ms_start_idx[seg_no]);
3509 if (old_blk == 0xFFFF) {
3510 set_sense_type(chip, lun,
3511 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3512 return STATUS_FAIL;
3513 }
3514 }
3515
3516 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3517 seg_no, old_blk, new_blk);
3518
3519 while (total_sec_cnt) {
3520 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3521 end_page = ms_card->page_off + 1;
3522 else
3523 end_page = start_page + (u8)total_sec_cnt;
3524
3525 page_cnt = end_page - start_page;
3526
3527 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3528 start_page, end_page, page_cnt);
3529
3530 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3531 retval = ms_read_multiple_pages(chip,
3532 old_blk, log_blk,
3533 start_page, end_page,
3534 ptr, &index, &offset);
3535 } else {
3536 retval = ms_write_multiple_pages(chip, old_blk, new_blk,
3537 log_blk, start_page,
3538 end_page, ptr, &index,
3539 &offset);
3540 }
3541
3542 if (retval != STATUS_SUCCESS) {
3543 toggle_gpio(chip, 1);
3544 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3545 set_sense_type(chip, lun,
3546 SENSE_TYPE_MEDIA_NOT_PRESENT);
3547 return STATUS_FAIL;
3548 }
3549 ms_rw_fail(srb, chip);
3550 return STATUS_FAIL;
3551 }
3552
3553 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3554 if (end_page == (ms_card->page_off + 1)) {
3555 retval = ms_erase_block(chip, old_blk);
3556 if (retval == STATUS_SUCCESS)
3557 ms_set_unused_block(chip, old_blk);
3558
3559 ms_set_l2p_tbl(chip, seg_no,
3560 log_blk - ms_start_idx[seg_no],
3561 new_blk);
3562 }
3563 }
3564
3565 total_sec_cnt -= page_cnt;
3566 if (scsi_sg_count(srb) == 0)
3567 ptr += page_cnt * 512;
3568
3569 if (total_sec_cnt == 0)
3570 break;
3571
3572 log_blk++;
3573
3574 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
3575 seg_no++) {
3576 if (log_blk < ms_start_idx[seg_no + 1])
3577 break;
3578 }
3579
3580 if (ms_card->segment[seg_no].build_flag == 0) {
3581 retval = ms_build_l2p_tbl(chip, seg_no);
3582 if (retval != STATUS_SUCCESS) {
3583 chip->card_fail |= MS_CARD;
3584 set_sense_type(chip, lun,
3585 SENSE_TYPE_MEDIA_NOT_PRESENT);
3586 return STATUS_FAIL;
3587 }
3588 }
3589
3590 old_blk = ms_get_l2p_tbl(chip, seg_no,
3591 log_blk - ms_start_idx[seg_no]);
3592 if (old_blk == 0xFFFF) {
3593 ms_rw_fail(srb, chip);
3594 return STATUS_FAIL;
3595 }
3596
3597 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3598 new_blk = ms_get_unused_block(chip, seg_no);
3599 if (new_blk == 0xFFFF) {
3600 ms_rw_fail(srb, chip);
3601 return STATUS_FAIL;
3602 }
3603 }
3604
3605 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3606 seg_no, old_blk, new_blk);
3607
3608 start_page = 0;
3609 }
3610
3611 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3612 if (end_page < (ms_card->page_off + 1)) {
3613#ifdef MS_DELAY_WRITE
3614 delay_write->delay_write_flag = 1;
3615 delay_write->old_phyblock = old_blk;
3616 delay_write->new_phyblock = new_blk;
3617 delay_write->logblock = log_blk;
3618 delay_write->pageoff = end_page;
3619#else
3620 retval = ms_finish_write(chip, old_blk, new_blk,
3621 log_blk, end_page);
3622 if (retval != STATUS_SUCCESS) {
3623 if (detect_card_cd(chip, MS_CARD) !=
3624 STATUS_SUCCESS) {
3625 set_sense_type
3626 (chip, lun,
3627 SENSE_TYPE_MEDIA_NOT_PRESENT);
3628 return STATUS_FAIL;
3629 }
3630
3631 ms_rw_fail(srb, chip);
3632 return STATUS_FAIL;
3633 }
3634#endif
3635 }
3636 }
3637
3638 scsi_set_resid(srb, 0);
3639
3640 return STATUS_SUCCESS;
3641}
3642
3643int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3644 u32 start_sector, u16 sector_cnt)
3645{
3646 struct ms_info *ms_card = &chip->ms_card;
3647 int retval;
3648
3649 if (CHK_MSPRO(ms_card))
3650 retval = mspro_rw_multi_sector(srb, chip, start_sector,
3651 sector_cnt);
3652 else
3653 retval = ms_rw_multi_sector(srb, chip, start_sector,
3654 sector_cnt);
3655
3656 return retval;
3657}
3658
3659void ms_free_l2p_tbl(struct rtsx_chip *chip)
3660{
3661 struct ms_info *ms_card = &chip->ms_card;
3662 int i = 0;
3663
3664 if (ms_card->segment) {
3665 for (i = 0; i < ms_card->segment_cnt; i++) {
3666 vfree(ms_card->segment[i].l2p_table);
3667 ms_card->segment[i].l2p_table = NULL;
3668 vfree(ms_card->segment[i].free_table);
3669 ms_card->segment[i].free_table = NULL;
3670 }
3671 vfree(ms_card->segment);
3672 ms_card->segment = NULL;
3673 }
3674}
3675
3676#ifdef SUPPORT_MAGIC_GATE
3677
3678#ifdef READ_BYTES_WAIT_INT
3679static int ms_poll_int(struct rtsx_chip *chip)
3680{
3681 int retval;
3682 u8 val;
3683
3684 rtsx_init_cmd(chip);
3685
3686 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
3687
3688 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
3689 if (retval != STATUS_SUCCESS)
3690 return STATUS_FAIL;
3691
3692 val = *rtsx_get_cmd_data(chip);
3693 if (val & MS_INT_ERR)
3694 return STATUS_FAIL;
3695
3696 return STATUS_SUCCESS;
3697}
3698#endif
3699
3700#ifdef MS_SAMPLE_INT_ERR
3701static int check_ms_err(struct rtsx_chip *chip)
3702{
3703 int retval;
3704 u8 val;
3705
3706 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3707 if (retval != STATUS_SUCCESS)
3708 return 1;
3709 if (val & MS_TRANSFER_ERR)
3710 return 1;
3711
3712 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3713 if (retval != STATUS_SUCCESS)
3714 return 1;
3715
3716 if (val & (MS_INT_ERR | MS_INT_CMDNK))
3717 return 1;
3718
3719 return 0;
3720}
3721#else
3722static int check_ms_err(struct rtsx_chip *chip)
3723{
3724 int retval;
3725 u8 val;
3726
3727 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3728 if (retval != STATUS_SUCCESS)
3729 return 1;
3730 if (val & MS_TRANSFER_ERR)
3731 return 1;
3732
3733 return 0;
3734}
3735#endif
3736
3737static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
3738{
3739 int retval, i;
3740 u8 data[8];
3741
3742 data[0] = cmd;
3743 data[1] = 0;
3744 data[2] = 0;
3745 data[3] = 0;
3746 data[4] = 0;
3747 data[5] = 0;
3748 data[6] = entry_num;
3749 data[7] = 0;
3750
3751 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3752 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
3753 data, 8);
3754 if (retval == STATUS_SUCCESS)
3755 break;
3756 }
3757 if (i == MS_MAX_RETRY_COUNT)
3758 return STATUS_FAIL;
3759
3760 if (check_ms_err(chip)) {
3761 rtsx_clear_ms_error(chip);
3762 return STATUS_FAIL;
3763 }
3764
3765 return STATUS_SUCCESS;
3766}
3767
3768static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
3769 u8 mg_entry_num)
3770{
3771 int retval;
3772 u8 buf[6];
3773
3774 if (type == 0)
3775 retval = ms_set_rw_reg_addr(chip, 0, 0, PRO_TPC_PARM, 1);
3776 else
3777 retval = ms_set_rw_reg_addr(chip, 0, 0, PRO_DATA_COUNT1, 6);
3778
3779 if (retval != STATUS_SUCCESS)
3780 return STATUS_FAIL;
3781
3782 buf[0] = 0;
3783 buf[1] = 0;
3784 if (type == 1) {
3785 buf[2] = 0;
3786 buf[3] = 0;
3787 buf[4] = 0;
3788 buf[5] = mg_entry_num;
3789 }
3790 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
3791 NO_WAIT_INT, buf, 6);
3792 if (retval != STATUS_SUCCESS)
3793 return STATUS_FAIL;
3794
3795 return STATUS_SUCCESS;
3796}
3797
3798int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3799{
3800 int retval;
3801 int i;
3802 unsigned int lun = SCSI_LUN(srb);
3803 u8 buf1[32], buf2[12];
3804
3805 if (scsi_bufflen(srb) < 12) {
3806 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3807 return STATUS_FAIL;
3808 }
3809
3810 ms_cleanup_work(chip);
3811
3812 retval = ms_switch_clock(chip);
3813 if (retval != STATUS_SUCCESS)
3814 return STATUS_FAIL;
3815
3816 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
3817 if (retval != STATUS_SUCCESS) {
3818 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3819 return STATUS_FAIL;
3820 }
3821
3822 memset(buf1, 0, 32);
3823 rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
3824 for (i = 0; i < 8; i++)
3825 buf1[8 + i] = buf2[4 + i];
3826
3827 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
3828 buf1, 32);
3829 if (retval != STATUS_SUCCESS) {
3830 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3831 return STATUS_FAIL;
3832 }
3833 if (check_ms_err(chip)) {
3834 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3835 rtsx_clear_ms_error(chip);
3836 return STATUS_FAIL;
3837 }
3838
3839 return STATUS_SUCCESS;
3840}
3841
3842int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3843{
3844 int retval;
3845 int bufflen;
3846 unsigned int lun = SCSI_LUN(srb);
3847 u8 *buf = NULL;
3848
3849 ms_cleanup_work(chip);
3850
3851 retval = ms_switch_clock(chip);
3852 if (retval != STATUS_SUCCESS)
3853 return STATUS_FAIL;
3854
3855 buf = kmalloc(1540, GFP_KERNEL);
3856 if (!buf)
3857 return STATUS_ERROR;
3858
3859 buf[0] = 0x04;
3860 buf[1] = 0x1A;
3861 buf[2] = 0x00;
3862 buf[3] = 0x00;
3863
3864 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
3865 if (retval != STATUS_SUCCESS) {
3866 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3867 goto free_buffer;
3868 }
3869
3870 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
3871 3, WAIT_INT, 0, 0, buf + 4, 1536);
3872 if (retval != STATUS_SUCCESS) {
3873 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3874 rtsx_clear_ms_error(chip);
3875 goto free_buffer;
3876 }
3877 if (check_ms_err(chip)) {
3878 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3879 rtsx_clear_ms_error(chip);
3880 retval = STATUS_FAIL;
3881 goto free_buffer;
3882 }
3883
3884 bufflen = min_t(int, 1052, scsi_bufflen(srb));
3885 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
3886
3887free_buffer:
3888 kfree(buf);
3889 return retval;
3890}
3891
3892int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3893{
3894 struct ms_info *ms_card = &chip->ms_card;
3895 int retval;
3896 int bufflen;
3897 int i;
3898 unsigned int lun = SCSI_LUN(srb);
3899 u8 buf[32];
3900
3901 ms_cleanup_work(chip);
3902
3903 retval = ms_switch_clock(chip);
3904 if (retval != STATUS_SUCCESS)
3905 return STATUS_FAIL;
3906
3907 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
3908 if (retval != STATUS_SUCCESS) {
3909 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3910 return STATUS_FAIL;
3911 }
3912
3913 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
3914 buf, 32);
3915 if (retval != STATUS_SUCCESS) {
3916 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3917 return STATUS_FAIL;
3918 }
3919 if (check_ms_err(chip)) {
3920 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3921 rtsx_clear_ms_error(chip);
3922 return STATUS_FAIL;
3923 }
3924
3925 memcpy(ms_card->magic_gate_id, buf, 16);
3926
3927#ifdef READ_BYTES_WAIT_INT
3928 retval = ms_poll_int(chip);
3929 if (retval != STATUS_SUCCESS) {
3930 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3931 return STATUS_FAIL;
3932 }
3933#endif
3934
3935 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
3936 if (retval != STATUS_SUCCESS) {
3937 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3938 return STATUS_FAIL;
3939 }
3940
3941 bufflen = min_t(int, 12, scsi_bufflen(srb));
3942 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3943
3944 for (i = 0; i < 8; i++)
3945 buf[i] = buf[4 + i];
3946
3947 for (i = 0; i < 24; i++)
3948 buf[8 + i] = 0;
3949
3950 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
3951 32, WAIT_INT, buf, 32);
3952 if (retval != STATUS_SUCCESS) {
3953 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3954 return STATUS_FAIL;
3955 }
3956 if (check_ms_err(chip)) {
3957 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3958 rtsx_clear_ms_error(chip);
3959 return STATUS_FAIL;
3960 }
3961
3962 ms_card->mg_auth = 0;
3963
3964 return STATUS_SUCCESS;
3965}
3966
3967int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3968{
3969 struct ms_info *ms_card = &chip->ms_card;
3970 int retval;
3971 int bufflen;
3972 unsigned int lun = SCSI_LUN(srb);
3973 u8 buf1[32], buf2[36];
3974
3975 ms_cleanup_work(chip);
3976
3977 retval = ms_switch_clock(chip);
3978 if (retval != STATUS_SUCCESS)
3979 return STATUS_FAIL;
3980
3981 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
3982 if (retval != STATUS_SUCCESS) {
3983 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3984 return STATUS_FAIL;
3985 }
3986
3987 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
3988 buf1, 32);
3989 if (retval != STATUS_SUCCESS) {
3990 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3991 return STATUS_FAIL;
3992 }
3993 if (check_ms_err(chip)) {
3994 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3995 rtsx_clear_ms_error(chip);
3996 return STATUS_FAIL;
3997 }
3998
3999 buf2[0] = 0x00;
4000 buf2[1] = 0x22;
4001 buf2[2] = 0x00;
4002 buf2[3] = 0x00;
4003
4004 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
4005 memcpy(buf2 + 20, buf1, 16);
4006
4007 bufflen = min_t(int, 36, scsi_bufflen(srb));
4008 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
4009
4010#ifdef READ_BYTES_WAIT_INT
4011 retval = ms_poll_int(chip);
4012 if (retval != STATUS_SUCCESS) {
4013 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4014 return STATUS_FAIL;
4015 }
4016#endif
4017
4018 return STATUS_SUCCESS;
4019}
4020
4021int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4022{
4023 struct ms_info *ms_card = &chip->ms_card;
4024 int retval;
4025 int i;
4026 int bufflen;
4027 unsigned int lun = SCSI_LUN(srb);
4028 u8 buf[32];
4029
4030 ms_cleanup_work(chip);
4031
4032 retval = ms_switch_clock(chip);
4033 if (retval != STATUS_SUCCESS)
4034 return STATUS_FAIL;
4035
4036 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
4037 if (retval != STATUS_SUCCESS) {
4038 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4039 return STATUS_FAIL;
4040 }
4041
4042 bufflen = min_t(int, 12, scsi_bufflen(srb));
4043 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4044
4045 for (i = 0; i < 8; i++)
4046 buf[i] = buf[4 + i];
4047
4048 for (i = 0; i < 24; i++)
4049 buf[8 + i] = 0;
4050
4051 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4052 buf, 32);
4053 if (retval != STATUS_SUCCESS) {
4054 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4055 return STATUS_FAIL;
4056 }
4057 if (check_ms_err(chip)) {
4058 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4059 rtsx_clear_ms_error(chip);
4060 return STATUS_FAIL;
4061 }
4062
4063 ms_card->mg_auth = 1;
4064
4065 return STATUS_SUCCESS;
4066}
4067
4068int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4069{
4070 struct ms_info *ms_card = &chip->ms_card;
4071 int retval;
4072 int bufflen;
4073 unsigned int lun = SCSI_LUN(srb);
4074 u8 *buf = NULL;
4075
4076 ms_cleanup_work(chip);
4077
4078 retval = ms_switch_clock(chip);
4079 if (retval != STATUS_SUCCESS)
4080 return STATUS_FAIL;
4081
4082 buf = kmalloc(1028, GFP_KERNEL);
4083 if (!buf)
4084 return STATUS_ERROR;
4085
4086 buf[0] = 0x04;
4087 buf[1] = 0x02;
4088 buf[2] = 0x00;
4089 buf[3] = 0x00;
4090
4091 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4092 if (retval != STATUS_SUCCESS) {
4093 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4094 goto free_buffer;
4095 }
4096
4097 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4098 2, WAIT_INT, 0, 0, buf + 4, 1024);
4099 if (retval != STATUS_SUCCESS) {
4100 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4101 rtsx_clear_ms_error(chip);
4102 goto free_buffer;
4103 }
4104 if (check_ms_err(chip)) {
4105 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4106 rtsx_clear_ms_error(chip);
4107 retval = STATUS_FAIL;
4108 goto free_buffer;
4109 }
4110
4111 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4112 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4113
4114free_buffer:
4115 kfree(buf);
4116 return retval;
4117}
4118
4119int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4120{
4121 struct ms_info *ms_card = &chip->ms_card;
4122 int retval;
4123 int bufflen;
4124#ifdef MG_SET_ICV_SLOW
4125 int i;
4126#endif
4127 unsigned int lun = SCSI_LUN(srb);
4128 u8 *buf = NULL;
4129
4130 ms_cleanup_work(chip);
4131
4132 retval = ms_switch_clock(chip);
4133 if (retval != STATUS_SUCCESS)
4134 return STATUS_FAIL;
4135
4136 buf = kmalloc(1028, GFP_KERNEL);
4137 if (!buf)
4138 return STATUS_ERROR;
4139
4140 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4141 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4142
4143 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4144 if (retval != STATUS_SUCCESS) {
4145 if (ms_card->mg_auth == 0) {
4146 if ((buf[5] & 0xC0) != 0)
4147 set_sense_type
4148 (chip, lun,
4149 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4150 else
4151 set_sense_type(chip, lun,
4152 SENSE_TYPE_MG_WRITE_ERR);
4153 } else {
4154 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4155 }
4156 goto set_ICV_finish;
4157 }
4158
4159#ifdef MG_SET_ICV_SLOW
4160 for (i = 0; i < 2; i++) {
4161 udelay(50);
4162
4163 rtsx_init_cmd(chip);
4164
4165 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4166 0xFF, PRO_WRITE_LONG_DATA);
4167 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4168 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4169 0x01, RING_BUFFER);
4170
4171 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4172
4173 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4174 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
4175 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4176 MS_TRANSFER_END, MS_TRANSFER_END);
4177
4178 rtsx_send_cmd_no_wait(chip);
4179
4180 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i * 512,
4181 512, 0, DMA_TO_DEVICE, 3000);
4182 if (retval < 0 || check_ms_err(chip)) {
4183 rtsx_clear_ms_error(chip);
4184 if (ms_card->mg_auth == 0) {
4185 if ((buf[5] & 0xC0) != 0)
4186 set_sense_type
4187 (chip, lun,
4188 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4189 else
4190 set_sense_type(chip, lun,
4191 SENSE_TYPE_MG_WRITE_ERR);
4192 } else {
4193 set_sense_type(chip, lun,
4194 SENSE_TYPE_MG_WRITE_ERR);
4195 }
4196 retval = STATUS_FAIL;
4197 goto set_ICV_finish;
4198 }
4199 }
4200#else
4201 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4202 2, WAIT_INT, 0, 0, buf + 4, 1024);
4203 if (retval != STATUS_SUCCESS || check_ms_err(chip)) {
4204 rtsx_clear_ms_error(chip);
4205 if (ms_card->mg_auth == 0) {
4206 if ((buf[5] & 0xC0) != 0)
4207 set_sense_type
4208 (chip, lun,
4209 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4210 else
4211 set_sense_type(chip, lun,
4212 SENSE_TYPE_MG_WRITE_ERR);
4213 } else {
4214 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4215 }
4216 goto set_ICV_finish;
4217 }
4218#endif
4219
4220set_ICV_finish:
4221 kfree(buf);
4222 return retval;
4223}
4224
4225#endif
4226
4227void ms_cleanup_work(struct rtsx_chip *chip)
4228{
4229 struct ms_info *ms_card = &chip->ms_card;
4230
4231 if (CHK_MSPRO(ms_card)) {
4232 if (ms_card->seq_mode) {
4233 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4234 mspro_stop_seq_mode(chip);
4235 ms_card->cleanup_counter = 0;
4236 }
4237 if (CHK_MSHG(ms_card)) {
4238 rtsx_write_register(chip, MS_CFG,
4239 MS_2K_SECTOR_MODE, 0x00);
4240 }
4241 }
4242#ifdef MS_DELAY_WRITE
4243 else if ((!CHK_MSPRO(ms_card)) &&
4244 ms_card->delay_write.delay_write_flag) {
4245 dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4246 ms_delay_write(chip);
4247 ms_card->cleanup_counter = 0;
4248 }
4249#endif
4250}
4251
4252int ms_power_off_card3v3(struct rtsx_chip *chip)
4253{
4254 int retval;
4255
4256 retval = disable_card_clock(chip, MS_CARD);
4257 if (retval != STATUS_SUCCESS)
4258 return STATUS_FAIL;
4259
4260 if (chip->asic_code) {
4261 retval = ms_pull_ctl_disable(chip);
4262 if (retval != STATUS_SUCCESS)
4263 return STATUS_FAIL;
4264 } else {
4265 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4266 FPGA_MS_PULL_CTL_BIT | 0x20,
4267 FPGA_MS_PULL_CTL_BIT);
4268 if (retval)
4269 return retval;
4270 }
4271 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
4272 if (retval)
4273 return retval;
4274
4275 if (!chip->ft2_fast_mode) {
4276 retval = card_power_off(chip, MS_CARD);
4277 if (retval != STATUS_SUCCESS)
4278 return STATUS_FAIL;
4279 }
4280
4281 return STATUS_SUCCESS;
4282}
4283
4284int release_ms_card(struct rtsx_chip *chip)
4285{
4286 struct ms_info *ms_card = &chip->ms_card;
4287 int retval;
4288
4289#ifdef MS_DELAY_WRITE
4290 ms_card->delay_write.delay_write_flag = 0;
4291#endif
4292 ms_card->pro_under_formatting = 0;
4293
4294 chip->card_ready &= ~MS_CARD;
4295 chip->card_fail &= ~MS_CARD;
4296 chip->card_wp &= ~MS_CARD;
4297
4298 ms_free_l2p_tbl(chip);
4299
4300 memset(ms_card->raw_sys_info, 0, 96);
4301#ifdef SUPPORT_PCGL_1P18
4302 memset(ms_card->raw_model_name, 0, 48);
4303#endif
4304
4305 retval = ms_power_off_card3v3(chip);
4306 if (retval != STATUS_SUCCESS)
4307 return STATUS_FAIL;
4308
4309 return STATUS_SUCCESS;
4310}
4311
