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7#ifndef MFD_AB8500_H
8#define MFD_AB8500_H
9
10#include <linux/atomic.h>
11#include <linux/mutex.h>
12#include <linux/irqdomain.h>
13
14struct device;
15
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21
22
23enum ab8500_version {
24 AB8500_VERSION_AB8500 = 0x0,
25 AB8500_VERSION_AB8505 = 0x1,
26 AB8500_VERSION_AB9540 = 0x2,
27 AB8500_VERSION_AB8540 = 0x4,
28 AB8500_VERSION_UNDEFINED,
29};
30
31
32#define AB8500_CUTEARLY 0x00
33#define AB8500_CUT1P0 0x10
34#define AB8500_CUT1P1 0x11
35#define AB8500_CUT1P2 0x12
36#define AB8500_CUT2P0 0x20
37#define AB8500_CUT3P0 0x30
38#define AB8500_CUT3P3 0x33
39
40
41
42
43#define AB8500_M_FSM_RANK 0x0
44#define AB8500_SYS_CTRL1_BLOCK 0x1
45#define AB8500_SYS_CTRL2_BLOCK 0x2
46#define AB8500_REGU_CTRL1 0x3
47#define AB8500_REGU_CTRL2 0x4
48#define AB8500_USB 0x5
49#define AB8500_TVOUT 0x6
50#define AB8500_DBI 0x7
51#define AB8500_ECI_AV_ACC 0x8
52#define AB8500_RESERVED 0x9
53#define AB8500_GPADC 0xA
54#define AB8500_CHARGER 0xB
55#define AB8500_GAS_GAUGE 0xC
56#define AB8500_AUDIO 0xD
57#define AB8500_INTERRUPT 0xE
58#define AB8500_RTC 0xF
59#define AB8500_MISC 0x10
60#define AB8500_DEVELOPMENT 0x11
61#define AB8500_DEBUG 0x12
62#define AB8500_PROD_TEST 0x13
63#define AB8500_STE_TEST 0x14
64#define AB8500_OTP_EMUL 0x15
65
66#define AB8500_DEBUG_FIELD_LAST 0x16
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74
75#define AB8500_INT_MAIN_EXT_CH_NOT_OK 0
76#define AB8500_INT_UN_PLUG_TV_DET 1
77#define AB8500_INT_PLUG_TV_DET 2
78#define AB8500_INT_TEMP_WARM 3
79#define AB8500_INT_PON_KEY2DB_F 4
80#define AB8500_INT_PON_KEY2DB_R 5
81#define AB8500_INT_PON_KEY1DB_F 6
82#define AB8500_INT_PON_KEY1DB_R 7
83
84#define AB8500_INT_BATT_OVV 8
85#define AB8500_INT_MAIN_CH_UNPLUG_DET 10
86#define AB8500_INT_MAIN_CH_PLUG_DET 11
87#define AB8500_INT_VBUS_DET_F 14
88#define AB8500_INT_VBUS_DET_R 15
89
90#define AB8500_INT_VBUS_CH_DROP_END 16
91#define AB8500_INT_RTC_60S 17
92#define AB8500_INT_RTC_ALARM 18
93#define AB8540_INT_BIF_INT 19
94#define AB8500_INT_BAT_CTRL_INDB 20
95#define AB8500_INT_CH_WD_EXP 21
96#define AB8500_INT_VBUS_OVV 22
97#define AB8500_INT_MAIN_CH_DROP_END 23
98
99#define AB8500_INT_CCN_CONV_ACC 24
100#define AB8500_INT_INT_AUD 25
101#define AB8500_INT_CCEOC 26
102#define AB8500_INT_CC_INT_CALIB 27
103#define AB8500_INT_LOW_BAT_F 28
104#define AB8500_INT_LOW_BAT_R 29
105#define AB8500_INT_BUP_CHG_NOT_OK 30
106#define AB8500_INT_BUP_CHG_OK 31
107
108#define AB8500_INT_GP_HW_ADC_CONV_END 32
109#define AB8500_INT_ACC_DETECT_1DB_F 33
110#define AB8500_INT_ACC_DETECT_1DB_R 34
111#define AB8500_INT_ACC_DETECT_22DB_F 35
112#define AB8500_INT_ACC_DETECT_22DB_R 36
113#define AB8500_INT_ACC_DETECT_21DB_F 37
114#define AB8500_INT_ACC_DETECT_21DB_R 38
115#define AB8500_INT_GP_SW_ADC_CONV_END 39
116
117#define AB8500_INT_GPIO6R 40
118#define AB8500_INT_GPIO7R 41
119#define AB8500_INT_GPIO8R 42
120#define AB8500_INT_GPIO9R 43
121#define AB8500_INT_GPIO10R 44
122#define AB8500_INT_GPIO11R 45
123#define AB8500_INT_GPIO12R 46
124#define AB8500_INT_GPIO13R 47
125
126#define AB8500_INT_GPIO24R 48
127#define AB8500_INT_GPIO25R 49
128#define AB8500_INT_GPIO36R 50
129#define AB8500_INT_GPIO37R 51
130#define AB8500_INT_GPIO38R 52
131#define AB8500_INT_GPIO39R 53
132#define AB8500_INT_GPIO40R 54
133#define AB8500_INT_GPIO41R 55
134
135#define AB8500_INT_GPIO6F 56
136#define AB8500_INT_GPIO7F 57
137#define AB8500_INT_GPIO8F 58
138#define AB8500_INT_GPIO9F 59
139#define AB8500_INT_GPIO10F 60
140#define AB8500_INT_GPIO11F 61
141#define AB8500_INT_GPIO12F 62
142#define AB8500_INT_GPIO13F 63
143
144#define AB8500_INT_GPIO24F 64
145#define AB8500_INT_GPIO25F 65
146#define AB8500_INT_GPIO36F 66
147#define AB8500_INT_GPIO37F 67
148#define AB8500_INT_GPIO38F 68
149#define AB8500_INT_GPIO39F 69
150#define AB8500_INT_GPIO40F 70
151#define AB8500_INT_GPIO41F 71
152
153#define AB8500_INT_ADP_SOURCE_ERROR 72
154#define AB8500_INT_ADP_SINK_ERROR 73
155#define AB8500_INT_ADP_PROBE_PLUG 74
156#define AB8500_INT_ADP_PROBE_UNPLUG 75
157#define AB8500_INT_ADP_SENSE_OFF 76
158#define AB8500_INT_USB_PHY_POWER_ERR 78
159#define AB8500_INT_USB_LINK_STATUS 79
160
161#define AB8500_INT_BTEMP_LOW 80
162#define AB8500_INT_BTEMP_LOW_MEDIUM 81
163#define AB8500_INT_BTEMP_MEDIUM_HIGH 82
164#define AB8500_INT_BTEMP_HIGH 83
165
166#define AB8500_INT_SRP_DETECT 88
167#define AB8500_INT_USB_CHARGER_NOT_OKR 89
168#define AB8500_INT_ID_WAKEUP_R 90
169#define AB8500_INT_ID_DET_PLUGR 91
170#define AB8500_INT_ID_DET_R1R 92
171#define AB8500_INT_ID_DET_R2R 93
172#define AB8500_INT_ID_DET_R3R 94
173#define AB8500_INT_ID_DET_R4R 95
174
175#define AB8500_INT_ID_WAKEUP_F 96
176#define AB8500_INT_ID_DET_PLUGF 97
177#define AB8500_INT_ID_DET_R1F 98
178#define AB8500_INT_ID_DET_R2F 99
179#define AB8500_INT_ID_DET_R3F 100
180#define AB8500_INT_ID_DET_R4F 101
181#define AB8500_INT_CHAUTORESTARTAFTSEC 102
182#define AB8500_INT_CHSTOPBYSEC 103
183
184#define AB8500_INT_USB_CH_TH_PROT_F 104
185#define AB8500_INT_USB_CH_TH_PROT_R 105
186#define AB8500_INT_MAIN_CH_TH_PROT_F 106
187#define AB8500_INT_MAIN_CH_TH_PROT_R 107
188#define AB8500_INT_CHCURLIMNOHSCHIRP 109
189#define AB8500_INT_CHCURLIMHSCHIRP 110
190#define AB8500_INT_XTAL32K_KO 111
191
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193
194#define AB9540_INT_GPIO50R 113
195#define AB9540_INT_GPIO51R 114
196#define AB9540_INT_GPIO52R 115
197#define AB9540_INT_GPIO53R 116
198#define AB9540_INT_GPIO54R 117
199#define AB9540_INT_IEXT_CH_RF_BFN_R 118
200
201#define AB9540_INT_GPIO50F 121
202#define AB9540_INT_GPIO51F 122
203#define AB9540_INT_GPIO52F 123
204#define AB9540_INT_GPIO53F 124
205#define AB9540_INT_GPIO54F 125
206#define AB9540_INT_IEXT_CH_RF_BFN_F 126
207
208#define AB8505_INT_KEYSTUCK 128
209#define AB8505_INT_IKR 129
210#define AB8505_INT_IKP 130
211#define AB8505_INT_KP 131
212#define AB8505_INT_KEYDEGLITCH 132
213#define AB8505_INT_MODPWRSTATUSF 134
214#define AB8505_INT_MODPWRSTATUSR 135
215
216#define AB8500_INT_HOOK_DET_NEG_F 138
217#define AB8500_INT_HOOK_DET_NEG_R 139
218#define AB8500_INT_HOOK_DET_POS_F 140
219#define AB8500_INT_HOOK_DET_POS_R 141
220#define AB8500_INT_PLUG_DET_COMP_F 142
221#define AB8500_INT_PLUG_DET_COMP_R 143
222
223#define AB8505_INT_COLL 144
224#define AB8505_INT_RESERR 145
225#define AB8505_INT_FRAERR 146
226#define AB8505_INT_COMERR 147
227#define AB8505_INT_SPDSET 148
228#define AB8505_INT_DSENT 149
229#define AB8505_INT_DREC 150
230#define AB8505_INT_ACC_INT 151
231
232#define AB8505_INT_NOPINT 152
233
234#define AB8540_INT_IDPLUGDETCOMPF 160
235#define AB8540_INT_IDPLUGDETCOMPR 161
236#define AB8540_INT_FMDETCOMPLOF 162
237#define AB8540_INT_FMDETCOMPLOR 163
238#define AB8540_INT_FMDETCOMPHIF 164
239#define AB8540_INT_FMDETCOMPHIR 165
240#define AB8540_INT_ID5VDETCOMPF 166
241#define AB8540_INT_ID5VDETCOMPR 167
242
243#define AB8540_INT_GPIO43F 168
244#define AB8540_INT_GPIO43R 169
245#define AB8540_INT_GPIO44F 170
246#define AB8540_INT_GPIO44R 171
247#define AB8540_INT_KEYPOSDETCOMPF 172
248#define AB8540_INT_KEYPOSDETCOMPR 173
249#define AB8540_INT_KEYNEGDETCOMPF 174
250#define AB8540_INT_KEYNEGDETCOMPR 175
251
252#define AB8540_INT_GPIO1VBATF 176
253#define AB8540_INT_GPIO1VBATR 177
254#define AB8540_INT_GPIO2VBATF 178
255#define AB8540_INT_GPIO2VBATR 179
256#define AB8540_INT_GPIO3VBATF 180
257#define AB8540_INT_GPIO3VBATR 181
258#define AB8540_INT_GPIO4VBATF 182
259#define AB8540_INT_GPIO4VBATR 183
260
261#define AB8540_INT_SYSCLKREQ2F 184
262#define AB8540_INT_SYSCLKREQ2R 185
263#define AB8540_INT_SYSCLKREQ3F 186
264#define AB8540_INT_SYSCLKREQ3R 187
265#define AB8540_INT_SYSCLKREQ4F 188
266#define AB8540_INT_SYSCLKREQ4R 189
267#define AB8540_INT_SYSCLKREQ5F 190
268#define AB8540_INT_SYSCLKREQ5R 191
269
270#define AB8540_INT_PWMOUT1F 192
271#define AB8540_INT_PWMOUT1R 193
272#define AB8540_INT_PWMCTRL0F 194
273#define AB8540_INT_PWMCTRL0R 195
274#define AB8540_INT_PWMCTRL1F 196
275#define AB8540_INT_PWMCTRL1R 197
276#define AB8540_INT_SYSCLKREQ6F 198
277#define AB8540_INT_SYSCLKREQ6R 199
278
279#define AB8540_INT_PWMEXTVIBRA1F 200
280#define AB8540_INT_PWMEXTVIBRA1R 201
281#define AB8540_INT_PWMEXTVIBRA2F 202
282#define AB8540_INT_PWMEXTVIBRA2R 203
283#define AB8540_INT_PWMOUT2F 204
284#define AB8540_INT_PWMOUT2R 205
285#define AB8540_INT_PWMOUT3F 206
286#define AB8540_INT_PWMOUT3R 207
287
288#define AB8540_INT_ADDATA2F 208
289#define AB8540_INT_ADDATA2R 209
290#define AB8540_INT_DADATA2F 210
291#define AB8540_INT_DADATA2R 211
292#define AB8540_INT_FSYNC2F 212
293#define AB8540_INT_FSYNC2R 213
294#define AB8540_INT_BITCLK2F 214
295#define AB8540_INT_BITCLK2R 215
296
297#define AB8540_INT_RTC_1S 216
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305
306#define AB8500_NR_IRQS 112
307#define AB8505_NR_IRQS 153
308#define AB9540_NR_IRQS 153
309#define AB8540_NR_IRQS 216
310
311#define AB8500_MAX_NR_IRQS AB8540_NR_IRQS
312
313#define AB8500_NUM_IRQ_REGS 14
314#define AB9540_NUM_IRQ_REGS 20
315#define AB8540_NUM_IRQ_REGS 27
316
317
318#define AB8500_POR_ON_VBAT 0x01
319#define AB8500_POW_KEY_1_ON 0x02
320#define AB8500_POW_KEY_2_ON 0x04
321#define AB8500_RTC_ALARM 0x08
322#define AB8500_MAIN_CH_DET 0x10
323#define AB8500_VBUS_DET 0x20
324#define AB8500_USB_ID_DET 0x40
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347struct ab8500 {
348 struct device *dev;
349 struct mutex lock;
350 struct mutex irq_lock;
351 atomic_t transfer_ongoing;
352 int irq;
353 struct irq_domain *domain;
354 enum ab8500_version version;
355 u8 chip_id;
356
357 int (*write)(struct ab8500 *ab8500, u16 addr, u8 data);
358 int (*write_masked)(struct ab8500 *ab8500, u16 addr, u8 mask, u8 data);
359 int (*read)(struct ab8500 *ab8500, u16 addr);
360
361 unsigned long tx_buf[4];
362 unsigned long rx_buf[4];
363
364 u8 *mask;
365 u8 *oldmask;
366 int mask_size;
367 const int *irq_reg_offset;
368 int it_latchhier_num;
369};
370
371struct ab8500_codec_platform_data;
372struct ab8500_sysctrl_platform_data;
373
374
375
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377
378
379struct ab8500_platform_data {
380 void (*init) (struct ab8500 *);
381 struct ab8500_codec_platform_data *codec;
382 struct ab8500_sysctrl_platform_data *sysctrl;
383};
384
385extern int ab8500_init(struct ab8500 *ab8500,
386 enum ab8500_version version);
387extern int ab8500_exit(struct ab8500 *ab8500);
388
389extern int ab8500_suspend(struct ab8500 *ab8500);
390
391static inline int is_ab8500(struct ab8500 *ab)
392{
393 return ab->version == AB8500_VERSION_AB8500;
394}
395
396static inline int is_ab8505(struct ab8500 *ab)
397{
398 return ab->version == AB8500_VERSION_AB8505;
399}
400
401static inline int is_ab9540(struct ab8500 *ab)
402{
403 return ab->version == AB8500_VERSION_AB9540;
404}
405
406static inline int is_ab8540(struct ab8500 *ab)
407{
408 return ab->version == AB8500_VERSION_AB8540;
409}
410
411
412static inline int is_ab8500_1p0_or_earlier(struct ab8500 *ab)
413{
414 return (is_ab8500(ab) && (ab->chip_id <= AB8500_CUT1P0));
415}
416
417
418static inline int is_ab8500_1p1_or_earlier(struct ab8500 *ab)
419{
420 return (is_ab8500(ab) && (ab->chip_id <= AB8500_CUT1P1));
421}
422
423
424static inline int is_ab8500_2p0_or_earlier(struct ab8500 *ab)
425{
426 return (is_ab8500(ab) && (ab->chip_id <= AB8500_CUT2P0));
427}
428
429static inline int is_ab8500_3p3_or_earlier(struct ab8500 *ab)
430{
431 return (is_ab8500(ab) && (ab->chip_id <= AB8500_CUT3P3));
432}
433
434
435static inline int is_ab8500_2p0(struct ab8500 *ab)
436{
437 return (is_ab8500(ab) && (ab->chip_id == AB8500_CUT2P0));
438}
439
440static inline int is_ab8505_1p0_or_earlier(struct ab8500 *ab)
441{
442 return (is_ab8505(ab) && (ab->chip_id <= AB8500_CUT1P0));
443}
444
445static inline int is_ab8505_2p0(struct ab8500 *ab)
446{
447 return (is_ab8505(ab) && (ab->chip_id == AB8500_CUT2P0));
448}
449
450static inline int is_ab9540_1p0_or_earlier(struct ab8500 *ab)
451{
452 return (is_ab9540(ab) && (ab->chip_id <= AB8500_CUT1P0));
453}
454
455static inline int is_ab9540_2p0(struct ab8500 *ab)
456{
457 return (is_ab9540(ab) && (ab->chip_id == AB8500_CUT2P0));
458}
459
460
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463
464static inline int is_ab9540_3p0(struct ab8500 *ab)
465{
466 return (is_ab9540(ab) && (ab->chip_id == AB8500_CUT3P0));
467}
468
469static inline int is_ab8540_1p0_or_earlier(struct ab8500 *ab)
470{
471 return is_ab8540(ab) && (ab->chip_id <= AB8500_CUT1P0);
472}
473
474static inline int is_ab8540_1p1_or_earlier(struct ab8500 *ab)
475{
476 return is_ab8540(ab) && (ab->chip_id <= AB8500_CUT1P1);
477}
478
479static inline int is_ab8540_1p2_or_earlier(struct ab8500 *ab)
480{
481 return is_ab8540(ab) && (ab->chip_id <= AB8500_CUT1P2);
482}
483
484static inline int is_ab8540_2p0_or_earlier(struct ab8500 *ab)
485{
486 return is_ab8540(ab) && (ab->chip_id <= AB8500_CUT2P0);
487}
488
489static inline int is_ab8540_2p0(struct ab8500 *ab)
490{
491 return is_ab8540(ab) && (ab->chip_id == AB8500_CUT2P0);
492}
493
494static inline int is_ab8505_2p0_earlier(struct ab8500 *ab)
495{
496 return (is_ab8505(ab) && (ab->chip_id < AB8500_CUT2P0));
497}
498
499static inline int is_ab9540_2p0_or_earlier(struct ab8500 *ab)
500{
501 return (is_ab9540(ab) && (ab->chip_id < AB8500_CUT2P0));
502}
503
504void ab8500_override_turn_on_stat(u8 mask, u8 set);
505
506#ifdef CONFIG_AB8500_DEBUG
507extern int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size);
508void ab8500_dump_all_banks(struct device *dev);
509void ab8500_debug_register_interrupt(int line);
510#else
511static inline void ab8500_dump_all_banks(struct device *dev) {}
512static inline void ab8500_debug_register_interrupt(int line) {}
513#endif
514
515#endif
516