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7#ifndef LINUX_MMC_HOST_H
8#define LINUX_MMC_HOST_H
9
10#include <linux/sched.h>
11#include <linux/device.h>
12#include <linux/fault-inject.h>
13
14#include <linux/mmc/core.h>
15#include <linux/mmc/card.h>
16#include <linux/mmc/pm.h>
17#include <linux/dma-direction.h>
18#include <linux/blk-crypto-profile.h>
19
20struct mmc_ios {
21 unsigned int clock;
22 unsigned short vdd;
23 unsigned int power_delay_ms;
24
25
26
27 unsigned char bus_mode;
28
29#define MMC_BUSMODE_OPENDRAIN 1
30#define MMC_BUSMODE_PUSHPULL 2
31
32 unsigned char chip_select;
33
34#define MMC_CS_DONTCARE 0
35#define MMC_CS_HIGH 1
36#define MMC_CS_LOW 2
37
38 unsigned char power_mode;
39
40#define MMC_POWER_OFF 0
41#define MMC_POWER_UP 1
42#define MMC_POWER_ON 2
43#define MMC_POWER_UNDEFINED 3
44
45 unsigned char bus_width;
46
47#define MMC_BUS_WIDTH_1 0
48#define MMC_BUS_WIDTH_4 2
49#define MMC_BUS_WIDTH_8 3
50
51 unsigned char timing;
52
53#define MMC_TIMING_LEGACY 0
54#define MMC_TIMING_MMC_HS 1
55#define MMC_TIMING_SD_HS 2
56#define MMC_TIMING_UHS_SDR12 3
57#define MMC_TIMING_UHS_SDR25 4
58#define MMC_TIMING_UHS_SDR50 5
59#define MMC_TIMING_UHS_SDR104 6
60#define MMC_TIMING_UHS_DDR50 7
61#define MMC_TIMING_MMC_DDR52 8
62#define MMC_TIMING_MMC_HS200 9
63#define MMC_TIMING_MMC_HS400 10
64#define MMC_TIMING_SD_EXP 11
65#define MMC_TIMING_SD_EXP_1_2V 12
66
67 unsigned char signal_voltage;
68
69#define MMC_SIGNAL_VOLTAGE_330 0
70#define MMC_SIGNAL_VOLTAGE_180 1
71#define MMC_SIGNAL_VOLTAGE_120 2
72
73 unsigned char drv_type;
74
75#define MMC_SET_DRIVER_TYPE_B 0
76#define MMC_SET_DRIVER_TYPE_A 1
77#define MMC_SET_DRIVER_TYPE_C 2
78#define MMC_SET_DRIVER_TYPE_D 3
79
80 bool enhanced_strobe;
81};
82
83struct mmc_clk_phase {
84 bool valid;
85 u16 in_deg;
86 u16 out_deg;
87};
88
89#define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1)
90struct mmc_clk_phase_map {
91 struct mmc_clk_phase phase[MMC_NUM_CLK_PHASES];
92};
93
94struct mmc_host;
95
96struct mmc_host_ops {
97
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101
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103
104
105 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
106 int err);
107 void (*pre_req)(struct mmc_host *host, struct mmc_request *req);
108 void (*request)(struct mmc_host *host, struct mmc_request *req);
109
110 int (*request_atomic)(struct mmc_host *host,
111 struct mmc_request *req);
112
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125
126
127 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
128
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134
135
136 int (*get_ro)(struct mmc_host *host);
137
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143
144
145 int (*get_cd)(struct mmc_host *host);
146
147 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
148
149 void (*ack_sdio_irq)(struct mmc_host *host);
150
151
152 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
153
154 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
155
156
157 int (*card_busy)(struct mmc_host *host);
158
159
160 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
161
162
163 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
164
165
166 int (*execute_hs400_tuning)(struct mmc_host *host, struct mmc_card *card);
167
168
169 int (*hs400_prepare_ddr)(struct mmc_host *host);
170
171
172 void (*hs400_downgrade)(struct mmc_host *host);
173
174
175 void (*hs400_complete)(struct mmc_host *host);
176
177
178 void (*hs400_enhanced_strobe)(struct mmc_host *host,
179 struct mmc_ios *ios);
180 int (*select_drive_strength)(struct mmc_card *card,
181 unsigned int max_dtr, int host_drv,
182 int card_drv, int *drv_type);
183
184 void (*hw_reset)(struct mmc_host *host);
185 void (*card_event)(struct mmc_host *host);
186
187
188
189
190
191 int (*multi_io_quirk)(struct mmc_card *card,
192 unsigned int direction, int blk_size);
193
194
195 int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios);
196};
197
198struct mmc_cqe_ops {
199
200 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
201
202 void (*cqe_disable)(struct mmc_host *host);
203
204
205
206
207 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
208
209 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
210
211
212
213
214
215 void (*cqe_off)(struct mmc_host *host);
216
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218
219
220 int (*cqe_wait_for_idle)(struct mmc_host *host);
221
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225
226 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
227 bool *recovery_needed);
228
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230
231
232 void (*cqe_recovery_start)(struct mmc_host *host);
233
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237
238
239 void (*cqe_recovery_finish)(struct mmc_host *host);
240};
241
242struct mmc_async_req {
243
244 struct mmc_request *mrq;
245
246
247
248
249 enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
250};
251
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261
262
263struct mmc_slot {
264 int cd_irq;
265 bool cd_wake_enabled;
266 void *handler_priv;
267};
268
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274
275
276struct mmc_context_info {
277 bool is_done_rcv;
278 bool is_new_req;
279 bool is_waiting_last_req;
280 wait_queue_head_t wait;
281};
282
283struct regulator;
284struct mmc_pwrseq;
285
286struct mmc_supply {
287 struct regulator *vmmc;
288 struct regulator *vqmmc;
289};
290
291struct mmc_ctx {
292 struct task_struct *task;
293};
294
295struct mmc_host {
296 struct device *parent;
297 struct device class_dev;
298 int index;
299 const struct mmc_host_ops *ops;
300 struct mmc_pwrseq *pwrseq;
301 unsigned int f_min;
302 unsigned int f_max;
303 unsigned int f_init;
304 u32 ocr_avail;
305 u32 ocr_avail_sdio;
306 u32 ocr_avail_sd;
307 u32 ocr_avail_mmc;
308 struct wakeup_source *ws;
309 u32 max_current_330;
310 u32 max_current_300;
311 u32 max_current_180;
312
313#define MMC_VDD_165_195 0x00000080
314#define MMC_VDD_20_21 0x00000100
315#define MMC_VDD_21_22 0x00000200
316#define MMC_VDD_22_23 0x00000400
317#define MMC_VDD_23_24 0x00000800
318#define MMC_VDD_24_25 0x00001000
319#define MMC_VDD_25_26 0x00002000
320#define MMC_VDD_26_27 0x00004000
321#define MMC_VDD_27_28 0x00008000
322#define MMC_VDD_28_29 0x00010000
323#define MMC_VDD_29_30 0x00020000
324#define MMC_VDD_30_31 0x00040000
325#define MMC_VDD_31_32 0x00080000
326#define MMC_VDD_32_33 0x00100000
327#define MMC_VDD_33_34 0x00200000
328#define MMC_VDD_34_35 0x00400000
329#define MMC_VDD_35_36 0x00800000
330
331 u32 caps;
332
333#define MMC_CAP_4_BIT_DATA (1 << 0)
334#define MMC_CAP_MMC_HIGHSPEED (1 << 1)
335#define MMC_CAP_SD_HIGHSPEED (1 << 2)
336#define MMC_CAP_SDIO_IRQ (1 << 3)
337#define MMC_CAP_SPI (1 << 4)
338#define MMC_CAP_NEEDS_POLL (1 << 5)
339#define MMC_CAP_8_BIT_DATA (1 << 6)
340#define MMC_CAP_AGGRESSIVE_PM (1 << 7)
341#define MMC_CAP_NONREMOVABLE (1 << 8)
342#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)
343#define MMC_CAP_3_3V_DDR (1 << 11)
344#define MMC_CAP_1_8V_DDR (1 << 12)
345#define MMC_CAP_1_2V_DDR (1 << 13)
346#define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
347 MMC_CAP_1_2V_DDR)
348#define MMC_CAP_POWER_OFF_CARD (1 << 14)
349#define MMC_CAP_BUS_WIDTH_TEST (1 << 15)
350#define MMC_CAP_UHS_SDR12 (1 << 16)
351#define MMC_CAP_UHS_SDR25 (1 << 17)
352#define MMC_CAP_UHS_SDR50 (1 << 18)
353#define MMC_CAP_UHS_SDR104 (1 << 19)
354#define MMC_CAP_UHS_DDR50 (1 << 20)
355#define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
356 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
357 MMC_CAP_UHS_DDR50)
358#define MMC_CAP_SYNC_RUNTIME_PM (1 << 21)
359#define MMC_CAP_NEED_RSP_BUSY (1 << 22)
360#define MMC_CAP_DRIVER_TYPE_A (1 << 23)
361#define MMC_CAP_DRIVER_TYPE_C (1 << 24)
362#define MMC_CAP_DRIVER_TYPE_D (1 << 25)
363#define MMC_CAP_DONE_COMPLETE (1 << 27)
364#define MMC_CAP_CD_WAKE (1 << 28)
365#define MMC_CAP_CMD_DURING_TFR (1 << 29)
366#define MMC_CAP_CMD23 (1 << 30)
367#define MMC_CAP_HW_RESET (1 << 31)
368
369 u32 caps2;
370
371#define MMC_CAP2_BOOTPART_NOACC (1 << 0)
372#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)
373#define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3)
374#define MMC_CAP2_HS200_1_8V_SDR (1 << 5)
375#define MMC_CAP2_HS200_1_2V_SDR (1 << 6)
376#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
377 MMC_CAP2_HS200_1_2V_SDR)
378#define MMC_CAP2_SD_EXP (1 << 7)
379#define MMC_CAP2_SD_EXP_1_2V (1 << 8)
380#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)
381#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)
382#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)
383#define MMC_CAP2_HS400_1_8V (1 << 15)
384#define MMC_CAP2_HS400_1_2V (1 << 16)
385#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
386 MMC_CAP2_HS400_1_2V)
387#define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
388#define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
389#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
390#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18)
391#define MMC_CAP2_NO_SDIO (1 << 19)
392#define MMC_CAP2_HS400_ES (1 << 20)
393#define MMC_CAP2_NO_SD (1 << 21)
394#define MMC_CAP2_NO_MMC (1 << 22)
395#define MMC_CAP2_CQE (1 << 23)
396#define MMC_CAP2_CQE_DCMD (1 << 24)
397#define MMC_CAP2_AVOID_3_3V (1 << 25)
398#define MMC_CAP2_MERGE_CAPABLE (1 << 26)
399#ifdef CONFIG_MMC_CRYPTO
400#define MMC_CAP2_CRYPTO (1 << 27)
401#else
402#define MMC_CAP2_CRYPTO 0
403#endif
404#define MMC_CAP2_ALT_GPT_TEGRA (1 << 28)
405
406 int fixed_drv_type;
407
408 mmc_pm_flag_t pm_caps;
409
410
411 unsigned int max_seg_size;
412 unsigned short max_segs;
413 unsigned short unused;
414 unsigned int max_req_size;
415 unsigned int max_blk_size;
416 unsigned int max_blk_count;
417 unsigned int max_busy_timeout;
418
419
420 spinlock_t lock;
421
422 struct mmc_ios ios;
423
424
425 unsigned int use_spi_crc:1;
426 unsigned int claimed:1;
427 unsigned int doing_init_tune:1;
428 unsigned int can_retune:1;
429 unsigned int doing_retune:1;
430 unsigned int retune_now:1;
431 unsigned int retune_paused:1;
432 unsigned int retune_crc_disable:1;
433 unsigned int can_dma_map_merge:1;
434
435 int rescan_disable;
436 int rescan_entered;
437
438 int need_retune;
439 int hold_retune;
440 unsigned int retune_period;
441 struct timer_list retune_timer;
442
443 bool trigger_card_event;
444
445 struct mmc_card *card;
446
447 wait_queue_head_t wq;
448 struct mmc_ctx *claimer;
449 int claim_cnt;
450 struct mmc_ctx default_ctx;
451
452 struct delayed_work detect;
453 int detect_change;
454 struct mmc_slot slot;
455
456 const struct mmc_bus_ops *bus_ops;
457
458 unsigned int sdio_irqs;
459 struct task_struct *sdio_irq_thread;
460 struct delayed_work sdio_irq_work;
461 bool sdio_irq_pending;
462 atomic_t sdio_irq_thread_abort;
463
464 mmc_pm_flag_t pm_flags;
465
466 struct led_trigger *led;
467
468#ifdef CONFIG_REGULATOR
469 bool regulator_enabled;
470#endif
471 struct mmc_supply supply;
472
473 struct dentry *debugfs_root;
474
475
476 struct mmc_request *ongoing_mrq;
477
478#ifdef CONFIG_FAIL_MMC_REQUEST
479 struct fault_attr fail_mmc_request;
480#endif
481
482 unsigned int actual_clock;
483
484 unsigned int slotno;
485
486 int dsr_req;
487 u32 dsr;
488
489
490 const struct mmc_cqe_ops *cqe_ops;
491 void *cqe_private;
492 int cqe_qdepth;
493 bool cqe_enabled;
494 bool cqe_on;
495
496
497#ifdef CONFIG_MMC_CRYPTO
498 struct blk_crypto_profile crypto_profile;
499#endif
500
501
502 bool hsq_enabled;
503
504 unsigned long private[] ____cacheline_aligned;
505};
506
507struct device_node;
508
509struct mmc_host *mmc_alloc_host(int extra, struct device *);
510int mmc_add_host(struct mmc_host *);
511void mmc_remove_host(struct mmc_host *);
512void mmc_free_host(struct mmc_host *);
513void mmc_of_parse_clk_phase(struct mmc_host *host,
514 struct mmc_clk_phase_map *map);
515int mmc_of_parse(struct mmc_host *host);
516int mmc_of_parse_voltage(struct mmc_host *host, u32 *mask);
517
518static inline void *mmc_priv(struct mmc_host *host)
519{
520 return (void *)host->private;
521}
522
523static inline struct mmc_host *mmc_from_priv(void *priv)
524{
525 return container_of(priv, struct mmc_host, private);
526}
527
528#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
529
530#define mmc_dev(x) ((x)->parent)
531#define mmc_classdev(x) (&(x)->class_dev)
532#define mmc_hostname(x) (dev_name(&(x)->class_dev))
533
534void mmc_detect_change(struct mmc_host *, unsigned long delay);
535void mmc_request_done(struct mmc_host *, struct mmc_request *);
536void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
537
538void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
539
540
541
542
543
544static inline bool sdio_irq_claimed(struct mmc_host *host)
545{
546 return host->sdio_irqs > 0;
547}
548
549static inline void mmc_signal_sdio_irq(struct mmc_host *host)
550{
551 host->ops->enable_sdio_irq(host, 0);
552 host->sdio_irq_pending = true;
553 if (host->sdio_irq_thread)
554 wake_up_process(host->sdio_irq_thread);
555}
556
557void sdio_signal_irq(struct mmc_host *host);
558
559#ifdef CONFIG_REGULATOR
560int mmc_regulator_set_ocr(struct mmc_host *mmc,
561 struct regulator *supply,
562 unsigned short vdd_bit);
563int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
564#else
565static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
566 struct regulator *supply,
567 unsigned short vdd_bit)
568{
569 return 0;
570}
571
572static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
573 struct mmc_ios *ios)
574{
575 return -EINVAL;
576}
577#endif
578
579int mmc_regulator_get_supply(struct mmc_host *mmc);
580
581static inline int mmc_card_is_removable(struct mmc_host *host)
582{
583 return !(host->caps & MMC_CAP_NONREMOVABLE);
584}
585
586static inline int mmc_card_keep_power(struct mmc_host *host)
587{
588 return host->pm_flags & MMC_PM_KEEP_POWER;
589}
590
591static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
592{
593 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
594}
595
596
597static inline int mmc_card_hs(struct mmc_card *card)
598{
599 return card->host->ios.timing == MMC_TIMING_SD_HS ||
600 card->host->ios.timing == MMC_TIMING_MMC_HS;
601}
602
603
604static inline int mmc_card_uhs(struct mmc_card *card)
605{
606 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
607 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
608}
609
610void mmc_retune_timer_stop(struct mmc_host *host);
611
612static inline void mmc_retune_needed(struct mmc_host *host)
613{
614 if (host->can_retune)
615 host->need_retune = 1;
616}
617
618static inline bool mmc_can_retune(struct mmc_host *host)
619{
620 return host->can_retune == 1;
621}
622
623static inline bool mmc_doing_retune(struct mmc_host *host)
624{
625 return host->doing_retune == 1;
626}
627
628static inline bool mmc_doing_tune(struct mmc_host *host)
629{
630 return host->doing_retune == 1 || host->doing_init_tune == 1;
631}
632
633static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
634{
635 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
636}
637
638int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
639int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode);
640int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd);
641
642#endif
643