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10#ifndef __SHMOB_DRM_H__
11#define __SHMOB_DRM_H__
12
13#include <drm/drm_mode.h>
14
15enum shmob_drm_clk_source {
16 SHMOB_DRM_CLK_BUS,
17 SHMOB_DRM_CLK_PERIPHERAL,
18 SHMOB_DRM_CLK_EXTERNAL,
19};
20
21enum shmob_drm_interface {
22 SHMOB_DRM_IFACE_RGB8,
23 SHMOB_DRM_IFACE_RGB9,
24 SHMOB_DRM_IFACE_RGB12A,
25 SHMOB_DRM_IFACE_RGB12B,
26 SHMOB_DRM_IFACE_RGB16,
27 SHMOB_DRM_IFACE_RGB18,
28 SHMOB_DRM_IFACE_RGB24,
29 SHMOB_DRM_IFACE_YUV422,
30 SHMOB_DRM_IFACE_SYS8A,
31 SHMOB_DRM_IFACE_SYS8B,
32 SHMOB_DRM_IFACE_SYS8C,
33 SHMOB_DRM_IFACE_SYS8D,
34 SHMOB_DRM_IFACE_SYS9,
35 SHMOB_DRM_IFACE_SYS12,
36 SHMOB_DRM_IFACE_SYS16A,
37 SHMOB_DRM_IFACE_SYS16B,
38 SHMOB_DRM_IFACE_SYS16C,
39 SHMOB_DRM_IFACE_SYS18,
40 SHMOB_DRM_IFACE_SYS24,
41};
42
43struct shmob_drm_backlight_data {
44 const char *name;
45 int max_brightness;
46 int (*get_brightness)(void);
47 int (*set_brightness)(int brightness);
48};
49
50struct shmob_drm_panel_data {
51 unsigned int width_mm;
52 unsigned int height_mm;
53 struct drm_mode_modeinfo mode;
54};
55
56struct shmob_drm_sys_interface_data {
57 unsigned int read_latch:6;
58 unsigned int read_setup:8;
59 unsigned int read_cycle:8;
60 unsigned int read_strobe:8;
61 unsigned int write_setup:8;
62 unsigned int write_cycle:8;
63 unsigned int write_strobe:8;
64 unsigned int cs_setup:3;
65 unsigned int vsync_active_high:1;
66 unsigned int vsync_dir_input:1;
67};
68
69#define SHMOB_DRM_IFACE_FL_DWPOL (1 << 0)
70#define SHMOB_DRM_IFACE_FL_DIPOL (1 << 1)
71#define SHMOB_DRM_IFACE_FL_DAPOL (1 << 2)
72#define SHMOB_DRM_IFACE_FL_HSCNT (1 << 3)
73#define SHMOB_DRM_IFACE_FL_DWCNT (1 << 4)
74
75struct shmob_drm_interface_data {
76 enum shmob_drm_interface interface;
77 struct shmob_drm_sys_interface_data sys;
78 unsigned int clk_div;
79 unsigned int flags;
80};
81
82struct shmob_drm_platform_data {
83 enum shmob_drm_clk_source clk_source;
84 struct shmob_drm_interface_data iface;
85 struct shmob_drm_panel_data panel;
86 struct shmob_drm_backlight_data backlight;
87};
88
89#endif
90