1
2
3#include <linux/bitmap.h>
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/interrupt.h>
7#include <linux/irq.h>
8#include <linux/spinlock.h>
9#include <linux/list.h>
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/debugfs.h>
13#include <linux/seq_file.h>
14#include <linux/gpio.h>
15#include <linux/idr.h>
16#include <linux/slab.h>
17#include <linux/acpi.h>
18#include <linux/gpio/driver.h>
19#include <linux/gpio/machine.h>
20#include <linux/pinctrl/consumer.h>
21#include <linux/fs.h>
22#include <linux/compat.h>
23#include <linux/file.h>
24#include <uapi/linux/gpio.h>
25
26#include "gpiolib.h"
27#include "gpiolib-of.h"
28#include "gpiolib-acpi.h"
29#include "gpiolib-cdev.h"
30#include "gpiolib-sysfs.h"
31
32#define CREATE_TRACE_POINTS
33#include <trace/events/gpio.h>
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49#ifdef DEBUG
50#define extra_checks 1
51#else
52#define extra_checks 0
53#endif
54
55
56static DEFINE_IDA(gpio_ida);
57static dev_t gpio_devt;
58#define GPIO_DEV_MAX 256
59static int gpio_bus_match(struct device *dev, struct device_driver *drv);
60static struct bus_type gpio_bus_type = {
61 .name = "gpio",
62 .match = gpio_bus_match,
63};
64
65
66
67
68#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
69
70
71
72
73
74DEFINE_SPINLOCK(gpio_lock);
75
76static DEFINE_MUTEX(gpio_lookup_lock);
77static LIST_HEAD(gpio_lookup_list);
78LIST_HEAD(gpio_devices);
79
80static DEFINE_MUTEX(gpio_machine_hogs_mutex);
81static LIST_HEAD(gpio_machine_hogs);
82
83static void gpiochip_free_hogs(struct gpio_chip *gc);
84static int gpiochip_add_irqchip(struct gpio_chip *gc,
85 struct lock_class_key *lock_key,
86 struct lock_class_key *request_key);
87static void gpiochip_irqchip_remove(struct gpio_chip *gc);
88static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
89static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
90static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
91
92static bool gpiolib_initialized;
93
94static inline void desc_set_label(struct gpio_desc *d, const char *label)
95{
96 d->label = label;
97}
98
99
100
101
102
103
104
105
106
107struct gpio_desc *gpio_to_desc(unsigned gpio)
108{
109 struct gpio_device *gdev;
110 unsigned long flags;
111
112 spin_lock_irqsave(&gpio_lock, flags);
113
114 list_for_each_entry(gdev, &gpio_devices, list) {
115 if (gdev->base <= gpio &&
116 gdev->base + gdev->ngpio > gpio) {
117 spin_unlock_irqrestore(&gpio_lock, flags);
118 return &gdev->descs[gpio - gdev->base];
119 }
120 }
121
122 spin_unlock_irqrestore(&gpio_lock, flags);
123
124 if (!gpio_is_valid(gpio))
125 pr_warn("invalid GPIO %d\n", gpio);
126
127 return NULL;
128}
129EXPORT_SYMBOL_GPL(gpio_to_desc);
130
131
132
133
134
135
136
137
138
139
140
141struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
142 unsigned int hwnum)
143{
144 struct gpio_device *gdev = gc->gpiodev;
145
146 if (hwnum >= gdev->ngpio)
147 return ERR_PTR(-EINVAL);
148
149 return &gdev->descs[hwnum];
150}
151EXPORT_SYMBOL_GPL(gpiochip_get_desc);
152
153
154
155
156
157
158
159
160
161
162
163int desc_to_gpio(const struct gpio_desc *desc)
164{
165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
166}
167EXPORT_SYMBOL_GPL(desc_to_gpio);
168
169
170
171
172
173
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
175{
176 if (!desc || !desc->gdev)
177 return NULL;
178 return desc->gdev->chip;
179}
180EXPORT_SYMBOL_GPL(gpiod_to_chip);
181
182
183static int gpiochip_find_base(int ngpio)
184{
185 struct gpio_device *gdev;
186 int base = ARCH_NR_GPIOS - ngpio;
187
188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
189
190 if (gdev->base + gdev->ngpio <= base)
191 break;
192 else
193
194 base = gdev->base - ngpio;
195 }
196
197 if (gpio_is_valid(base)) {
198 pr_debug("%s: found new base at %d\n", __func__, base);
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
203 }
204}
205
206
207
208
209
210
211
212
213
214int gpiod_get_direction(struct gpio_desc *desc)
215{
216 struct gpio_chip *gc;
217 unsigned int offset;
218 int ret;
219
220 gc = gpiod_to_chip(desc);
221 offset = gpio_chip_hwgpio(desc);
222
223
224
225
226
227 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
228 test_bit(FLAG_IS_OUT, &desc->flags))
229 return 0;
230
231 if (!gc->get_direction)
232 return -ENOTSUPP;
233
234 ret = gc->get_direction(gc, offset);
235 if (ret < 0)
236 return ret;
237
238
239 if (ret > 0)
240 ret = 1;
241
242 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
243
244 return ret;
245}
246EXPORT_SYMBOL_GPL(gpiod_get_direction);
247
248
249
250
251
252
253
254
255static int gpiodev_add_to_list(struct gpio_device *gdev)
256{
257 struct gpio_device *prev, *next;
258
259 if (list_empty(&gpio_devices)) {
260
261 list_add_tail(&gdev->list, &gpio_devices);
262 return 0;
263 }
264
265 next = list_first_entry(&gpio_devices, struct gpio_device, list);
266 if (gdev->base + gdev->ngpio <= next->base) {
267
268 list_add(&gdev->list, &gpio_devices);
269 return 0;
270 }
271
272 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
273 if (prev->base + prev->ngpio <= gdev->base) {
274
275 list_add_tail(&gdev->list, &gpio_devices);
276 return 0;
277 }
278
279 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
280
281 if (&next->list == &gpio_devices)
282 break;
283
284
285 if (prev->base + prev->ngpio <= gdev->base
286 && gdev->base + gdev->ngpio <= next->base) {
287 list_add(&gdev->list, &prev->list);
288 return 0;
289 }
290 }
291
292 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
293 return -EBUSY;
294}
295
296
297
298
299
300
301
302static struct gpio_desc *gpio_name_to_desc(const char * const name)
303{
304 struct gpio_device *gdev;
305 unsigned long flags;
306
307 if (!name)
308 return NULL;
309
310 spin_lock_irqsave(&gpio_lock, flags);
311
312 list_for_each_entry(gdev, &gpio_devices, list) {
313 int i;
314
315 for (i = 0; i != gdev->ngpio; ++i) {
316 struct gpio_desc *desc = &gdev->descs[i];
317
318 if (!desc->name)
319 continue;
320
321 if (!strcmp(desc->name, name)) {
322 spin_unlock_irqrestore(&gpio_lock, flags);
323 return desc;
324 }
325 }
326 }
327
328 spin_unlock_irqrestore(&gpio_lock, flags);
329
330 return NULL;
331}
332
333
334
335
336
337
338
339
340
341static int gpiochip_set_desc_names(struct gpio_chip *gc)
342{
343 struct gpio_device *gdev = gc->gpiodev;
344 int i;
345
346
347 for (i = 0; i != gc->ngpio; ++i) {
348 struct gpio_desc *gpio;
349
350 gpio = gpio_name_to_desc(gc->names[i]);
351 if (gpio)
352 dev_warn(&gdev->dev,
353 "Detected name collision for GPIO name '%s'\n",
354 gc->names[i]);
355 }
356
357
358 for (i = 0; i != gc->ngpio; ++i)
359 gdev->descs[i].name = gc->names[i];
360
361 return 0;
362}
363
364
365
366
367
368
369
370
371
372
373static int devprop_gpiochip_set_names(struct gpio_chip *chip)
374{
375 struct gpio_device *gdev = chip->gpiodev;
376 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
377 const char **names;
378 int ret, i;
379 int count;
380
381 count = fwnode_property_string_array_count(fwnode, "gpio-line-names");
382 if (count < 0)
383 return 0;
384
385
386
387
388
389
390
391
392
393 if (count <= chip->offset) {
394 dev_warn(&gdev->dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
395 count, chip->offset);
396 return 0;
397 }
398
399 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
400 if (!names)
401 return -ENOMEM;
402
403 ret = fwnode_property_read_string_array(fwnode, "gpio-line-names",
404 names, count);
405 if (ret < 0) {
406 dev_warn(&gdev->dev, "failed to read GPIO line names\n");
407 kfree(names);
408 return ret;
409 }
410
411
412
413
414
415
416
417
418
419
420
421 count = (count > chip->offset) ? count - chip->offset : count;
422 if (count > chip->ngpio)
423 count = chip->ngpio;
424
425 for (i = 0; i < count; i++) {
426
427
428
429
430
431
432 if (names[chip->offset + i] && names[chip->offset + i][0])
433 gdev->descs[i].name = names[chip->offset + i];
434 }
435
436 kfree(names);
437
438 return 0;
439}
440
441static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
442{
443 unsigned long *p;
444
445 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
446 if (!p)
447 return NULL;
448
449
450 bitmap_fill(p, gc->ngpio);
451
452 return p;
453}
454
455static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
456{
457 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
458 return 0;
459
460 gc->valid_mask = gpiochip_allocate_mask(gc);
461 if (!gc->valid_mask)
462 return -ENOMEM;
463
464 return 0;
465}
466
467static int gpiochip_init_valid_mask(struct gpio_chip *gc)
468{
469 if (gc->init_valid_mask)
470 return gc->init_valid_mask(gc,
471 gc->valid_mask,
472 gc->ngpio);
473
474 return 0;
475}
476
477static void gpiochip_free_valid_mask(struct gpio_chip *gc)
478{
479 bitmap_free(gc->valid_mask);
480 gc->valid_mask = NULL;
481}
482
483static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
484{
485 if (gc->add_pin_ranges)
486 return gc->add_pin_ranges(gc);
487
488 return 0;
489}
490
491bool gpiochip_line_is_valid(const struct gpio_chip *gc,
492 unsigned int offset)
493{
494
495 if (likely(!gc->valid_mask))
496 return true;
497 return test_bit(offset, gc->valid_mask);
498}
499EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
500
501static void gpiodevice_release(struct device *dev)
502{
503 struct gpio_device *gdev = container_of(dev, struct gpio_device, dev);
504 unsigned long flags;
505
506 spin_lock_irqsave(&gpio_lock, flags);
507 list_del(&gdev->list);
508 spin_unlock_irqrestore(&gpio_lock, flags);
509
510 ida_free(&gpio_ida, gdev->id);
511 kfree_const(gdev->label);
512 kfree(gdev->descs);
513 kfree(gdev);
514}
515
516#ifdef CONFIG_GPIO_CDEV
517#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
518#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
519#else
520
521
522
523
524#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
525#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
526#endif
527
528static int gpiochip_setup_dev(struct gpio_device *gdev)
529{
530 int ret;
531
532 ret = gcdev_register(gdev, gpio_devt);
533 if (ret)
534 return ret;
535
536 ret = gpiochip_sysfs_register(gdev);
537 if (ret)
538 goto err_remove_device;
539
540
541 gdev->dev.release = gpiodevice_release;
542 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
543 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
544
545 return 0;
546
547err_remove_device:
548 gcdev_unregister(gdev);
549 return ret;
550}
551
552static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
553{
554 struct gpio_desc *desc;
555 int rv;
556
557 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
558 if (IS_ERR(desc)) {
559 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
560 PTR_ERR(desc));
561 return;
562 }
563
564 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
565 return;
566
567 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
568 if (rv)
569 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
570 __func__, gc->label, hog->chip_hwnum, rv);
571}
572
573static void machine_gpiochip_add(struct gpio_chip *gc)
574{
575 struct gpiod_hog *hog;
576
577 mutex_lock(&gpio_machine_hogs_mutex);
578
579 list_for_each_entry(hog, &gpio_machine_hogs, list) {
580 if (!strcmp(gc->label, hog->chip_label))
581 gpiochip_machine_hog(gc, hog);
582 }
583
584 mutex_unlock(&gpio_machine_hogs_mutex);
585}
586
587static void gpiochip_setup_devs(void)
588{
589 struct gpio_device *gdev;
590 int ret;
591
592 list_for_each_entry(gdev, &gpio_devices, list) {
593 ret = gpiochip_setup_dev(gdev);
594 if (ret)
595 dev_err(&gdev->dev,
596 "Failed to initialize gpio device (%d)\n", ret);
597 }
598}
599
600int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
601 struct lock_class_key *lock_key,
602 struct lock_class_key *request_key)
603{
604 struct fwnode_handle *fwnode = NULL;
605 struct gpio_device *gdev;
606 unsigned long flags;
607 int base = gc->base;
608 unsigned int i;
609 int ret = 0;
610 u32 ngpios;
611
612 if (gc->fwnode)
613 fwnode = gc->fwnode;
614 else if (gc->parent)
615 fwnode = dev_fwnode(gc->parent);
616
617
618
619
620
621 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
622 if (!gdev)
623 return -ENOMEM;
624 gdev->dev.bus = &gpio_bus_type;
625 gdev->dev.parent = gc->parent;
626 gdev->chip = gc;
627 gc->gpiodev = gdev;
628
629 of_gpio_dev_init(gc, gdev);
630 acpi_gpio_dev_init(gc, gdev);
631
632
633
634
635
636 gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode;
637
638 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
639 if (gdev->id < 0) {
640 ret = gdev->id;
641 goto err_free_gdev;
642 }
643
644 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
645 if (ret)
646 goto err_free_ida;
647
648 device_initialize(&gdev->dev);
649 if (gc->parent && gc->parent->driver)
650 gdev->owner = gc->parent->driver->owner;
651 else if (gc->owner)
652
653 gdev->owner = gc->owner;
654 else
655 gdev->owner = THIS_MODULE;
656
657 gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
658 if (!gdev->descs) {
659 ret = -ENOMEM;
660 goto err_free_dev_name;
661 }
662
663
664
665
666
667 if (gc->ngpio == 0) {
668 ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios);
669 if (ret == -ENODATA)
670
671
672
673
674
675
676 ngpios = 0;
677 else if (ret)
678 goto err_free_descs;
679
680 gc->ngpio = ngpios;
681 }
682
683 if (gc->ngpio == 0) {
684 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
685 ret = -EINVAL;
686 goto err_free_descs;
687 }
688
689 if (gc->ngpio > FASTPATH_NGPIO)
690 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
691 gc->ngpio, FASTPATH_NGPIO);
692
693 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
694 if (!gdev->label) {
695 ret = -ENOMEM;
696 goto err_free_descs;
697 }
698
699 gdev->ngpio = gc->ngpio;
700 gdev->data = data;
701
702 spin_lock_irqsave(&gpio_lock, flags);
703
704
705
706
707
708
709
710
711 if (base < 0) {
712 base = gpiochip_find_base(gc->ngpio);
713 if (base < 0) {
714 ret = base;
715 spin_unlock_irqrestore(&gpio_lock, flags);
716 goto err_free_label;
717 }
718
719
720
721
722
723
724 gc->base = base;
725 }
726 gdev->base = base;
727
728 ret = gpiodev_add_to_list(gdev);
729 if (ret) {
730 spin_unlock_irqrestore(&gpio_lock, flags);
731 goto err_free_label;
732 }
733
734 for (i = 0; i < gc->ngpio; i++)
735 gdev->descs[i].gdev = gdev;
736
737 spin_unlock_irqrestore(&gpio_lock, flags);
738
739 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
740
741#ifdef CONFIG_PINCTRL
742 INIT_LIST_HEAD(&gdev->pin_ranges);
743#endif
744
745 if (gc->names) {
746 ret = gpiochip_set_desc_names(gc);
747 if (ret)
748 goto err_remove_from_list;
749 }
750 ret = devprop_gpiochip_set_names(gc);
751 if (ret)
752 goto err_remove_from_list;
753
754 ret = gpiochip_alloc_valid_mask(gc);
755 if (ret)
756 goto err_remove_from_list;
757
758 ret = of_gpiochip_add(gc);
759 if (ret)
760 goto err_free_gpiochip_mask;
761
762 ret = gpiochip_init_valid_mask(gc);
763 if (ret)
764 goto err_remove_of_chip;
765
766 for (i = 0; i < gc->ngpio; i++) {
767 struct gpio_desc *desc = &gdev->descs[i];
768
769 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
770 assign_bit(FLAG_IS_OUT,
771 &desc->flags, !gc->get_direction(gc, i));
772 } else {
773 assign_bit(FLAG_IS_OUT,
774 &desc->flags, !gc->direction_input);
775 }
776 }
777
778 ret = gpiochip_add_pin_ranges(gc);
779 if (ret)
780 goto err_remove_of_chip;
781
782 acpi_gpiochip_add(gc);
783
784 machine_gpiochip_add(gc);
785
786 ret = gpiochip_irqchip_init_valid_mask(gc);
787 if (ret)
788 goto err_remove_acpi_chip;
789
790 ret = gpiochip_irqchip_init_hw(gc);
791 if (ret)
792 goto err_remove_acpi_chip;
793
794 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
795 if (ret)
796 goto err_remove_irqchip_mask;
797
798
799
800
801
802
803
804
805
806 if (gpiolib_initialized) {
807 ret = gpiochip_setup_dev(gdev);
808 if (ret)
809 goto err_remove_irqchip;
810 }
811 return 0;
812
813err_remove_irqchip:
814 gpiochip_irqchip_remove(gc);
815err_remove_irqchip_mask:
816 gpiochip_irqchip_free_valid_mask(gc);
817err_remove_acpi_chip:
818 acpi_gpiochip_remove(gc);
819err_remove_of_chip:
820 gpiochip_free_hogs(gc);
821 of_gpiochip_remove(gc);
822err_free_gpiochip_mask:
823 gpiochip_remove_pin_ranges(gc);
824 gpiochip_free_valid_mask(gc);
825err_remove_from_list:
826 spin_lock_irqsave(&gpio_lock, flags);
827 list_del(&gdev->list);
828 spin_unlock_irqrestore(&gpio_lock, flags);
829err_free_label:
830 kfree_const(gdev->label);
831err_free_descs:
832 kfree(gdev->descs);
833err_free_dev_name:
834 kfree(dev_name(&gdev->dev));
835err_free_ida:
836 ida_free(&gpio_ida, gdev->id);
837err_free_gdev:
838
839 if (ret != -EPROBE_DEFER) {
840 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
841 gdev->base, gdev->base + gdev->ngpio - 1,
842 gc->label ? : "generic", ret);
843 }
844 kfree(gdev);
845 return ret;
846}
847EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
848
849
850
851
852
853
854
855
856void *gpiochip_get_data(struct gpio_chip *gc)
857{
858 return gc->gpiodev->data;
859}
860EXPORT_SYMBOL_GPL(gpiochip_get_data);
861
862
863
864
865
866
867
868void gpiochip_remove(struct gpio_chip *gc)
869{
870 struct gpio_device *gdev = gc->gpiodev;
871 unsigned long flags;
872 unsigned int i;
873
874
875 gpiochip_sysfs_unregister(gdev);
876 gpiochip_free_hogs(gc);
877
878 gdev->chip = NULL;
879 gpiochip_irqchip_remove(gc);
880 acpi_gpiochip_remove(gc);
881 of_gpiochip_remove(gc);
882 gpiochip_remove_pin_ranges(gc);
883 gpiochip_free_valid_mask(gc);
884
885
886
887
888 gdev->data = NULL;
889
890 spin_lock_irqsave(&gpio_lock, flags);
891 for (i = 0; i < gdev->ngpio; i++) {
892 if (gpiochip_is_requested(gc, i))
893 break;
894 }
895 spin_unlock_irqrestore(&gpio_lock, flags);
896
897 if (i != gdev->ngpio)
898 dev_crit(&gdev->dev,
899 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
900
901
902
903
904
905
906
907 gcdev_unregister(gdev);
908 put_device(&gdev->dev);
909}
910EXPORT_SYMBOL_GPL(gpiochip_remove);
911
912
913
914
915
916
917
918
919
920
921
922
923struct gpio_chip *gpiochip_find(void *data,
924 int (*match)(struct gpio_chip *gc,
925 void *data))
926{
927 struct gpio_device *gdev;
928 struct gpio_chip *gc = NULL;
929 unsigned long flags;
930
931 spin_lock_irqsave(&gpio_lock, flags);
932 list_for_each_entry(gdev, &gpio_devices, list)
933 if (gdev->chip && match(gdev->chip, data)) {
934 gc = gdev->chip;
935 break;
936 }
937
938 spin_unlock_irqrestore(&gpio_lock, flags);
939
940 return gc;
941}
942EXPORT_SYMBOL_GPL(gpiochip_find);
943
944static int gpiochip_match_name(struct gpio_chip *gc, void *data)
945{
946 const char *name = data;
947
948 return !strcmp(gc->label, name);
949}
950
951static struct gpio_chip *find_chip_by_name(const char *name)
952{
953 return gpiochip_find((void *)name, gpiochip_match_name);
954}
955
956#ifdef CONFIG_GPIOLIB_IRQCHIP
957
958
959
960
961
962static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
963{
964 struct gpio_irq_chip *girq = &gc->irq;
965
966 if (!girq->init_hw)
967 return 0;
968
969 return girq->init_hw(gc);
970}
971
972static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
973{
974 struct gpio_irq_chip *girq = &gc->irq;
975
976 if (!girq->init_valid_mask)
977 return 0;
978
979 girq->valid_mask = gpiochip_allocate_mask(gc);
980 if (!girq->valid_mask)
981 return -ENOMEM;
982
983 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
984
985 return 0;
986}
987
988static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
989{
990 bitmap_free(gc->irq.valid_mask);
991 gc->irq.valid_mask = NULL;
992}
993
994bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
995 unsigned int offset)
996{
997 if (!gpiochip_line_is_valid(gc, offset))
998 return false;
999
1000 if (likely(!gc->irq.valid_mask))
1001 return true;
1002 return test_bit(offset, gc->irq.valid_mask);
1003}
1004EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
1005
1006#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1007
1008
1009
1010
1011
1012
1013
1014
1015static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1016 struct irq_chip *irqchip)
1017{
1018
1019 if (is_of_node(gc->irq.fwnode))
1020 return;
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1031 int i;
1032 int ret;
1033
1034 for (i = 0; i < gc->ngpio; i++) {
1035 struct irq_fwspec fwspec;
1036 unsigned int parent_hwirq;
1037 unsigned int parent_type;
1038 struct gpio_irq_chip *girq = &gc->irq;
1039
1040
1041
1042
1043
1044
1045
1046 ret = girq->child_to_parent_hwirq(gc, i,
1047 IRQ_TYPE_EDGE_RISING,
1048 &parent_hwirq,
1049 &parent_type);
1050 if (ret) {
1051 chip_err(gc, "skip set-up on hwirq %d\n",
1052 i);
1053 continue;
1054 }
1055
1056 fwspec.fwnode = gc->irq.fwnode;
1057
1058 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1059
1060 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1061 fwspec.param_count = 2;
1062 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1063
1064 -1,
1065 1,
1066 NUMA_NO_NODE,
1067 &fwspec,
1068 false,
1069 NULL);
1070 if (ret < 0) {
1071 chip_err(gc,
1072 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1073 i, parent_hwirq,
1074 ret);
1075 }
1076 }
1077 }
1078
1079 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1080
1081 return;
1082}
1083
1084static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1085 struct irq_fwspec *fwspec,
1086 unsigned long *hwirq,
1087 unsigned int *type)
1088{
1089
1090 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1091 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1092 }
1093
1094
1095 if (is_fwnode_irqchip(fwspec->fwnode)) {
1096 int ret;
1097
1098 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1099 if (ret)
1100 return ret;
1101 WARN_ON(*type == IRQ_TYPE_NONE);
1102 return 0;
1103 }
1104 return -EINVAL;
1105}
1106
1107static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1108 unsigned int irq,
1109 unsigned int nr_irqs,
1110 void *data)
1111{
1112 struct gpio_chip *gc = d->host_data;
1113 irq_hw_number_t hwirq;
1114 unsigned int type = IRQ_TYPE_NONE;
1115 struct irq_fwspec *fwspec = data;
1116 void *parent_arg;
1117 unsigned int parent_hwirq;
1118 unsigned int parent_type;
1119 struct gpio_irq_chip *girq = &gc->irq;
1120 int ret;
1121
1122
1123
1124
1125
1126 WARN_ON(nr_irqs != 1);
1127
1128 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1129 if (ret)
1130 return ret;
1131
1132 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
1133
1134 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1135 &parent_hwirq, &parent_type);
1136 if (ret) {
1137 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1138 return ret;
1139 }
1140 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
1141
1142
1143
1144
1145
1146 irq_domain_set_info(d,
1147 irq,
1148 hwirq,
1149 gc->irq.chip,
1150 gc,
1151 girq->handler,
1152 NULL, NULL);
1153 irq_set_probe(irq);
1154
1155
1156 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
1157 if (!parent_arg)
1158 return -ENOMEM;
1159
1160 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
1161 irq, parent_hwirq);
1162 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1163 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
1164
1165
1166
1167
1168 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1169 ret = 0;
1170 if (ret)
1171 chip_err(gc,
1172 "failed to allocate parent hwirq %d for hwirq %lu\n",
1173 parent_hwirq, hwirq);
1174
1175 kfree(parent_arg);
1176 return ret;
1177}
1178
1179static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
1180 unsigned int offset)
1181{
1182 return offset;
1183}
1184
1185static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1186{
1187 ops->activate = gpiochip_irq_domain_activate;
1188 ops->deactivate = gpiochip_irq_domain_deactivate;
1189 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1190 ops->free = irq_domain_free_irqs_common;
1191
1192
1193
1194
1195
1196
1197 if (!ops->translate)
1198 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1199}
1200
1201static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1202{
1203 if (!gc->irq.child_to_parent_hwirq ||
1204 !gc->irq.fwnode) {
1205 chip_err(gc, "missing irqdomain vital data\n");
1206 return -EINVAL;
1207 }
1208
1209 if (!gc->irq.child_offset_to_irq)
1210 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1211
1212 if (!gc->irq.populate_parent_alloc_arg)
1213 gc->irq.populate_parent_alloc_arg =
1214 gpiochip_populate_parent_fwspec_twocell;
1215
1216 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1217
1218 gc->irq.domain = irq_domain_create_hierarchy(
1219 gc->irq.parent_domain,
1220 0,
1221 gc->ngpio,
1222 gc->irq.fwnode,
1223 &gc->irq.child_irq_domain_ops,
1224 gc);
1225
1226 if (!gc->irq.domain)
1227 return -ENOMEM;
1228
1229 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1230
1231 return 0;
1232}
1233
1234static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1235{
1236 return !!gc->irq.parent_domain;
1237}
1238
1239void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1240 unsigned int parent_hwirq,
1241 unsigned int parent_type)
1242{
1243 struct irq_fwspec *fwspec;
1244
1245 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1246 if (!fwspec)
1247 return NULL;
1248
1249 fwspec->fwnode = gc->irq.parent_domain->fwnode;
1250 fwspec->param_count = 2;
1251 fwspec->param[0] = parent_hwirq;
1252 fwspec->param[1] = parent_type;
1253
1254 return fwspec;
1255}
1256EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1257
1258void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1259 unsigned int parent_hwirq,
1260 unsigned int parent_type)
1261{
1262 struct irq_fwspec *fwspec;
1263
1264 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1265 if (!fwspec)
1266 return NULL;
1267
1268 fwspec->fwnode = gc->irq.parent_domain->fwnode;
1269 fwspec->param_count = 4;
1270 fwspec->param[0] = 0;
1271 fwspec->param[1] = parent_hwirq;
1272 fwspec->param[2] = 0;
1273 fwspec->param[3] = parent_type;
1274
1275 return fwspec;
1276}
1277EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1278
1279#else
1280
1281static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1282{
1283 return -EINVAL;
1284}
1285
1286static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1287{
1288 return false;
1289}
1290
1291#endif
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1304 irq_hw_number_t hwirq)
1305{
1306 struct gpio_chip *gc = d->host_data;
1307 int ret = 0;
1308
1309 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
1310 return -ENXIO;
1311
1312 irq_set_chip_data(irq, gc);
1313
1314
1315
1316
1317 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1318 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
1319
1320 if (gc->irq.threaded)
1321 irq_set_nested_thread(irq, 1);
1322 irq_set_noprobe(irq);
1323
1324 if (gc->irq.num_parents == 1)
1325 ret = irq_set_parent(irq, gc->irq.parents[0]);
1326 else if (gc->irq.map)
1327 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
1328
1329 if (ret < 0)
1330 return ret;
1331
1332
1333
1334
1335
1336 if (gc->irq.default_type != IRQ_TYPE_NONE)
1337 irq_set_irq_type(irq, gc->irq.default_type);
1338
1339 return 0;
1340}
1341EXPORT_SYMBOL_GPL(gpiochip_irq_map);
1342
1343void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
1344{
1345 struct gpio_chip *gc = d->host_data;
1346
1347 if (gc->irq.threaded)
1348 irq_set_nested_thread(irq, 0);
1349 irq_set_chip_and_handler(irq, NULL, NULL);
1350 irq_set_chip_data(irq, NULL);
1351}
1352EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
1353
1354static const struct irq_domain_ops gpiochip_domain_ops = {
1355 .map = gpiochip_irq_map,
1356 .unmap = gpiochip_irq_unmap,
1357
1358 .xlate = irq_domain_xlate_twocell,
1359};
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376int gpiochip_irq_domain_activate(struct irq_domain *domain,
1377 struct irq_data *data, bool reserve)
1378{
1379 struct gpio_chip *gc = domain->host_data;
1380
1381 return gpiochip_lock_as_irq(gc, data->hwirq);
1382}
1383EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1395 struct irq_data *data)
1396{
1397 struct gpio_chip *gc = domain->host_data;
1398
1399 return gpiochip_unlock_as_irq(gc, data->hwirq);
1400}
1401EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1402
1403static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
1404{
1405 struct irq_domain *domain = gc->irq.domain;
1406
1407#ifdef CONFIG_GPIOLIB_IRQCHIP
1408
1409
1410
1411
1412
1413 if (!gc->irq.initialized)
1414 return -EPROBE_DEFER;
1415#endif
1416
1417 if (!gpiochip_irqchip_irq_valid(gc, offset))
1418 return -ENXIO;
1419
1420#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1421 if (irq_domain_is_hierarchy(domain)) {
1422 struct irq_fwspec spec;
1423
1424 spec.fwnode = domain->fwnode;
1425 spec.param_count = 2;
1426 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
1427 spec.param[1] = IRQ_TYPE_NONE;
1428
1429 return irq_create_fwspec_mapping(&spec);
1430 }
1431#endif
1432
1433 return irq_create_mapping(domain, offset);
1434}
1435
1436static int gpiochip_irq_reqres(struct irq_data *d)
1437{
1438 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1439
1440 return gpiochip_reqres_irq(gc, d->hwirq);
1441}
1442
1443static void gpiochip_irq_relres(struct irq_data *d)
1444{
1445 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1446
1447 gpiochip_relres_irq(gc, d->hwirq);
1448}
1449
1450static void gpiochip_irq_mask(struct irq_data *d)
1451{
1452 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1453
1454 if (gc->irq.irq_mask)
1455 gc->irq.irq_mask(d);
1456 gpiochip_disable_irq(gc, d->hwirq);
1457}
1458
1459static void gpiochip_irq_unmask(struct irq_data *d)
1460{
1461 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1462
1463 gpiochip_enable_irq(gc, d->hwirq);
1464 if (gc->irq.irq_unmask)
1465 gc->irq.irq_unmask(d);
1466}
1467
1468static void gpiochip_irq_enable(struct irq_data *d)
1469{
1470 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1471
1472 gpiochip_enable_irq(gc, d->hwirq);
1473 gc->irq.irq_enable(d);
1474}
1475
1476static void gpiochip_irq_disable(struct irq_data *d)
1477{
1478 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1479
1480 gc->irq.irq_disable(d);
1481 gpiochip_disable_irq(gc, d->hwirq);
1482}
1483
1484static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
1485{
1486 struct irq_chip *irqchip = gc->irq.chip;
1487
1488 if (!irqchip->irq_request_resources &&
1489 !irqchip->irq_release_resources) {
1490 irqchip->irq_request_resources = gpiochip_irq_reqres;
1491 irqchip->irq_release_resources = gpiochip_irq_relres;
1492 }
1493 if (WARN_ON(gc->irq.irq_enable))
1494 return;
1495
1496 if (irqchip->irq_enable == gpiochip_irq_enable ||
1497 irqchip->irq_mask == gpiochip_irq_mask) {
1498
1499
1500
1501
1502 chip_info(gc,
1503 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1504 return;
1505 }
1506
1507 if (irqchip->irq_disable) {
1508 gc->irq.irq_disable = irqchip->irq_disable;
1509 irqchip->irq_disable = gpiochip_irq_disable;
1510 } else {
1511 gc->irq.irq_mask = irqchip->irq_mask;
1512 irqchip->irq_mask = gpiochip_irq_mask;
1513 }
1514
1515 if (irqchip->irq_enable) {
1516 gc->irq.irq_enable = irqchip->irq_enable;
1517 irqchip->irq_enable = gpiochip_irq_enable;
1518 } else {
1519 gc->irq.irq_unmask = irqchip->irq_unmask;
1520 irqchip->irq_unmask = gpiochip_irq_unmask;
1521 }
1522}
1523
1524
1525
1526
1527
1528
1529
1530static int gpiochip_add_irqchip(struct gpio_chip *gc,
1531 struct lock_class_key *lock_key,
1532 struct lock_class_key *request_key)
1533{
1534 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
1535 struct irq_chip *irqchip = gc->irq.chip;
1536 unsigned int type;
1537 unsigned int i;
1538
1539 if (!irqchip)
1540 return 0;
1541
1542 if (gc->irq.parent_handler && gc->can_sleep) {
1543 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
1544 return -EINVAL;
1545 }
1546
1547 type = gc->irq.default_type;
1548
1549
1550
1551
1552
1553
1554 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1555 "%pfw: Ignoring %u default trigger\n", fwnode, type))
1556 type = IRQ_TYPE_NONE;
1557
1558 if (gc->to_irq)
1559 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1560
1561 gc->to_irq = gpiochip_to_irq;
1562 gc->irq.default_type = type;
1563 gc->irq.lock_key = lock_key;
1564 gc->irq.request_key = request_key;
1565
1566
1567 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1568 int ret = gpiochip_hierarchy_add_domain(gc);
1569 if (ret)
1570 return ret;
1571 } else {
1572
1573 gc->irq.domain = irq_domain_create_simple(fwnode,
1574 gc->ngpio,
1575 gc->irq.first,
1576 gc->irq.domain_ops ?: &gpiochip_domain_ops,
1577 gc);
1578 if (!gc->irq.domain)
1579 return -EINVAL;
1580 }
1581
1582 if (gc->irq.parent_handler) {
1583 for (i = 0; i < gc->irq.num_parents; i++) {
1584 void *data;
1585
1586 if (gc->irq.per_parent_data)
1587 data = gc->irq.parent_handler_data_array[i];
1588 else
1589 data = gc->irq.parent_handler_data ?: gc;
1590
1591
1592
1593
1594
1595
1596 irq_set_chained_handler_and_data(gc->irq.parents[i],
1597 gc->irq.parent_handler,
1598 data);
1599 }
1600 }
1601
1602 gpiochip_set_irq_hooks(gc);
1603
1604
1605
1606
1607
1608
1609 barrier();
1610
1611 gc->irq.initialized = true;
1612
1613 acpi_gpiochip_request_interrupts(gc);
1614
1615 return 0;
1616}
1617
1618
1619
1620
1621
1622
1623
1624static void gpiochip_irqchip_remove(struct gpio_chip *gc)
1625{
1626 struct irq_chip *irqchip = gc->irq.chip;
1627 unsigned int offset;
1628
1629 acpi_gpiochip_free_interrupts(gc);
1630
1631 if (irqchip && gc->irq.parent_handler) {
1632 struct gpio_irq_chip *irq = &gc->irq;
1633 unsigned int i;
1634
1635 for (i = 0; i < irq->num_parents; i++)
1636 irq_set_chained_handler_and_data(irq->parents[i],
1637 NULL, NULL);
1638 }
1639
1640
1641 if (gc->irq.domain) {
1642 unsigned int irq;
1643
1644 for (offset = 0; offset < gc->ngpio; offset++) {
1645 if (!gpiochip_irqchip_irq_valid(gc, offset))
1646 continue;
1647
1648 irq = irq_find_mapping(gc->irq.domain, offset);
1649 irq_dispose_mapping(irq);
1650 }
1651
1652 irq_domain_remove(gc->irq.domain);
1653 }
1654
1655 if (irqchip) {
1656 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1657 irqchip->irq_request_resources = NULL;
1658 irqchip->irq_release_resources = NULL;
1659 }
1660 if (irqchip->irq_enable == gpiochip_irq_enable) {
1661 irqchip->irq_enable = gc->irq.irq_enable;
1662 irqchip->irq_disable = gc->irq.irq_disable;
1663 }
1664 }
1665 gc->irq.irq_enable = NULL;
1666 gc->irq.irq_disable = NULL;
1667 gc->irq.chip = NULL;
1668
1669 gpiochip_irqchip_free_valid_mask(gc);
1670}
1671
1672
1673
1674
1675
1676
1677
1678
1679int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1680 struct irq_domain *domain)
1681{
1682 if (!domain)
1683 return -EINVAL;
1684
1685 gc->to_irq = gpiochip_to_irq;
1686 gc->irq.domain = domain;
1687
1688 return 0;
1689}
1690EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1691
1692#else
1693
1694static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
1695 struct lock_class_key *lock_key,
1696 struct lock_class_key *request_key)
1697{
1698 return 0;
1699}
1700static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
1701
1702static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1703{
1704 return 0;
1705}
1706
1707static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
1708{
1709 return 0;
1710}
1711static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
1712{ }
1713
1714#endif
1715
1716
1717
1718
1719
1720
1721int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
1722{
1723#ifdef CONFIG_PINCTRL
1724 if (list_empty(&gc->gpiodev->pin_ranges))
1725 return 0;
1726#endif
1727
1728 return pinctrl_gpio_request(gc->gpiodev->base + offset);
1729}
1730EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1731
1732
1733
1734
1735
1736
1737void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
1738{
1739#ifdef CONFIG_PINCTRL
1740 if (list_empty(&gc->gpiodev->pin_ranges))
1741 return;
1742#endif
1743
1744 pinctrl_gpio_free(gc->gpiodev->base + offset);
1745}
1746EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1747
1748
1749
1750
1751
1752
1753
1754int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
1755 unsigned long config)
1756{
1757 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
1758}
1759EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1760
1761#ifdef CONFIG_PINCTRL
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775int gpiochip_add_pingroup_range(struct gpio_chip *gc,
1776 struct pinctrl_dev *pctldev,
1777 unsigned int gpio_offset, const char *pin_group)
1778{
1779 struct gpio_pin_range *pin_range;
1780 struct gpio_device *gdev = gc->gpiodev;
1781 int ret;
1782
1783 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1784 if (!pin_range) {
1785 chip_err(gc, "failed to allocate pin ranges\n");
1786 return -ENOMEM;
1787 }
1788
1789
1790 pin_range->range.id = gpio_offset;
1791 pin_range->range.gc = gc;
1792 pin_range->range.name = gc->label;
1793 pin_range->range.base = gdev->base + gpio_offset;
1794 pin_range->pctldev = pctldev;
1795
1796 ret = pinctrl_get_group_pins(pctldev, pin_group,
1797 &pin_range->range.pins,
1798 &pin_range->range.npins);
1799 if (ret < 0) {
1800 kfree(pin_range);
1801 return ret;
1802 }
1803
1804 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1805
1806 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1807 gpio_offset, gpio_offset + pin_range->range.npins - 1,
1808 pinctrl_dev_get_devname(pctldev), pin_group);
1809
1810 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1811
1812 return 0;
1813}
1814EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
1834 unsigned int gpio_offset, unsigned int pin_offset,
1835 unsigned int npins)
1836{
1837 struct gpio_pin_range *pin_range;
1838 struct gpio_device *gdev = gc->gpiodev;
1839 int ret;
1840
1841 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1842 if (!pin_range) {
1843 chip_err(gc, "failed to allocate pin ranges\n");
1844 return -ENOMEM;
1845 }
1846
1847
1848 pin_range->range.id = gpio_offset;
1849 pin_range->range.gc = gc;
1850 pin_range->range.name = gc->label;
1851 pin_range->range.base = gdev->base + gpio_offset;
1852 pin_range->range.pin_base = pin_offset;
1853 pin_range->range.npins = npins;
1854 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
1855 &pin_range->range);
1856 if (IS_ERR(pin_range->pctldev)) {
1857 ret = PTR_ERR(pin_range->pctldev);
1858 chip_err(gc, "could not create pin range\n");
1859 kfree(pin_range);
1860 return ret;
1861 }
1862 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1863 gpio_offset, gpio_offset + npins - 1,
1864 pinctl_name,
1865 pin_offset, pin_offset + npins - 1);
1866
1867 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1868
1869 return 0;
1870}
1871EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
1872
1873
1874
1875
1876
1877void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
1878{
1879 struct gpio_pin_range *pin_range, *tmp;
1880 struct gpio_device *gdev = gc->gpiodev;
1881
1882 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
1883 list_del(&pin_range->node);
1884 pinctrl_remove_gpio_range(pin_range->pctldev,
1885 &pin_range->range);
1886 kfree(pin_range);
1887 }
1888}
1889EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1890
1891#endif
1892
1893
1894
1895
1896
1897static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
1898{
1899 struct gpio_chip *gc = desc->gdev->chip;
1900 int ret;
1901 unsigned long flags;
1902 unsigned offset;
1903
1904 if (label) {
1905 label = kstrdup_const(label, GFP_KERNEL);
1906 if (!label)
1907 return -ENOMEM;
1908 }
1909
1910 spin_lock_irqsave(&gpio_lock, flags);
1911
1912
1913
1914
1915
1916 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1917 desc_set_label(desc, label ? : "?");
1918 } else {
1919 ret = -EBUSY;
1920 goto out_free_unlock;
1921 }
1922
1923 if (gc->request) {
1924
1925 spin_unlock_irqrestore(&gpio_lock, flags);
1926 offset = gpio_chip_hwgpio(desc);
1927 if (gpiochip_line_is_valid(gc, offset))
1928 ret = gc->request(gc, offset);
1929 else
1930 ret = -EINVAL;
1931 spin_lock_irqsave(&gpio_lock, flags);
1932
1933 if (ret) {
1934 desc_set_label(desc, NULL);
1935 clear_bit(FLAG_REQUESTED, &desc->flags);
1936 goto out_free_unlock;
1937 }
1938 }
1939 if (gc->get_direction) {
1940
1941 spin_unlock_irqrestore(&gpio_lock, flags);
1942 gpiod_get_direction(desc);
1943 spin_lock_irqsave(&gpio_lock, flags);
1944 }
1945 spin_unlock_irqrestore(&gpio_lock, flags);
1946 return 0;
1947
1948out_free_unlock:
1949 spin_unlock_irqrestore(&gpio_lock, flags);
1950 kfree_const(label);
1951 return ret;
1952}
1953
1954
1955
1956
1957
1958
1959
1960static int validate_desc(const struct gpio_desc *desc, const char *func)
1961{
1962 if (!desc)
1963 return 0;
1964 if (IS_ERR(desc)) {
1965 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
1966 return PTR_ERR(desc);
1967 }
1968 if (!desc->gdev) {
1969 pr_warn("%s: invalid GPIO (no device)\n", func);
1970 return -EINVAL;
1971 }
1972 if (!desc->gdev->chip) {
1973 dev_warn(&desc->gdev->dev,
1974 "%s: backing chip is gone\n", func);
1975 return 0;
1976 }
1977 return 1;
1978}
1979
1980#define VALIDATE_DESC(desc) do { \
1981 int __valid = validate_desc(desc, __func__); \
1982 if (__valid <= 0) \
1983 return __valid; \
1984 } while (0)
1985
1986#define VALIDATE_DESC_VOID(desc) do { \
1987 int __valid = validate_desc(desc, __func__); \
1988 if (__valid <= 0) \
1989 return; \
1990 } while (0)
1991
1992int gpiod_request(struct gpio_desc *desc, const char *label)
1993{
1994 int ret = -EPROBE_DEFER;
1995 struct gpio_device *gdev;
1996
1997 VALIDATE_DESC(desc);
1998 gdev = desc->gdev;
1999
2000 if (try_module_get(gdev->owner)) {
2001 ret = gpiod_request_commit(desc, label);
2002 if (ret)
2003 module_put(gdev->owner);
2004 else
2005 get_device(&gdev->dev);
2006 }
2007
2008 if (ret)
2009 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
2010
2011 return ret;
2012}
2013
2014static bool gpiod_free_commit(struct gpio_desc *desc)
2015{
2016 bool ret = false;
2017 unsigned long flags;
2018 struct gpio_chip *gc;
2019
2020 might_sleep();
2021
2022 gpiod_unexport(desc);
2023
2024 spin_lock_irqsave(&gpio_lock, flags);
2025
2026 gc = desc->gdev->chip;
2027 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2028 if (gc->free) {
2029 spin_unlock_irqrestore(&gpio_lock, flags);
2030 might_sleep_if(gc->can_sleep);
2031 gc->free(gc, gpio_chip_hwgpio(desc));
2032 spin_lock_irqsave(&gpio_lock, flags);
2033 }
2034 kfree_const(desc->label);
2035 desc_set_label(desc, NULL);
2036 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
2037 clear_bit(FLAG_REQUESTED, &desc->flags);
2038 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
2039 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
2040 clear_bit(FLAG_PULL_UP, &desc->flags);
2041 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2042 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
2043 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2044 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
2045 clear_bit(FLAG_IS_HOGGED, &desc->flags);
2046#ifdef CONFIG_OF_DYNAMIC
2047 desc->hog = NULL;
2048#endif
2049#ifdef CONFIG_GPIO_CDEV
2050 WRITE_ONCE(desc->debounce_period_us, 0);
2051#endif
2052 ret = true;
2053 }
2054
2055 spin_unlock_irqrestore(&gpio_lock, flags);
2056 blocking_notifier_call_chain(&desc->gdev->notifier,
2057 GPIOLINE_CHANGED_RELEASED, desc);
2058
2059 return ret;
2060}
2061
2062void gpiod_free(struct gpio_desc *desc)
2063{
2064 if (desc && desc->gdev && gpiod_free_commit(desc)) {
2065 module_put(desc->gdev->owner);
2066 put_device(&desc->gdev->dev);
2067 } else {
2068 WARN_ON(extra_checks);
2069 }
2070}
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
2086{
2087 struct gpio_desc *desc;
2088
2089 desc = gpiochip_get_desc(gc, offset);
2090 if (IS_ERR(desc))
2091 return NULL;
2092
2093 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
2094 return NULL;
2095 return desc->label;
2096}
2097EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
2121 unsigned int hwnum,
2122 const char *label,
2123 enum gpio_lookup_flags lflags,
2124 enum gpiod_flags dflags)
2125{
2126 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
2127 int ret;
2128
2129 if (IS_ERR(desc)) {
2130 chip_err(gc, "failed to get GPIO descriptor\n");
2131 return desc;
2132 }
2133
2134 ret = gpiod_request_commit(desc, label);
2135 if (ret < 0)
2136 return ERR_PTR(ret);
2137
2138 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2139 if (ret) {
2140 chip_err(gc, "setup of own GPIO %s failed\n", label);
2141 gpiod_free_commit(desc);
2142 return ERR_PTR(ret);
2143 }
2144
2145 return desc;
2146}
2147EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
2148
2149
2150
2151
2152
2153
2154
2155
2156void gpiochip_free_own_desc(struct gpio_desc *desc)
2157{
2158 if (desc)
2159 gpiod_free_commit(desc);
2160}
2161EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
2174 unsigned long config)
2175{
2176 if (!gc->set_config)
2177 return -ENOTSUPP;
2178
2179 return gc->set_config(gc, offset, config);
2180}
2181
2182static int gpio_set_config_with_argument(struct gpio_desc *desc,
2183 enum pin_config_param mode,
2184 u32 argument)
2185{
2186 struct gpio_chip *gc = desc->gdev->chip;
2187 unsigned long config;
2188
2189 config = pinconf_to_config_packed(mode, argument);
2190 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2191}
2192
2193static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2194 enum pin_config_param mode,
2195 u32 argument)
2196{
2197 struct device *dev = &desc->gdev->dev;
2198 int gpio = gpio_chip_hwgpio(desc);
2199 int ret;
2200
2201 ret = gpio_set_config_with_argument(desc, mode, argument);
2202 if (ret != -ENOTSUPP)
2203 return ret;
2204
2205 switch (mode) {
2206 case PIN_CONFIG_PERSIST_STATE:
2207 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
2208 break;
2209 default:
2210 break;
2211 }
2212
2213 return 0;
2214}
2215
2216static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2217{
2218 return gpio_set_config_with_argument(desc, mode, 0);
2219}
2220
2221static int gpio_set_bias(struct gpio_desc *desc)
2222{
2223 enum pin_config_param bias;
2224 unsigned int arg;
2225
2226 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2227 bias = PIN_CONFIG_BIAS_DISABLE;
2228 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2229 bias = PIN_CONFIG_BIAS_PULL_UP;
2230 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2231 bias = PIN_CONFIG_BIAS_PULL_DOWN;
2232 else
2233 return 0;
2234
2235 switch (bias) {
2236 case PIN_CONFIG_BIAS_PULL_DOWN:
2237 case PIN_CONFIG_BIAS_PULL_UP:
2238 arg = 1;
2239 break;
2240
2241 default:
2242 arg = 0;
2243 break;
2244 }
2245
2246 return gpio_set_config_with_argument_optional(desc, bias, arg);
2247}
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2260{
2261 return gpio_set_config_with_argument_optional(desc,
2262 PIN_CONFIG_INPUT_DEBOUNCE,
2263 debounce);
2264}
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275int gpiod_direction_input(struct gpio_desc *desc)
2276{
2277 struct gpio_chip *gc;
2278 int ret = 0;
2279
2280 VALIDATE_DESC(desc);
2281 gc = desc->gdev->chip;
2282
2283
2284
2285
2286
2287
2288 if (!gc->get && gc->direction_input) {
2289 gpiod_warn(desc,
2290 "%s: missing get() but have direction_input()\n",
2291 __func__);
2292 return -EIO;
2293 }
2294
2295
2296
2297
2298
2299
2300
2301 if (gc->direction_input) {
2302 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2303 } else if (gc->get_direction &&
2304 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
2305 gpiod_warn(desc,
2306 "%s: missing direction_input() operation and line is output\n",
2307 __func__);
2308 return -EIO;
2309 }
2310 if (ret == 0) {
2311 clear_bit(FLAG_IS_OUT, &desc->flags);
2312 ret = gpio_set_bias(desc);
2313 }
2314
2315 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
2316
2317 return ret;
2318}
2319EXPORT_SYMBOL_GPL(gpiod_direction_input);
2320
2321static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
2322{
2323 struct gpio_chip *gc = desc->gdev->chip;
2324 int val = !!value;
2325 int ret = 0;
2326
2327
2328
2329
2330
2331
2332 if (!gc->set && !gc->direction_output) {
2333 gpiod_warn(desc,
2334 "%s: missing set() and direction_output() operations\n",
2335 __func__);
2336 return -EIO;
2337 }
2338
2339 if (gc->direction_output) {
2340 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2341 } else {
2342
2343 if (gc->get_direction &&
2344 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2345 gpiod_warn(desc,
2346 "%s: missing direction_output() operation\n",
2347 __func__);
2348 return -EIO;
2349 }
2350
2351
2352
2353
2354 gc->set(gc, gpio_chip_hwgpio(desc), val);
2355 }
2356
2357 if (!ret)
2358 set_bit(FLAG_IS_OUT, &desc->flags);
2359 trace_gpio_value(desc_to_gpio(desc), 0, val);
2360 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2361 return ret;
2362}
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2376{
2377 VALIDATE_DESC(desc);
2378 return gpiod_direction_output_raw_commit(desc, value);
2379}
2380EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394int gpiod_direction_output(struct gpio_desc *desc, int value)
2395{
2396 int ret;
2397
2398 VALIDATE_DESC(desc);
2399 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2400 value = !value;
2401 else
2402 value = !!value;
2403
2404
2405 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2406 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
2407 gpiod_err(desc,
2408 "%s: tried to set a GPIO tied to an IRQ as output\n",
2409 __func__);
2410 return -EIO;
2411 }
2412
2413 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2414
2415 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
2416 if (!ret)
2417 goto set_output_value;
2418
2419 if (value) {
2420 ret = gpiod_direction_input(desc);
2421 goto set_output_flag;
2422 }
2423 }
2424 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
2425 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
2426 if (!ret)
2427 goto set_output_value;
2428
2429 if (!value) {
2430 ret = gpiod_direction_input(desc);
2431 goto set_output_flag;
2432 }
2433 } else {
2434 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
2435 }
2436
2437set_output_value:
2438 ret = gpio_set_bias(desc);
2439 if (ret)
2440 return ret;
2441 return gpiod_direction_output_raw_commit(desc, value);
2442
2443set_output_flag:
2444
2445
2446
2447
2448
2449
2450 if (ret == 0)
2451 set_bit(FLAG_IS_OUT, &desc->flags);
2452 return ret;
2453}
2454EXPORT_SYMBOL_GPL(gpiod_direction_output);
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2466{
2467 struct gpio_chip *gc;
2468
2469 VALIDATE_DESC(desc);
2470 gc = desc->gdev->chip;
2471
2472 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2473}
2474EXPORT_SYMBOL_GPL(gpiod_set_config);
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
2486{
2487 unsigned long config;
2488
2489 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
2490 return gpiod_set_config(desc, config);
2491}
2492EXPORT_SYMBOL_GPL(gpiod_set_debounce);
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2503{
2504 VALIDATE_DESC(desc);
2505
2506
2507
2508
2509 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
2510
2511
2512 return gpio_set_config_with_argument_optional(desc,
2513 PIN_CONFIG_PERSIST_STATE,
2514 !transitory);
2515}
2516EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2517
2518
2519
2520
2521
2522
2523
2524int gpiod_is_active_low(const struct gpio_desc *desc)
2525{
2526 VALIDATE_DESC(desc);
2527 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
2528}
2529EXPORT_SYMBOL_GPL(gpiod_is_active_low);
2530
2531
2532
2533
2534
2535void gpiod_toggle_active_low(struct gpio_desc *desc)
2536{
2537 VALIDATE_DESC_VOID(desc);
2538 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2539}
2540EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
2565{
2566 struct gpio_chip *gc;
2567 int offset;
2568 int value;
2569
2570 gc = desc->gdev->chip;
2571 offset = gpio_chip_hwgpio(desc);
2572 value = gc->get ? gc->get(gc, offset) : -EIO;
2573 value = value < 0 ? value : !!value;
2574 trace_gpio_value(desc_to_gpio(desc), 1, value);
2575 return value;
2576}
2577
2578static int gpio_chip_get_multiple(struct gpio_chip *gc,
2579 unsigned long *mask, unsigned long *bits)
2580{
2581 if (gc->get_multiple) {
2582 return gc->get_multiple(gc, mask, bits);
2583 } else if (gc->get) {
2584 int i, value;
2585
2586 for_each_set_bit(i, mask, gc->ngpio) {
2587 value = gc->get(gc, i);
2588 if (value < 0)
2589 return value;
2590 __assign_bit(i, bits, value);
2591 }
2592 return 0;
2593 }
2594 return -EIO;
2595}
2596
2597int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2598 unsigned int array_size,
2599 struct gpio_desc **desc_array,
2600 struct gpio_array *array_info,
2601 unsigned long *value_bitmap)
2602{
2603 int ret, i = 0;
2604
2605
2606
2607
2608
2609
2610 if (array_info && array_info->desc == desc_array &&
2611 array_size <= array_info->size &&
2612 (void *)array_info == desc_array + array_info->size) {
2613 if (!can_sleep)
2614 WARN_ON(array_info->chip->can_sleep);
2615
2616 ret = gpio_chip_get_multiple(array_info->chip,
2617 array_info->get_mask,
2618 value_bitmap);
2619 if (ret)
2620 return ret;
2621
2622 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2623 bitmap_xor(value_bitmap, value_bitmap,
2624 array_info->invert_mask, array_size);
2625
2626 i = find_first_zero_bit(array_info->get_mask, array_size);
2627 if (i == array_size)
2628 return 0;
2629 } else {
2630 array_info = NULL;
2631 }
2632
2633 while (i < array_size) {
2634 struct gpio_chip *gc = desc_array[i]->gdev->chip;
2635 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2636 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
2637 unsigned long *mask, *bits;
2638 int first, j;
2639
2640 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
2641 mask = fastpath_mask;
2642 bits = fastpath_bits;
2643 } else {
2644 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2645
2646 mask = bitmap_alloc(gc->ngpio, flags);
2647 if (!mask)
2648 return -ENOMEM;
2649
2650 bits = bitmap_alloc(gc->ngpio, flags);
2651 if (!bits) {
2652 bitmap_free(mask);
2653 return -ENOMEM;
2654 }
2655 }
2656
2657 bitmap_zero(mask, gc->ngpio);
2658
2659 if (!can_sleep)
2660 WARN_ON(gc->can_sleep);
2661
2662
2663 first = i;
2664 do {
2665 const struct gpio_desc *desc = desc_array[i];
2666 int hwgpio = gpio_chip_hwgpio(desc);
2667
2668 __set_bit(hwgpio, mask);
2669 i++;
2670
2671 if (array_info)
2672 i = find_next_zero_bit(array_info->get_mask,
2673 array_size, i);
2674 } while ((i < array_size) &&
2675 (desc_array[i]->gdev->chip == gc));
2676
2677 ret = gpio_chip_get_multiple(gc, mask, bits);
2678 if (ret) {
2679 if (mask != fastpath_mask)
2680 bitmap_free(mask);
2681 if (bits != fastpath_bits)
2682 bitmap_free(bits);
2683 return ret;
2684 }
2685
2686 for (j = first; j < i; ) {
2687 const struct gpio_desc *desc = desc_array[j];
2688 int hwgpio = gpio_chip_hwgpio(desc);
2689 int value = test_bit(hwgpio, bits);
2690
2691 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2692 value = !value;
2693 __assign_bit(j, value_bitmap, value);
2694 trace_gpio_value(desc_to_gpio(desc), 1, value);
2695 j++;
2696
2697 if (array_info)
2698 j = find_next_zero_bit(array_info->get_mask, i,
2699 j);
2700 }
2701
2702 if (mask != fastpath_mask)
2703 bitmap_free(mask);
2704 if (bits != fastpath_bits)
2705 bitmap_free(bits);
2706 }
2707 return 0;
2708}
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720int gpiod_get_raw_value(const struct gpio_desc *desc)
2721{
2722 VALIDATE_DESC(desc);
2723
2724 WARN_ON(desc->gdev->chip->can_sleep);
2725 return gpiod_get_raw_value_commit(desc);
2726}
2727EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739int gpiod_get_value(const struct gpio_desc *desc)
2740{
2741 int value;
2742
2743 VALIDATE_DESC(desc);
2744
2745 WARN_ON(desc->gdev->chip->can_sleep);
2746
2747 value = gpiod_get_raw_value_commit(desc);
2748 if (value < 0)
2749 return value;
2750
2751 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2752 value = !value;
2753
2754 return value;
2755}
2756EXPORT_SYMBOL_GPL(gpiod_get_value);
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772int gpiod_get_raw_array_value(unsigned int array_size,
2773 struct gpio_desc **desc_array,
2774 struct gpio_array *array_info,
2775 unsigned long *value_bitmap)
2776{
2777 if (!desc_array)
2778 return -EINVAL;
2779 return gpiod_get_array_value_complex(true, false, array_size,
2780 desc_array, array_info,
2781 value_bitmap);
2782}
2783EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798int gpiod_get_array_value(unsigned int array_size,
2799 struct gpio_desc **desc_array,
2800 struct gpio_array *array_info,
2801 unsigned long *value_bitmap)
2802{
2803 if (!desc_array)
2804 return -EINVAL;
2805 return gpiod_get_array_value_complex(false, false, array_size,
2806 desc_array, array_info,
2807 value_bitmap);
2808}
2809EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2810
2811
2812
2813
2814
2815
2816static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
2817{
2818 int ret = 0;
2819 struct gpio_chip *gc = desc->gdev->chip;
2820 int offset = gpio_chip_hwgpio(desc);
2821
2822 if (value) {
2823 ret = gc->direction_input(gc, offset);
2824 } else {
2825 ret = gc->direction_output(gc, offset, 0);
2826 if (!ret)
2827 set_bit(FLAG_IS_OUT, &desc->flags);
2828 }
2829 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2830 if (ret < 0)
2831 gpiod_err(desc,
2832 "%s: Error in set_value for open drain err %d\n",
2833 __func__, ret);
2834}
2835
2836
2837
2838
2839
2840
2841static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
2842{
2843 int ret = 0;
2844 struct gpio_chip *gc = desc->gdev->chip;
2845 int offset = gpio_chip_hwgpio(desc);
2846
2847 if (value) {
2848 ret = gc->direction_output(gc, offset, 1);
2849 if (!ret)
2850 set_bit(FLAG_IS_OUT, &desc->flags);
2851 } else {
2852 ret = gc->direction_input(gc, offset);
2853 }
2854 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2855 if (ret < 0)
2856 gpiod_err(desc,
2857 "%s: Error in set_value for open source err %d\n",
2858 __func__, ret);
2859}
2860
2861static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
2862{
2863 struct gpio_chip *gc;
2864
2865 gc = desc->gdev->chip;
2866 trace_gpio_value(desc_to_gpio(desc), 0, value);
2867 gc->set(gc, gpio_chip_hwgpio(desc), value);
2868}
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880static void gpio_chip_set_multiple(struct gpio_chip *gc,
2881 unsigned long *mask, unsigned long *bits)
2882{
2883 if (gc->set_multiple) {
2884 gc->set_multiple(gc, mask, bits);
2885 } else {
2886 unsigned int i;
2887
2888
2889 for_each_set_bit(i, mask, gc->ngpio)
2890 gc->set(gc, i, test_bit(i, bits));
2891 }
2892}
2893
2894int gpiod_set_array_value_complex(bool raw, bool can_sleep,
2895 unsigned int array_size,
2896 struct gpio_desc **desc_array,
2897 struct gpio_array *array_info,
2898 unsigned long *value_bitmap)
2899{
2900 int i = 0;
2901
2902
2903
2904
2905
2906
2907 if (array_info && array_info->desc == desc_array &&
2908 array_size <= array_info->size &&
2909 (void *)array_info == desc_array + array_info->size) {
2910 if (!can_sleep)
2911 WARN_ON(array_info->chip->can_sleep);
2912
2913 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2914 bitmap_xor(value_bitmap, value_bitmap,
2915 array_info->invert_mask, array_size);
2916
2917 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
2918 value_bitmap);
2919
2920 i = find_first_zero_bit(array_info->set_mask, array_size);
2921 if (i == array_size)
2922 return 0;
2923 } else {
2924 array_info = NULL;
2925 }
2926
2927 while (i < array_size) {
2928 struct gpio_chip *gc = desc_array[i]->gdev->chip;
2929 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2930 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
2931 unsigned long *mask, *bits;
2932 int count = 0;
2933
2934 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
2935 mask = fastpath_mask;
2936 bits = fastpath_bits;
2937 } else {
2938 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2939
2940 mask = bitmap_alloc(gc->ngpio, flags);
2941 if (!mask)
2942 return -ENOMEM;
2943
2944 bits = bitmap_alloc(gc->ngpio, flags);
2945 if (!bits) {
2946 bitmap_free(mask);
2947 return -ENOMEM;
2948 }
2949 }
2950
2951 bitmap_zero(mask, gc->ngpio);
2952
2953 if (!can_sleep)
2954 WARN_ON(gc->can_sleep);
2955
2956 do {
2957 struct gpio_desc *desc = desc_array[i];
2958 int hwgpio = gpio_chip_hwgpio(desc);
2959 int value = test_bit(i, value_bitmap);
2960
2961
2962
2963
2964
2965
2966 if (!raw && !(array_info &&
2967 test_bit(i, array_info->invert_mask)) &&
2968 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2969 value = !value;
2970 trace_gpio_value(desc_to_gpio(desc), 0, value);
2971
2972
2973
2974
2975 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
2976 gpio_set_open_drain_value_commit(desc, value);
2977 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
2978 gpio_set_open_source_value_commit(desc, value);
2979 } else {
2980 __set_bit(hwgpio, mask);
2981 __assign_bit(hwgpio, bits, value);
2982 count++;
2983 }
2984 i++;
2985
2986 if (array_info)
2987 i = find_next_zero_bit(array_info->set_mask,
2988 array_size, i);
2989 } while ((i < array_size) &&
2990 (desc_array[i]->gdev->chip == gc));
2991
2992 if (count != 0)
2993 gpio_chip_set_multiple(gc, mask, bits);
2994
2995 if (mask != fastpath_mask)
2996 bitmap_free(mask);
2997 if (bits != fastpath_bits)
2998 bitmap_free(bits);
2999 }
3000 return 0;
3001}
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014void gpiod_set_raw_value(struct gpio_desc *desc, int value)
3015{
3016 VALIDATE_DESC_VOID(desc);
3017
3018 WARN_ON(desc->gdev->chip->can_sleep);
3019 gpiod_set_raw_value_commit(desc, value);
3020}
3021EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3033{
3034 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3035 value = !value;
3036 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3037 gpio_set_open_drain_value_commit(desc, value);
3038 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3039 gpio_set_open_source_value_commit(desc, value);
3040 else
3041 gpiod_set_raw_value_commit(desc, value);
3042}
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055void gpiod_set_value(struct gpio_desc *desc, int value)
3056{
3057 VALIDATE_DESC_VOID(desc);
3058
3059 WARN_ON(desc->gdev->chip->can_sleep);
3060 gpiod_set_value_nocheck(desc, value);
3061}
3062EXPORT_SYMBOL_GPL(gpiod_set_value);
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077int gpiod_set_raw_array_value(unsigned int array_size,
3078 struct gpio_desc **desc_array,
3079 struct gpio_array *array_info,
3080 unsigned long *value_bitmap)
3081{
3082 if (!desc_array)
3083 return -EINVAL;
3084 return gpiod_set_array_value_complex(true, false, array_size,
3085 desc_array, array_info, value_bitmap);
3086}
3087EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102int gpiod_set_array_value(unsigned int array_size,
3103 struct gpio_desc **desc_array,
3104 struct gpio_array *array_info,
3105 unsigned long *value_bitmap)
3106{
3107 if (!desc_array)
3108 return -EINVAL;
3109 return gpiod_set_array_value_complex(false, false, array_size,
3110 desc_array, array_info,
3111 value_bitmap);
3112}
3113EXPORT_SYMBOL_GPL(gpiod_set_array_value);
3114
3115
3116
3117
3118
3119
3120int gpiod_cansleep(const struct gpio_desc *desc)
3121{
3122 VALIDATE_DESC(desc);
3123 return desc->gdev->chip->can_sleep;
3124}
3125EXPORT_SYMBOL_GPL(gpiod_cansleep);
3126
3127
3128
3129
3130
3131
3132int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
3133{
3134 VALIDATE_DESC(desc);
3135 if (name) {
3136 name = kstrdup_const(name, GFP_KERNEL);
3137 if (!name)
3138 return -ENOMEM;
3139 }
3140
3141 kfree_const(desc->label);
3142 desc_set_label(desc, name);
3143
3144 return 0;
3145}
3146EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3147
3148
3149
3150
3151
3152
3153
3154
3155int gpiod_to_irq(const struct gpio_desc *desc)
3156{
3157 struct gpio_chip *gc;
3158 int offset;
3159
3160
3161
3162
3163
3164
3165 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
3166 return -EINVAL;
3167
3168 gc = desc->gdev->chip;
3169 offset = gpio_chip_hwgpio(desc);
3170 if (gc->to_irq) {
3171 int retirq = gc->to_irq(gc, offset);
3172
3173
3174 if (!retirq)
3175 return -ENXIO;
3176
3177 return retirq;
3178 }
3179#ifdef CONFIG_GPIOLIB_IRQCHIP
3180 if (gc->irq.chip) {
3181
3182
3183
3184
3185
3186 return -EPROBE_DEFER;
3187 }
3188#endif
3189 return -ENXIO;
3190}
3191EXPORT_SYMBOL_GPL(gpiod_to_irq);
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
3202{
3203 struct gpio_desc *desc;
3204
3205 desc = gpiochip_get_desc(gc, offset);
3206 if (IS_ERR(desc))
3207 return PTR_ERR(desc);
3208
3209
3210
3211
3212
3213 if (!gc->can_sleep && gc->get_direction) {
3214 int dir = gpiod_get_direction(desc);
3215
3216 if (dir < 0) {
3217 chip_err(gc, "%s: cannot get GPIO direction\n",
3218 __func__);
3219 return dir;
3220 }
3221 }
3222
3223
3224 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3225 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3226 chip_err(gc,
3227 "%s: tried to flag a GPIO set as output for IRQ\n",
3228 __func__);
3229 return -EIO;
3230 }
3231
3232 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
3233 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3234
3235
3236
3237
3238
3239
3240 if (!desc->label)
3241 desc_set_label(desc, "interrupt");
3242
3243 return 0;
3244}
3245EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
3256{
3257 struct gpio_desc *desc;
3258
3259 desc = gpiochip_get_desc(gc, offset);
3260 if (IS_ERR(desc))
3261 return;
3262
3263 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
3264 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3265
3266
3267 if (desc->label && !strcmp(desc->label, "interrupt"))
3268 desc_set_label(desc, NULL);
3269}
3270EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
3271
3272void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
3273{
3274 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
3275
3276 if (!IS_ERR(desc) &&
3277 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3278 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3279}
3280EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3281
3282void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
3283{
3284 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
3285
3286 if (!IS_ERR(desc) &&
3287 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
3288
3289
3290
3291
3292 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3293 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
3294 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3295 }
3296}
3297EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3298
3299bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
3300{
3301 if (offset >= gc->ngpio)
3302 return false;
3303
3304 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
3305}
3306EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3307
3308int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
3309{
3310 int ret;
3311
3312 if (!try_module_get(gc->gpiodev->owner))
3313 return -ENODEV;
3314
3315 ret = gpiochip_lock_as_irq(gc, offset);
3316 if (ret) {
3317 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3318 module_put(gc->gpiodev->owner);
3319 return ret;
3320 }
3321 return 0;
3322}
3323EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3324
3325void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
3326{
3327 gpiochip_unlock_as_irq(gc, offset);
3328 module_put(gc->gpiodev->owner);
3329}
3330EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3331
3332bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
3333{
3334 if (offset >= gc->ngpio)
3335 return false;
3336
3337 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
3338}
3339EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3340
3341bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
3342{
3343 if (offset >= gc->ngpio)
3344 return false;
3345
3346 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
3347}
3348EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3349
3350bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
3351{
3352 if (offset >= gc->ngpio)
3353 return false;
3354
3355 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
3356}
3357EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
3369{
3370 might_sleep_if(extra_checks);
3371 VALIDATE_DESC(desc);
3372 return gpiod_get_raw_value_commit(desc);
3373}
3374EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385int gpiod_get_value_cansleep(const struct gpio_desc *desc)
3386{
3387 int value;
3388
3389 might_sleep_if(extra_checks);
3390 VALIDATE_DESC(desc);
3391 value = gpiod_get_raw_value_commit(desc);
3392 if (value < 0)
3393 return value;
3394
3395 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3396 value = !value;
3397
3398 return value;
3399}
3400EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3416 struct gpio_desc **desc_array,
3417 struct gpio_array *array_info,
3418 unsigned long *value_bitmap)
3419{
3420 might_sleep_if(extra_checks);
3421 if (!desc_array)
3422 return -EINVAL;
3423 return gpiod_get_array_value_complex(true, true, array_size,
3424 desc_array, array_info,
3425 value_bitmap);
3426}
3427EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441int gpiod_get_array_value_cansleep(unsigned int array_size,
3442 struct gpio_desc **desc_array,
3443 struct gpio_array *array_info,
3444 unsigned long *value_bitmap)
3445{
3446 might_sleep_if(extra_checks);
3447 if (!desc_array)
3448 return -EINVAL;
3449 return gpiod_get_array_value_complex(false, true, array_size,
3450 desc_array, array_info,
3451 value_bitmap);
3452}
3453EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
3466{
3467 might_sleep_if(extra_checks);
3468 VALIDATE_DESC_VOID(desc);
3469 gpiod_set_raw_value_commit(desc, value);
3470}
3471EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
3484{
3485 might_sleep_if(extra_checks);
3486 VALIDATE_DESC_VOID(desc);
3487 gpiod_set_value_nocheck(desc, value);
3488}
3489EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3504 struct gpio_desc **desc_array,
3505 struct gpio_array *array_info,
3506 unsigned long *value_bitmap)
3507{
3508 might_sleep_if(extra_checks);
3509 if (!desc_array)
3510 return -EINVAL;
3511 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
3512 array_info, value_bitmap);
3513}
3514EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
3515
3516
3517
3518
3519
3520
3521void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3522{
3523 unsigned int i;
3524
3525 mutex_lock(&gpio_lookup_lock);
3526
3527 for (i = 0; i < n; i++)
3528 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3529
3530 mutex_unlock(&gpio_lookup_lock);
3531}
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545int gpiod_set_array_value_cansleep(unsigned int array_size,
3546 struct gpio_desc **desc_array,
3547 struct gpio_array *array_info,
3548 unsigned long *value_bitmap)
3549{
3550 might_sleep_if(extra_checks);
3551 if (!desc_array)
3552 return -EINVAL;
3553 return gpiod_set_array_value_complex(false, true, array_size,
3554 desc_array, array_info,
3555 value_bitmap);
3556}
3557EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
3558
3559
3560
3561
3562
3563void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
3564{
3565 gpiod_add_lookup_tables(&table, 1);
3566}
3567EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
3568
3569
3570
3571
3572
3573void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3574{
3575
3576 if (!table)
3577 return;
3578
3579 mutex_lock(&gpio_lookup_lock);
3580
3581 list_del(&table->list);
3582
3583 mutex_unlock(&gpio_lookup_lock);
3584}
3585EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
3586
3587
3588
3589
3590
3591void gpiod_add_hogs(struct gpiod_hog *hogs)
3592{
3593 struct gpio_chip *gc;
3594 struct gpiod_hog *hog;
3595
3596 mutex_lock(&gpio_machine_hogs_mutex);
3597
3598 for (hog = &hogs[0]; hog->chip_label; hog++) {
3599 list_add_tail(&hog->list, &gpio_machine_hogs);
3600
3601
3602
3603
3604
3605 gc = find_chip_by_name(hog->chip_label);
3606 if (gc)
3607 gpiochip_machine_hog(gc, hog);
3608 }
3609
3610 mutex_unlock(&gpio_machine_hogs_mutex);
3611}
3612EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3613
3614void gpiod_remove_hogs(struct gpiod_hog *hogs)
3615{
3616 struct gpiod_hog *hog;
3617
3618 mutex_lock(&gpio_machine_hogs_mutex);
3619 for (hog = &hogs[0]; hog->chip_label; hog++)
3620 list_del(&hog->list);
3621 mutex_unlock(&gpio_machine_hogs_mutex);
3622}
3623EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
3624
3625static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
3626{
3627 const char *dev_id = dev ? dev_name(dev) : NULL;
3628 struct gpiod_lookup_table *table;
3629
3630 mutex_lock(&gpio_lookup_lock);
3631
3632 list_for_each_entry(table, &gpio_lookup_list, list) {
3633 if (table->dev_id && dev_id) {
3634
3635
3636
3637
3638 if (!strcmp(table->dev_id, dev_id))
3639 goto found;
3640 } else {
3641
3642
3643
3644
3645 if (dev_id == table->dev_id)
3646 goto found;
3647 }
3648 }
3649 table = NULL;
3650
3651found:
3652 mutex_unlock(&gpio_lookup_lock);
3653 return table;
3654}
3655
3656static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
3657 unsigned int idx, unsigned long *flags)
3658{
3659 struct gpio_desc *desc = ERR_PTR(-ENOENT);
3660 struct gpiod_lookup_table *table;
3661 struct gpiod_lookup *p;
3662
3663 table = gpiod_find_lookup_table(dev);
3664 if (!table)
3665 return desc;
3666
3667 for (p = &table->table[0]; p->key; p++) {
3668 struct gpio_chip *gc;
3669
3670
3671 if (p->idx != idx)
3672 continue;
3673
3674
3675 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3676 continue;
3677
3678 if (p->chip_hwnum == U16_MAX) {
3679 desc = gpio_name_to_desc(p->key);
3680 if (desc) {
3681 *flags = p->flags;
3682 return desc;
3683 }
3684
3685 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3686 p->key);
3687 return ERR_PTR(-EPROBE_DEFER);
3688 }
3689
3690 gc = find_chip_by_name(p->key);
3691
3692 if (!gc) {
3693
3694
3695
3696
3697
3698
3699
3700 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
3701 p->key);
3702 return ERR_PTR(-EPROBE_DEFER);
3703 }
3704
3705 if (gc->ngpio <= p->chip_hwnum) {
3706 dev_err(dev,
3707 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
3708 idx, p->chip_hwnum, gc->ngpio - 1,
3709 gc->label);
3710 return ERR_PTR(-EINVAL);
3711 }
3712
3713 desc = gpiochip_get_desc(gc, p->chip_hwnum);
3714 *flags = p->flags;
3715
3716 return desc;
3717 }
3718
3719 return desc;
3720}
3721
3722static int platform_gpio_count(struct device *dev, const char *con_id)
3723{
3724 struct gpiod_lookup_table *table;
3725 struct gpiod_lookup *p;
3726 unsigned int count = 0;
3727
3728 table = gpiod_find_lookup_table(dev);
3729 if (!table)
3730 return -ENOENT;
3731
3732 for (p = &table->table[0]; p->key; p++) {
3733 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3734 (!con_id && !p->con_id))
3735 count++;
3736 }
3737 if (!count)
3738 return -ENOENT;
3739
3740 return count;
3741}
3742
3743
3744
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759
3760
3761
3762
3763
3764struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
3765 const char *con_id, int index,
3766 enum gpiod_flags flags,
3767 const char *label)
3768{
3769 struct gpio_desc *desc;
3770 char prop_name[32];
3771 unsigned int i;
3772
3773 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
3774 if (con_id)
3775 snprintf(prop_name, sizeof(prop_name), "%s-%s",
3776 con_id, gpio_suffixes[i]);
3777 else
3778 snprintf(prop_name, sizeof(prop_name), "%s",
3779 gpio_suffixes[i]);
3780
3781 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
3782 label);
3783 if (!gpiod_not_found(desc))
3784 break;
3785 }
3786
3787 return desc;
3788}
3789EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
3790
3791
3792
3793
3794
3795
3796
3797int gpiod_count(struct device *dev, const char *con_id)
3798{
3799 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
3800 int count = -ENOENT;
3801
3802 if (is_of_node(fwnode))
3803 count = of_gpio_get_count(dev, con_id);
3804 else if (is_acpi_node(fwnode))
3805 count = acpi_gpio_count(dev, con_id);
3806
3807 if (count < 0)
3808 count = platform_gpio_count(dev, con_id);
3809
3810 return count;
3811}
3812EXPORT_SYMBOL_GPL(gpiod_count);
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823
3824struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
3825 enum gpiod_flags flags)
3826{
3827 return gpiod_get_index(dev, con_id, 0, flags);
3828}
3829EXPORT_SYMBOL_GPL(gpiod_get);
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
3842 const char *con_id,
3843 enum gpiod_flags flags)
3844{
3845 return gpiod_get_index_optional(dev, con_id, 0, flags);
3846}
3847EXPORT_SYMBOL_GPL(gpiod_get_optional);
3848
3849
3850
3851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
3863 unsigned long lflags, enum gpiod_flags dflags)
3864{
3865 int ret;
3866
3867 if (lflags & GPIO_ACTIVE_LOW)
3868 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
3869
3870 if (lflags & GPIO_OPEN_DRAIN)
3871 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3872 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
3873
3874
3875
3876
3877
3878
3879 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3880 gpiod_warn(desc,
3881 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
3882 }
3883
3884 if (lflags & GPIO_OPEN_SOURCE)
3885 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
3886
3887 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
3888 gpiod_err(desc,
3889 "both pull-up and pull-down enabled, invalid configuration\n");
3890 return -EINVAL;
3891 }
3892
3893 if (lflags & GPIO_PULL_UP)
3894 set_bit(FLAG_PULL_UP, &desc->flags);
3895 else if (lflags & GPIO_PULL_DOWN)
3896 set_bit(FLAG_PULL_DOWN, &desc->flags);
3897
3898 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
3899 if (ret < 0)
3900 return ret;
3901
3902
3903 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
3904 gpiod_dbg(desc, "no flags found for %s\n", con_id);
3905 return 0;
3906 }
3907
3908
3909 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
3910 ret = gpiod_direction_output(desc,
3911 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
3912 else
3913 ret = gpiod_direction_input(desc);
3914
3915 return ret;
3916}
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
3930
3931
3932struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
3933 const char *con_id,
3934 unsigned int idx,
3935 enum gpiod_flags flags)
3936{
3937 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
3938 struct gpio_desc *desc = NULL;
3939 int ret;
3940
3941 const char *devname = dev ? dev_name(dev) : "?";
3942 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
3943
3944 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
3945
3946
3947 if (is_of_node(fwnode)) {
3948 dev_dbg(dev, "using device tree for GPIO lookup\n");
3949 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
3950 } else if (is_acpi_node(fwnode)) {
3951 dev_dbg(dev, "using ACPI for GPIO lookup\n");
3952 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
3953 }
3954
3955
3956
3957
3958
3959 if (!desc || gpiod_not_found(desc)) {
3960 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
3961 desc = gpiod_find(dev, con_id, idx, &lookupflags);
3962 }
3963
3964 if (IS_ERR(desc)) {
3965 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
3966 return desc;
3967 }
3968
3969
3970
3971
3972
3973 ret = gpiod_request(desc, con_id ?: devname);
3974 if (ret) {
3975 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
3976 return ERR_PTR(ret);
3977
3978
3979
3980
3981
3982
3983
3984
3985
3986 dev_info(dev, "nonexclusive access to GPIO for %s\n", con_id ?: devname);
3987 return desc;
3988 }
3989
3990 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
3991 if (ret < 0) {
3992 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
3993 gpiod_put(desc);
3994 return ERR_PTR(ret);
3995 }
3996
3997 blocking_notifier_call_chain(&desc->gdev->notifier,
3998 GPIOLINE_CHANGED_REQUESTED, desc);
3999
4000 return desc;
4001}
4002EXPORT_SYMBOL_GPL(gpiod_get_index);
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
4020
4021
4022
4023
4024
4025struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
4026 const char *propname, int index,
4027 enum gpiod_flags dflags,
4028 const char *label)
4029{
4030 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
4031 struct gpio_desc *desc = ERR_PTR(-ENODEV);
4032 int ret;
4033
4034 if (is_of_node(fwnode)) {
4035 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4036 propname, index,
4037 dflags,
4038 label);
4039 return desc;
4040 } else if (is_acpi_node(fwnode)) {
4041 struct acpi_gpio_info info;
4042
4043 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
4044 if (IS_ERR(desc))
4045 return desc;
4046
4047 acpi_gpio_update_gpiod_flags(&dflags, &info);
4048 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
4049 } else
4050 return ERR_PTR(-EINVAL);
4051
4052
4053 ret = gpiod_request(desc, label);
4054 if (ret)
4055 return ERR_PTR(ret);
4056
4057 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4058 if (ret < 0) {
4059 gpiod_put(desc);
4060 return ERR_PTR(ret);
4061 }
4062
4063 blocking_notifier_call_chain(&desc->gdev->notifier,
4064 GPIOLINE_CHANGED_REQUESTED, desc);
4065
4066 return desc;
4067}
4068EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
4083 const char *con_id,
4084 unsigned int index,
4085 enum gpiod_flags flags)
4086{
4087 struct gpio_desc *desc;
4088
4089 desc = gpiod_get_index(dev, con_id, index, flags);
4090 if (gpiod_not_found(desc))
4091 return NULL;
4092
4093 return desc;
4094}
4095EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
4096
4097
4098
4099
4100
4101
4102
4103
4104
4105int gpiod_hog(struct gpio_desc *desc, const char *name,
4106 unsigned long lflags, enum gpiod_flags dflags)
4107{
4108 struct gpio_chip *gc;
4109 struct gpio_desc *local_desc;
4110 int hwnum;
4111 int ret;
4112
4113 gc = gpiod_to_chip(desc);
4114 hwnum = gpio_chip_hwgpio(desc);
4115
4116 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
4117 lflags, dflags);
4118 if (IS_ERR(local_desc)) {
4119 ret = PTR_ERR(local_desc);
4120 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
4121 name, gc->label, hwnum, ret);
4122 return ret;
4123 }
4124
4125
4126 set_bit(FLAG_IS_HOGGED, &desc->flags);
4127
4128 gpiod_info(desc, "hogged as %s%s\n",
4129 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4130 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4131 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
4132
4133 return 0;
4134}
4135
4136
4137
4138
4139
4140static void gpiochip_free_hogs(struct gpio_chip *gc)
4141{
4142 struct gpio_desc *desc;
4143 int id;
4144
4145 for_each_gpio_desc_with_flag(id, gc, desc, FLAG_IS_HOGGED)
4146 gpiochip_free_own_desc(desc);
4147}
4148
4149
4150
4151
4152
4153
4154
4155
4156
4157
4158
4159
4160
4161struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4162 const char *con_id,
4163 enum gpiod_flags flags)
4164{
4165 struct gpio_desc *desc;
4166 struct gpio_descs *descs;
4167 struct gpio_array *array_info = NULL;
4168 struct gpio_chip *gc;
4169 int count, bitmap_size;
4170
4171 count = gpiod_count(dev, con_id);
4172 if (count < 0)
4173 return ERR_PTR(count);
4174
4175 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
4176 if (!descs)
4177 return ERR_PTR(-ENOMEM);
4178
4179 for (descs->ndescs = 0; descs->ndescs < count; ) {
4180 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4181 if (IS_ERR(desc)) {
4182 gpiod_put_array(descs);
4183 return ERR_CAST(desc);
4184 }
4185
4186 descs->desc[descs->ndescs] = desc;
4187
4188 gc = gpiod_to_chip(desc);
4189
4190
4191
4192
4193 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
4194 struct gpio_descs *array;
4195
4196 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4197 gc->ngpio : count);
4198
4199 array = kzalloc(struct_size(descs, desc, count) +
4200 struct_size(array_info, invert_mask,
4201 3 * bitmap_size), GFP_KERNEL);
4202 if (!array) {
4203 gpiod_put_array(descs);
4204 return ERR_PTR(-ENOMEM);
4205 }
4206
4207 memcpy(array, descs,
4208 struct_size(descs, desc, descs->ndescs + 1));
4209 kfree(descs);
4210
4211 descs = array;
4212 array_info = (void *)(descs->desc + count);
4213 array_info->get_mask = array_info->invert_mask +
4214 bitmap_size;
4215 array_info->set_mask = array_info->get_mask +
4216 bitmap_size;
4217
4218 array_info->desc = descs->desc;
4219 array_info->size = count;
4220 array_info->chip = gc;
4221 bitmap_set(array_info->get_mask, descs->ndescs,
4222 count - descs->ndescs);
4223 bitmap_set(array_info->set_mask, descs->ndescs,
4224 count - descs->ndescs);
4225 descs->info = array_info;
4226 }
4227
4228 if (array_info && array_info->chip != gc) {
4229 __clear_bit(descs->ndescs, array_info->get_mask);
4230 __clear_bit(descs->ndescs, array_info->set_mask);
4231 }
4232
4233
4234
4235
4236 else if (array_info &&
4237 gpio_chip_hwgpio(desc) != descs->ndescs) {
4238
4239
4240
4241
4242
4243 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4244 array_info = NULL;
4245 } else {
4246 __clear_bit(descs->ndescs,
4247 array_info->get_mask);
4248 __clear_bit(descs->ndescs,
4249 array_info->set_mask);
4250 }
4251 } else if (array_info) {
4252
4253 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4254 gpiochip_line_is_open_source(gc, descs->ndescs))
4255 __clear_bit(descs->ndescs,
4256 array_info->set_mask);
4257
4258 if (gpiod_is_active_low(desc))
4259 __set_bit(descs->ndescs,
4260 array_info->invert_mask);
4261 }
4262
4263 descs->ndescs++;
4264 }
4265 if (array_info)
4266 dev_dbg(dev,
4267 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4268 array_info->chip->label, array_info->size,
4269 *array_info->get_mask, *array_info->set_mask,
4270 *array_info->invert_mask);
4271 return descs;
4272}
4273EXPORT_SYMBOL_GPL(gpiod_get_array);
4274
4275
4276
4277
4278
4279
4280
4281
4282
4283
4284
4285struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4286 const char *con_id,
4287 enum gpiod_flags flags)
4288{
4289 struct gpio_descs *descs;
4290
4291 descs = gpiod_get_array(dev, con_id, flags);
4292 if (gpiod_not_found(descs))
4293 return NULL;
4294
4295 return descs;
4296}
4297EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4298
4299
4300
4301
4302
4303
4304
4305void gpiod_put(struct gpio_desc *desc)
4306{
4307 if (desc)
4308 gpiod_free(desc);
4309}
4310EXPORT_SYMBOL_GPL(gpiod_put);
4311
4312
4313
4314
4315
4316void gpiod_put_array(struct gpio_descs *descs)
4317{
4318 unsigned int i;
4319
4320 for (i = 0; i < descs->ndescs; i++)
4321 gpiod_put(descs->desc[i]);
4322
4323 kfree(descs);
4324}
4325EXPORT_SYMBOL_GPL(gpiod_put_array);
4326
4327
4328static int gpio_bus_match(struct device *dev, struct device_driver *drv)
4329{
4330 struct fwnode_handle *fwnode = dev_fwnode(dev);
4331
4332
4333
4334
4335
4336 if (fwnode && fwnode->dev != dev)
4337 return 0;
4338 return 1;
4339}
4340
4341static int gpio_stub_drv_probe(struct device *dev)
4342{
4343
4344
4345
4346
4347
4348
4349
4350
4351
4352
4353
4354
4355 return 0;
4356}
4357
4358static struct device_driver gpio_stub_drv = {
4359 .name = "gpio_stub_drv",
4360 .bus = &gpio_bus_type,
4361 .probe = gpio_stub_drv_probe,
4362};
4363
4364static int __init gpiolib_dev_init(void)
4365{
4366 int ret;
4367
4368
4369 ret = bus_register(&gpio_bus_type);
4370 if (ret < 0) {
4371 pr_err("gpiolib: could not register GPIO bus type\n");
4372 return ret;
4373 }
4374
4375 ret = driver_register(&gpio_stub_drv);
4376 if (ret < 0) {
4377 pr_err("gpiolib: could not register GPIO stub driver\n");
4378 bus_unregister(&gpio_bus_type);
4379 return ret;
4380 }
4381
4382 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
4383 if (ret < 0) {
4384 pr_err("gpiolib: failed to allocate char dev region\n");
4385 driver_unregister(&gpio_stub_drv);
4386 bus_unregister(&gpio_bus_type);
4387 return ret;
4388 }
4389
4390 gpiolib_initialized = true;
4391 gpiochip_setup_devs();
4392
4393#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4394 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4395#endif
4396
4397 return ret;
4398}
4399core_initcall(gpiolib_dev_init);
4400
4401#ifdef CONFIG_DEBUG_FS
4402
4403static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
4404{
4405 unsigned i;
4406 struct gpio_chip *gc = gdev->chip;
4407 unsigned gpio = gdev->base;
4408 struct gpio_desc *gdesc = &gdev->descs[0];
4409 bool is_out;
4410 bool is_irq;
4411 bool active_low;
4412
4413 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
4414 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
4415 if (gdesc->name) {
4416 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
4417 gpio, gdesc->name);
4418 }
4419 continue;
4420 }
4421
4422 gpiod_get_direction(gdesc);
4423 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
4424 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
4425 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
4426 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
4427 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
4428 is_out ? "out" : "in ",
4429 gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ",
4430 is_irq ? "IRQ " : "",
4431 active_low ? "ACTIVE LOW" : "");
4432 seq_printf(s, "\n");
4433 }
4434}
4435
4436static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
4437{
4438 unsigned long flags;
4439 struct gpio_device *gdev = NULL;
4440 loff_t index = *pos;
4441
4442 s->private = "";
4443
4444 spin_lock_irqsave(&gpio_lock, flags);
4445 list_for_each_entry(gdev, &gpio_devices, list)
4446 if (index-- == 0) {
4447 spin_unlock_irqrestore(&gpio_lock, flags);
4448 return gdev;
4449 }
4450 spin_unlock_irqrestore(&gpio_lock, flags);
4451
4452 return NULL;
4453}
4454
4455static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4456{
4457 unsigned long flags;
4458 struct gpio_device *gdev = v;
4459 void *ret = NULL;
4460
4461 spin_lock_irqsave(&gpio_lock, flags);
4462 if (list_is_last(&gdev->list, &gpio_devices))
4463 ret = NULL;
4464 else
4465 ret = list_first_entry(&gdev->list, struct gpio_device, list);
4466 spin_unlock_irqrestore(&gpio_lock, flags);
4467
4468 s->private = "\n";
4469 ++*pos;
4470
4471 return ret;
4472}
4473
4474static void gpiolib_seq_stop(struct seq_file *s, void *v)
4475{
4476}
4477
4478static int gpiolib_seq_show(struct seq_file *s, void *v)
4479{
4480 struct gpio_device *gdev = v;
4481 struct gpio_chip *gc = gdev->chip;
4482 struct device *parent;
4483
4484 if (!gc) {
4485 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4486 dev_name(&gdev->dev));
4487 return 0;
4488 }
4489
4490 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4491 dev_name(&gdev->dev),
4492 gdev->base, gdev->base + gdev->ngpio - 1);
4493 parent = gc->parent;
4494 if (parent)
4495 seq_printf(s, ", parent: %s/%s",
4496 parent->bus ? parent->bus->name : "no-bus",
4497 dev_name(parent));
4498 if (gc->label)
4499 seq_printf(s, ", %s", gc->label);
4500 if (gc->can_sleep)
4501 seq_printf(s, ", can sleep");
4502 seq_printf(s, ":\n");
4503
4504 if (gc->dbg_show)
4505 gc->dbg_show(s, gc);
4506 else
4507 gpiolib_dbg_show(s, gdev);
4508
4509 return 0;
4510}
4511
4512static const struct seq_operations gpiolib_sops = {
4513 .start = gpiolib_seq_start,
4514 .next = gpiolib_seq_next,
4515 .stop = gpiolib_seq_stop,
4516 .show = gpiolib_seq_show,
4517};
4518DEFINE_SEQ_ATTRIBUTE(gpiolib);
4519
4520static int __init gpiolib_debugfs_init(void)
4521{
4522
4523 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
4524 return 0;
4525}
4526subsys_initcall(gpiolib_debugfs_init);
4527
4528#endif
4529