linux/drivers/iio/imu/adis16475.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * ADIS16475 IMU driver
   4 *
   5 * Copyright 2019 Analog Devices Inc.
   6 */
   7#include <linux/bitfield.h>
   8#include <linux/bitops.h>
   9#include <linux/clk.h>
  10#include <linux/debugfs.h>
  11#include <linux/delay.h>
  12#include <linux/device.h>
  13#include <linux/kernel.h>
  14#include <linux/iio/buffer.h>
  15#include <linux/iio/iio.h>
  16#include <linux/iio/imu/adis.h>
  17#include <linux/iio/trigger_consumer.h>
  18#include <linux/irq.h>
  19#include <linux/lcm.h>
  20#include <linux/math.h>
  21#include <linux/module.h>
  22#include <linux/mod_devicetable.h>
  23#include <linux/property.h>
  24#include <linux/spi/spi.h>
  25
  26#define ADIS16475_REG_DIAG_STAT         0x02
  27#define ADIS16475_REG_X_GYRO_L          0x04
  28#define ADIS16475_REG_Y_GYRO_L          0x08
  29#define ADIS16475_REG_Z_GYRO_L          0x0C
  30#define ADIS16475_REG_X_ACCEL_L         0x10
  31#define ADIS16475_REG_Y_ACCEL_L         0x14
  32#define ADIS16475_REG_Z_ACCEL_L         0x18
  33#define ADIS16475_REG_TEMP_OUT          0x1c
  34#define ADIS16475_REG_X_GYRO_BIAS_L     0x40
  35#define ADIS16475_REG_Y_GYRO_BIAS_L     0x44
  36#define ADIS16475_REG_Z_GYRO_BIAS_L     0x48
  37#define ADIS16475_REG_X_ACCEL_BIAS_L    0x4c
  38#define ADIS16475_REG_Y_ACCEL_BIAS_L    0x50
  39#define ADIS16475_REG_Z_ACCEL_BIAS_L    0x54
  40#define ADIS16475_REG_FILT_CTRL         0x5c
  41#define ADIS16475_FILT_CTRL_MASK        GENMASK(2, 0)
  42#define ADIS16475_FILT_CTRL(x)          FIELD_PREP(ADIS16475_FILT_CTRL_MASK, x)
  43#define ADIS16475_REG_MSG_CTRL          0x60
  44#define ADIS16475_MSG_CTRL_DR_POL_MASK  BIT(0)
  45#define ADIS16475_MSG_CTRL_DR_POL(x) \
  46                                FIELD_PREP(ADIS16475_MSG_CTRL_DR_POL_MASK, x)
  47#define ADIS16475_SYNC_MODE_MASK        GENMASK(4, 2)
  48#define ADIS16475_SYNC_MODE(x)          FIELD_PREP(ADIS16475_SYNC_MODE_MASK, x)
  49#define ADIS16475_REG_UP_SCALE          0x62
  50#define ADIS16475_REG_DEC_RATE          0x64
  51#define ADIS16475_REG_GLOB_CMD          0x68
  52#define ADIS16475_REG_FIRM_REV          0x6c
  53#define ADIS16475_REG_FIRM_DM           0x6e
  54#define ADIS16475_REG_FIRM_Y            0x70
  55#define ADIS16475_REG_PROD_ID           0x72
  56#define ADIS16475_REG_SERIAL_NUM        0x74
  57#define ADIS16475_REG_FLASH_CNT         0x7c
  58#define ADIS16500_BURST32_MASK          BIT(9)
  59#define ADIS16500_BURST32(x)            FIELD_PREP(ADIS16500_BURST32_MASK, x)
  60/* number of data elements in burst mode */
  61#define ADIS16475_BURST32_MAX_DATA      32
  62#define ADIS16475_BURST_MAX_DATA        20
  63#define ADIS16475_MAX_SCAN_DATA         20
  64/* spi max speed in brust mode */
  65#define ADIS16475_BURST_MAX_SPEED       1000000
  66#define ADIS16475_LSB_DEC_MASK          BIT(0)
  67#define ADIS16475_LSB_FIR_MASK          BIT(1)
  68
  69enum {
  70        ADIS16475_SYNC_DIRECT = 1,
  71        ADIS16475_SYNC_SCALED,
  72        ADIS16475_SYNC_OUTPUT,
  73        ADIS16475_SYNC_PULSE = 5,
  74};
  75
  76struct adis16475_sync {
  77        u16 sync_mode;
  78        u16 min_rate;
  79        u16 max_rate;
  80};
  81
  82struct adis16475_chip_info {
  83        const struct iio_chan_spec *channels;
  84        const struct adis16475_sync *sync;
  85        const struct adis_data adis_data;
  86        const char *name;
  87        u32 num_channels;
  88        u32 gyro_max_val;
  89        u32 gyro_max_scale;
  90        u32 accel_max_val;
  91        u32 accel_max_scale;
  92        u32 temp_scale;
  93        u32 int_clk;
  94        u16 max_dec;
  95        u8 num_sync;
  96        bool has_burst32;
  97};
  98
  99struct adis16475 {
 100        const struct adis16475_chip_info *info;
 101        struct adis adis;
 102        u32 clk_freq;
 103        bool burst32;
 104        unsigned long lsb_flag;
 105        u16 sync_mode;
 106        /* Alignment needed for the timestamp */
 107        __be16 data[ADIS16475_MAX_SCAN_DATA] __aligned(8);
 108};
 109
 110enum {
 111        ADIS16475_SCAN_GYRO_X,
 112        ADIS16475_SCAN_GYRO_Y,
 113        ADIS16475_SCAN_GYRO_Z,
 114        ADIS16475_SCAN_ACCEL_X,
 115        ADIS16475_SCAN_ACCEL_Y,
 116        ADIS16475_SCAN_ACCEL_Z,
 117        ADIS16475_SCAN_TEMP,
 118        ADIS16475_SCAN_DIAG_S_FLAGS,
 119        ADIS16475_SCAN_CRC_FAILURE,
 120};
 121
 122static bool low_rate_allow;
 123module_param(low_rate_allow, bool, 0444);
 124MODULE_PARM_DESC(low_rate_allow,
 125                 "Allow IMU rates below the minimum advisable when external clk is used in SCALED mode (default: N)");
 126
 127#ifdef CONFIG_DEBUG_FS
 128static ssize_t adis16475_show_firmware_revision(struct file *file,
 129                                                char __user *userbuf,
 130                                                size_t count, loff_t *ppos)
 131{
 132        struct adis16475 *st = file->private_data;
 133        char buf[7];
 134        size_t len;
 135        u16 rev;
 136        int ret;
 137
 138        ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_REV, &rev);
 139        if (ret)
 140                return ret;
 141
 142        len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff);
 143
 144        return simple_read_from_buffer(userbuf, count, ppos, buf, len);
 145}
 146
 147static const struct file_operations adis16475_firmware_revision_fops = {
 148        .open = simple_open,
 149        .read = adis16475_show_firmware_revision,
 150        .llseek = default_llseek,
 151        .owner = THIS_MODULE,
 152};
 153
 154static ssize_t adis16475_show_firmware_date(struct file *file,
 155                                            char __user *userbuf,
 156                                            size_t count, loff_t *ppos)
 157{
 158        struct adis16475 *st = file->private_data;
 159        u16 md, year;
 160        char buf[12];
 161        size_t len;
 162        int ret;
 163
 164        ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_Y, &year);
 165        if (ret)
 166                return ret;
 167
 168        ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_DM, &md);
 169        if (ret)
 170                return ret;
 171
 172        len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", md >> 8, md & 0xff,
 173                       year);
 174
 175        return simple_read_from_buffer(userbuf, count, ppos, buf, len);
 176}
 177
 178static const struct file_operations adis16475_firmware_date_fops = {
 179        .open = simple_open,
 180        .read = adis16475_show_firmware_date,
 181        .llseek = default_llseek,
 182        .owner = THIS_MODULE,
 183};
 184
 185static int adis16475_show_serial_number(void *arg, u64 *val)
 186{
 187        struct adis16475 *st = arg;
 188        u16 serial;
 189        int ret;
 190
 191        ret = adis_read_reg_16(&st->adis, ADIS16475_REG_SERIAL_NUM, &serial);
 192        if (ret)
 193                return ret;
 194
 195        *val = serial;
 196
 197        return 0;
 198}
 199DEFINE_DEBUGFS_ATTRIBUTE(adis16475_serial_number_fops,
 200                         adis16475_show_serial_number, NULL, "0x%.4llx\n");
 201
 202static int adis16475_show_product_id(void *arg, u64 *val)
 203{
 204        struct adis16475 *st = arg;
 205        u16 prod_id;
 206        int ret;
 207
 208        ret = adis_read_reg_16(&st->adis, ADIS16475_REG_PROD_ID, &prod_id);
 209        if (ret)
 210                return ret;
 211
 212        *val = prod_id;
 213
 214        return 0;
 215}
 216DEFINE_DEBUGFS_ATTRIBUTE(adis16475_product_id_fops,
 217                         adis16475_show_product_id, NULL, "%llu\n");
 218
 219static int adis16475_show_flash_count(void *arg, u64 *val)
 220{
 221        struct adis16475 *st = arg;
 222        u32 flash_count;
 223        int ret;
 224
 225        ret = adis_read_reg_32(&st->adis, ADIS16475_REG_FLASH_CNT,
 226                               &flash_count);
 227        if (ret)
 228                return ret;
 229
 230        *val = flash_count;
 231
 232        return 0;
 233}
 234DEFINE_DEBUGFS_ATTRIBUTE(adis16475_flash_count_fops,
 235                         adis16475_show_flash_count, NULL, "%lld\n");
 236
 237static void adis16475_debugfs_init(struct iio_dev *indio_dev)
 238{
 239        struct adis16475 *st = iio_priv(indio_dev);
 240        struct dentry *d = iio_get_debugfs_dentry(indio_dev);
 241
 242        debugfs_create_file_unsafe("serial_number", 0400,
 243                                   d, st, &adis16475_serial_number_fops);
 244        debugfs_create_file_unsafe("product_id", 0400,
 245                                   d, st, &adis16475_product_id_fops);
 246        debugfs_create_file_unsafe("flash_count", 0400,
 247                                   d, st, &adis16475_flash_count_fops);
 248        debugfs_create_file("firmware_revision", 0400,
 249                            d, st, &adis16475_firmware_revision_fops);
 250        debugfs_create_file("firmware_date", 0400, d,
 251                            st, &adis16475_firmware_date_fops);
 252}
 253#else
 254static void adis16475_debugfs_init(struct iio_dev *indio_dev)
 255{
 256}
 257#endif
 258
 259static int adis16475_get_freq(struct adis16475 *st, u32 *freq)
 260{
 261        int ret;
 262        u16 dec;
 263        u32 sample_rate = st->clk_freq;
 264
 265        adis_dev_lock(&st->adis);
 266
 267        if (st->sync_mode == ADIS16475_SYNC_SCALED) {
 268                u16 sync_scale;
 269
 270                ret = __adis_read_reg_16(&st->adis, ADIS16475_REG_UP_SCALE, &sync_scale);
 271                if (ret)
 272                        goto error;
 273
 274                sample_rate = st->clk_freq * sync_scale;
 275        }
 276
 277        ret = __adis_read_reg_16(&st->adis, ADIS16475_REG_DEC_RATE, &dec);
 278        if (ret)
 279                goto error;
 280
 281        adis_dev_unlock(&st->adis);
 282
 283        *freq = DIV_ROUND_CLOSEST(sample_rate, dec + 1);
 284
 285        return 0;
 286error:
 287        adis_dev_unlock(&st->adis);
 288        return ret;
 289}
 290
 291static int adis16475_set_freq(struct adis16475 *st, const u32 freq)
 292{
 293        u16 dec;
 294        int ret;
 295        u32 sample_rate = st->clk_freq;
 296
 297        if (!freq)
 298                return -EINVAL;
 299
 300        adis_dev_lock(&st->adis);
 301        /*
 302         * When using sync scaled mode, the input clock needs to be scaled so that we have
 303         * an IMU sample rate between (optimally) 1900 and 2100. After this, we can use the
 304         * decimation filter to lower the sampling rate in order to get what the user wants.
 305         * Optimally, the user sample rate is a multiple of both the IMU sample rate and
 306         * the input clock. Hence, calculating the sync_scale dynamically gives us better
 307         * chances of achieving a perfect/integer value for DEC_RATE. The math here is:
 308         *      1. lcm of the input clock and the desired output rate.
 309         *      2. get the highest multiple of the previous result lower than the adis max rate.
 310         *      3. The last result becomes the IMU sample rate. Use that to calculate SYNC_SCALE
 311         *         and DEC_RATE (to get the user output rate)
 312         */
 313        if (st->sync_mode == ADIS16475_SYNC_SCALED) {
 314                unsigned long scaled_rate = lcm(st->clk_freq, freq);
 315                int sync_scale;
 316
 317                /*
 318                 * If lcm is bigger than the IMU maximum sampling rate there's no perfect
 319                 * solution. In this case, we get the highest multiple of the input clock
 320                 * lower than the IMU max sample rate.
 321                 */
 322                if (scaled_rate > 2100000)
 323                        scaled_rate = 2100000 / st->clk_freq * st->clk_freq;
 324                else
 325                        scaled_rate = 2100000 / scaled_rate * scaled_rate;
 326
 327                /*
 328                 * This is not an hard requirement but it's not advised to run the IMU
 329                 * with a sample rate lower than 4000Hz due to possible undersampling
 330                 * issues. However, there are users that might really want to take the risk.
 331                 * Hence, we provide a module parameter for them. If set, we allow sample
 332                 * rates lower than 4KHz. By default, we won't allow this and we just roundup
 333                 * the rate to the next multiple of the input clock bigger than 4KHz. This
 334                 * is done like this as in some cases (when DEC_RATE is 0) might give
 335                 * us the closest value to the one desired by the user...
 336                 */
 337                if (scaled_rate < 1900000 && !low_rate_allow)
 338                        scaled_rate = roundup(1900000, st->clk_freq);
 339
 340                sync_scale = scaled_rate / st->clk_freq;
 341                ret = __adis_write_reg_16(&st->adis, ADIS16475_REG_UP_SCALE, sync_scale);
 342                if (ret)
 343                        goto error;
 344
 345                sample_rate = scaled_rate;
 346        }
 347
 348        dec = DIV_ROUND_CLOSEST(sample_rate, freq);
 349
 350        if (dec)
 351                dec--;
 352
 353        if (dec > st->info->max_dec)
 354                dec = st->info->max_dec;
 355
 356        ret = __adis_write_reg_16(&st->adis, ADIS16475_REG_DEC_RATE, dec);
 357        if (ret)
 358                goto error;
 359
 360        adis_dev_unlock(&st->adis);
 361        /*
 362         * If decimation is used, then gyro and accel data will have meaningful
 363         * bits on the LSB registers. This info is used on the trigger handler.
 364         */
 365        assign_bit(ADIS16475_LSB_DEC_MASK, &st->lsb_flag, dec);
 366
 367        return 0;
 368error:
 369        adis_dev_unlock(&st->adis);
 370        return ret;
 371}
 372
 373/* The values are approximated. */
 374static const u32 adis16475_3db_freqs[] = {
 375        [0] = 720, /* Filter disabled, full BW (~720Hz) */
 376        [1] = 360,
 377        [2] = 164,
 378        [3] = 80,
 379        [4] = 40,
 380        [5] = 20,
 381        [6] = 10,
 382};
 383
 384static int adis16475_get_filter(struct adis16475 *st, u32 *filter)
 385{
 386        u16 filter_sz;
 387        int ret;
 388        const int mask = ADIS16475_FILT_CTRL_MASK;
 389
 390        ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FILT_CTRL, &filter_sz);
 391        if (ret)
 392                return ret;
 393
 394        *filter = adis16475_3db_freqs[filter_sz & mask];
 395
 396        return 0;
 397}
 398
 399static int adis16475_set_filter(struct adis16475 *st, const u32 filter)
 400{
 401        int i = ARRAY_SIZE(adis16475_3db_freqs);
 402        int ret;
 403
 404        while (--i) {
 405                if (adis16475_3db_freqs[i] >= filter)
 406                        break;
 407        }
 408
 409        ret = adis_write_reg_16(&st->adis, ADIS16475_REG_FILT_CTRL,
 410                                ADIS16475_FILT_CTRL(i));
 411        if (ret)
 412                return ret;
 413
 414        /*
 415         * If FIR is used, then gyro and accel data will have meaningful
 416         * bits on the LSB registers. This info is used on the trigger handler.
 417         */
 418        assign_bit(ADIS16475_LSB_FIR_MASK, &st->lsb_flag, i);
 419
 420        return 0;
 421}
 422
 423static const u32 adis16475_calib_regs[] = {
 424        [ADIS16475_SCAN_GYRO_X] = ADIS16475_REG_X_GYRO_BIAS_L,
 425        [ADIS16475_SCAN_GYRO_Y] = ADIS16475_REG_Y_GYRO_BIAS_L,
 426        [ADIS16475_SCAN_GYRO_Z] = ADIS16475_REG_Z_GYRO_BIAS_L,
 427        [ADIS16475_SCAN_ACCEL_X] = ADIS16475_REG_X_ACCEL_BIAS_L,
 428        [ADIS16475_SCAN_ACCEL_Y] = ADIS16475_REG_Y_ACCEL_BIAS_L,
 429        [ADIS16475_SCAN_ACCEL_Z] = ADIS16475_REG_Z_ACCEL_BIAS_L,
 430};
 431
 432static int adis16475_read_raw(struct iio_dev *indio_dev,
 433                              const struct iio_chan_spec *chan,
 434                              int *val, int *val2, long info)
 435{
 436        struct adis16475 *st = iio_priv(indio_dev);
 437        int ret;
 438        u32 tmp;
 439
 440        switch (info) {
 441        case IIO_CHAN_INFO_RAW:
 442                return adis_single_conversion(indio_dev, chan, 0, val);
 443        case IIO_CHAN_INFO_SCALE:
 444                switch (chan->type) {
 445                case IIO_ANGL_VEL:
 446                        *val = st->info->gyro_max_val;
 447                        *val2 = st->info->gyro_max_scale;
 448                        return IIO_VAL_FRACTIONAL;
 449                case IIO_ACCEL:
 450                        *val = st->info->accel_max_val;
 451                        *val2 = st->info->accel_max_scale;
 452                        return IIO_VAL_FRACTIONAL;
 453                case IIO_TEMP:
 454                        *val = st->info->temp_scale;
 455                        return IIO_VAL_INT;
 456                default:
 457                        return -EINVAL;
 458                }
 459        case IIO_CHAN_INFO_CALIBBIAS:
 460                ret = adis_read_reg_32(&st->adis,
 461                                       adis16475_calib_regs[chan->scan_index],
 462                                       val);
 463                if (ret)
 464                        return ret;
 465
 466                return IIO_VAL_INT;
 467        case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
 468                ret = adis16475_get_filter(st, val);
 469                if (ret)
 470                        return ret;
 471
 472                return IIO_VAL_INT;
 473        case IIO_CHAN_INFO_SAMP_FREQ:
 474                ret = adis16475_get_freq(st, &tmp);
 475                if (ret)
 476                        return ret;
 477
 478                *val = tmp / 1000;
 479                *val2 = (tmp % 1000) * 1000;
 480                return IIO_VAL_INT_PLUS_MICRO;
 481        default:
 482                return -EINVAL;
 483        }
 484}
 485
 486static int adis16475_write_raw(struct iio_dev *indio_dev,
 487                               const struct iio_chan_spec *chan,
 488                               int val, int val2, long info)
 489{
 490        struct adis16475 *st = iio_priv(indio_dev);
 491        u32 tmp;
 492
 493        switch (info) {
 494        case IIO_CHAN_INFO_SAMP_FREQ:
 495                tmp = val * 1000 + val2 / 1000;
 496                return adis16475_set_freq(st, tmp);
 497        case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
 498                return adis16475_set_filter(st, val);
 499        case IIO_CHAN_INFO_CALIBBIAS:
 500                return adis_write_reg_32(&st->adis,
 501                                         adis16475_calib_regs[chan->scan_index],
 502                                         val);
 503        default:
 504                return -EINVAL;
 505        }
 506}
 507
 508#define ADIS16475_MOD_CHAN(_type, _mod, _address, _si, _r_bits, _s_bits) \
 509        { \
 510                .type = (_type), \
 511                .modified = 1, \
 512                .channel2 = (_mod), \
 513                .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 514                        BIT(IIO_CHAN_INFO_CALIBBIAS), \
 515                .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
 516                .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
 517                        BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
 518                .address = (_address), \
 519                .scan_index = (_si), \
 520                .scan_type = { \
 521                        .sign = 's', \
 522                        .realbits = (_r_bits), \
 523                        .storagebits = (_s_bits), \
 524                        .endianness = IIO_BE, \
 525                }, \
 526        }
 527
 528#define ADIS16475_GYRO_CHANNEL(_mod) \
 529        ADIS16475_MOD_CHAN(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \
 530                           ADIS16475_REG_ ## _mod ## _GYRO_L, \
 531                           ADIS16475_SCAN_GYRO_ ## _mod, 32, 32)
 532
 533#define ADIS16475_ACCEL_CHANNEL(_mod) \
 534        ADIS16475_MOD_CHAN(IIO_ACCEL, IIO_MOD_ ## _mod, \
 535                           ADIS16475_REG_ ## _mod ## _ACCEL_L, \
 536                           ADIS16475_SCAN_ACCEL_ ## _mod, 32, 32)
 537
 538#define ADIS16475_TEMP_CHANNEL() { \
 539                .type = IIO_TEMP, \
 540                .indexed = 1, \
 541                .channel = 0, \
 542                .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 543                        BIT(IIO_CHAN_INFO_SCALE), \
 544                .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
 545                        BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
 546                .address = ADIS16475_REG_TEMP_OUT, \
 547                .scan_index = ADIS16475_SCAN_TEMP, \
 548                .scan_type = { \
 549                        .sign = 's', \
 550                        .realbits = 16, \
 551                        .storagebits = 16, \
 552                        .endianness = IIO_BE, \
 553                }, \
 554        }
 555
 556static const struct iio_chan_spec adis16475_channels[] = {
 557        ADIS16475_GYRO_CHANNEL(X),
 558        ADIS16475_GYRO_CHANNEL(Y),
 559        ADIS16475_GYRO_CHANNEL(Z),
 560        ADIS16475_ACCEL_CHANNEL(X),
 561        ADIS16475_ACCEL_CHANNEL(Y),
 562        ADIS16475_ACCEL_CHANNEL(Z),
 563        ADIS16475_TEMP_CHANNEL(),
 564        IIO_CHAN_SOFT_TIMESTAMP(7)
 565};
 566
 567enum adis16475_variant {
 568        ADIS16470,
 569        ADIS16475_1,
 570        ADIS16475_2,
 571        ADIS16475_3,
 572        ADIS16477_1,
 573        ADIS16477_2,
 574        ADIS16477_3,
 575        ADIS16465_1,
 576        ADIS16465_2,
 577        ADIS16465_3,
 578        ADIS16467_1,
 579        ADIS16467_2,
 580        ADIS16467_3,
 581        ADIS16500,
 582        ADIS16505_1,
 583        ADIS16505_2,
 584        ADIS16505_3,
 585        ADIS16507_1,
 586        ADIS16507_2,
 587        ADIS16507_3,
 588};
 589
 590enum {
 591        ADIS16475_DIAG_STAT_DATA_PATH = 1,
 592        ADIS16475_DIAG_STAT_FLASH_MEM,
 593        ADIS16475_DIAG_STAT_SPI,
 594        ADIS16475_DIAG_STAT_STANDBY,
 595        ADIS16475_DIAG_STAT_SENSOR,
 596        ADIS16475_DIAG_STAT_MEMORY,
 597        ADIS16475_DIAG_STAT_CLK,
 598};
 599
 600static const char * const adis16475_status_error_msgs[] = {
 601        [ADIS16475_DIAG_STAT_DATA_PATH] = "Data Path Overrun",
 602        [ADIS16475_DIAG_STAT_FLASH_MEM] = "Flash memory update failure",
 603        [ADIS16475_DIAG_STAT_SPI] = "SPI communication error",
 604        [ADIS16475_DIAG_STAT_STANDBY] = "Standby mode",
 605        [ADIS16475_DIAG_STAT_SENSOR] = "Sensor failure",
 606        [ADIS16475_DIAG_STAT_MEMORY] = "Memory failure",
 607        [ADIS16475_DIAG_STAT_CLK] = "Clock error",
 608};
 609
 610#define ADIS16475_DATA(_prod_id, _timeouts)                             \
 611{                                                                       \
 612        .msc_ctrl_reg = ADIS16475_REG_MSG_CTRL,                         \
 613        .glob_cmd_reg = ADIS16475_REG_GLOB_CMD,                         \
 614        .diag_stat_reg = ADIS16475_REG_DIAG_STAT,                       \
 615        .prod_id_reg = ADIS16475_REG_PROD_ID,                           \
 616        .prod_id = (_prod_id),                                          \
 617        .self_test_mask = BIT(2),                                       \
 618        .self_test_reg = ADIS16475_REG_GLOB_CMD,                        \
 619        .cs_change_delay = 16,                                          \
 620        .read_delay = 5,                                                \
 621        .write_delay = 5,                                               \
 622        .status_error_msgs = adis16475_status_error_msgs,               \
 623        .status_error_mask = BIT(ADIS16475_DIAG_STAT_DATA_PATH) |       \
 624                BIT(ADIS16475_DIAG_STAT_FLASH_MEM) |                    \
 625                BIT(ADIS16475_DIAG_STAT_SPI) |                          \
 626                BIT(ADIS16475_DIAG_STAT_STANDBY) |                      \
 627                BIT(ADIS16475_DIAG_STAT_SENSOR) |                       \
 628                BIT(ADIS16475_DIAG_STAT_MEMORY) |                       \
 629                BIT(ADIS16475_DIAG_STAT_CLK),                           \
 630        .unmasked_drdy = true,                                          \
 631        .timeouts = (_timeouts),                                        \
 632        .burst_reg_cmd = ADIS16475_REG_GLOB_CMD,                        \
 633        .burst_len = ADIS16475_BURST_MAX_DATA,                          \
 634        .burst_max_len = ADIS16475_BURST32_MAX_DATA,                    \
 635        .burst_max_speed_hz = ADIS16475_BURST_MAX_SPEED                 \
 636}
 637
 638static const struct adis16475_sync adis16475_sync_mode[] = {
 639        { ADIS16475_SYNC_OUTPUT },
 640        { ADIS16475_SYNC_DIRECT, 1900, 2100 },
 641        { ADIS16475_SYNC_SCALED, 1, 128 },
 642        { ADIS16475_SYNC_PULSE, 1000, 2100 },
 643};
 644
 645static const struct adis_timeout adis16475_timeouts = {
 646        .reset_ms = 200,
 647        .sw_reset_ms = 200,
 648        .self_test_ms = 20,
 649};
 650
 651static const struct adis_timeout adis1650x_timeouts = {
 652        .reset_ms = 260,
 653        .sw_reset_ms = 260,
 654        .self_test_ms = 30,
 655};
 656
 657static const struct adis16475_chip_info adis16475_chip_info[] = {
 658        [ADIS16470] = {
 659                .name = "adis16470",
 660                .num_channels = ARRAY_SIZE(adis16475_channels),
 661                .channels = adis16475_channels,
 662                .gyro_max_val = 1,
 663                .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
 664                .accel_max_val = 1,
 665                .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
 666                .temp_scale = 100,
 667                .int_clk = 2000,
 668                .max_dec = 1999,
 669                .sync = adis16475_sync_mode,
 670                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 671                .adis_data = ADIS16475_DATA(16470, &adis16475_timeouts),
 672        },
 673        [ADIS16475_1] = {
 674                .name = "adis16475-1",
 675                .num_channels = ARRAY_SIZE(adis16475_channels),
 676                .channels = adis16475_channels,
 677                .gyro_max_val = 1,
 678                .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
 679                .accel_max_val = 1,
 680                .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
 681                .temp_scale = 100,
 682                .int_clk = 2000,
 683                .max_dec = 1999,
 684                .sync = adis16475_sync_mode,
 685                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 686                .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
 687        },
 688        [ADIS16475_2] = {
 689                .name = "adis16475-2",
 690                .num_channels = ARRAY_SIZE(adis16475_channels),
 691                .channels = adis16475_channels,
 692                .gyro_max_val = 1,
 693                .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
 694                .accel_max_val = 1,
 695                .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
 696                .temp_scale = 100,
 697                .int_clk = 2000,
 698                .max_dec = 1999,
 699                .sync = adis16475_sync_mode,
 700                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 701                .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
 702        },
 703        [ADIS16475_3] = {
 704                .name = "adis16475-3",
 705                .num_channels = ARRAY_SIZE(adis16475_channels),
 706                .channels = adis16475_channels,
 707                .gyro_max_val = 1,
 708                .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
 709                .accel_max_val = 1,
 710                .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
 711                .temp_scale = 100,
 712                .int_clk = 2000,
 713                .max_dec = 1999,
 714                .sync = adis16475_sync_mode,
 715                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 716                .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
 717        },
 718        [ADIS16477_1] = {
 719                .name = "adis16477-1",
 720                .num_channels = ARRAY_SIZE(adis16475_channels),
 721                .channels = adis16475_channels,
 722                .gyro_max_val = 1,
 723                .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
 724                .accel_max_val = 1,
 725                .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
 726                .temp_scale = 100,
 727                .int_clk = 2000,
 728                .max_dec = 1999,
 729                .sync = adis16475_sync_mode,
 730                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 731                .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
 732        },
 733        [ADIS16477_2] = {
 734                .name = "adis16477-2",
 735                .num_channels = ARRAY_SIZE(adis16475_channels),
 736                .channels = adis16475_channels,
 737                .gyro_max_val = 1,
 738                .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
 739                .accel_max_val = 1,
 740                .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
 741                .temp_scale = 100,
 742                .int_clk = 2000,
 743                .max_dec = 1999,
 744                .sync = adis16475_sync_mode,
 745                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 746                .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
 747        },
 748        [ADIS16477_3] = {
 749                .name = "adis16477-3",
 750                .num_channels = ARRAY_SIZE(adis16475_channels),
 751                .channels = adis16475_channels,
 752                .gyro_max_val = 1,
 753                .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
 754                .accel_max_val = 1,
 755                .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
 756                .temp_scale = 100,
 757                .int_clk = 2000,
 758                .max_dec = 1999,
 759                .sync = adis16475_sync_mode,
 760                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 761                .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
 762        },
 763        [ADIS16465_1] = {
 764                .name = "adis16465-1",
 765                .num_channels = ARRAY_SIZE(adis16475_channels),
 766                .channels = adis16475_channels,
 767                .gyro_max_val = 1,
 768                .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
 769                .accel_max_val = 1,
 770                .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
 771                .temp_scale = 100,
 772                .int_clk = 2000,
 773                .max_dec = 1999,
 774                .sync = adis16475_sync_mode,
 775                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 776                .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
 777        },
 778        [ADIS16465_2] = {
 779                .name = "adis16465-2",
 780                .num_channels = ARRAY_SIZE(adis16475_channels),
 781                .channels = adis16475_channels,
 782                .gyro_max_val = 1,
 783                .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
 784                .accel_max_val = 1,
 785                .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
 786                .temp_scale = 100,
 787                .int_clk = 2000,
 788                .max_dec = 1999,
 789                .sync = adis16475_sync_mode,
 790                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 791                .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
 792        },
 793        [ADIS16465_3] = {
 794                .name = "adis16465-3",
 795                .num_channels = ARRAY_SIZE(adis16475_channels),
 796                .channels = adis16475_channels,
 797                .gyro_max_val = 1,
 798                .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
 799                .accel_max_val = 1,
 800                .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
 801                .temp_scale = 100,
 802                .int_clk = 2000,
 803                .max_dec = 1999,
 804                .sync = adis16475_sync_mode,
 805                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 806                .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
 807        },
 808        [ADIS16467_1] = {
 809                .name = "adis16467-1",
 810                .num_channels = ARRAY_SIZE(adis16475_channels),
 811                .channels = adis16475_channels,
 812                .gyro_max_val = 1,
 813                .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
 814                .accel_max_val = 1,
 815                .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
 816                .temp_scale = 100,
 817                .int_clk = 2000,
 818                .max_dec = 1999,
 819                .sync = adis16475_sync_mode,
 820                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 821                .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
 822        },
 823        [ADIS16467_2] = {
 824                .name = "adis16467-2",
 825                .num_channels = ARRAY_SIZE(adis16475_channels),
 826                .channels = adis16475_channels,
 827                .gyro_max_val = 1,
 828                .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
 829                .accel_max_val = 1,
 830                .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
 831                .temp_scale = 100,
 832                .int_clk = 2000,
 833                .max_dec = 1999,
 834                .sync = adis16475_sync_mode,
 835                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 836                .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
 837        },
 838        [ADIS16467_3] = {
 839                .name = "adis16467-3",
 840                .num_channels = ARRAY_SIZE(adis16475_channels),
 841                .channels = adis16475_channels,
 842                .gyro_max_val = 1,
 843                .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
 844                .accel_max_val = 1,
 845                .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
 846                .temp_scale = 100,
 847                .int_clk = 2000,
 848                .max_dec = 1999,
 849                .sync = adis16475_sync_mode,
 850                .num_sync = ARRAY_SIZE(adis16475_sync_mode),
 851                .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
 852        },
 853        [ADIS16500] = {
 854                .name = "adis16500",
 855                .num_channels = ARRAY_SIZE(adis16475_channels),
 856                .channels = adis16475_channels,
 857                .gyro_max_val = 1,
 858                .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
 859                .accel_max_val = 392,
 860                .accel_max_scale = 32000 << 16,
 861                .temp_scale = 100,
 862                .int_clk = 2000,
 863                .max_dec = 1999,
 864                .sync = adis16475_sync_mode,
 865                /* pulse sync not supported */
 866                .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
 867                .has_burst32 = true,
 868                .adis_data = ADIS16475_DATA(16500, &adis1650x_timeouts),
 869        },
 870        [ADIS16505_1] = {
 871                .name = "adis16505-1",
 872                .num_channels = ARRAY_SIZE(adis16475_channels),
 873                .channels = adis16475_channels,
 874                .gyro_max_val = 1,
 875                .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
 876                .accel_max_val = 78,
 877                .accel_max_scale = 32000 << 16,
 878                .temp_scale = 100,
 879                .int_clk = 2000,
 880                .max_dec = 1999,
 881                .sync = adis16475_sync_mode,
 882                /* pulse sync not supported */
 883                .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
 884                .has_burst32 = true,
 885                .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
 886        },
 887        [ADIS16505_2] = {
 888                .name = "adis16505-2",
 889                .num_channels = ARRAY_SIZE(adis16475_channels),
 890                .channels = adis16475_channels,
 891                .gyro_max_val = 1,
 892                .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
 893                .accel_max_val = 78,
 894                .accel_max_scale = 32000 << 16,
 895                .temp_scale = 100,
 896                .int_clk = 2000,
 897                .max_dec = 1999,
 898                .sync = adis16475_sync_mode,
 899                /* pulse sync not supported */
 900                .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
 901                .has_burst32 = true,
 902                .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
 903        },
 904        [ADIS16505_3] = {
 905                .name = "adis16505-3",
 906                .num_channels = ARRAY_SIZE(adis16475_channels),
 907                .channels = adis16475_channels,
 908                .gyro_max_val = 1,
 909                .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
 910                .accel_max_val = 78,
 911                .accel_max_scale = 32000 << 16,
 912                .temp_scale = 100,
 913                .int_clk = 2000,
 914                .max_dec = 1999,
 915                .sync = adis16475_sync_mode,
 916                /* pulse sync not supported */
 917                .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
 918                .has_burst32 = true,
 919                .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
 920        },
 921        [ADIS16507_1] = {
 922                .name = "adis16507-1",
 923                .num_channels = ARRAY_SIZE(adis16475_channels),
 924                .channels = adis16475_channels,
 925                .gyro_max_val = 1,
 926                .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
 927                .accel_max_val = 392,
 928                .accel_max_scale = 32000 << 16,
 929                .temp_scale = 100,
 930                .int_clk = 2000,
 931                .max_dec = 1999,
 932                .sync = adis16475_sync_mode,
 933                /* pulse sync not supported */
 934                .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
 935                .has_burst32 = true,
 936                .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
 937        },
 938        [ADIS16507_2] = {
 939                .name = "adis16507-2",
 940                .num_channels = ARRAY_SIZE(adis16475_channels),
 941                .channels = adis16475_channels,
 942                .gyro_max_val = 1,
 943                .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
 944                .accel_max_val = 392,
 945                .accel_max_scale = 32000 << 16,
 946                .temp_scale = 100,
 947                .int_clk = 2000,
 948                .max_dec = 1999,
 949                .sync = adis16475_sync_mode,
 950                /* pulse sync not supported */
 951                .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
 952                .has_burst32 = true,
 953                .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
 954        },
 955        [ADIS16507_3] = {
 956                .name = "adis16507-3",
 957                .num_channels = ARRAY_SIZE(adis16475_channels),
 958                .channels = adis16475_channels,
 959                .gyro_max_val = 1,
 960                .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
 961                .accel_max_val = 392,
 962                .accel_max_scale = 32000 << 16,
 963                .temp_scale = 100,
 964                .int_clk = 2000,
 965                .max_dec = 1999,
 966                .sync = adis16475_sync_mode,
 967                /* pulse sync not supported */
 968                .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
 969                .has_burst32 = true,
 970                .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
 971        },
 972};
 973
 974static const struct iio_info adis16475_info = {
 975        .read_raw = &adis16475_read_raw,
 976        .write_raw = &adis16475_write_raw,
 977        .update_scan_mode = adis_update_scan_mode,
 978        .debugfs_reg_access = adis_debugfs_reg_access,
 979};
 980
 981static bool adis16475_validate_crc(const u8 *buffer, u16 crc,
 982                                   const bool burst32)
 983{
 984        int i;
 985        /* extra 6 elements for low gyro and accel */
 986        const u16 sz = burst32 ? ADIS16475_BURST32_MAX_DATA :
 987                ADIS16475_BURST_MAX_DATA;
 988
 989        for (i = 0; i < sz - 2; i++)
 990                crc -= buffer[i];
 991
 992        return crc == 0;
 993}
 994
 995static void adis16475_burst32_check(struct adis16475 *st)
 996{
 997        int ret;
 998        struct adis *adis = &st->adis;
 999
1000        if (!st->info->has_burst32)
1001                return;
1002
1003        if (st->lsb_flag && !st->burst32) {
1004                const u16 en = ADIS16500_BURST32(1);
1005
1006                ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1007                                         ADIS16500_BURST32_MASK, en);
1008                if (ret)
1009                        return;
1010
1011                st->burst32 = true;
1012
1013                /*
1014                 * In 32-bit mode we need extra 2 bytes for all gyro
1015                 * and accel channels.
1016                 */
1017                adis->burst_extra_len = 6 * sizeof(u16);
1018                adis->xfer[1].len += 6 * sizeof(u16);
1019                dev_dbg(&adis->spi->dev, "Enable burst32 mode, xfer:%d",
1020                        adis->xfer[1].len);
1021
1022        } else if (!st->lsb_flag && st->burst32) {
1023                const u16 en = ADIS16500_BURST32(0);
1024
1025                ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1026                                         ADIS16500_BURST32_MASK, en);
1027                if (ret)
1028                        return;
1029
1030                st->burst32 = false;
1031
1032                /* Remove the extra bits */
1033                adis->burst_extra_len = 0;
1034                adis->xfer[1].len -= 6 * sizeof(u16);
1035                dev_dbg(&adis->spi->dev, "Disable burst32 mode, xfer:%d\n",
1036                        adis->xfer[1].len);
1037        }
1038}
1039
1040static irqreturn_t adis16475_trigger_handler(int irq, void *p)
1041{
1042        struct iio_poll_func *pf = p;
1043        struct iio_dev *indio_dev = pf->indio_dev;
1044        struct adis16475 *st = iio_priv(indio_dev);
1045        struct adis *adis = &st->adis;
1046        int ret, bit, i = 0;
1047        __be16 *buffer;
1048        u16 crc;
1049        bool valid;
1050        /* offset until the first element after gyro and accel */
1051        const u8 offset = st->burst32 ? 13 : 7;
1052
1053        ret = spi_sync(adis->spi, &adis->msg);
1054        if (ret)
1055                goto check_burst32;
1056
1057        buffer = adis->buffer;
1058
1059        crc = be16_to_cpu(buffer[offset + 2]);
1060        valid = adis16475_validate_crc(adis->buffer, crc, st->burst32);
1061        if (!valid) {
1062                dev_err(&adis->spi->dev, "Invalid crc\n");
1063                goto check_burst32;
1064        }
1065
1066        for_each_set_bit(bit, indio_dev->active_scan_mask,
1067                         indio_dev->masklength) {
1068                /*
1069                 * When burst mode is used, system flags is the first data
1070                 * channel in the sequence, but the scan index is 7.
1071                 */
1072                switch (bit) {
1073                case ADIS16475_SCAN_TEMP:
1074                        st->data[i++] = buffer[offset];
1075                        break;
1076                case ADIS16475_SCAN_GYRO_X ... ADIS16475_SCAN_ACCEL_Z:
1077                        /*
1078                         * The first 2 bytes on the received data are the
1079                         * DIAG_STAT reg, hence the +1 offset here...
1080                         */
1081                        if (st->burst32) {
1082                                /* upper 16 */
1083                                st->data[i++] = buffer[bit * 2 + 2];
1084                                /* lower 16 */
1085                                st->data[i++] = buffer[bit * 2 + 1];
1086                        } else {
1087                                st->data[i++] = buffer[bit + 1];
1088                                /*
1089                                 * Don't bother in doing the manual read if the
1090                                 * device supports burst32. burst32 will be
1091                                 * enabled in the next call to
1092                                 * adis16475_burst32_check()...
1093                                 */
1094                                if (st->lsb_flag && !st->info->has_burst32) {
1095                                        u16 val = 0;
1096                                        const u32 reg = ADIS16475_REG_X_GYRO_L +
1097                                                bit * 4;
1098
1099                                        adis_read_reg_16(adis, reg, &val);
1100                                        st->data[i++] = cpu_to_be16(val);
1101                                } else {
1102                                        /* lower not used */
1103                                        st->data[i++] = 0;
1104                                }
1105                        }
1106                        break;
1107                }
1108        }
1109
1110        iio_push_to_buffers_with_timestamp(indio_dev, st->data, pf->timestamp);
1111check_burst32:
1112        /*
1113         * We only check the burst mode at the end of the current capture since
1114         * it takes a full data ready cycle for the device to update the burst
1115         * array.
1116         */
1117        adis16475_burst32_check(st);
1118        iio_trigger_notify_done(indio_dev->trig);
1119
1120        return IRQ_HANDLED;
1121}
1122
1123static void adis16475_disable_clk(void *data)
1124{
1125        clk_disable_unprepare((struct clk *)data);
1126}
1127
1128static int adis16475_config_sync_mode(struct adis16475 *st)
1129{
1130        int ret;
1131        struct device *dev = &st->adis.spi->dev;
1132        const struct adis16475_sync *sync;
1133        u32 sync_mode;
1134
1135        /* default to internal clk */
1136        st->clk_freq = st->info->int_clk * 1000;
1137
1138        ret = device_property_read_u32(dev, "adi,sync-mode", &sync_mode);
1139        if (ret)
1140                return 0;
1141
1142        if (sync_mode >= st->info->num_sync) {
1143                dev_err(dev, "Invalid sync mode: %u for %s\n", sync_mode,
1144                        st->info->name);
1145                return -EINVAL;
1146        }
1147
1148        sync = &st->info->sync[sync_mode];
1149        st->sync_mode = sync->sync_mode;
1150
1151        /* All the other modes require external input signal */
1152        if (sync->sync_mode != ADIS16475_SYNC_OUTPUT) {
1153                struct clk *clk = devm_clk_get(dev, NULL);
1154
1155                if (IS_ERR(clk))
1156                        return PTR_ERR(clk);
1157
1158                ret = clk_prepare_enable(clk);
1159                if (ret)
1160                        return ret;
1161
1162                ret = devm_add_action_or_reset(dev, adis16475_disable_clk, clk);
1163                if (ret)
1164                        return ret;
1165
1166                st->clk_freq = clk_get_rate(clk);
1167                if (st->clk_freq < sync->min_rate ||
1168                    st->clk_freq > sync->max_rate) {
1169                        dev_err(dev,
1170                                "Clk rate:%u not in a valid range:[%u %u]\n",
1171                                st->clk_freq, sync->min_rate, sync->max_rate);
1172                        return -EINVAL;
1173                }
1174
1175                if (sync->sync_mode == ADIS16475_SYNC_SCALED) {
1176                        u16 up_scale;
1177
1178                        /*
1179                         * In sync scaled mode, the IMU sample rate is the clk_freq * sync_scale.
1180                         * Hence, default the IMU sample rate to the highest multiple of the input
1181                         * clock lower than the IMU max sample rate. The optimal range is
1182                         * 1900-2100 sps...
1183                         */
1184                        up_scale = 2100 / st->clk_freq;
1185
1186                        ret = __adis_write_reg_16(&st->adis,
1187                                                  ADIS16475_REG_UP_SCALE,
1188                                                  up_scale);
1189                        if (ret)
1190                                return ret;
1191                }
1192
1193                st->clk_freq *= 1000;
1194        }
1195        /*
1196         * Keep in mind that the mask for the clk modes in adis1650*
1197         * chips is different (1100 instead of 11100). However, we
1198         * are not configuring BIT(4) in these chips and the default
1199         * value is 0, so we are fine in doing the below operations.
1200         * I'm keeping this for simplicity and avoiding extra variables
1201         * in chip_info.
1202         */
1203        ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1204                                 ADIS16475_SYNC_MODE_MASK, sync->sync_mode);
1205        if (ret)
1206                return ret;
1207
1208        usleep_range(250, 260);
1209
1210        return 0;
1211}
1212
1213static int adis16475_config_irq_pin(struct adis16475 *st)
1214{
1215        int ret;
1216        struct irq_data *desc;
1217        u32 irq_type;
1218        u16 val = 0;
1219        u8 polarity;
1220        struct spi_device *spi = st->adis.spi;
1221
1222        desc = irq_get_irq_data(spi->irq);
1223        if (!desc) {
1224                dev_err(&spi->dev, "Could not find IRQ %d\n", spi->irq);
1225                return -EINVAL;
1226        }
1227        /*
1228         * It is possible to configure the data ready polarity. Furthermore, we
1229         * need to update the adis struct if we want data ready as active low.
1230         */
1231        irq_type = irqd_get_trigger_type(desc);
1232        if (irq_type == IRQ_TYPE_EDGE_RISING) {
1233                polarity = 1;
1234                st->adis.irq_flag = IRQF_TRIGGER_RISING;
1235        } else if (irq_type == IRQ_TYPE_EDGE_FALLING) {
1236                polarity = 0;
1237                st->adis.irq_flag = IRQF_TRIGGER_FALLING;
1238        } else {
1239                dev_err(&spi->dev, "Invalid interrupt type 0x%x specified\n",
1240                        irq_type);
1241                return -EINVAL;
1242        }
1243
1244        val = ADIS16475_MSG_CTRL_DR_POL(polarity);
1245        ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1246                                 ADIS16475_MSG_CTRL_DR_POL_MASK, val);
1247        if (ret)
1248                return ret;
1249        /*
1250         * There is a delay writing to any bits written to the MSC_CTRL
1251         * register. It should not be bigger than 200us, so 250 should be more
1252         * than enough!
1253         */
1254        usleep_range(250, 260);
1255
1256        return 0;
1257}
1258
1259static const struct of_device_id adis16475_of_match[] = {
1260        { .compatible = "adi,adis16470",
1261                .data = &adis16475_chip_info[ADIS16470] },
1262        { .compatible = "adi,adis16475-1",
1263                .data = &adis16475_chip_info[ADIS16475_1] },
1264        { .compatible = "adi,adis16475-2",
1265                .data = &adis16475_chip_info[ADIS16475_2] },
1266        { .compatible = "adi,adis16475-3",
1267                .data = &adis16475_chip_info[ADIS16475_3] },
1268        { .compatible = "adi,adis16477-1",
1269                .data = &adis16475_chip_info[ADIS16477_1] },
1270        { .compatible = "adi,adis16477-2",
1271                .data = &adis16475_chip_info[ADIS16477_2] },
1272        { .compatible = "adi,adis16477-3",
1273                .data = &adis16475_chip_info[ADIS16477_3] },
1274        { .compatible = "adi,adis16465-1",
1275                .data = &adis16475_chip_info[ADIS16465_1] },
1276        { .compatible = "adi,adis16465-2",
1277                .data = &adis16475_chip_info[ADIS16465_2] },
1278        { .compatible = "adi,adis16465-3",
1279                .data = &adis16475_chip_info[ADIS16465_3] },
1280        { .compatible = "adi,adis16467-1",
1281                .data = &adis16475_chip_info[ADIS16467_1] },
1282        { .compatible = "adi,adis16467-2",
1283                .data = &adis16475_chip_info[ADIS16467_2] },
1284        { .compatible = "adi,adis16467-3",
1285                .data = &adis16475_chip_info[ADIS16467_3] },
1286        { .compatible = "adi,adis16500",
1287                .data = &adis16475_chip_info[ADIS16500] },
1288        { .compatible = "adi,adis16505-1",
1289                .data = &adis16475_chip_info[ADIS16505_1] },
1290        { .compatible = "adi,adis16505-2",
1291                .data = &adis16475_chip_info[ADIS16505_2] },
1292        { .compatible = "adi,adis16505-3",
1293                .data = &adis16475_chip_info[ADIS16505_3] },
1294        { .compatible = "adi,adis16507-1",
1295                .data = &adis16475_chip_info[ADIS16507_1] },
1296        { .compatible = "adi,adis16507-2",
1297                .data = &adis16475_chip_info[ADIS16507_2] },
1298        { .compatible = "adi,adis16507-3",
1299                .data = &adis16475_chip_info[ADIS16507_3] },
1300        { },
1301};
1302MODULE_DEVICE_TABLE(of, adis16475_of_match);
1303
1304static int adis16475_probe(struct spi_device *spi)
1305{
1306        struct iio_dev *indio_dev;
1307        struct adis16475 *st;
1308        int ret;
1309
1310        indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1311        if (!indio_dev)
1312                return -ENOMEM;
1313
1314        st = iio_priv(indio_dev);
1315
1316        st->info = device_get_match_data(&spi->dev);
1317        if (!st->info)
1318                return -EINVAL;
1319
1320        ret = adis_init(&st->adis, indio_dev, spi, &st->info->adis_data);
1321        if (ret)
1322                return ret;
1323
1324        indio_dev->name = st->info->name;
1325        indio_dev->channels = st->info->channels;
1326        indio_dev->num_channels = st->info->num_channels;
1327        indio_dev->info = &adis16475_info;
1328        indio_dev->modes = INDIO_DIRECT_MODE;
1329
1330        ret = __adis_initial_startup(&st->adis);
1331        if (ret)
1332                return ret;
1333
1334        ret = adis16475_config_irq_pin(st);
1335        if (ret)
1336                return ret;
1337
1338        ret = adis16475_config_sync_mode(st);
1339        if (ret)
1340                return ret;
1341
1342        ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev,
1343                                                 adis16475_trigger_handler);
1344        if (ret)
1345                return ret;
1346
1347        ret = devm_iio_device_register(&spi->dev, indio_dev);
1348        if (ret)
1349                return ret;
1350
1351        adis16475_debugfs_init(indio_dev);
1352
1353        return 0;
1354}
1355
1356static struct spi_driver adis16475_driver = {
1357        .driver = {
1358                .name = "adis16475",
1359                .of_match_table = adis16475_of_match,
1360        },
1361        .probe = adis16475_probe,
1362};
1363module_spi_driver(adis16475_driver);
1364
1365MODULE_AUTHOR("Nuno Sa <nuno.sa@analog.com>");
1366MODULE_DESCRIPTION("Analog Devices ADIS16475 IMU driver");
1367MODULE_LICENSE("GPL");
1368MODULE_IMPORT_NS(IIO_ADISLIB);
1369