linux/drivers/net/dsa/microchip/ksz8795.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Microchip KSZ8795 switch driver
   4 *
   5 * Copyright (C) 2017 Microchip Technology Inc.
   6 *      Tristram Ha <Tristram.Ha@microchip.com>
   7 */
   8
   9#include <linux/bitfield.h>
  10#include <linux/delay.h>
  11#include <linux/export.h>
  12#include <linux/gpio.h>
  13#include <linux/if_vlan.h>
  14#include <linux/kernel.h>
  15#include <linux/module.h>
  16#include <linux/platform_data/microchip-ksz.h>
  17#include <linux/phy.h>
  18#include <linux/etherdevice.h>
  19#include <linux/if_bridge.h>
  20#include <linux/micrel_phy.h>
  21#include <net/dsa.h>
  22#include <net/switchdev.h>
  23#include <linux/phylink.h>
  24
  25#include "ksz_common.h"
  26#include "ksz8795_reg.h"
  27#include "ksz8.h"
  28
  29static const u8 ksz8795_regs[] = {
  30        [REG_IND_CTRL_0]                = 0x6E,
  31        [REG_IND_DATA_8]                = 0x70,
  32        [REG_IND_DATA_CHECK]            = 0x72,
  33        [REG_IND_DATA_HI]               = 0x71,
  34        [REG_IND_DATA_LO]               = 0x75,
  35        [REG_IND_MIB_CHECK]             = 0x74,
  36        [REG_IND_BYTE]                  = 0xA0,
  37        [P_FORCE_CTRL]                  = 0x0C,
  38        [P_LINK_STATUS]                 = 0x0E,
  39        [P_LOCAL_CTRL]                  = 0x07,
  40        [P_NEG_RESTART_CTRL]            = 0x0D,
  41        [P_REMOTE_STATUS]               = 0x08,
  42        [P_SPEED_STATUS]                = 0x09,
  43        [S_TAIL_TAG_CTRL]               = 0x0C,
  44};
  45
  46static const u32 ksz8795_masks[] = {
  47        [PORT_802_1P_REMAPPING]         = BIT(7),
  48        [SW_TAIL_TAG_ENABLE]            = BIT(1),
  49        [MIB_COUNTER_OVERFLOW]          = BIT(6),
  50        [MIB_COUNTER_VALID]             = BIT(5),
  51        [VLAN_TABLE_FID]                = GENMASK(6, 0),
  52        [VLAN_TABLE_MEMBERSHIP]         = GENMASK(11, 7),
  53        [VLAN_TABLE_VALID]              = BIT(12),
  54        [STATIC_MAC_TABLE_VALID]        = BIT(21),
  55        [STATIC_MAC_TABLE_USE_FID]      = BIT(23),
  56        [STATIC_MAC_TABLE_FID]          = GENMASK(30, 24),
  57        [STATIC_MAC_TABLE_OVERRIDE]     = BIT(26),
  58        [STATIC_MAC_TABLE_FWD_PORTS]    = GENMASK(24, 20),
  59        [DYNAMIC_MAC_TABLE_ENTRIES_H]   = GENMASK(6, 0),
  60        [DYNAMIC_MAC_TABLE_MAC_EMPTY]   = BIT(8),
  61        [DYNAMIC_MAC_TABLE_NOT_READY]   = BIT(7),
  62        [DYNAMIC_MAC_TABLE_ENTRIES]     = GENMASK(31, 29),
  63        [DYNAMIC_MAC_TABLE_FID]         = GENMASK(26, 20),
  64        [DYNAMIC_MAC_TABLE_SRC_PORT]    = GENMASK(26, 24),
  65        [DYNAMIC_MAC_TABLE_TIMESTAMP]   = GENMASK(28, 27),
  66};
  67
  68static const u8 ksz8795_shifts[] = {
  69        [VLAN_TABLE_MEMBERSHIP_S]       = 7,
  70        [VLAN_TABLE]                    = 16,
  71        [STATIC_MAC_FWD_PORTS]          = 16,
  72        [STATIC_MAC_FID]                = 24,
  73        [DYNAMIC_MAC_ENTRIES_H]         = 3,
  74        [DYNAMIC_MAC_ENTRIES]           = 29,
  75        [DYNAMIC_MAC_FID]               = 16,
  76        [DYNAMIC_MAC_TIMESTAMP]         = 27,
  77        [DYNAMIC_MAC_SRC_PORT]          = 24,
  78};
  79
  80static const u8 ksz8863_regs[] = {
  81        [REG_IND_CTRL_0]                = 0x79,
  82        [REG_IND_DATA_8]                = 0x7B,
  83        [REG_IND_DATA_CHECK]            = 0x7B,
  84        [REG_IND_DATA_HI]               = 0x7C,
  85        [REG_IND_DATA_LO]               = 0x80,
  86        [REG_IND_MIB_CHECK]             = 0x80,
  87        [P_FORCE_CTRL]                  = 0x0C,
  88        [P_LINK_STATUS]                 = 0x0E,
  89        [P_LOCAL_CTRL]                  = 0x0C,
  90        [P_NEG_RESTART_CTRL]            = 0x0D,
  91        [P_REMOTE_STATUS]               = 0x0E,
  92        [P_SPEED_STATUS]                = 0x0F,
  93        [S_TAIL_TAG_CTRL]               = 0x03,
  94};
  95
  96static const u32 ksz8863_masks[] = {
  97        [PORT_802_1P_REMAPPING]         = BIT(3),
  98        [SW_TAIL_TAG_ENABLE]            = BIT(6),
  99        [MIB_COUNTER_OVERFLOW]          = BIT(7),
 100        [MIB_COUNTER_VALID]             = BIT(6),
 101        [VLAN_TABLE_FID]                = GENMASK(15, 12),
 102        [VLAN_TABLE_MEMBERSHIP]         = GENMASK(18, 16),
 103        [VLAN_TABLE_VALID]              = BIT(19),
 104        [STATIC_MAC_TABLE_VALID]        = BIT(19),
 105        [STATIC_MAC_TABLE_USE_FID]      = BIT(21),
 106        [STATIC_MAC_TABLE_FID]          = GENMASK(29, 26),
 107        [STATIC_MAC_TABLE_OVERRIDE]     = BIT(20),
 108        [STATIC_MAC_TABLE_FWD_PORTS]    = GENMASK(18, 16),
 109        [DYNAMIC_MAC_TABLE_ENTRIES_H]   = GENMASK(5, 0),
 110        [DYNAMIC_MAC_TABLE_MAC_EMPTY]   = BIT(7),
 111        [DYNAMIC_MAC_TABLE_NOT_READY]   = BIT(7),
 112        [DYNAMIC_MAC_TABLE_ENTRIES]     = GENMASK(31, 28),
 113        [DYNAMIC_MAC_TABLE_FID]         = GENMASK(19, 16),
 114        [DYNAMIC_MAC_TABLE_SRC_PORT]    = GENMASK(21, 20),
 115        [DYNAMIC_MAC_TABLE_TIMESTAMP]   = GENMASK(23, 22),
 116};
 117
 118static u8 ksz8863_shifts[] = {
 119        [VLAN_TABLE_MEMBERSHIP_S]       = 16,
 120        [STATIC_MAC_FWD_PORTS]          = 16,
 121        [STATIC_MAC_FID]                = 22,
 122        [DYNAMIC_MAC_ENTRIES_H]         = 3,
 123        [DYNAMIC_MAC_ENTRIES]           = 24,
 124        [DYNAMIC_MAC_FID]               = 16,
 125        [DYNAMIC_MAC_TIMESTAMP]         = 24,
 126        [DYNAMIC_MAC_SRC_PORT]          = 20,
 127};
 128
 129struct mib_names {
 130        char string[ETH_GSTRING_LEN];
 131};
 132
 133static const struct mib_names ksz87xx_mib_names[] = {
 134        { "rx_hi" },
 135        { "rx_undersize" },
 136        { "rx_fragments" },
 137        { "rx_oversize" },
 138        { "rx_jabbers" },
 139        { "rx_symbol_err" },
 140        { "rx_crc_err" },
 141        { "rx_align_err" },
 142        { "rx_mac_ctrl" },
 143        { "rx_pause" },
 144        { "rx_bcast" },
 145        { "rx_mcast" },
 146        { "rx_ucast" },
 147        { "rx_64_or_less" },
 148        { "rx_65_127" },
 149        { "rx_128_255" },
 150        { "rx_256_511" },
 151        { "rx_512_1023" },
 152        { "rx_1024_1522" },
 153        { "rx_1523_2000" },
 154        { "rx_2001" },
 155        { "tx_hi" },
 156        { "tx_late_col" },
 157        { "tx_pause" },
 158        { "tx_bcast" },
 159        { "tx_mcast" },
 160        { "tx_ucast" },
 161        { "tx_deferred" },
 162        { "tx_total_col" },
 163        { "tx_exc_col" },
 164        { "tx_single_col" },
 165        { "tx_mult_col" },
 166        { "rx_total" },
 167        { "tx_total" },
 168        { "rx_discards" },
 169        { "tx_discards" },
 170};
 171
 172static const struct mib_names ksz88xx_mib_names[] = {
 173        { "rx" },
 174        { "rx_hi" },
 175        { "rx_undersize" },
 176        { "rx_fragments" },
 177        { "rx_oversize" },
 178        { "rx_jabbers" },
 179        { "rx_symbol_err" },
 180        { "rx_crc_err" },
 181        { "rx_align_err" },
 182        { "rx_mac_ctrl" },
 183        { "rx_pause" },
 184        { "rx_bcast" },
 185        { "rx_mcast" },
 186        { "rx_ucast" },
 187        { "rx_64_or_less" },
 188        { "rx_65_127" },
 189        { "rx_128_255" },
 190        { "rx_256_511" },
 191        { "rx_512_1023" },
 192        { "rx_1024_1522" },
 193        { "tx" },
 194        { "tx_hi" },
 195        { "tx_late_col" },
 196        { "tx_pause" },
 197        { "tx_bcast" },
 198        { "tx_mcast" },
 199        { "tx_ucast" },
 200        { "tx_deferred" },
 201        { "tx_total_col" },
 202        { "tx_exc_col" },
 203        { "tx_single_col" },
 204        { "tx_mult_col" },
 205        { "rx_discards" },
 206        { "tx_discards" },
 207};
 208
 209static bool ksz_is_ksz88x3(struct ksz_device *dev)
 210{
 211        return dev->chip_id == 0x8830;
 212}
 213
 214static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
 215{
 216        regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0);
 217}
 218
 219static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
 220                         bool set)
 221{
 222        regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset),
 223                           bits, set ? bits : 0);
 224}
 225
 226static int ksz8_ind_write8(struct ksz_device *dev, u8 table, u16 addr, u8 data)
 227{
 228        struct ksz8 *ksz8 = dev->priv;
 229        const u8 *regs = ksz8->regs;
 230        u16 ctrl_addr;
 231        int ret = 0;
 232
 233        mutex_lock(&dev->alu_mutex);
 234
 235        ctrl_addr = IND_ACC_TABLE(table) | addr;
 236        ret = ksz_write8(dev, regs[REG_IND_BYTE], data);
 237        if (!ret)
 238                ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 239
 240        mutex_unlock(&dev->alu_mutex);
 241
 242        return ret;
 243}
 244
 245static int ksz8_reset_switch(struct ksz_device *dev)
 246{
 247        if (ksz_is_ksz88x3(dev)) {
 248                /* reset switch */
 249                ksz_cfg(dev, KSZ8863_REG_SW_RESET,
 250                        KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, true);
 251                ksz_cfg(dev, KSZ8863_REG_SW_RESET,
 252                        KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, false);
 253        } else {
 254                /* reset switch */
 255                ksz_write8(dev, REG_POWER_MANAGEMENT_1,
 256                           SW_SOFTWARE_POWER_DOWN << SW_POWER_MANAGEMENT_MODE_S);
 257                ksz_write8(dev, REG_POWER_MANAGEMENT_1, 0);
 258        }
 259
 260        return 0;
 261}
 262
 263static void ksz8795_set_prio_queue(struct ksz_device *dev, int port, int queue)
 264{
 265        u8 hi, lo;
 266
 267        /* Number of queues can only be 1, 2, or 4. */
 268        switch (queue) {
 269        case 4:
 270        case 3:
 271                queue = PORT_QUEUE_SPLIT_4;
 272                break;
 273        case 2:
 274                queue = PORT_QUEUE_SPLIT_2;
 275                break;
 276        default:
 277                queue = PORT_QUEUE_SPLIT_1;
 278        }
 279        ksz_pread8(dev, port, REG_PORT_CTRL_0, &lo);
 280        ksz_pread8(dev, port, P_DROP_TAG_CTRL, &hi);
 281        lo &= ~PORT_QUEUE_SPLIT_L;
 282        if (queue & PORT_QUEUE_SPLIT_2)
 283                lo |= PORT_QUEUE_SPLIT_L;
 284        hi &= ~PORT_QUEUE_SPLIT_H;
 285        if (queue & PORT_QUEUE_SPLIT_4)
 286                hi |= PORT_QUEUE_SPLIT_H;
 287        ksz_pwrite8(dev, port, REG_PORT_CTRL_0, lo);
 288        ksz_pwrite8(dev, port, P_DROP_TAG_CTRL, hi);
 289
 290        /* Default is port based for egress rate limit. */
 291        if (queue != PORT_QUEUE_SPLIT_1)
 292                ksz_cfg(dev, REG_SW_CTRL_19, SW_OUT_RATE_LIMIT_QUEUE_BASED,
 293                        true);
 294}
 295
 296static void ksz8_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt)
 297{
 298        struct ksz8 *ksz8 = dev->priv;
 299        const u32 *masks;
 300        const u8 *regs;
 301        u16 ctrl_addr;
 302        u32 data;
 303        u8 check;
 304        int loop;
 305
 306        masks = ksz8->masks;
 307        regs = ksz8->regs;
 308
 309        ctrl_addr = addr + dev->reg_mib_cnt * port;
 310        ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
 311
 312        mutex_lock(&dev->alu_mutex);
 313        ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 314
 315        /* It is almost guaranteed to always read the valid bit because of
 316         * slow SPI speed.
 317         */
 318        for (loop = 2; loop > 0; loop--) {
 319                ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check);
 320
 321                if (check & masks[MIB_COUNTER_VALID]) {
 322                        ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
 323                        if (check & masks[MIB_COUNTER_OVERFLOW])
 324                                *cnt += MIB_COUNTER_VALUE + 1;
 325                        *cnt += data & MIB_COUNTER_VALUE;
 326                        break;
 327                }
 328        }
 329        mutex_unlock(&dev->alu_mutex);
 330}
 331
 332static void ksz8795_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
 333                              u64 *dropped, u64 *cnt)
 334{
 335        struct ksz8 *ksz8 = dev->priv;
 336        const u32 *masks;
 337        const u8 *regs;
 338        u16 ctrl_addr;
 339        u32 data;
 340        u8 check;
 341        int loop;
 342
 343        masks = ksz8->masks;
 344        regs = ksz8->regs;
 345
 346        addr -= dev->reg_mib_cnt;
 347        ctrl_addr = (KSZ8795_MIB_TOTAL_RX_1 - KSZ8795_MIB_TOTAL_RX_0) * port;
 348        ctrl_addr += addr + KSZ8795_MIB_TOTAL_RX_0;
 349        ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
 350
 351        mutex_lock(&dev->alu_mutex);
 352        ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 353
 354        /* It is almost guaranteed to always read the valid bit because of
 355         * slow SPI speed.
 356         */
 357        for (loop = 2; loop > 0; loop--) {
 358                ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check);
 359
 360                if (check & masks[MIB_COUNTER_VALID]) {
 361                        ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
 362                        if (addr < 2) {
 363                                u64 total;
 364
 365                                total = check & MIB_TOTAL_BYTES_H;
 366                                total <<= 32;
 367                                *cnt += total;
 368                                *cnt += data;
 369                                if (check & masks[MIB_COUNTER_OVERFLOW]) {
 370                                        total = MIB_TOTAL_BYTES_H + 1;
 371                                        total <<= 32;
 372                                        *cnt += total;
 373                                }
 374                        } else {
 375                                if (check & masks[MIB_COUNTER_OVERFLOW])
 376                                        *cnt += MIB_PACKET_DROPPED + 1;
 377                                *cnt += data & MIB_PACKET_DROPPED;
 378                        }
 379                        break;
 380                }
 381        }
 382        mutex_unlock(&dev->alu_mutex);
 383}
 384
 385static void ksz8863_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
 386                              u64 *dropped, u64 *cnt)
 387{
 388        struct ksz8 *ksz8 = dev->priv;
 389        const u8 *regs = ksz8->regs;
 390        u32 *last = (u32 *)dropped;
 391        u16 ctrl_addr;
 392        u32 data;
 393        u32 cur;
 394
 395        addr -= dev->reg_mib_cnt;
 396        ctrl_addr = addr ? KSZ8863_MIB_PACKET_DROPPED_TX_0 :
 397                           KSZ8863_MIB_PACKET_DROPPED_RX_0;
 398        ctrl_addr += port;
 399        ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
 400
 401        mutex_lock(&dev->alu_mutex);
 402        ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 403        ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
 404        mutex_unlock(&dev->alu_mutex);
 405
 406        data &= MIB_PACKET_DROPPED;
 407        cur = last[addr];
 408        if (data != cur) {
 409                last[addr] = data;
 410                if (data < cur)
 411                        data += MIB_PACKET_DROPPED + 1;
 412                data -= cur;
 413                *cnt += data;
 414        }
 415}
 416
 417static void ksz8_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
 418                           u64 *dropped, u64 *cnt)
 419{
 420        if (ksz_is_ksz88x3(dev))
 421                ksz8863_r_mib_pkt(dev, port, addr, dropped, cnt);
 422        else
 423                ksz8795_r_mib_pkt(dev, port, addr, dropped, cnt);
 424}
 425
 426static void ksz8_freeze_mib(struct ksz_device *dev, int port, bool freeze)
 427{
 428        if (ksz_is_ksz88x3(dev))
 429                return;
 430
 431        /* enable the port for flush/freeze function */
 432        if (freeze)
 433                ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
 434        ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FREEZE, freeze);
 435
 436        /* disable the port after freeze is done */
 437        if (!freeze)
 438                ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
 439}
 440
 441static void ksz8_port_init_cnt(struct ksz_device *dev, int port)
 442{
 443        struct ksz_port_mib *mib = &dev->ports[port].mib;
 444        u64 *dropped;
 445
 446        if (!ksz_is_ksz88x3(dev)) {
 447                /* flush all enabled port MIB counters */
 448                ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
 449                ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FLUSH, true);
 450                ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
 451        }
 452
 453        mib->cnt_ptr = 0;
 454
 455        /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */
 456        while (mib->cnt_ptr < dev->reg_mib_cnt) {
 457                dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr,
 458                                        &mib->counters[mib->cnt_ptr]);
 459                ++mib->cnt_ptr;
 460        }
 461
 462        /* last one in storage */
 463        dropped = &mib->counters[dev->mib_cnt];
 464
 465        /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */
 466        while (mib->cnt_ptr < dev->mib_cnt) {
 467                dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr,
 468                                        dropped, &mib->counters[mib->cnt_ptr]);
 469                ++mib->cnt_ptr;
 470        }
 471        mib->cnt_ptr = 0;
 472        memset(mib->counters, 0, dev->mib_cnt * sizeof(u64));
 473}
 474
 475static void ksz8_r_table(struct ksz_device *dev, int table, u16 addr, u64 *data)
 476{
 477        struct ksz8 *ksz8 = dev->priv;
 478        const u8 *regs = ksz8->regs;
 479        u16 ctrl_addr;
 480
 481        ctrl_addr = IND_ACC_TABLE(table | TABLE_READ) | addr;
 482
 483        mutex_lock(&dev->alu_mutex);
 484        ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 485        ksz_read64(dev, regs[REG_IND_DATA_HI], data);
 486        mutex_unlock(&dev->alu_mutex);
 487}
 488
 489static void ksz8_w_table(struct ksz_device *dev, int table, u16 addr, u64 data)
 490{
 491        struct ksz8 *ksz8 = dev->priv;
 492        const u8 *regs = ksz8->regs;
 493        u16 ctrl_addr;
 494
 495        ctrl_addr = IND_ACC_TABLE(table) | addr;
 496
 497        mutex_lock(&dev->alu_mutex);
 498        ksz_write64(dev, regs[REG_IND_DATA_HI], data);
 499        ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 500        mutex_unlock(&dev->alu_mutex);
 501}
 502
 503static int ksz8_valid_dyn_entry(struct ksz_device *dev, u8 *data)
 504{
 505        struct ksz8 *ksz8 = dev->priv;
 506        int timeout = 100;
 507        const u32 *masks;
 508        const u8 *regs;
 509
 510        masks = ksz8->masks;
 511        regs = ksz8->regs;
 512
 513        do {
 514                ksz_read8(dev, regs[REG_IND_DATA_CHECK], data);
 515                timeout--;
 516        } while ((*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) && timeout);
 517
 518        /* Entry is not ready for accessing. */
 519        if (*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) {
 520                return -EAGAIN;
 521        /* Entry is ready for accessing. */
 522        } else {
 523                ksz_read8(dev, regs[REG_IND_DATA_8], data);
 524
 525                /* There is no valid entry in the table. */
 526                if (*data & masks[DYNAMIC_MAC_TABLE_MAC_EMPTY])
 527                        return -ENXIO;
 528        }
 529        return 0;
 530}
 531
 532static int ksz8_r_dyn_mac_table(struct ksz_device *dev, u16 addr,
 533                                u8 *mac_addr, u8 *fid, u8 *src_port,
 534                                u8 *timestamp, u16 *entries)
 535{
 536        struct ksz8 *ksz8 = dev->priv;
 537        u32 data_hi, data_lo;
 538        const u8 *shifts;
 539        const u32 *masks;
 540        const u8 *regs;
 541        u16 ctrl_addr;
 542        u8 data;
 543        int rc;
 544
 545        shifts = ksz8->shifts;
 546        masks = ksz8->masks;
 547        regs = ksz8->regs;
 548
 549        ctrl_addr = IND_ACC_TABLE(TABLE_DYNAMIC_MAC | TABLE_READ) | addr;
 550
 551        mutex_lock(&dev->alu_mutex);
 552        ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 553
 554        rc = ksz8_valid_dyn_entry(dev, &data);
 555        if (rc == -EAGAIN) {
 556                if (addr == 0)
 557                        *entries = 0;
 558        } else if (rc == -ENXIO) {
 559                *entries = 0;
 560        /* At least one valid entry in the table. */
 561        } else {
 562                u64 buf = 0;
 563                int cnt;
 564
 565                ksz_read64(dev, regs[REG_IND_DATA_HI], &buf);
 566                data_hi = (u32)(buf >> 32);
 567                data_lo = (u32)buf;
 568
 569                /* Check out how many valid entry in the table. */
 570                cnt = data & masks[DYNAMIC_MAC_TABLE_ENTRIES_H];
 571                cnt <<= shifts[DYNAMIC_MAC_ENTRIES_H];
 572                cnt |= (data_hi & masks[DYNAMIC_MAC_TABLE_ENTRIES]) >>
 573                        shifts[DYNAMIC_MAC_ENTRIES];
 574                *entries = cnt + 1;
 575
 576                *fid = (data_hi & masks[DYNAMIC_MAC_TABLE_FID]) >>
 577                        shifts[DYNAMIC_MAC_FID];
 578                *src_port = (data_hi & masks[DYNAMIC_MAC_TABLE_SRC_PORT]) >>
 579                        shifts[DYNAMIC_MAC_SRC_PORT];
 580                *timestamp = (data_hi & masks[DYNAMIC_MAC_TABLE_TIMESTAMP]) >>
 581                        shifts[DYNAMIC_MAC_TIMESTAMP];
 582
 583                mac_addr[5] = (u8)data_lo;
 584                mac_addr[4] = (u8)(data_lo >> 8);
 585                mac_addr[3] = (u8)(data_lo >> 16);
 586                mac_addr[2] = (u8)(data_lo >> 24);
 587
 588                mac_addr[1] = (u8)data_hi;
 589                mac_addr[0] = (u8)(data_hi >> 8);
 590                rc = 0;
 591        }
 592        mutex_unlock(&dev->alu_mutex);
 593
 594        return rc;
 595}
 596
 597static int ksz8_r_sta_mac_table(struct ksz_device *dev, u16 addr,
 598                                struct alu_struct *alu)
 599{
 600        struct ksz8 *ksz8 = dev->priv;
 601        u32 data_hi, data_lo;
 602        const u8 *shifts;
 603        const u32 *masks;
 604        u64 data;
 605
 606        shifts = ksz8->shifts;
 607        masks = ksz8->masks;
 608
 609        ksz8_r_table(dev, TABLE_STATIC_MAC, addr, &data);
 610        data_hi = data >> 32;
 611        data_lo = (u32)data;
 612        if (data_hi & (masks[STATIC_MAC_TABLE_VALID] |
 613                        masks[STATIC_MAC_TABLE_OVERRIDE])) {
 614                alu->mac[5] = (u8)data_lo;
 615                alu->mac[4] = (u8)(data_lo >> 8);
 616                alu->mac[3] = (u8)(data_lo >> 16);
 617                alu->mac[2] = (u8)(data_lo >> 24);
 618                alu->mac[1] = (u8)data_hi;
 619                alu->mac[0] = (u8)(data_hi >> 8);
 620                alu->port_forward =
 621                        (data_hi & masks[STATIC_MAC_TABLE_FWD_PORTS]) >>
 622                                shifts[STATIC_MAC_FWD_PORTS];
 623                alu->is_override =
 624                        (data_hi & masks[STATIC_MAC_TABLE_OVERRIDE]) ? 1 : 0;
 625                data_hi >>= 1;
 626                alu->is_static = true;
 627                alu->is_use_fid =
 628                        (data_hi & masks[STATIC_MAC_TABLE_USE_FID]) ? 1 : 0;
 629                alu->fid = (data_hi & masks[STATIC_MAC_TABLE_FID]) >>
 630                                shifts[STATIC_MAC_FID];
 631                return 0;
 632        }
 633        return -ENXIO;
 634}
 635
 636static void ksz8_w_sta_mac_table(struct ksz_device *dev, u16 addr,
 637                                 struct alu_struct *alu)
 638{
 639        struct ksz8 *ksz8 = dev->priv;
 640        u32 data_hi, data_lo;
 641        const u8 *shifts;
 642        const u32 *masks;
 643        u64 data;
 644
 645        shifts = ksz8->shifts;
 646        masks = ksz8->masks;
 647
 648        data_lo = ((u32)alu->mac[2] << 24) |
 649                ((u32)alu->mac[3] << 16) |
 650                ((u32)alu->mac[4] << 8) | alu->mac[5];
 651        data_hi = ((u32)alu->mac[0] << 8) | alu->mac[1];
 652        data_hi |= (u32)alu->port_forward << shifts[STATIC_MAC_FWD_PORTS];
 653
 654        if (alu->is_override)
 655                data_hi |= masks[STATIC_MAC_TABLE_OVERRIDE];
 656        if (alu->is_use_fid) {
 657                data_hi |= masks[STATIC_MAC_TABLE_USE_FID];
 658                data_hi |= (u32)alu->fid << shifts[STATIC_MAC_FID];
 659        }
 660        if (alu->is_static)
 661                data_hi |= masks[STATIC_MAC_TABLE_VALID];
 662        else
 663                data_hi &= ~masks[STATIC_MAC_TABLE_OVERRIDE];
 664
 665        data = (u64)data_hi << 32 | data_lo;
 666        ksz8_w_table(dev, TABLE_STATIC_MAC, addr, data);
 667}
 668
 669static void ksz8_from_vlan(struct ksz_device *dev, u32 vlan, u8 *fid,
 670                           u8 *member, u8 *valid)
 671{
 672        struct ksz8 *ksz8 = dev->priv;
 673        const u8 *shifts;
 674        const u32 *masks;
 675
 676        shifts = ksz8->shifts;
 677        masks = ksz8->masks;
 678
 679        *fid = vlan & masks[VLAN_TABLE_FID];
 680        *member = (vlan & masks[VLAN_TABLE_MEMBERSHIP]) >>
 681                        shifts[VLAN_TABLE_MEMBERSHIP_S];
 682        *valid = !!(vlan & masks[VLAN_TABLE_VALID]);
 683}
 684
 685static void ksz8_to_vlan(struct ksz_device *dev, u8 fid, u8 member, u8 valid,
 686                         u16 *vlan)
 687{
 688        struct ksz8 *ksz8 = dev->priv;
 689        const u8 *shifts;
 690        const u32 *masks;
 691
 692        shifts = ksz8->shifts;
 693        masks = ksz8->masks;
 694
 695        *vlan = fid;
 696        *vlan |= (u16)member << shifts[VLAN_TABLE_MEMBERSHIP_S];
 697        if (valid)
 698                *vlan |= masks[VLAN_TABLE_VALID];
 699}
 700
 701static void ksz8_r_vlan_entries(struct ksz_device *dev, u16 addr)
 702{
 703        struct ksz8 *ksz8 = dev->priv;
 704        const u8 *shifts;
 705        u64 data;
 706        int i;
 707
 708        shifts = ksz8->shifts;
 709
 710        ksz8_r_table(dev, TABLE_VLAN, addr, &data);
 711        addr *= 4;
 712        for (i = 0; i < 4; i++) {
 713                dev->vlan_cache[addr + i].table[0] = (u16)data;
 714                data >>= shifts[VLAN_TABLE];
 715        }
 716}
 717
 718static void ksz8_r_vlan_table(struct ksz_device *dev, u16 vid, u16 *vlan)
 719{
 720        int index;
 721        u16 *data;
 722        u16 addr;
 723        u64 buf;
 724
 725        data = (u16 *)&buf;
 726        addr = vid / 4;
 727        index = vid & 3;
 728        ksz8_r_table(dev, TABLE_VLAN, addr, &buf);
 729        *vlan = data[index];
 730}
 731
 732static void ksz8_w_vlan_table(struct ksz_device *dev, u16 vid, u16 vlan)
 733{
 734        int index;
 735        u16 *data;
 736        u16 addr;
 737        u64 buf;
 738
 739        data = (u16 *)&buf;
 740        addr = vid / 4;
 741        index = vid & 3;
 742        ksz8_r_table(dev, TABLE_VLAN, addr, &buf);
 743        data[index] = vlan;
 744        dev->vlan_cache[vid].table[0] = vlan;
 745        ksz8_w_table(dev, TABLE_VLAN, addr, buf);
 746}
 747
 748static void ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)
 749{
 750        struct ksz8 *ksz8 = dev->priv;
 751        u8 restart, speed, ctrl, link;
 752        const u8 *regs = ksz8->regs;
 753        int processed = true;
 754        u8 val1, val2;
 755        u16 data = 0;
 756        u8 p = phy;
 757
 758        switch (reg) {
 759        case MII_BMCR:
 760                ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart);
 761                ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed);
 762                ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl);
 763                if (restart & PORT_PHY_LOOPBACK)
 764                        data |= BMCR_LOOPBACK;
 765                if (ctrl & PORT_FORCE_100_MBIT)
 766                        data |= BMCR_SPEED100;
 767                if (ksz_is_ksz88x3(dev)) {
 768                        if ((ctrl & PORT_AUTO_NEG_ENABLE))
 769                                data |= BMCR_ANENABLE;
 770                } else {
 771                        if (!(ctrl & PORT_AUTO_NEG_DISABLE))
 772                                data |= BMCR_ANENABLE;
 773                }
 774                if (restart & PORT_POWER_DOWN)
 775                        data |= BMCR_PDOWN;
 776                if (restart & PORT_AUTO_NEG_RESTART)
 777                        data |= BMCR_ANRESTART;
 778                if (ctrl & PORT_FORCE_FULL_DUPLEX)
 779                        data |= BMCR_FULLDPLX;
 780                if (speed & PORT_HP_MDIX)
 781                        data |= KSZ886X_BMCR_HP_MDIX;
 782                if (restart & PORT_FORCE_MDIX)
 783                        data |= KSZ886X_BMCR_FORCE_MDI;
 784                if (restart & PORT_AUTO_MDIX_DISABLE)
 785                        data |= KSZ886X_BMCR_DISABLE_AUTO_MDIX;
 786                if (restart & PORT_TX_DISABLE)
 787                        data |= KSZ886X_BMCR_DISABLE_TRANSMIT;
 788                if (restart & PORT_LED_OFF)
 789                        data |= KSZ886X_BMCR_DISABLE_LED;
 790                break;
 791        case MII_BMSR:
 792                ksz_pread8(dev, p, regs[P_LINK_STATUS], &link);
 793                data = BMSR_100FULL |
 794                       BMSR_100HALF |
 795                       BMSR_10FULL |
 796                       BMSR_10HALF |
 797                       BMSR_ANEGCAPABLE;
 798                if (link & PORT_AUTO_NEG_COMPLETE)
 799                        data |= BMSR_ANEGCOMPLETE;
 800                if (link & PORT_STAT_LINK_GOOD)
 801                        data |= BMSR_LSTATUS;
 802                break;
 803        case MII_PHYSID1:
 804                data = KSZ8795_ID_HI;
 805                break;
 806        case MII_PHYSID2:
 807                if (ksz_is_ksz88x3(dev))
 808                        data = KSZ8863_ID_LO;
 809                else
 810                        data = KSZ8795_ID_LO;
 811                break;
 812        case MII_ADVERTISE:
 813                ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl);
 814                data = ADVERTISE_CSMA;
 815                if (ctrl & PORT_AUTO_NEG_SYM_PAUSE)
 816                        data |= ADVERTISE_PAUSE_CAP;
 817                if (ctrl & PORT_AUTO_NEG_100BTX_FD)
 818                        data |= ADVERTISE_100FULL;
 819                if (ctrl & PORT_AUTO_NEG_100BTX)
 820                        data |= ADVERTISE_100HALF;
 821                if (ctrl & PORT_AUTO_NEG_10BT_FD)
 822                        data |= ADVERTISE_10FULL;
 823                if (ctrl & PORT_AUTO_NEG_10BT)
 824                        data |= ADVERTISE_10HALF;
 825                break;
 826        case MII_LPA:
 827                ksz_pread8(dev, p, regs[P_REMOTE_STATUS], &link);
 828                data = LPA_SLCT;
 829                if (link & PORT_REMOTE_SYM_PAUSE)
 830                        data |= LPA_PAUSE_CAP;
 831                if (link & PORT_REMOTE_100BTX_FD)
 832                        data |= LPA_100FULL;
 833                if (link & PORT_REMOTE_100BTX)
 834                        data |= LPA_100HALF;
 835                if (link & PORT_REMOTE_10BT_FD)
 836                        data |= LPA_10FULL;
 837                if (link & PORT_REMOTE_10BT)
 838                        data |= LPA_10HALF;
 839                if (data & ~LPA_SLCT)
 840                        data |= LPA_LPACK;
 841                break;
 842        case PHY_REG_LINK_MD:
 843                ksz_pread8(dev, p, REG_PORT_LINK_MD_CTRL, &val1);
 844                ksz_pread8(dev, p, REG_PORT_LINK_MD_RESULT, &val2);
 845                if (val1 & PORT_START_CABLE_DIAG)
 846                        data |= PHY_START_CABLE_DIAG;
 847
 848                if (val1 & PORT_CABLE_10M_SHORT)
 849                        data |= PHY_CABLE_10M_SHORT;
 850
 851                data |= FIELD_PREP(PHY_CABLE_DIAG_RESULT_M,
 852                                FIELD_GET(PORT_CABLE_DIAG_RESULT_M, val1));
 853
 854                data |= FIELD_PREP(PHY_CABLE_FAULT_COUNTER_M,
 855                                (FIELD_GET(PORT_CABLE_FAULT_COUNTER_H, val1) << 8) |
 856                                FIELD_GET(PORT_CABLE_FAULT_COUNTER_L, val2));
 857                break;
 858        case PHY_REG_PHY_CTRL:
 859                ksz_pread8(dev, p, regs[P_LINK_STATUS], &link);
 860                if (link & PORT_MDIX_STATUS)
 861                        data |= KSZ886X_CTRL_MDIX_STAT;
 862                break;
 863        default:
 864                processed = false;
 865                break;
 866        }
 867        if (processed)
 868                *val = data;
 869}
 870
 871static void ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)
 872{
 873        struct ksz8 *ksz8 = dev->priv;
 874        u8 restart, speed, ctrl, data;
 875        const u8 *regs = ksz8->regs;
 876        u8 p = phy;
 877
 878        switch (reg) {
 879        case MII_BMCR:
 880
 881                /* Do not support PHY reset function. */
 882                if (val & BMCR_RESET)
 883                        break;
 884                ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed);
 885                data = speed;
 886                if (val & KSZ886X_BMCR_HP_MDIX)
 887                        data |= PORT_HP_MDIX;
 888                else
 889                        data &= ~PORT_HP_MDIX;
 890                if (data != speed)
 891                        ksz_pwrite8(dev, p, regs[P_SPEED_STATUS], data);
 892                ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl);
 893                data = ctrl;
 894                if (ksz_is_ksz88x3(dev)) {
 895                        if ((val & BMCR_ANENABLE))
 896                                data |= PORT_AUTO_NEG_ENABLE;
 897                        else
 898                                data &= ~PORT_AUTO_NEG_ENABLE;
 899                } else {
 900                        if (!(val & BMCR_ANENABLE))
 901                                data |= PORT_AUTO_NEG_DISABLE;
 902                        else
 903                                data &= ~PORT_AUTO_NEG_DISABLE;
 904
 905                        /* Fiber port does not support auto-negotiation. */
 906                        if (dev->ports[p].fiber)
 907                                data |= PORT_AUTO_NEG_DISABLE;
 908                }
 909
 910                if (val & BMCR_SPEED100)
 911                        data |= PORT_FORCE_100_MBIT;
 912                else
 913                        data &= ~PORT_FORCE_100_MBIT;
 914                if (val & BMCR_FULLDPLX)
 915                        data |= PORT_FORCE_FULL_DUPLEX;
 916                else
 917                        data &= ~PORT_FORCE_FULL_DUPLEX;
 918                if (data != ctrl)
 919                        ksz_pwrite8(dev, p, regs[P_FORCE_CTRL], data);
 920                ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart);
 921                data = restart;
 922                if (val & KSZ886X_BMCR_DISABLE_LED)
 923                        data |= PORT_LED_OFF;
 924                else
 925                        data &= ~PORT_LED_OFF;
 926                if (val & KSZ886X_BMCR_DISABLE_TRANSMIT)
 927                        data |= PORT_TX_DISABLE;
 928                else
 929                        data &= ~PORT_TX_DISABLE;
 930                if (val & BMCR_ANRESTART)
 931                        data |= PORT_AUTO_NEG_RESTART;
 932                else
 933                        data &= ~(PORT_AUTO_NEG_RESTART);
 934                if (val & BMCR_PDOWN)
 935                        data |= PORT_POWER_DOWN;
 936                else
 937                        data &= ~PORT_POWER_DOWN;
 938                if (val & KSZ886X_BMCR_DISABLE_AUTO_MDIX)
 939                        data |= PORT_AUTO_MDIX_DISABLE;
 940                else
 941                        data &= ~PORT_AUTO_MDIX_DISABLE;
 942                if (val & KSZ886X_BMCR_FORCE_MDI)
 943                        data |= PORT_FORCE_MDIX;
 944                else
 945                        data &= ~PORT_FORCE_MDIX;
 946                if (val & BMCR_LOOPBACK)
 947                        data |= PORT_PHY_LOOPBACK;
 948                else
 949                        data &= ~PORT_PHY_LOOPBACK;
 950                if (data != restart)
 951                        ksz_pwrite8(dev, p, regs[P_NEG_RESTART_CTRL], data);
 952                break;
 953        case MII_ADVERTISE:
 954                ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl);
 955                data = ctrl;
 956                data &= ~(PORT_AUTO_NEG_SYM_PAUSE |
 957                          PORT_AUTO_NEG_100BTX_FD |
 958                          PORT_AUTO_NEG_100BTX |
 959                          PORT_AUTO_NEG_10BT_FD |
 960                          PORT_AUTO_NEG_10BT);
 961                if (val & ADVERTISE_PAUSE_CAP)
 962                        data |= PORT_AUTO_NEG_SYM_PAUSE;
 963                if (val & ADVERTISE_100FULL)
 964                        data |= PORT_AUTO_NEG_100BTX_FD;
 965                if (val & ADVERTISE_100HALF)
 966                        data |= PORT_AUTO_NEG_100BTX;
 967                if (val & ADVERTISE_10FULL)
 968                        data |= PORT_AUTO_NEG_10BT_FD;
 969                if (val & ADVERTISE_10HALF)
 970                        data |= PORT_AUTO_NEG_10BT;
 971                if (data != ctrl)
 972                        ksz_pwrite8(dev, p, regs[P_LOCAL_CTRL], data);
 973                break;
 974        case PHY_REG_LINK_MD:
 975                if (val & PHY_START_CABLE_DIAG)
 976                        ksz_port_cfg(dev, p, REG_PORT_LINK_MD_CTRL, PORT_START_CABLE_DIAG, true);
 977                break;
 978        default:
 979                break;
 980        }
 981}
 982
 983static enum dsa_tag_protocol ksz8_get_tag_protocol(struct dsa_switch *ds,
 984                                                   int port,
 985                                                   enum dsa_tag_protocol mp)
 986{
 987        struct ksz_device *dev = ds->priv;
 988
 989        /* ksz88x3 uses the same tag schema as KSZ9893 */
 990        return ksz_is_ksz88x3(dev) ?
 991                DSA_TAG_PROTO_KSZ9893 : DSA_TAG_PROTO_KSZ8795;
 992}
 993
 994static u32 ksz8_sw_get_phy_flags(struct dsa_switch *ds, int port)
 995{
 996        /* Silicon Errata Sheet (DS80000830A):
 997         * Port 1 does not work with LinkMD Cable-Testing.
 998         * Port 1 does not respond to received PAUSE control frames.
 999         */
1000        if (!port)
1001                return MICREL_KSZ8_P1_ERRATA;
1002
1003        return 0;
1004}
1005
1006static void ksz8_get_strings(struct dsa_switch *ds, int port,
1007                             u32 stringset, uint8_t *buf)
1008{
1009        struct ksz_device *dev = ds->priv;
1010        int i;
1011
1012        for (i = 0; i < dev->mib_cnt; i++) {
1013                memcpy(buf + i * ETH_GSTRING_LEN,
1014                       dev->mib_names[i].string, ETH_GSTRING_LEN);
1015        }
1016}
1017
1018static void ksz8_cfg_port_member(struct ksz_device *dev, int port, u8 member)
1019{
1020        u8 data;
1021
1022        ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
1023        data &= ~PORT_VLAN_MEMBERSHIP;
1024        data |= (member & dev->port_mask);
1025        ksz_pwrite8(dev, port, P_MIRROR_CTRL, data);
1026}
1027
1028static void ksz8_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
1029{
1030        struct ksz_device *dev = ds->priv;
1031        struct ksz_port *p;
1032        u8 data;
1033
1034        ksz_pread8(dev, port, P_STP_CTRL, &data);
1035        data &= ~(PORT_TX_ENABLE | PORT_RX_ENABLE | PORT_LEARN_DISABLE);
1036
1037        switch (state) {
1038        case BR_STATE_DISABLED:
1039                data |= PORT_LEARN_DISABLE;
1040                break;
1041        case BR_STATE_LISTENING:
1042                data |= (PORT_RX_ENABLE | PORT_LEARN_DISABLE);
1043                break;
1044        case BR_STATE_LEARNING:
1045                data |= PORT_RX_ENABLE;
1046                break;
1047        case BR_STATE_FORWARDING:
1048                data |= (PORT_TX_ENABLE | PORT_RX_ENABLE);
1049                break;
1050        case BR_STATE_BLOCKING:
1051                data |= PORT_LEARN_DISABLE;
1052                break;
1053        default:
1054                dev_err(ds->dev, "invalid STP state: %d\n", state);
1055                return;
1056        }
1057
1058        ksz_pwrite8(dev, port, P_STP_CTRL, data);
1059
1060        p = &dev->ports[port];
1061        p->stp_state = state;
1062
1063        ksz_update_port_member(dev, port);
1064}
1065
1066static void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)
1067{
1068        u8 learn[DSA_MAX_PORTS];
1069        int first, index, cnt;
1070        struct ksz_port *p;
1071
1072        if ((uint)port < dev->port_cnt) {
1073                first = port;
1074                cnt = port + 1;
1075        } else {
1076                /* Flush all ports. */
1077                first = 0;
1078                cnt = dev->port_cnt;
1079        }
1080        for (index = first; index < cnt; index++) {
1081                p = &dev->ports[index];
1082                if (!p->on)
1083                        continue;
1084                ksz_pread8(dev, index, P_STP_CTRL, &learn[index]);
1085                if (!(learn[index] & PORT_LEARN_DISABLE))
1086                        ksz_pwrite8(dev, index, P_STP_CTRL,
1087                                    learn[index] | PORT_LEARN_DISABLE);
1088        }
1089        ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_DYN_MAC_TABLE, true);
1090        for (index = first; index < cnt; index++) {
1091                p = &dev->ports[index];
1092                if (!p->on)
1093                        continue;
1094                if (!(learn[index] & PORT_LEARN_DISABLE))
1095                        ksz_pwrite8(dev, index, P_STP_CTRL, learn[index]);
1096        }
1097}
1098
1099static int ksz8_port_vlan_filtering(struct dsa_switch *ds, int port, bool flag,
1100                                    struct netlink_ext_ack *extack)
1101{
1102        struct ksz_device *dev = ds->priv;
1103
1104        if (ksz_is_ksz88x3(dev))
1105                return -ENOTSUPP;
1106
1107        /* Discard packets with VID not enabled on the switch */
1108        ksz_cfg(dev, S_MIRROR_CTRL, SW_VLAN_ENABLE, flag);
1109
1110        /* Discard packets with VID not enabled on the ingress port */
1111        for (port = 0; port < dev->phy_port_cnt; ++port)
1112                ksz_port_cfg(dev, port, REG_PORT_CTRL_2, PORT_INGRESS_FILTER,
1113                             flag);
1114
1115        return 0;
1116}
1117
1118static void ksz8_port_enable_pvid(struct ksz_device *dev, int port, bool state)
1119{
1120        if (ksz_is_ksz88x3(dev)) {
1121                ksz_cfg(dev, REG_SW_INSERT_SRC_PVID,
1122                        0x03 << (4 - 2 * port), state);
1123        } else {
1124                ksz_pwrite8(dev, port, REG_PORT_CTRL_12, state ? 0x0f : 0x00);
1125        }
1126}
1127
1128static int ksz8_port_vlan_add(struct dsa_switch *ds, int port,
1129                              const struct switchdev_obj_port_vlan *vlan,
1130                              struct netlink_ext_ack *extack)
1131{
1132        bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
1133        struct ksz_device *dev = ds->priv;
1134        struct ksz_port *p = &dev->ports[port];
1135        u16 data, new_pvid = 0;
1136        u8 fid, member, valid;
1137
1138        if (ksz_is_ksz88x3(dev))
1139                return -ENOTSUPP;
1140
1141        /* If a VLAN is added with untagged flag different from the
1142         * port's Remove Tag flag, we need to change the latter.
1143         * Ignore VID 0, which is always untagged.
1144         * Ignore CPU port, which will always be tagged.
1145         */
1146        if (untagged != p->remove_tag && vlan->vid != 0 &&
1147            port != dev->cpu_port) {
1148                unsigned int vid;
1149
1150                /* Reject attempts to add a VLAN that requires the
1151                 * Remove Tag flag to be changed, unless there are no
1152                 * other VLANs currently configured.
1153                 */
1154                for (vid = 1; vid < dev->num_vlans; ++vid) {
1155                        /* Skip the VID we are going to add or reconfigure */
1156                        if (vid == vlan->vid)
1157                                continue;
1158
1159                        ksz8_from_vlan(dev, dev->vlan_cache[vid].table[0],
1160                                       &fid, &member, &valid);
1161                        if (valid && (member & BIT(port)))
1162                                return -EINVAL;
1163                }
1164
1165                ksz_port_cfg(dev, port, P_TAG_CTRL, PORT_REMOVE_TAG, untagged);
1166                p->remove_tag = untagged;
1167        }
1168
1169        ksz8_r_vlan_table(dev, vlan->vid, &data);
1170        ksz8_from_vlan(dev, data, &fid, &member, &valid);
1171
1172        /* First time to setup the VLAN entry. */
1173        if (!valid) {
1174                /* Need to find a way to map VID to FID. */
1175                fid = 1;
1176                valid = 1;
1177        }
1178        member |= BIT(port);
1179
1180        ksz8_to_vlan(dev, fid, member, valid, &data);
1181        ksz8_w_vlan_table(dev, vlan->vid, data);
1182
1183        /* change PVID */
1184        if (vlan->flags & BRIDGE_VLAN_INFO_PVID)
1185                new_pvid = vlan->vid;
1186
1187        if (new_pvid) {
1188                u16 vid;
1189
1190                ksz_pread16(dev, port, REG_PORT_CTRL_VID, &vid);
1191                vid &= ~VLAN_VID_MASK;
1192                vid |= new_pvid;
1193                ksz_pwrite16(dev, port, REG_PORT_CTRL_VID, vid);
1194
1195                ksz8_port_enable_pvid(dev, port, true);
1196        }
1197
1198        return 0;
1199}
1200
1201static int ksz8_port_vlan_del(struct dsa_switch *ds, int port,
1202                              const struct switchdev_obj_port_vlan *vlan)
1203{
1204        struct ksz_device *dev = ds->priv;
1205        u16 data, pvid;
1206        u8 fid, member, valid;
1207
1208        if (ksz_is_ksz88x3(dev))
1209                return -ENOTSUPP;
1210
1211        ksz_pread16(dev, port, REG_PORT_CTRL_VID, &pvid);
1212        pvid = pvid & 0xFFF;
1213
1214        ksz8_r_vlan_table(dev, vlan->vid, &data);
1215        ksz8_from_vlan(dev, data, &fid, &member, &valid);
1216
1217        member &= ~BIT(port);
1218
1219        /* Invalidate the entry if no more member. */
1220        if (!member) {
1221                fid = 0;
1222                valid = 0;
1223        }
1224
1225        ksz8_to_vlan(dev, fid, member, valid, &data);
1226        ksz8_w_vlan_table(dev, vlan->vid, data);
1227
1228        if (pvid == vlan->vid)
1229                ksz8_port_enable_pvid(dev, port, false);
1230
1231        return 0;
1232}
1233
1234static int ksz8_port_mirror_add(struct dsa_switch *ds, int port,
1235                                struct dsa_mall_mirror_tc_entry *mirror,
1236                                bool ingress, struct netlink_ext_ack *extack)
1237{
1238        struct ksz_device *dev = ds->priv;
1239
1240        if (ingress) {
1241                ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);
1242                dev->mirror_rx |= BIT(port);
1243        } else {
1244                ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);
1245                dev->mirror_tx |= BIT(port);
1246        }
1247
1248        ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false);
1249
1250        /* configure mirror port */
1251        if (dev->mirror_rx || dev->mirror_tx)
1252                ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1253                             PORT_MIRROR_SNIFFER, true);
1254
1255        return 0;
1256}
1257
1258static void ksz8_port_mirror_del(struct dsa_switch *ds, int port,
1259                                 struct dsa_mall_mirror_tc_entry *mirror)
1260{
1261        struct ksz_device *dev = ds->priv;
1262        u8 data;
1263
1264        if (mirror->ingress) {
1265                ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);
1266                dev->mirror_rx &= ~BIT(port);
1267        } else {
1268                ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);
1269                dev->mirror_tx &= ~BIT(port);
1270        }
1271
1272        ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
1273
1274        if (!dev->mirror_rx && !dev->mirror_tx)
1275                ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1276                             PORT_MIRROR_SNIFFER, false);
1277}
1278
1279static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port)
1280{
1281        struct ksz_port *p = &dev->ports[port];
1282        u8 data8;
1283
1284        if (!p->interface && dev->compat_interface) {
1285                dev_warn(dev->dev,
1286                         "Using legacy switch \"phy-mode\" property, because it is missing on port %d node. "
1287                         "Please update your device tree.\n",
1288                         port);
1289                p->interface = dev->compat_interface;
1290        }
1291
1292        /* Configure MII interface for proper network communication. */
1293        ksz_read8(dev, REG_PORT_5_CTRL_6, &data8);
1294        data8 &= ~PORT_INTERFACE_TYPE;
1295        data8 &= ~PORT_GMII_1GPS_MODE;
1296        switch (p->interface) {
1297        case PHY_INTERFACE_MODE_MII:
1298                p->phydev.speed = SPEED_100;
1299                break;
1300        case PHY_INTERFACE_MODE_RMII:
1301                data8 |= PORT_INTERFACE_RMII;
1302                p->phydev.speed = SPEED_100;
1303                break;
1304        case PHY_INTERFACE_MODE_GMII:
1305                data8 |= PORT_GMII_1GPS_MODE;
1306                data8 |= PORT_INTERFACE_GMII;
1307                p->phydev.speed = SPEED_1000;
1308                break;
1309        default:
1310                data8 &= ~PORT_RGMII_ID_IN_ENABLE;
1311                data8 &= ~PORT_RGMII_ID_OUT_ENABLE;
1312                if (p->interface == PHY_INTERFACE_MODE_RGMII_ID ||
1313                    p->interface == PHY_INTERFACE_MODE_RGMII_RXID)
1314                        data8 |= PORT_RGMII_ID_IN_ENABLE;
1315                if (p->interface == PHY_INTERFACE_MODE_RGMII_ID ||
1316                    p->interface == PHY_INTERFACE_MODE_RGMII_TXID)
1317                        data8 |= PORT_RGMII_ID_OUT_ENABLE;
1318                data8 |= PORT_GMII_1GPS_MODE;
1319                data8 |= PORT_INTERFACE_RGMII;
1320                p->phydev.speed = SPEED_1000;
1321                break;
1322        }
1323        ksz_write8(dev, REG_PORT_5_CTRL_6, data8);
1324        p->phydev.duplex = 1;
1325}
1326
1327static void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)
1328{
1329        struct dsa_switch *ds = dev->ds;
1330        struct ksz8 *ksz8 = dev->priv;
1331        const u32 *masks;
1332        u8 member;
1333
1334        masks = ksz8->masks;
1335
1336        /* enable broadcast storm limit */
1337        ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true);
1338
1339        if (!ksz_is_ksz88x3(dev))
1340                ksz8795_set_prio_queue(dev, port, 4);
1341
1342        /* disable DiffServ priority */
1343        ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_DIFFSERV_ENABLE, false);
1344
1345        /* replace priority */
1346        ksz_port_cfg(dev, port, P_802_1P_CTRL,
1347                     masks[PORT_802_1P_REMAPPING], false);
1348
1349        /* enable 802.1p priority */
1350        ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_ENABLE, true);
1351
1352        if (cpu_port) {
1353                if (!ksz_is_ksz88x3(dev))
1354                        ksz8795_cpu_interface_select(dev, port);
1355
1356                member = dsa_user_ports(ds);
1357        } else {
1358                member = BIT(dsa_upstream_port(ds, port));
1359        }
1360
1361        ksz8_cfg_port_member(dev, port, member);
1362}
1363
1364static void ksz8_config_cpu_port(struct dsa_switch *ds)
1365{
1366        struct ksz_device *dev = ds->priv;
1367        struct ksz8 *ksz8 = dev->priv;
1368        const u8 *regs = ksz8->regs;
1369        struct ksz_port *p;
1370        const u32 *masks;
1371        u8 remote;
1372        int i;
1373
1374        masks = ksz8->masks;
1375
1376        /* Switch marks the maximum frame with extra byte as oversize. */
1377        ksz_cfg(dev, REG_SW_CTRL_2, SW_LEGAL_PACKET_DISABLE, true);
1378        ksz_cfg(dev, regs[S_TAIL_TAG_CTRL], masks[SW_TAIL_TAG_ENABLE], true);
1379
1380        p = &dev->ports[dev->cpu_port];
1381        p->on = 1;
1382
1383        ksz8_port_setup(dev, dev->cpu_port, true);
1384
1385        for (i = 0; i < dev->phy_port_cnt; i++) {
1386                p = &dev->ports[i];
1387
1388                ksz8_port_stp_state_set(ds, i, BR_STATE_DISABLED);
1389
1390                /* Last port may be disabled. */
1391                if (i == dev->phy_port_cnt)
1392                        break;
1393                p->on = 1;
1394                p->phy = 1;
1395        }
1396        for (i = 0; i < dev->phy_port_cnt; i++) {
1397                p = &dev->ports[i];
1398                if (!p->on)
1399                        continue;
1400                if (!ksz_is_ksz88x3(dev)) {
1401                        ksz_pread8(dev, i, regs[P_REMOTE_STATUS], &remote);
1402                        if (remote & PORT_FIBER_MODE)
1403                                p->fiber = 1;
1404                }
1405                if (p->fiber)
1406                        ksz_port_cfg(dev, i, P_STP_CTRL, PORT_FORCE_FLOW_CTRL,
1407                                     true);
1408                else
1409                        ksz_port_cfg(dev, i, P_STP_CTRL, PORT_FORCE_FLOW_CTRL,
1410                                     false);
1411        }
1412}
1413
1414static int ksz8_handle_global_errata(struct dsa_switch *ds)
1415{
1416        struct ksz_device *dev = ds->priv;
1417        int ret = 0;
1418
1419        /* KSZ87xx Errata DS80000687C.
1420         * Module 2: Link drops with some EEE link partners.
1421         *   An issue with the EEE next page exchange between the
1422         *   KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in
1423         *   the link dropping.
1424         */
1425        if (dev->ksz87xx_eee_link_erratum)
1426                ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
1427
1428        return ret;
1429}
1430
1431static int ksz8_setup(struct dsa_switch *ds)
1432{
1433        struct ksz_device *dev = ds->priv;
1434        struct alu_struct alu;
1435        int i, ret = 0;
1436
1437        dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table),
1438                                       dev->num_vlans, GFP_KERNEL);
1439        if (!dev->vlan_cache)
1440                return -ENOMEM;
1441
1442        ret = ksz8_reset_switch(dev);
1443        if (ret) {
1444                dev_err(ds->dev, "failed to reset switch\n");
1445                return ret;
1446        }
1447
1448        ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true);
1449
1450        /* Enable automatic fast aging when link changed detected. */
1451        ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);
1452
1453        /* Enable aggressive back off algorithm in half duplex mode. */
1454        regmap_update_bits(dev->regmap[0], REG_SW_CTRL_1,
1455                           SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);
1456
1457        /*
1458         * Make sure unicast VLAN boundary is set as default and
1459         * enable no excessive collision drop.
1460         */
1461        regmap_update_bits(dev->regmap[0], REG_SW_CTRL_2,
1462                           UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP,
1463                           UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP);
1464
1465        ksz8_config_cpu_port(ds);
1466
1467        ksz_cfg(dev, REG_SW_CTRL_2, MULTICAST_STORM_DISABLE, true);
1468
1469        ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_REPLACE_VID, false);
1470
1471        ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);
1472
1473        if (!ksz_is_ksz88x3(dev))
1474                ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true);
1475
1476        /* set broadcast storm protection 10% rate */
1477        regmap_update_bits(dev->regmap[1], S_REPLACE_VID_CTRL,
1478                           BROADCAST_STORM_RATE,
1479                           (BROADCAST_STORM_VALUE *
1480                           BROADCAST_STORM_PROT_RATE) / 100);
1481
1482        for (i = 0; i < (dev->num_vlans / 4); i++)
1483                ksz8_r_vlan_entries(dev, i);
1484
1485        /* Setup STP address for STP operation. */
1486        memset(&alu, 0, sizeof(alu));
1487        ether_addr_copy(alu.mac, eth_stp_addr);
1488        alu.is_static = true;
1489        alu.is_override = true;
1490        alu.port_forward = dev->host_mask;
1491
1492        ksz8_w_sta_mac_table(dev, 0, &alu);
1493
1494        ksz_init_mib_timer(dev);
1495
1496        ds->configure_vlan_while_not_filtering = false;
1497
1498        return ksz8_handle_global_errata(ds);
1499}
1500
1501static void ksz8_get_caps(struct dsa_switch *ds, int port,
1502                          struct phylink_config *config)
1503{
1504        struct ksz_device *dev = ds->priv;
1505
1506        if (port == dev->cpu_port) {
1507                __set_bit(PHY_INTERFACE_MODE_RMII,
1508                          config->supported_interfaces);
1509                __set_bit(PHY_INTERFACE_MODE_MII,
1510                          config->supported_interfaces);
1511        } else {
1512                __set_bit(PHY_INTERFACE_MODE_INTERNAL,
1513                          config->supported_interfaces);
1514        }
1515
1516        config->mac_capabilities = MAC_10 | MAC_100;
1517
1518        /* Silicon Errata Sheet (DS80000830A):
1519         * "Port 1 does not respond to received flow control PAUSE frames"
1520         * So, disable Pause support on "Port 1" (port == 0) for all ksz88x3
1521         * switches.
1522         */
1523        if (!ksz_is_ksz88x3(dev) || port)
1524                config->mac_capabilities |= MAC_SYM_PAUSE;
1525
1526        /* Asym pause is not supported on KSZ8863 and KSZ8873 */
1527        if (!ksz_is_ksz88x3(dev))
1528                config->mac_capabilities |= MAC_ASYM_PAUSE;
1529}
1530
1531static const struct dsa_switch_ops ksz8_switch_ops = {
1532        .get_tag_protocol       = ksz8_get_tag_protocol,
1533        .get_phy_flags          = ksz8_sw_get_phy_flags,
1534        .setup                  = ksz8_setup,
1535        .phy_read               = ksz_phy_read16,
1536        .phy_write              = ksz_phy_write16,
1537        .phylink_get_caps       = ksz8_get_caps,
1538        .phylink_mac_link_down  = ksz_mac_link_down,
1539        .port_enable            = ksz_enable_port,
1540        .get_strings            = ksz8_get_strings,
1541        .get_ethtool_stats      = ksz_get_ethtool_stats,
1542        .get_sset_count         = ksz_sset_count,
1543        .port_bridge_join       = ksz_port_bridge_join,
1544        .port_bridge_leave      = ksz_port_bridge_leave,
1545        .port_stp_state_set     = ksz8_port_stp_state_set,
1546        .port_fast_age          = ksz_port_fast_age,
1547        .port_vlan_filtering    = ksz8_port_vlan_filtering,
1548        .port_vlan_add          = ksz8_port_vlan_add,
1549        .port_vlan_del          = ksz8_port_vlan_del,
1550        .port_fdb_dump          = ksz_port_fdb_dump,
1551        .port_mdb_add           = ksz_port_mdb_add,
1552        .port_mdb_del           = ksz_port_mdb_del,
1553        .port_mirror_add        = ksz8_port_mirror_add,
1554        .port_mirror_del        = ksz8_port_mirror_del,
1555};
1556
1557static u32 ksz8_get_port_addr(int port, int offset)
1558{
1559        return PORT_CTRL_ADDR(port, offset);
1560}
1561
1562static int ksz8_switch_detect(struct ksz_device *dev)
1563{
1564        u8 id1, id2;
1565        u16 id16;
1566        int ret;
1567
1568        /* read chip id */
1569        ret = ksz_read16(dev, REG_CHIP_ID0, &id16);
1570        if (ret)
1571                return ret;
1572
1573        id1 = id16 >> 8;
1574        id2 = id16 & SW_CHIP_ID_M;
1575
1576        switch (id1) {
1577        case KSZ87_FAMILY_ID:
1578                if ((id2 != CHIP_ID_94 && id2 != CHIP_ID_95))
1579                        return -ENODEV;
1580
1581                if (id2 == CHIP_ID_95) {
1582                        u8 val;
1583
1584                        id2 = 0x95;
1585                        ksz_read8(dev, REG_PORT_STATUS_0, &val);
1586                        if (val & PORT_FIBER_MODE)
1587                                id2 = 0x65;
1588                } else if (id2 == CHIP_ID_94) {
1589                        id2 = 0x94;
1590                }
1591                break;
1592        case KSZ88_FAMILY_ID:
1593                if (id2 != CHIP_ID_63)
1594                        return -ENODEV;
1595                break;
1596        default:
1597                dev_err(dev->dev, "invalid family id: %d\n", id1);
1598                return -ENODEV;
1599        }
1600        id16 &= ~0xff;
1601        id16 |= id2;
1602        dev->chip_id = id16;
1603
1604        return 0;
1605}
1606
1607struct ksz_chip_data {
1608        u16 chip_id;
1609        const char *dev_name;
1610        int num_vlans;
1611        int num_alus;
1612        int num_statics;
1613        int cpu_ports;
1614        int port_cnt;
1615        bool ksz87xx_eee_link_erratum;
1616};
1617
1618static const struct ksz_chip_data ksz8_switch_chips[] = {
1619        {
1620                .chip_id = 0x8795,
1621                .dev_name = "KSZ8795",
1622                .num_vlans = 4096,
1623                .num_alus = 0,
1624                .num_statics = 8,
1625                .cpu_ports = 0x10,      /* can be configured as cpu port */
1626                .port_cnt = 5,          /* total cpu and user ports */
1627                .ksz87xx_eee_link_erratum = true,
1628        },
1629        {
1630                /*
1631                 * WARNING
1632                 * =======
1633                 * KSZ8794 is similar to KSZ8795, except the port map
1634                 * contains a gap between external and CPU ports, the
1635                 * port map is NOT continuous. The per-port register
1636                 * map is shifted accordingly too, i.e. registers at
1637                 * offset 0x40 are NOT used on KSZ8794 and they ARE
1638                 * used on KSZ8795 for external port 3.
1639                 *           external  cpu
1640                 * KSZ8794   0,1,2      4
1641                 * KSZ8795   0,1,2,3    4
1642                 * KSZ8765   0,1,2,3    4
1643                 */
1644                .chip_id = 0x8794,
1645                .dev_name = "KSZ8794",
1646                .num_vlans = 4096,
1647                .num_alus = 0,
1648                .num_statics = 8,
1649                .cpu_ports = 0x10,      /* can be configured as cpu port */
1650                .port_cnt = 4,          /* total cpu and user ports */
1651                .ksz87xx_eee_link_erratum = true,
1652        },
1653        {
1654                .chip_id = 0x8765,
1655                .dev_name = "KSZ8765",
1656                .num_vlans = 4096,
1657                .num_alus = 0,
1658                .num_statics = 8,
1659                .cpu_ports = 0x10,      /* can be configured as cpu port */
1660                .port_cnt = 5,          /* total cpu and user ports */
1661                .ksz87xx_eee_link_erratum = true,
1662        },
1663        {
1664                .chip_id = 0x8830,
1665                .dev_name = "KSZ8863/KSZ8873",
1666                .num_vlans = 16,
1667                .num_alus = 0,
1668                .num_statics = 8,
1669                .cpu_ports = 0x4,       /* can be configured as cpu port */
1670                .port_cnt = 3,
1671        },
1672};
1673
1674static int ksz8_switch_init(struct ksz_device *dev)
1675{
1676        struct ksz8 *ksz8 = dev->priv;
1677        int i;
1678
1679        dev->ds->ops = &ksz8_switch_ops;
1680
1681        for (i = 0; i < ARRAY_SIZE(ksz8_switch_chips); i++) {
1682                const struct ksz_chip_data *chip = &ksz8_switch_chips[i];
1683
1684                if (dev->chip_id == chip->chip_id) {
1685                        dev->name = chip->dev_name;
1686                        dev->num_vlans = chip->num_vlans;
1687                        dev->num_alus = chip->num_alus;
1688                        dev->num_statics = chip->num_statics;
1689                        dev->port_cnt = fls(chip->cpu_ports);
1690                        dev->cpu_port = fls(chip->cpu_ports) - 1;
1691                        dev->phy_port_cnt = dev->port_cnt - 1;
1692                        dev->cpu_ports = chip->cpu_ports;
1693                        dev->host_mask = chip->cpu_ports;
1694                        dev->port_mask = (BIT(dev->phy_port_cnt) - 1) |
1695                                         chip->cpu_ports;
1696                        dev->ksz87xx_eee_link_erratum =
1697                                chip->ksz87xx_eee_link_erratum;
1698                        break;
1699                }
1700        }
1701
1702        /* no switch found */
1703        if (!dev->cpu_ports)
1704                return -ENODEV;
1705
1706        if (ksz_is_ksz88x3(dev)) {
1707                ksz8->regs = ksz8863_regs;
1708                ksz8->masks = ksz8863_masks;
1709                ksz8->shifts = ksz8863_shifts;
1710                dev->mib_cnt = ARRAY_SIZE(ksz88xx_mib_names);
1711                dev->mib_names = ksz88xx_mib_names;
1712        } else {
1713                ksz8->regs = ksz8795_regs;
1714                ksz8->masks = ksz8795_masks;
1715                ksz8->shifts = ksz8795_shifts;
1716                dev->mib_cnt = ARRAY_SIZE(ksz87xx_mib_names);
1717                dev->mib_names = ksz87xx_mib_names;
1718        }
1719
1720        dev->reg_mib_cnt = MIB_COUNTER_NUM;
1721
1722        dev->ports = devm_kzalloc(dev->dev,
1723                                  dev->port_cnt * sizeof(struct ksz_port),
1724                                  GFP_KERNEL);
1725        if (!dev->ports)
1726                return -ENOMEM;
1727        for (i = 0; i < dev->port_cnt; i++) {
1728                mutex_init(&dev->ports[i].mib.cnt_mutex);
1729                dev->ports[i].mib.counters =
1730                        devm_kzalloc(dev->dev,
1731                                     sizeof(u64) *
1732                                     (dev->mib_cnt + 1),
1733                                     GFP_KERNEL);
1734                if (!dev->ports[i].mib.counters)
1735                        return -ENOMEM;
1736        }
1737
1738        /* set the real number of ports */
1739        dev->ds->num_ports = dev->port_cnt;
1740
1741        /* We rely on software untagging on the CPU port, so that we
1742         * can support both tagged and untagged VLANs
1743         */
1744        dev->ds->untag_bridge_pvid = true;
1745
1746        /* VLAN filtering is partly controlled by the global VLAN
1747         * Enable flag
1748         */
1749        dev->ds->vlan_filtering_is_global = true;
1750
1751        return 0;
1752}
1753
1754static void ksz8_switch_exit(struct ksz_device *dev)
1755{
1756        ksz8_reset_switch(dev);
1757}
1758
1759static const struct ksz_dev_ops ksz8_dev_ops = {
1760        .get_port_addr = ksz8_get_port_addr,
1761        .cfg_port_member = ksz8_cfg_port_member,
1762        .flush_dyn_mac_table = ksz8_flush_dyn_mac_table,
1763        .port_setup = ksz8_port_setup,
1764        .r_phy = ksz8_r_phy,
1765        .w_phy = ksz8_w_phy,
1766        .r_dyn_mac_table = ksz8_r_dyn_mac_table,
1767        .r_sta_mac_table = ksz8_r_sta_mac_table,
1768        .w_sta_mac_table = ksz8_w_sta_mac_table,
1769        .r_mib_cnt = ksz8_r_mib_cnt,
1770        .r_mib_pkt = ksz8_r_mib_pkt,
1771        .freeze_mib = ksz8_freeze_mib,
1772        .port_init_cnt = ksz8_port_init_cnt,
1773        .shutdown = ksz8_reset_switch,
1774        .detect = ksz8_switch_detect,
1775        .init = ksz8_switch_init,
1776        .exit = ksz8_switch_exit,
1777};
1778
1779int ksz8_switch_register(struct ksz_device *dev)
1780{
1781        return ksz_switch_register(dev, &ksz8_dev_ops);
1782}
1783EXPORT_SYMBOL(ksz8_switch_register);
1784
1785MODULE_AUTHOR("Tristram Ha <Tristram.Ha@microchip.com>");
1786MODULE_DESCRIPTION("Microchip KSZ8795 Series Switch DSA Driver");
1787MODULE_LICENSE("GPL");
1788