LXR linux/drivers/net/ethernet/huawei/hinic/hinic

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/* Huawei HiNIC PCI Express Linux driver
   3 * Copyright(c) 2017 Huawei Technologies Co., Ltd
   4 */
   5
   6#ifndef HINIC_DEBUGFS_H
   7#define HINIC_DEBUGFS_H
   8
   9#include "hinic_dev.h"
  10
  11#define    TBL_ID_FUNC_CFG_SM_NODE                      11
  12#define    TBL_ID_FUNC_CFG_SM_INST                      1
  13
  14#define HINIC_FUNCTION_CONFIGURE_TABLE_SIZE             64
  15#define HINIC_FUNCTION_CONFIGURE_TABLE                  1
  16
  17struct hinic_cmd_lt_rd {
  18        u8      status;
  19        u8      version;
  20        u8      rsvd0[6];
  21
  22        unsigned char node;
  23        unsigned char inst;
  24        unsigned char entry_size;
  25        unsigned char rsvd;
  26        unsigned int lt_index;
  27        unsigned int offset;
  28        unsigned int len;
  29        unsigned char data[100];
  30};
  31
  32struct tag_sml_funcfg_tbl {
  33        union {
  34                struct {
  35                        u32 rsvd0            :8;
  36                        u32 nic_rx_mode      :5;
  37                        u32 rsvd1            :18;
  38                        u32 valid            :1;
  39                } bs;
  40
  41                u32 value;
  42        } dw0;
  43
  44        union {
  45                struct {
  46                        u32 vlan_id             :12;
  47                        u32 vlan_mode           :3;
  48                        u32 fast_recycled_mode  :1;
  49                        u32 mtu                 :16;
  50                } bs;
  51
  52                u32 value;
  53        } dw1;
  54
  55        u32 dw2;
  56        u32 dw3;
  57        u32 dw4;
  58        u32 dw5;
  59        u32 dw6;
  60        u32 dw7;
  61        u32 dw8;
  62        u32 dw9;
  63        u32 dw10;
  64        u32 dw11;
  65        u32 dw12;
  66
  67        union {
  68                struct {
  69                        u32 rsvd2               :15;
  70                        u32 cfg_q_num           :9;
  71                        u32 cfg_rq_depth        :6;
  72                        u32 vhd_type            :2;
  73                } bs;
  74
  75                u32 value;
  76        } dw13;
  77
  78        u32 dw14;
  79        u32 dw15;
  80};
  81
  82int hinic_sq_debug_add(struct hinic_dev *dev, u16 sq_id);
  83
  84void hinic_sq_debug_rem(struct hinic_sq *sq);
  85
  86int hinic_rq_debug_add(struct hinic_dev *dev, u16 rq_id);
  87
  88void hinic_rq_debug_rem(struct hinic_rq *rq);
  89
  90int hinic_func_table_debug_add(struct hinic_dev *dev);
  91
  92void hinic_func_table_debug_rem(struct hinic_dev *dev);
  93
  94void hinic_sq_dbgfs_init(struct hinic_dev *nic_dev);
  95
  96void hinic_sq_dbgfs_uninit(struct hinic_dev *nic_dev);
  97
  98void hinic_rq_dbgfs_init(struct hinic_dev *nic_dev);
  99
 100void hinic_rq_dbgfs_uninit(struct hinic_dev *nic_dev);
 101
 102void hinic_func_tbl_dbgfs_init(struct hinic_dev *nic_dev);
 103
 104void hinic_func_tbl_dbgfs_uninit(struct hinic_dev *nic_dev);
 105
 106void hinic_dbg_init(struct hinic_dev *nic_dev);
 107
 108void hinic_dbg_uninit(struct hinic_dev *nic_dev);
 109
 110void hinic_dbg_register_debugfs(const char *debugfs_dir_name);
 111
 112void hinic_dbg_unregister_debugfs(void);
 113
 114#endif
 115